CN113763852A - Display driving circuit and display apparatus using the same - Google Patents
Display driving circuit and display apparatus using the same Download PDFInfo
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- CN113763852A CN113763852A CN202010492398.0A CN202010492398A CN113763852A CN 113763852 A CN113763852 A CN 113763852A CN 202010492398 A CN202010492398 A CN 202010492398A CN 113763852 A CN113763852 A CN 113763852A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/06—Adjustment of display parameters
- G09G2320/0673—Adjustment of display parameters for control of gamma adjustment, e.g. selecting another gamma curve
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Abstract
The invention relates to a display driving circuit and a display device using the same. The GAMMA output circuit is used for outputting GAMMA voltages of a plurality of gray scales. Each digital-to-analog converter receives the GAMMA voltages and provides an output data voltage according to display data. The input end of each source electrode amplifier is correspondingly coupled with the output ends of the digital-to-analog converters so as to receive the corresponding output data voltage. The pre-charging circuit is coupled between the input terminal of at least one of the source amplifiers and the output terminal of at least one of the digital-to-analog converters, and is used for pre-charging the input terminal of the coupled source amplifier so that the output terminal of the coupled source amplifier can quickly reflect the received output data voltage.
Description
Technical Field
The present invention relates to a display panel driving technology, and more particularly, to a display driving circuit and a display device using the same.
Background
Fig. 1 is a schematic diagram illustrating a driving principle of a display driving ic according to the prior art. Referring to fig. 1, a conventional display driver ic divides a voltage by an internal (or external) resistor to provide a set of reference voltages of the display driver ic, where the reference voltages are GAMMA voltage curves (GAMMA voltage curves), and controls the display driver ic to select a voltage on the GAMMA voltage curves to drive a display device according to display data, so as to control panel brightness (gray scale), as shown in fig. 1.
As the panel resolution and the frame rate become higher and higher, the charging time requirement for the pixels becomes more and more stringent, and the operation speed of the display driver ic is required to be increased accordingly. However, the operation speed of the display driver ic is limited by the speed of the on-chip analog circuit.
Disclosure of Invention
An object of the present invention is to provide a display driving circuit and a display device using the same, in which the input terminal of the source amplifier is pre-charged, so that the source amplifier can quickly respond to the data voltage to accelerate the driving speed, and the display driving circuit can be applied to a display panel with higher resolution.
In view of the above, the present invention provides a display driving circuit, which includes a GAMMA output circuit, a plurality of digital-to-analog converters, a plurality of source amplifiers, and at least one pre-charging circuit. The GAMMA output circuit is used for outputting GAMMA voltages of a plurality of gray scales. Each digital-to-analog converter comprises an output end, and each digital-to-analog converter receives the GAMMA voltages and provides output data voltage according to display data. Each source amplifier comprises an input end and an output end, and the input end of each source amplifier is correspondingly coupled with the output end of the digital-to-analog converter so as to receive the corresponding output data voltage. The pre-charging circuit is configured between the input end of at least one source electrode amplifier and the output end of at least one digital-to-analog converter and is used for pre-charging the input end of the coupled source electrode amplifier so that the output end of the coupled source electrode amplifier can quickly reflect the received output data voltage.
The present invention further provides a display device, which includes a display panel and a display driving circuit. The display driving circuit comprises a GAMMA output circuit, a plurality of digital-to-analog converters, a plurality of source amplifiers and at least one pre-charging circuit. The GAMMA output circuit is used for outputting GAMMA voltages of a plurality of gray scales. Each digital-to-analog converter comprises an output end, and each digital-to-analog converter receives the GAMMA voltages and provides output data voltage according to display data. Each source amplifier comprises an input end and an output end, the output end of each source amplifier is correspondingly coupled with the corresponding data line of the display panel, and the input end of each source amplifier is correspondingly coupled with the output end of the digital-to-analog converter so as to receive the corresponding output data voltage. The pre-charging circuit is configured between the input end of at least one source electrode amplifier and the output end of at least one digital-to-analog converter and is used for pre-charging the input end of the coupled source electrode amplifier so that the output end of the coupled source electrode amplifier can quickly reflect the received output data voltage.
According to the display driving circuit and the display device using the same of the preferred embodiment of the present invention, the pre-charging circuit includes a first switch circuit, a voltage providing circuit and a selection circuit. The first switch circuit is coupled between the input terminal of the source amplifier and the output terminal of the at least one digital-to-analog converter. The voltage supply circuit is used for supplying a plurality of groups of voltages. The selection circuit comprises a plurality of input ends and an output end, wherein the plurality of input ends of the selection circuit respectively receive the plurality of groups of voltages, and the output end of the selection circuit is coupled with the input end of the source electrode amplifier. Before the digital-analog converter provides the output data voltage, the first switch circuit breaks the circuit between the input end of the source amplifier and the output end of at least one of the digital-analog converters; the selection circuit is used for selecting one specific voltage of the multiple groups of voltages provided by the voltage providing circuit to the input end of the source electrode amplifier according to corresponding display data so as to carry out pre-charging.
According to the display driving circuit and the display device using the same of the preferred embodiment of the present invention, the pre-charging circuit further includes a buffer circuit coupled between the output terminal of the selection circuit and the input terminal of the source amplifier for increasing the current driving force to accelerate the pre-charging. In a preferred embodiment, the pre-charge circuit further includes a second switch circuit coupled between the buffer circuit and the input terminal of the source amplifier. Before the digital-analog converter provides the output data voltage, the first switch circuit opens the circuit between the input end of the source electrode amplifier and the output end of at least one of the digital-analog converters, and the second switch circuit is conducted; when the pre-charging is completed, the second switch circuit is switched off, and the first switch circuit is switched on.
According to the display driving circuit and the display device using the same of the preferred embodiment of the present invention, the pre-charging circuit includes a first switch circuit, a buffer circuit and a second switch circuit. The first switch circuit is coupled between the input terminal of the source amplifier and the output terminal of the at least one digital-to-analog converter. The buffer circuit is coupled between the input terminal of the source amplifier and the output terminal of the at least one digital-to-analog converter, and is configured to perform pre-charging according to the output data voltage outputted by the output terminal of the at least one digital-to-analog converter. The second switch circuit is coupled between the buffer circuit and the input terminal of the source amplifier. Before the digital-analog converter provides the output data voltage, the first switch circuit opens a circuit between the input end of the source amplifier and the output end of the at least one digital-analog converter, and the second switch circuit is turned on, wherein the buffer circuit is used for pre-charging according to the output data voltage output by the output end of the at least one digital-analog converter; when the pre-charging is completed, the second switch circuit is switched off, and the first switch circuit is switched on.
According to the display driving circuit and the display device using the same of the preferred embodiments of the present invention, the time for the pre-charging circuit to pre-charge the source amplifier includes a default time before the at least one digital-to-analog converter provides the corresponding output data voltage. The time for the pre-charging circuit to pre-charge the source amplifier includes a default time after the at least one digital-to-analog converter provides the corresponding output data voltage. The time for the pre-charging circuit to pre-charge the source amplifier includes a default time around when the at least one digital-to-analog converter provides the corresponding output data voltage.
The invention is characterized in that the input end of the source electrode amplifier is pre-charged, and the digital-analog converter at the front stage is switched off during charging, so that the time constant seen by the output of the digital-analog converter is smaller, and the pre-charging circuit can concentrate on the pre-charging, therefore, the source electrode amplifier can quickly respond to the data voltage, the driving speed is increased, and the display driving circuit can be applied to a display panel with higher resolution.
In order to make the aforementioned and other objects, features and advantages of the invention comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
Fig. 1 is a schematic diagram illustrating a driving principle of a display driving ic according to the prior art.
FIG. 2 is a schematic diagram showing the architecture of the driver IC.
Fig. 3 is a diagram illustrating the transmission path of the GAMMA voltage inside the display driver ic.
Fig. 4 is a schematic diagram of an equivalent circuit of a transmission path of the GAMMA voltage inside the display driver ic.
Fig. 5 is a circuit block diagram of a display device according to a preferred embodiment of the invention.
FIG. 6 is a block diagram of a display driver circuit according to a preferred embodiment of the present invention.
Fig. 7 is a detailed circuit block diagram of the display driving circuit 502 according to a preferred embodiment of the invention.
Fig. 8 is another detailed circuit block diagram of the display driver circuit 502 according to a preferred embodiment of the invention.
FIGS. 9-12 are HSPICE simulation diagrams showing a driving circuit 502 according to a preferred embodiment of the present invention.
Description of the symbols:
and (3) SOP: source amplifier
GOP: GAMMA operational amplifier
DAC: digital-to-analog converter
300: load of GAMMA operational amplifier GOP
301: long-distance wire parasitic resistance of GAMMA voltage
302: parasitic capacitance of source amplifier SOP differential input pair
R1: long run parasitic impedance for GAMMA voltage transfer
C1: parasitic capacitance of differential input pair of source amplifier SOP
Ron: transistor on-resistance of digital-to-analog converter DAC
P1: node point
501: display panel
502: display driving circuit
601: GAMMA output circuit
602: pre-charging circuit
701. 801: control circuit
SW 1: first switch circuit
SW 2: second switch circuit
702: selection circuit
AOP: analog buffer circuit
703: voltage supply circuit
VP: specific voltage
R1': load at output of GAMMA operational amplifier GOP
C1': parasitic capacitance of positive input terminal of source amplifier SOP
901: without adding the original discharge waveform of the pre-charge circuit 602
902: discharge waveform incorporating the precharge circuit 602 of fig. 7
903: discharge waveform incorporating the precharge circuit 602 of fig. 8
1001: simulating the SOP versus load discharge waveform without adding a precharge circuit 602
1002: adding a precharge circuit 602 to simulate the SOP versus load discharge waveform
1101: is the original charging waveform without adding the pre-charge circuit 602
1102: charging waveform incorporating the precharge circuit 602 of fig. 7
1103: charging waveform incorporating the precharge circuit 602 of fig. 8
1201: simulating the charging waveform of the SOP to the load without adding the pre-charge circuit 602
1202 Add a precharge circuit 602 to simulate the SOP to load charging waveform
Detailed Description
FIG. 2 is a schematic diagram showing the architecture of the driver IC. Referring to fig. 2, due to product characteristics, the number of Source Amplifier (SOP) in the display driver ic is determined according to the resolution of the display device to be driven, for example, in a vertical (port) panel, the number of data lines is 2160(720 × 3) at the resolution of HD real RGB (1280 × 720), and the number of data lines is 3240 (1080) at the resolution of FHD real RGB (1920 × 1080). In consideration of production cost, the resistor voltage division in fig. 2 is to transmit the voltage to a huge number of source amplifiers SOP as a shared reference voltage source through a GAMMA OP amplifier (GOP), and determine what voltage each source amplifier SOP is to drive to the display device through a digital-to-analog converter (DAC) controlled by display data. It is understood that the source amplifier SOP may also be referred to as a tft (thin Film transistor) source signal amplifier.
Fig. 3 is a diagram illustrating the transmission path of the GAMMA voltage inside the display driver ic. Referring to fig. 3, 300 shows the loading of the GAMMA op amp GOP; 301 represents a long-distance running wire parasitic resistance (global GAMMA long wire routing) of the GAMMA voltage; 302 represents the parasitic capacitance of the source amplifier SOP differential input pair. As the process metal layer used by the display driver ic becomes thinner (the resistance of the metal routing becomes larger and larger under the same process conditions), the ability of the GAMMA op-amp GOP to drive the SOP input of the source amplifier becomes a main factor limiting the driving speed. With the display driver ic architecture shown in fig. 3, the load 300 of the GAMMA op-amp GOP is gradually dominated by the long-run parasitic resistor 301 that transmits the GAMMA voltage inside the display driver ic and the parasitic capacitance 302 of the differential input pair of the source amplifier SOP. When the load is larger, the input signal speed of the differential input pair of the source amplifier SOP is too slow, and the slew rate (slew rate) is too low, further affecting the driving speed of the display driving integrated circuit.
Under the same process conditions, the parasitic capacitance 302 of the differential input pair of the source amplifier SOP is highly related to the size of the transistor, and the random mismatch of the differential input pair of the source amplifier SOP is an important factor for the display quality of the display driver ic, and the solution of the random mismatch can be suppressed by increasing the critical device area, thereby failing to reduce the parasitic capacitance 302 of the differential input pair of the source amplifier SOP. This also leads to a critical reason why the load 300 seen by the GAMMA op-amp GOP cannot be reduced. Further resulting in insufficient signal climbing capability, which may cause the signal to be too late to reach the target voltage in the case of high resolution.
To be understood by those skilled in the art, fig. 4 is a schematic diagram of an equivalent circuit of the transmission path of the GAMMA voltage inside the display driver ic. Referring to fig. 4, in this example, the circuit architecture of fig. 3 is simplified to a resistance-capacitance model (RC model), wherein the reference numeral R1 is the long-distance line parasitic impedance of the GAMMA voltage; reference Ron is the transistor on-resistance of the digital-to-analog converter DAC; c1 is the parasitic capacitance of the differential input pair of the source amplifier SOP.
As is clear to those skilled in the art with reference to fig. 4, when the long-distance-line parasitic resistance R1 for transmitting the GAMMA voltage is larger, the influence of the thrust of the GAMMA operational amplifier GOP on the reaction speed of the node P1 is smaller if the parasitic capacitance C1 of the differential input pair of the source amplifier SOP is large. Therefore, under the limited condition of improving the long-distance stray impedance R1, for example, considering the manufacturing cost of the display driver ic, if the response speed of the node P1 is to be increased, the charging/discharging behavior of the node P1 or the load structure of the gama operational amplifier GOP driver must be changed.
Fig. 5 is a circuit block diagram of a display device according to a preferred embodiment of the invention. Referring to fig. 5, the display device includes a display panel 501 and a display driving circuit 502. The display driving circuit 502 is coupled to the display panel 501 to drive the display panel 501. Fig. 6 is a circuit block diagram of the display driving circuit 502 according to a preferred embodiment of the invention. Referring to fig. 6, the display driving circuit 502 includes a GAMMA output circuit 601, a plurality of digital-to-analog converters DAC, a plurality of source amplifiers SOP, and at least one pre-charge circuit 602. In fig. 6, the number of the precharge circuits 602 is plural, but the present invention is not limited thereto.
The GAMMA output circuit 601 is used for outputting GAMMA voltages of a plurality of gray scales. Each digital-to-analog converter DAC receives the GAMMA voltage output from the GAMMA output circuit 601 and provides an output data voltage to the corresponding source amplifier SOP according to the display data. The input terminal of the source amplifier SOP is correspondingly coupled to the output terminal of the digital-to-analog converter DAC to receive the corresponding output data voltage. The pre-charge circuit 602 is coupled between the input terminal of the source amplifier SOP and the output terminal of the digital-to-analog converter DAC, and is used for pre-charging the input terminal of the coupled source amplifier SOP, so that the output terminal of the coupled source amplifier SOP can quickly reflect the received output data voltage.
Fig. 7 is a detailed circuit block diagram of the display driving circuit 502 according to a preferred embodiment of the invention. Referring to fig. 7, in order to clearly understand the present invention, in this embodiment, the original circuit is simplified intentionally, the GAMMA output circuit 601 only shows a portion of the GAMMA operational amplifier GOP, the impedance of the resistor network portion of the GAMMA output circuit 601 is only represented by the resistor R1', and in this embodiment, only one set of the digital-to-analog converter DAC and the source amplifier SOP is shown to facilitate the explanation of the spirit of the present invention.
In this embodiment, the pre-charging circuit 602 includes a control circuit 701, a first switch circuit SW1, a second switch circuit SW2, a selection circuit 702, an analog buffer circuit AOP, and a voltage supply circuit 703. The voltage providing circuit 703 is used for providing a plurality of sets of voltages V1, V2, V3 …. The first switch circuit SW1 is coupled between the positive input terminal of the source amplifier SOP and the output terminal of the digital-to-analog converter DAC. The selection circuit 702 includes a plurality of input terminals and an output terminal. The input terminals of the selection circuit 702 receive the voltages V1, V2, and V3 …, respectively, and the output terminal of the selection circuit 702 is coupled to the positive input terminal of the source amplifier SOP through the analog buffer circuit AOP and the second switch circuit SW 2.
When the digital-to-analog converter DAC provides the output data voltage, the control circuit 701 controls the first switch circuit SW1 to open the circuit between the positive input terminal of the source amplifier SOP and the output terminal of the digital-to-analog converter DAC, and at this time, the output terminal of the GAMMA operational amplifier GOP is loaded with only R1', so that the output terminal of the digital-to-analog converter DAC can rapidly rise to the output data voltage. Meanwhile, during the time when the first switch circuit SW1 is turned off, the control circuit 701 controls the second switch circuit SW2 to be turned on, and at this time, the control circuit 701 controls the selection circuit 702 to provide a set of specific voltages VP similar to the output data voltage, and the current driving capability is increased through the analog buffer circuit AOP to pre-charge the parasitic capacitor C1' at the positive input terminal of the source amplifier SOP. Thereafter, the control circuit 702 controls the first switch circuit SW1 to be turned on, and the second switch circuit SW2 to be turned off. At this point normal operation resumes. By the pre-charging technology, the response speed of the source amplifier SOP to the output data voltage input by the input end of the source amplifier SOP can be accelerated, and the display panel with higher resolution or higher update rate can be driven. In an embodiment, the time for the pre-charge circuit 602 to pre-charge the source amplifier SOP may be a default time before the digital-to-analog converter DAC provides the output data voltage, or a default time after the digital-to-analog converter DAC provides the output data voltage, or a default time around the time before and after the digital-to-analog converter DAC provides the output data voltage.
As will be understood by those skilled in the art from the foregoing description of the embodiments, if the voltage supply circuit 703 can supply a voltage with a relatively stable and high driving capability, the analog buffer circuit AOP can be omitted. Meanwhile, since the selection circuit 702 is a switch network, the second switch circuit SW2 may be omitted when the analog buffer circuit AOP is not provided. Therefore, the present invention is not limited to the above-described circuit.
Fig. 8 is another detailed circuit block diagram of the display driver circuit 502 according to a preferred embodiment of the invention. Referring to fig. 8, in this embodiment, the original circuit is also simplified, the GAMMA output circuit 601 is only shown as part of the GAMMA operational amplifier GOP, the impedance of the resistor network part of the GAMMA output circuit 601 is only represented by the resistor R1', and in this embodiment, only one set of the DAC and the source amplifier SOP is shown to facilitate the explanation of the spirit of the present invention. In addition, in this embodiment, the pre-charge circuit 602 includes a control circuit 801, a first switch circuit SW1, a second switch circuit SW2 and an analog buffer circuit AOP.
When the digital-to-analog converter DAC supplies the output data voltage, the control circuit 801 controls the first switch circuit SW1 to open the circuit between the positive input terminal of the source amplifier SOP and the output terminal of the digital-to-analog converter DAC, and at this time, the output terminal of the GAMMA operational amplifier GOP is almost loaded only with R1', so that the output terminal of the digital-to-analog converter DAC can rapidly rise to the output data voltage. At the same time, that is, during the time when the first switch circuit SW1 is turned off, the control circuit 801 controls the second switch circuit SW2 to be turned on, and at this time, the analog buffer circuit AOP quickly pre-charges the parasitic capacitor C1' at the positive input terminal of the source amplifier SOP according to the output data voltage received at the input terminal thereof. Thereafter, the control circuit 702 controls the first switch circuit SW1 to be turned on, and the second switch circuit SW2 to be turned off. At this point normal operation resumes. By the pre-charging technology, the response speed of the source amplifier SOP to the output data voltage input by the input end of the source amplifier SOP can be accelerated, and the display panel with higher resolution or higher update rate can be driven. In an embodiment, the time for the pre-charge circuit 602 to pre-charge the source amplifier SOP may be a default time before the digital-to-analog converter DAC provides the output data voltage, or a default time after the digital-to-analog converter DAC provides the output data voltage, or a default time around the time before and after the digital-to-analog converter DAC provides the output data voltage. This time may be controlled by a timing controller, for example.
FIGS. 9-12 are HSPICE simulation diagrams of a display driver circuit according to a preferred embodiment of the present invention. Referring to fig. 9, the HSPICE simulation condition is QHD SOP load provided by an actual panel factory, R _ Fanout is 7.02841k Ω; c _ Fanout is 8.47112 pF; r _ ArrayArea ═ 10.1717k Ω; c _ ArrayArea equals 15.9536 pF. 901 is the original discharge waveform without the precharge circuit 602 added, 902 is the discharge waveform added to the left side of SW1 in the precharge circuit 602 of fig. 8, and 903 is the discharge waveform added to the right side of SW1 in the precharge circuit 602 of fig. 8. Referring to fig. 10, 1001 is the simulated SOP versus load discharge waveform without adding the precharge circuit 602, and 1002 is the simulated SOP versus load discharge waveform with adding the precharge circuit 602. As can be seen from the above figure, the addition of the pre-charge circuit 602 does improve the discharge rate.
Referring to fig. 11, 1101 is the original charging waveform without adding the precharge circuit 602, 1102 is the charging waveform added to the left side of SW1 in the precharge circuit 602 of fig. 8, and 1103 is the charging waveform added to the right side of SW1 in the precharge circuit 602 of fig. 8. Referring to fig. 12, 1201 is the charging waveform of the load without adding the precharge circuit 602 and simulating SOP, and 1202 is the charging waveform of the load with adding the precharge circuit 602 and simulating SOP. As can be seen from the above figure, the addition of the pre-charge circuit 602 does improve the charging speed.
Furthermore, applicants also simulated the charge-discharge rate using HSPICE to discharge 7.8V to 4V (time could be from 1% to 99%), the original architecture required about 2.227us, and the architecture of the present invention required only 1.216 us. Charging to 7.8V at 4V (time can be from 1% to 99%), about 2.210us for the original architecture, and only 1.232us for the architecture of the present invention. Discharging at 7.8V to 0.2V (time can be from 1% to 99%), about 2.296us for the original architecture, and only 1.400us for the architecture incorporating the present invention. Charging to 4V at 0.2V (time can be from 1% to 99%), about 2.225us for the original architecture, and only 1.241us for the architecture incorporating the present invention. Discharging to 0.2 at 4V requires about 2.318us for the original architecture, and only 1.267us for the architecture of the present invention. Charging to 7.8V at 0.2V requires about 2.229us for the original architecture and only 1.389us for the architecture incorporating the present invention. Simulation proves that the technology of the invention can actually shorten the driving time of the display driving circuit by 37.7-45.4%, so that the display driving circuit can meet the requirements of display products with high resolution and high picture update rate.
In summary, the spirit of the present invention lies in that the input terminal of the source amplifier is pre-charged, and during charging, the digital-to-analog converter at the previous stage is turned off, so that the time constant seen by the output of the digital-to-analog converter is small, and the pre-charging circuit can concentrate on the pre-charging, so that the source amplifier can quickly respond to the data voltage to increase the driving speed, and the display driving circuit can be applied to a display panel with higher resolution.
The detailed description of the preferred embodiments is provided only for the convenience of illustrating the technical contents of the present invention, and the present invention is not limited to the above-described embodiments in a narrow sense, and various modifications made without departing from the spirit of the present invention and the scope of the following claims are included in the scope of the present invention. Therefore, the protection scope of the present invention should be determined by the appended claims.
Claims (16)
1. A display driving circuit, comprising:
a GAMMA output circuit for outputting GAMMA voltages of multiple gray scales;
a plurality of digital-to-analog converters, each of the digital-to-analog converters including an output terminal, each of the digital-to-analog converters receiving the GAMMA voltages and providing an output data voltage according to display data;
a plurality of source amplifiers, each of the source amplifiers including an input terminal and an output terminal, the input terminal of each of the source amplifiers being correspondingly coupled to the output terminals of the digital-to-analog converters for receiving corresponding output data voltages; and
at least one pre-charging circuit, disposed between the input terminal of at least one of the source amplifiers and the output terminal of at least one of the digital-to-analog converters, for pre-charging the input terminal of the coupled source amplifier, so that the output terminal of the coupled source amplifier can quickly reflect the received output data voltage.
2. The display driver circuit of claim 1, wherein the pre-charge circuit comprises:
a first switch circuit coupled between the input terminal of the source amplifier and the output terminal of the at least one digital-to-analog converter;
a voltage supply circuit for providing a plurality of voltage sets; and
a selection circuit, including a plurality of input terminals and an output terminal, wherein the plurality of input terminals of the selection circuit respectively receive the plurality of sets of voltages, and the output terminal of the selection circuit is coupled to the input terminal of the source amplifier;
before the digital-to-analog converter provides the corresponding output data voltage, the first switch circuit breaks the circuit between the input end of the source amplifier and the output end of the digital-to-analog converter;
the selection circuit is used for selecting one specific voltage of the multiple groups of voltages provided by the voltage providing circuit to the input end of the source electrode amplifier according to corresponding display data so as to carry out pre-charging.
3. The display driver circuit of claim 2, wherein the pre-charge circuit comprises:
a buffer circuit coupled between the output terminal of the selection circuit and the input terminal of the source amplifier for increasing the current driving force to accelerate the pre-charging.
4. The display driver circuit of claim 3, wherein the pre-charge circuit further comprises:
a second switch circuit coupled between the buffer circuit and the input terminal of the source amplifier;
before the digital-analog converter provides the output data voltage, the first switch circuit opens a circuit between the input end of the source amplifier and the output end of at least one of the digital-analog converters, and the second switch circuit is conducted;
when the pre-charging is completed, the second switch circuit is opened, and the first switch circuit is turned on.
5. The display driver circuit of claim 1, wherein the pre-charge circuit comprises:
a first switch circuit coupled between the input terminal of the source amplifier and the output terminal of the at least one digital-to-analog converter;
a buffer circuit coupled between the input terminal of the source amplifier and the output terminal of the at least one digital-to-analog converter for pre-charging according to the output data voltage outputted from the output terminal of the at least one digital-to-analog converter; and
a second switch circuit coupled between the buffer circuit and the input terminal of the source amplifier;
before the digital-analog converter provides the output data voltage, the first switch circuit opens a circuit between the input end of the source amplifier and the output end of at least one of the digital-analog converters, and the second switch circuit is conducted;
the buffer circuit is used for pre-charging according to the output data voltage output by the output end of at least one of the digital-to-analog converters;
when the pre-charging is completed, the second switch circuit is opened, and the first switch circuit is turned on.
6. The display driving circuit of claim 1, wherein the time for the pre-charging circuit to pre-charge the source amplifiers comprises a default time before the at least one digital-to-analog converter provides the corresponding output data voltage.
7. The display driving circuit of claim 1, wherein the time for the pre-charging circuit to pre-charge the source amplifiers comprises a default time after the at least one digital-to-analog converter provides the corresponding output data voltage.
8. The display driving circuit of claim 1, wherein the time for which the pre-charging circuit pre-charges the source amplifiers comprises a default time around when the at least one digital-to-analog converter provides the corresponding output data voltage.
9. A display device, comprising:
a display panel; and
a driving circuit coupled to the display panel, comprising:
a GAMMA output circuit for outputting GAMMA voltages of multiple gray scales;
a plurality of digital-to-analog converters, each of the digital-to-analog converters including an output terminal, each of the digital-to-analog converters receiving the GAMMA voltages and providing an output data voltage according to display data;
a plurality of source amplifiers, each of the source amplifiers including an input terminal and an output terminal, the input terminal of each of the source amplifiers being correspondingly coupled to the output terminals of the digital-to-analog converters for receiving corresponding output data voltages, the output terminal of each of the source amplifiers being correspondingly coupled to a corresponding data line of the display panel; and
at least one pre-charging circuit, disposed between the input terminal of at least one of the source amplifiers and the output terminal of at least one of the digital-to-analog converters, for pre-charging the input terminal of the coupled source amplifier, so that the output terminal of the coupled source amplifier can quickly reflect the received output data voltage.
10. The display device of claim 9, wherein the pre-charge circuit comprises:
a first switch circuit coupled between the input terminal of the source amplifier and the output terminal of the at least one digital-to-analog converter;
a voltage supply circuit for providing a plurality of voltage sets;
a selection circuit, including a plurality of input terminals and an output terminal, wherein the plurality of input terminals of the selection circuit respectively receive the plurality of sets of voltages, and the output terminal of the selection circuit is coupled to the input terminal of the source amplifier;
before the digital-to-analog converter provides the corresponding output data voltage, the first switch circuit breaks the circuit between the input end of the source amplifier and the output end of the digital-to-analog converter;
the selection circuit is used for selecting one specific voltage of the multiple groups of voltages provided by the voltage providing circuit to the input end of the source electrode amplifier according to corresponding display data so as to carry out pre-charging.
11. The display device of claim 10, wherein the pre-charge circuit further comprises:
a buffer circuit coupled between the output terminal of the selection circuit and the input terminal of the source amplifier for increasing the current driving force to accelerate the pre-charging.
12. The display device of claim 11, wherein the pre-charge circuit further comprises:
a second switch circuit coupled between the buffer circuit and the input terminal of the source amplifier;
before the digital-analog converter provides the output data voltage, the first switch circuit opens a circuit between the input end of the source amplifier and the output end of at least one of the digital-analog converters, and the second switch circuit is conducted;
when the pre-charging is completed, the second switch circuit is opened, and the first switch circuit is turned on.
13. The display device of claim 9, wherein the pre-charge circuit comprises:
a first switch circuit coupled between the input terminal of the source amplifier and the output terminal of the at least one digital-to-analog converter;
a buffer circuit coupled between the input terminal of the source amplifier and the output terminal of the at least one digital-to-analog converter for pre-charging according to the output data voltage outputted from the output terminal of the at least one digital-to-analog converter; and
a second switch circuit coupled between the buffer circuit and the input terminal of the source amplifier;
before the digital-analog converter provides the output data voltage, the first switch circuit opens a circuit between the input end of the source amplifier and the output end of at least one of the digital-analog converters, and the second switch circuit is conducted;
the buffer circuit is used for pre-charging according to the output data voltage output by the output end of at least one of the digital-to-analog converters;
when the pre-charging is completed, the second switch circuit is opened, and the first switch circuit is turned on.
14. The display apparatus of claim 9, wherein the time for the pre-charging circuit to pre-charge the source amplifiers comprises a default time before the at least one digital-to-analog converter provides the corresponding output data voltage.
15. The display apparatus of claim 9, wherein the time for the pre-charge circuit to pre-charge the source amplifiers comprises a default time after the at least one DAC provides the corresponding output data voltage.
16. The display apparatus of claim 9, wherein the time for which the pre-charge circuit pre-charges the source amplifiers comprises a default time around when the at least one of the digital-to-analog converters provides the corresponding output data voltage.
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| CN113763852B (en) | 2023-09-12 |
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