CN113707672B - Substrate, display panel and spliced display panel - Google Patents

Substrate, display panel and spliced display panel Download PDF

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Publication number
CN113707672B
CN113707672B CN202110924113.0A CN202110924113A CN113707672B CN 113707672 B CN113707672 B CN 113707672B CN 202110924113 A CN202110924113 A CN 202110924113A CN 113707672 B CN113707672 B CN 113707672B
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layer
substrate
display panel
disposed
electrode
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CN113707672A (en
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姜贝
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/126—Shielding, e.g. light-blocking means over the TFTs

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

The embodiment of the application discloses a substrate, a display panel and a spliced display panel, wherein the substrate comprises a substrate and a thin film transistor, and a grid electrode is arranged on the substrate; the active layer is arranged on the substrate and is arranged in a different layer with the grid electrode, and the active layer is overlapped with the grid electrode; the first insulating layer at least covers the active layer and the grid electrode; the packaging structure layer at least covers the active layer; the second conductive layer includes a source electrode and a drain electrode, which are connected to the active layer, respectively. According to the embodiment of the application, the packaging structure layer is adopted to wrap the active layer of the thin film transistor, so that the waterproof oxygen performance of the thin film transistor is improved.

Description

Substrate, display panel and spliced display panel
Technical Field
The application relates to the technical field of display, in particular to a substrate, a display panel and a spliced display panel.
Background
Compared with the traditional liquid crystal panel, the active matrix organic light emitting diode panel has the characteristics of high response speed, high contrast, wide visual angle, low energy consumption and the like, so that the active matrix organic light emitting diode panel is popular, and is gradually replacing the liquid crystal display panel to become the next generation of mainstream display panel.
In the course of research and practice on the prior art, the inventors of the present application found that the active layer in the backplane is easily affected by factors such as hydrogen, water, and oxygen, which are invaded from the outside, thereby causing electrical drift of the thin film transistor, and finally reducing the performance of panel reliability, regardless of whether the liquid crystal panel, the micro light emitting diode panel, the sub-millimeter light emitting diode panel, or the organic light emitting diode panel faces a difficult problem.
Disclosure of Invention
The embodiment of the application provides a substrate, a display panel and a spliced panel, which can reduce the risk that external hydrogen, water and oxygen invade a thin film transistor.
An embodiment of the present application provides a substrate, which includes:
a substrate; and
a plurality of thin film transistors disposed on the substrate;
the thin film transistor includes:
a first conductive layer comprising a gate disposed on the substrate;
the active layer is arranged on the substrate and is arranged in a different layer with the grid electrode, and the active layer is arranged in an overlapping mode with the grid electrode;
a first insulating layer covering at least the active layer and the gate electrode;
at least one packaging structure layer, wherein the packaging structure layer at least wraps the active layer; and
the second conducting layer is arranged on the packaging structure layer and comprises a source electrode and a drain electrode, and the source electrode and the drain electrode are respectively connected to the active layer.
Optionally, in some embodiments of the present application, the package structure layer includes at least one organic layer and at least one inorganic layer, the organic layer and the inorganic layer are alternately stacked, and the organic layer covers the first insulating layer and covers the active layer; the inorganic layer covers the organic layer and is connected to the first insulating layer.
Optionally, in some embodiments of the present application, the inorganic layer comprises at least one layer of inorganic material.
Optionally, in some embodiments of the present application, the package structure layer includes a first package structure layer and a second package structure layer disposed on the first package structure layer; the substrate further comprises a third conductive layer comprising a first electrode and a second electrode;
the first packaging structure layer is arranged on the first insulating layer, the second conducting layer is arranged on the first packaging structure layer, the second packaging structure layer is arranged on the second conducting layer, and the third conducting layer is arranged on the second packaging structure layer; the first electrode is connected to the drain electrode.
Optionally, in some embodiments of the present application, the substrate further includes a second insulating layer disposed on the first conductive layer, and the active layer is disposed on the second insulating layer.
Optionally, in some embodiments of the present application, the substrate further includes a second insulating layer disposed on the active layer, and the gate electrode is disposed on the second insulating layer;
the active layer, the second insulating layer and the gate stack form a protruding structure, and the first insulating layer covers an outer surface of the protruding structure.
Optionally, in some embodiments of the present application, the substrate further includes a light-shielding layer and a buffer layer, the light-shielding layer is disposed on the substrate, the light-shielding layer is disposed to overlap with the active layer, and the buffer layer is disposed between the light-shielding layer and the active layer; the second conductive layer further comprises a common trace;
the source electrode is connected to the light shielding layer, and the second electrode is connected to the common line.
Correspondingly, an embodiment of the present application further provides a display panel, which includes a light emitting diode device and the substrate according to any one of the embodiments described above; the light emitting diode device is disposed on the substrate.
Optionally, in some embodiments of the present application, the display panel includes an encapsulation adhesive and a cover plate, the encapsulation adhesive covers the light emitting diode device and the substrate, and the cover plate is disposed on the encapsulation adhesive.
Correspondingly, the embodiment of the application also provides a spliced display panel, which comprises at least two display panels in the embodiment, wherein the two adjacent display panels are spliced.
Optionally, in some embodiments of the present application, the tiled display panel further includes an organic light shielding layer, where the organic light shielding layer covers at least a side surface of the cover plate and is located between the adjacent display panels.
The base plate comprises a substrate and a thin film transistor, wherein a grid electrode is arranged on the substrate; the active layer is arranged on the substrate and is arranged in a different layer with the grid electrode, and the active layer is overlapped with the grid electrode; the first insulating layer at least covers the active layer and the grid electrode; the packaging structure layer at least covers the active layer; the second conductive layer includes a source electrode and a drain electrode, which are connected to the active layer, respectively. According to the embodiment of the application, the packaging structure layer is adopted to wrap the active layer of the thin film transistor, so that the waterproof oxygen performance of the thin film transistor is improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the description below are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a substrate according to a first embodiment of the present application;
FIG. 2 is a schematic structural diagram of a substrate according to a second embodiment of the present application;
fig. 3 is a schematic structural diagram of a display panel provided in an embodiment of the present application;
fig. 4 is a schematic flowchart of step B1 of a method for manufacturing a display panel according to an embodiment of the present application;
fig. 5 is a schematic flowchart of step B2 of a method for manufacturing a display panel according to an embodiment of the present application;
fig. 6 is a schematic flowchart of step B3 of a method for manufacturing a display panel according to an embodiment of the present application;
fig. 7 is a schematic structural diagram of a tiled display panel provided in an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application. Furthermore, it should be understood that the detailed description and specific examples, while indicating exemplary embodiments of the invention, are given by way of illustration and explanation only, and are not intended to limit the scope of the invention. In the present application, unless indicated to the contrary, the use of the directional terms "upper" and "lower" generally refer to the upper and lower positions of the device in actual use or operation, and more particularly to the orientation of the figures of the drawings; while "inner" and "outer" are with respect to the outline of the device.
The embodiment of the application provides a substrate, a display panel and a spliced display panel, wherein a source electrode and a drain electrode of a thin film transistor can be interchanged. In the embodiment of the present application, to distinguish two electrodes of the thin film transistor except for the gate electrode, one of the two electrodes is referred to as a source electrode, and the other electrode is referred to as a drain electrode. As described in detail below. It should be noted that the following description of the embodiments is not intended to limit the preferred order of the embodiments.
Referring to fig. 1, a substrate 100 includes a substrate 11 and a plurality of thin film transistors TFT according to a first embodiment of the present disclosure. The thin film transistor TFT is provided on the substrate 11.
The thin film transistor TFT includes a first conductive layer 12, an active layer 13, a first insulating layer 14, at least one package structure layer 15, and a second conductive layer 16.
The first conductive layer 12 includes a gate electrode 121, and the gate electrode 121 is disposed on the substrate 11. The active layer 13 is disposed on the substrate 11 and is disposed in a different layer from the gate electrode 121. The active layer 13 is disposed to overlap the gate electrode 121.
The first insulating layer 14 covers at least the active layer 13 and the gate electrode 121. The package structure layer 15 at least covers the active layer 13. The second conductive layer 16 is disposed on the package structure layer 15. The second conductive layer 16 includes a source electrode 161 and a drain electrode 162, and the source electrode 161 and the drain electrode 162 are connected to the active layer 13, respectively.
The substrate 100 of the embodiment of the application adopts the packaging structure layer 15 to wrap the active layer 13 of the thin film transistor TFT, so that the water and oxygen resistance of the thin film transistor TFT is improved.
Alternatively, the substrate 11 may be a rigid substrate or a flexible substrate. The material of the substrate 11 includes one of glass, sapphire, silicon dioxide, polyethylene, polypropylene, polystyrene, polylactic acid, polyethylene terephthalate, polyimide, and polyurethane.
Alternatively, the first insulating layer 14 may be an inorganic material layer. The material of the first insulating layer 14 may include at least one of silicon nitride, silicon oxide, and metal oxide. The first insulating layer 14 using an inorganic material covers the active layer 13 and the gate electrode 121 to improve the water and oxygen resistance of the thin film transistor TFT.
In some embodiments, the material of the first insulating layer 14 may also be an organic material.
Optionally, the encapsulation structure layer 15 includes at least one organic layer 151 and at least one inorganic layer 152, and the organic layer 151 and the inorganic layer 152 are alternately stacked. The organic layer 151 covers the first insulating layer 14, and covers the active layer 13. The inorganic layer 152 covers the organic layer 151 and is connected to the first insulating layer 14.
The organic layer 151 serves to flatten the topography of the stack of the gate electrode 121 and the active layer 13, and absorbs the stress of the inorganic layer 152 and the first insulating layer 14, so that the risk of cracking of the inorganic layer 152 is reduced, and the water and oxygen resistance of the thin film transistor TFT is improved.
Alternatively, the material of the organic layer 151 may be an organic transparent film layer, such as a transparent photoresist, epoxy resin, polyimide, polyvinyl alcohol, polymethyl methacrylate, acrylate, polystyrene, or the like.
The material of the inorganic layer 152 may be silicon nitride, silicon oxide, silicon oxynitride, or a metal oxide such as aluminum oxide, magnesium oxide, nickel oxide, or the like.
Optionally, the inorganic layer 152 includes at least one layer of inorganic material. That is, the inorganic layer 152 may have a single film structure or a composite film structure.
Optionally, in the substrate 100 of the first embodiment, the package structure layer 15 includes a first package structure layer 15a and a second package structure layer 15b disposed on the first package structure layer 15 a. The substrate 100 further comprises a third conductive layer 17. The third conductive layer 17 includes a first electrode 171 and a second electrode 172.
The first package structure layer 15a is disposed on the first insulating layer 14. The second conductive layer 16 is disposed on the first package structure layer 15 a. The second package structure layer 15b is disposed on the second conductive layer 16. The third conductive layer 17 is disposed on the second package structure layer 15 b. The first electrode 171 is connected to the drain electrode 162.
The substrate 100 of the first embodiment further improves the water and oxygen resistance of the TFT by using the first package structure layer 15a to package the active layer 13 and the second package structure layer 15b to package the active layer 13, the source electrode 161 and the drain electrode 162.
Optionally, the substrate 100 further comprises a second insulating layer 18. A second insulating layer 18 is disposed on the first conductive layer 12. The active layer 13 is disposed on the second insulating layer 18. That is, the substrate 100 of the present first embodiment includes a thin film transistor TFT of a bottom gate structure.
Alternatively, the material of the active layer 13 may be a metal oxide semiconductor or a polycrystalline silicon semiconductor or a single crystal silicon semiconductor.
Alternatively, the materials of the first conductive layer 12, the second conductive layer 16, and the third conductive layer 17 may be indium tin oxide, indium zinc oxide, and the like, and may also be metals, alloys, and compounds, and mixtures thereof, for example, gold, silver, tungsten, molybdenum, iron, aluminum, copper, aluminum-silicon, aluminum-titanium, molybdenum-copper, metal material nitride, and the like may be used.
Optionally, the substrate 100 may be used as a back plate of a Micro light emitting diode (Micro-LED) panel or a submillimeter light emitting diode (Mini-LED) panel.
Alternatively, the substrate 100 may also serve as a backplane of an electroluminescent panel, which may be an organic light emitting diode panel (OLED) or a quantum dot light emitting diode panel (QLED).
Alternatively, the substrate 100 may also be used as an array substrate of a liquid crystal display panel (LCD).
Referring to fig. 2, the substrate 200 of the second embodiment includes a substrate 11 and a plurality of thin film transistors TFT. The thin film transistor TFT is provided on the substrate 11.
The thin film transistor TFT includes a first conductive layer 12, an active layer 13, a first insulating layer 14, at least one package structure layer 15, and a second conductive layer 16.
The first conductive layer 12 includes a gate electrode 121, and the gate electrode 121 is disposed on the substrate 11. The active layer 13 is disposed on the substrate 11 and is disposed in a different layer from the gate electrode 121. The active layer 13 is disposed to overlap the gate electrode 121.
The first insulating layer 14 covers at least the active layer 13 and the gate electrode 121. The package structure layer 15 at least covers the active layer 13. The second conductive layer 16 is disposed on the package structure layer 15. The second conductive layer 16 includes a source electrode 161 and a drain electrode 162, and the source electrode 161 and the drain electrode 162 are connected to the active layer 13, respectively.
Optionally, the substrate 200 of the second embodiment differs from the substrate 100 of the first embodiment in that: the substrate 100 further includes a second insulating layer 18. A second insulating layer 18 is disposed on the active layer 13, and a gate electrode 121 is disposed on the second insulating layer 18.
The active layer 13, the second insulating layer 18, and the gate electrode 121 are stacked to form a protrusion structure. The first insulating layer 14 covers the outer surface of the protruding structure.
That is, the substrate 200 of the present second embodiment includes a thin film transistor TFT of a top gate structure.
Optionally, the substrate 200 further includes a light-shielding layer 19 and a buffer layer 110. The light-shielding layer 19 is provided on the substrate 11. The light-shielding layer 19 is provided to overlap the active layer 13. The buffer layer 110 is disposed between the light-shielding layer 19 and the active layer 13. The second conductive layer 16 also includes a common trace 163.
The source electrode 161 is connected to the light-shielding layer 19. The second electrode 172 is connected to the common line 163.
Alternatively, the material of the light shielding layer 19 may be an inorganic metal material, such as Cr (chromium), Mo (molybdenum), Mn (manganese), and the like.
Alternatively, the material of the buffer layer 110 may include at least one of silicon nitride, silicon oxide, and organic photoresist.
Referring to fig. 3, correspondingly, an embodiment of the present invention further provides a display panel 1000, which includes an led device el and the substrate (100/200) according to any of the embodiments above. The light emitting diode device el is disposed on the substrate (100/200).
The structure of the substrate of the display panel 1000 in the embodiment of the present application is similar to or the same as the structure of the substrate (100/200) in the embodiment described above, and please refer to the description of the substrate (100/200) in the embodiment described above, which is not repeated herein. The display panel 1000 of the present embodiment is illustrated by taking the substrate 100 as an example, but is not limited thereto.
Alternatively, the light emitting diode device el may be a Micro light emitting diode (Micro-LED) or a submillimeter light emitting diode (Mini-LED).
Optionally, the display panel 1000 includes a package paste te and a cover plate co, and the package paste te covers the led device el and the substrate 100. The cover co is placed over the potting compound te.
The packaging glue te is adopted to package the substrate 100, so that the waterproof and oxygen-proof effect of the substrate 100 can be improved, and in addition, the packaging glue te has the characteristics of high temperature resistance, ultraviolet resistance, controllable thickness, no yellowing after long-time use and the like, and can ensure a better optical effect when used as a light-emitting diode device el packaging material.
Referring to fig. 4-6, the method for manufacturing the display panel 1000 includes the following steps:
a step B1 of forming a plurality of thin film transistors TFT on the substrate 11 to form a base board 100; the led device el is then transferred on the substrate 100.
Wherein, a yellow light process is adopted to prepare the thin film transistor TFT. And the inorganic layer 152 wraps the side of the organic layer 151 in the process of forming the encapsulation structure layer 15.
The led device el is transferred to the substrate 100 by a punching or bulk transfer method to form a periodic array structure. And then proceeds to step B2.
And step B2, providing a packaging structure. I.e. the encapsulation paste te is attached to the cover plate co by means of soft-on-hard equipment and the encapsulation structure is then cut to a set size by means of laser. The size of the set dimension is determined according to the size of the actual substrate 100. And then proceeds to step B3.
Step B3, attaching the package structure on the substrate 100 to form the display panel 1000, and coating an organic light-shielding layer on the side surface of the display panel 1000.
Optionally, the upper packaging structure and the substrate 100 after the transfer of the light emitting diode device el are bonded in pairs by hard bonding equipment, and the bonding precision is +/-5 microns.
This completes the manufacturing process of the display panel 1000 according to the embodiment of the present application.
Correspondingly, referring to fig. 7, an embodiment of the present application further provides a tiled display panel PJ, which includes at least two display panels 1000 according to the above embodiments, and two adjacent display panels 1000 are tiled.
Optionally, the tiled display panel PJ further includes an organic light shielding layer zg, where the organic light shielding layer zg at least covers the side surface of the cover plate co and is located between the adjacent display panels 1000.
The structure of the display panel 1000 of the tiled display panel PJ of the embodiment of the present application is similar to or the same as the structure of the display panel 1000 of the embodiment, and please refer to the description of the display panel 1000 of the embodiment, which is not repeated herein.
The organic light shielding layer zg has a light shielding effect on one hand, and prevents light from emitting light from the side surface of the substrate 100, and the organic light shielding layer zg has a buffering effect on the other hand, so that when two display panels 1000 are spliced in a group, the risk of damage caused by collision between the display panels 1000 can be reduced.
The base plate comprises a substrate and a thin film transistor, wherein a grid electrode is arranged on the substrate; the active layer is arranged on the substrate and is arranged in a different layer with the grid electrode, and the active layer is overlapped with the grid electrode; the first insulating layer at least covers the active layer and the grid electrode; the packaging structure layer at least covers the active layer; the second conductive layer includes a source electrode and a drain electrode, which are connected to the active layer, respectively. According to the embodiment of the application, the packaging structure layer is adopted to wrap the active layer of the thin film transistor, so that the waterproof oxygen performance of the thin film transistor is improved.
The substrate, the display panel and the tiled display panel provided in the embodiments of the present application are described in detail above, and specific examples are applied herein to explain the principle and the implementation of the present application, and the description of the above embodiments is only used to help understand the method and the core idea of the present application; meanwhile, for those skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.

Claims (7)

1. A substrate, comprising:
a substrate; and
a plurality of thin film transistors disposed on the substrate;
the thin film transistor includes:
a first conductive layer comprising a gate disposed on the substrate;
the active layer is arranged on the substrate and is arranged in a different layer with the grid electrode, and the active layer is overlapped with the grid electrode;
a first insulating layer covering at least the active layer and the gate electrode;
the packaging structure layer comprises a first packaging structure layer and a second packaging structure layer arranged on the first packaging structure layer, the first packaging structure layer is arranged on the first insulating layer, and the first packaging structure layer at least covers the active layer;
the second conducting layer is arranged on the first packaging structure layer and comprises a source electrode and a drain electrode, and the source electrode and the drain electrode are respectively connected to the active layer; the second package structure layer is disposed on the second conductive layer, an
A third conductive layer including a first electrode and a second electrode; the third conducting layer is arranged on the second packaging structure layer; the first electrode is connected to the drain electrode;
the packaging structure layer comprises at least one organic layer and at least one inorganic layer, the organic layer and the inorganic layer are alternately stacked, and the organic layer covers the first insulating layer and coats the active layer; the inorganic layer covers the organic layer and is connected to the first insulating layer;
the inorganic layer includes at least one inorganic material layer.
2. The substrate according to claim 1, further comprising a second insulating layer disposed on the active layer, the gate electrode being disposed on the second insulating layer;
the active layer, the second insulating layer and the gate stack form a protruding structure, and the first insulating layer covers an outer surface of the protruding structure.
3. The substrate according to claim 2, further comprising a light-shielding layer and a buffer layer, wherein the light-shielding layer is disposed on the substrate, the light-shielding layer is disposed to overlap with the active layer, and the buffer layer is disposed between the light-shielding layer and the active layer; the second conductive layer further comprises a common trace;
the source electrode is connected to the light shielding layer, and the second electrode is connected to the common line.
4. A display panel comprising a light emitting diode device and the substrate according to any one of claims 1 to 3; the light emitting diode device is disposed on the substrate.
5. The display panel according to claim 4, wherein the display panel comprises an encapsulant covering the light emitting diode device and the substrate, and a cover plate disposed on the encapsulant.
6. A tiled display panel comprising at least two display panels according to claim 4, wherein two adjacent display panels are tiled together.
7. The tiled display panel of claim 6 wherein the display panel includes an encapsulant covering the light emitting diode devices and the substrate and a cover plate disposed over the encapsulant;
the spliced display panel further comprises an organic light shielding layer, wherein the organic light shielding layer at least covers the side face of the cover plate and is positioned between the adjacent display panels.
CN202110924113.0A 2021-08-12 2021-08-12 Substrate, display panel and spliced display panel Active CN113707672B (en)

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Citations (1)

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Publication number Priority date Publication date Assignee Title
CN112467052A (en) * 2020-11-26 2021-03-09 武汉华星光电半导体显示技术有限公司 Display panel and manufacturing method thereof

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KR102096054B1 (en) * 2013-08-14 2020-04-02 삼성디스플레이 주식회사 Display device and method of fabricating the same
CN104979405B (en) * 2015-07-22 2019-05-21 京东方科技集团股份有限公司 A kind of thin film transistor (TFT), array substrate and display device

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112467052A (en) * 2020-11-26 2021-03-09 武汉华星光电半导体显示技术有限公司 Display panel and manufacturing method thereof

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