CN113674680B - PWM (pulse-Width modulation) driving circuit and driving method based on pixel sharing - Google Patents
PWM (pulse-Width modulation) driving circuit and driving method based on pixel sharing Download PDFInfo
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- CN113674680B CN113674680B CN202110959024.XA CN202110959024A CN113674680B CN 113674680 B CN113674680 B CN 113674680B CN 202110959024 A CN202110959024 A CN 202110959024A CN 113674680 B CN113674680 B CN 113674680B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/30—Driver circuits
- H05B45/32—Pulse-control circuits
- H05B45/325—Pulse-width modulation [PWM]
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0233—Improving the luminance or brightness uniformity across the screen
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Abstract
The invention discloses a PWM (pulse-width modulation) driving circuit and a driving method based on pixel sharing, which comprises a plurality of light-emitting units arranged in an array, a signal processing module and a driving module, wherein the light-emitting units correspond to each row of light-emitting units; the light-emitting unit also comprises a first signal emitter for providing a switching signal corresponding to each row of light-emitting units, and any one light-emitting unit in each row is in signal connection with the first signal emitter. The invention is based on the pixel sharing principle, shares a signal processing module with a plurality of light-emitting units, obviously reduces the average transistor number of each driving circuit, greatly reduces the integration difficulty and the preparation cost, and realizes the pixel driving with low transistor density.
Description
Technical Field
The invention relates to Micro LED PWM driving, in particular to a PWM driving circuit and a driving method based on pixel sharing.
Background
For a pixel array, a conventional driving method is to generate a driving signal through a peripheral circuit, and directly apply the signal to a light emitting unit array through a word line and a bitline to drive the light emitting unit. Unlike conventional driving circuits, the pixel driving circuit implements processing of peripheral signals by a driving circuit integrated with each pixel light emitting unit (e.g., LED) to thereby implement driving of the light emitting unit. The quality of the drive signal obtained in this way is higher due to the close proximity of the signal processing module to the light emitting unit.
The current pixel driving circuit requires a signal processing module for each light emitting unit, which results in a great disadvantage: for high density pixel arrays, the driver circuit requires a large integration level and the number of transistors is large, which directly results in higher manufacturing cost and higher requirements for process stability and quality.
Disclosure of Invention
The purpose of the invention is as follows: the invention aims to provide a PWM pixel driving circuit based on pixel sharing and low transistor density; a second object of the present invention is to provide a driving operation method of the PWM pixel driving circuit.
The technical scheme is as follows: the invention relates to a PWM (pulse-width modulation) driving circuit based on pixel sharing, which comprises a plurality of light-emitting units arranged in an array, a signal processing module and a driving circuit, wherein the light-emitting units correspond to each row of light-emitting units; the light-emitting unit also comprises a first signal emitter for providing a switching signal corresponding to each row of light-emitting units, and any one light-emitting unit in each row is in signal connection with the first signal emitter.
Further, the luminescence unit comprises a gating transistor for controlling the pixel switch, a driving transistor for providing a current pulse signal and a micro LED for displaying luminescence, wherein the grid of the gating transistor is connected with the first signal emitter, the source of the gating transistor is connected with the grid of the driving transistor, the source of the driving transistor is connected with the anode of the micro LED, and the cathode of the micro LED is grounded.
Further, the signal processing module comprises a comparator for outputting a constant voltage and a current mirror for adjusting the constant current, and the current mirror is in signal connection with the comparator.
Further, the comparator comprises a differential input stage, a level conversion stage and an amplification stage;
the differential input stage comprises a first NMOS transistor M1, a second NMOS transistor M2, a third NMOS transistor M3 and a fourth NMOS transistor M4; the grids of the first NMOS tube M1 and the second NMOS tube M2 are connected with a gating transistor; the drain electrodes of the first NMOS tube M1 and the second NMOS tube M2 are respectively connected with the source electrodes of the third NMOS tube M3 and the fourth NMOS tube M4; the grid electrodes of the third NMOS tube M3 and the fourth NMOS tube M4 are connected with the drain electrodes of the third NMOS tube M3 and the fourth NMOS tube M4, and the drain electrodes of the third NMOS tube M3 and the fourth NMOS tube M4 are connected with a driving power supply;
the level conversion stage comprises a fifth NMOS transistor M5, and the grid electrode of the fifth NMOS transistor M5 is connected with the source electrode of a fourth NMOS transistor M4; the drain electrode of the fifth NMOS tube M5 is connected with a driving power supply;
the amplifying stage comprises a sixth NMOS tube M6 and a seventh NMOS tube M7, the grid electrode of the seventh NMOS tube M7 is connected with the source electrode of the fifth NMOS tube M5, and the drain electrode of the seventh NMOS tube M7 is respectively connected with the source electrode of the sixth NMOS tube M6 and the driving transistor; the grid electrode of the sixth NMOS tube M6 is connected with the drain electrode of the sixth NMOS tube M6, and the drain electrode of the sixth NMOS tube M6 is connected with a driving power supply.
Further, the current mirror comprises a current source I B An eighth NMOS transistor M8, a ninth NMOS transistor M9 and a tenth NMOS transistor M10; the drain electrode of the eighth NMOS transistor M8 is connected to the source electrodes of the first and second NMOS transistors M1 and M5, the drain electrode of the ninth NMOS transistor M9 is connected to the source electrode of the tenth NMOS transistor M10, and the drain electrode of the eighth NMOS transistor M10 is connected to the current source I B Is connected to a current source I B The other end of the first power supply is connected with a driving power supply; the grid electrode of the ninth NMOS tube M9 and the grid electrode of the eighth NMOS tube M8 are respectively connected with the grid electrode of the tenth NMOS tube M10, and the grid electrode of the tenth NMOS tube M10 is connected with the drain electrode of the tenth NMOS tube M10; and the source electrodes of the eighth NMOS transistor M8, the ninth NMOS transistor M9 and the tenth NMOS transistor M10 are grounded.
Further, the first NMOS transistor M1, the second NMOS transistor M2, the third NMOS transistor M3, the fourth NMOS transistor M4, the fifth NMOS transistor M5, the sixth NMOS transistor M6, the seventh NMOS transistor M7, the eighth NMOS transistor M8, the ninth NMOS transistor M9, and the tenth NMOS transistor M10 are all thin film transistors.
Furthermore, the lighting device further comprises a second signal emitter corresponding to each row of lighting units and used for providing time division multiplexing signals, and the output end of the second signal emitter is connected with the grid electrode of the first NMOS transistor M1 and the grid electrode of the second NMOS transistor M2 of the signal processing module respectively.
The invention also provides a driving method of the PWM driving circuit based on pixel sharing, which comprises the following steps:
step one, providing a PWM pixel circuit based on an NMOS transistor according to any one of claims 1-7;
secondly, in an operation period, the first signal emitter distributes signals to the light-emitting units in the same row;
activating a gating transistor of the light-emitting unit, and distributing the signal to a corresponding signal processing module by a second signal emitter of each column;
step four, the signal processing module converts the received signal into a PWM voltage signal, the signal enters a driving transistor after flowing through an activated gating transistor, and the driving transistor generates a PWM current signal and controls the micro LED to emit light;
and step five, distributing the signals to the light-emitting units positioned on the other row by the first signal emitter, and repeating the step three to the step four to realize pixel driving of the micro LEDs arranged in the array.
Further, the specific process of the fourth step is as follows: the differential input stage of the signal processing module operates received signals and outputs the signals to the level conversion stage, the level conversion stage converts direct current levels of the signals and outputs the signals to the amplification stage in a matching mode, and the amplification stage performs gain amplification on circuit voltage and outputs voltage pulse signals in a square wave mode.
Furthermore, the signals received by the signal processing module include a level signal and a triangular wave signal, the level signal and the triangular wave signal are transmitted to the differential input stage through the first NMOS transistor M1 and the second NMOS transistor M2, respectively, and the level signal and the triangular wave signal are provided by the second signal transmitter.
The working principle of the invention is as follows: aiming at the micro LEDs arranged in an array, the light-emitting units in each column share one signal processing module, so that the pixel drive with low transistor density is realized; for each column, providing a time division multiplexing signal to the signal processing module through the second signal emitter, and controlling the corresponding light-emitting unit to work; for each row, the switching signal is provided by the first signal emitter, so that independent turning on and off of the light-emitting units of different rows is realized, and almost the same driving effect as that of the existing pixel driving circuit is achieved by the remarkably reduced transistors.
Has the advantages that: compared with the prior art, the invention has the following remarkable characteristics: according to the pixel sharing type LED driving circuit, based on the pixel sharing principle, a plurality of light-emitting units share one signal processing module, the average number of transistors of each driving circuit is obviously reduced, the integration difficulty and the preparation cost are greatly reduced, and the pixel driving with low transistor density is realized; the signal output of PWM is adopted, the driving capability of the Micro LED is strong, the driving area and the resolution ratio are not limited, the brightness uniformity of the Micro LED is strong, and the problems of Micro LED light color drift and the like are reduced.
Drawings
FIG. 1 is a schematic diagram of a PWM pixel circuit according to the present invention;
FIG. 2 is a schematic circuit diagram of a light-emitting unit according to the present invention;
FIG. 3 is a circuit diagram of a signal processing module according to the present invention;
FIG. 4 is a schematic diagram of a 2 × 2 PWM pixel array in an embodiment;
fig. 5 is a schematic diagram of a conventional 2 × 2 PWM pixel array.
Detailed Description
The invention is further illustrated by the following examples and figures.
Referring to fig. 1, a PWM driving circuit based on pixel sharing includes light emitting units 1 arranged in a rectangular array; the system also comprises a signal processing module 2 and a second signal emitter 4 in signal connection with the signal processing module 2 corresponding to each row of the light-emitting units 1, wherein any one light-emitting unit 1 in each row is in signal connection with the signal processing module 2; the lighting unit 1 of each row is correspondingly provided with a first signal emitter 3, and any lighting unit 1 in each row is in signal connection with the first signal emitter 1.
The signal processing module 2 is a module shared by columns, the second signal emitter 4 provides signals for the signal processing module 2, and the signal processing module 2 can provide driving signals for all the light emitting units 1 in the same column; for each row, each lighting unit 1 is present, and the first signal emitter 1 is provided for each row to provide a signal for turning on or off, and the first signal emitter 1 is provided for each row to control the on/off of each row of lighting units 1 independently.
Referring to fig. 2, the light emitting unit 1 includes a gate transistor 11 for controlling the switching of a pixel, a driving transistor 12 for providing a current pulse signal, and a micro LED13 for displaying light emission, the gate transistor 11 and the driving transistor 12 each adopt a conventional thin film transistor structure, the source of the gate transistor 11 is connected to the gate of the driving transistor 12, the source of the driving transistor 12 is connected to the anode of the micro LED13, and the cathode of the micro LED13 is grounded.
Referring to fig. 3, the signal processing module includes a comparator outputting a constant voltage and a current mirror for adjusting a constant current, the current mirror is in signal connection with the comparator, and the transfer of PWM can be realized through the arrangement of the comparator and the current mirror; the differential input stage comprises a first NMOS transistor M1, a second NMOS transistor M2, a third NMOS transistor M3 and a fourth NMOS transistor M4; the grids of the first NMOS tube M1 and the second NMOS tube M2 are connected with the gating transistor; the drain electrodes of the first NMOS tube M1 and the second NMOS tube M2 are respectively connected with the source electrodes of the third NMOS tube M3 and the fourth NMOS tube M4; the grid electrodes of the third NMOS tube M3 and the fourth NMOS tube M4 are connected with the drain electrodes of the third NMOS tube M3 and the fourth NMOS tube M4, and the drain electrodes of the third NMOS tube M3 and the fourth NMOS tube M4 are connected with a driving power supply; the level conversion stage comprises a fifth NMOS transistor M5, and the grid electrode of the fifth NMOS transistor M5 is connected with the source electrode of the fourth NMOS transistor M4; the drain electrode of the fifth NMOS tube M5 is connected with a driving power supply; the amplifying stage comprises a sixth NMOS tube M6 and a seventh NMOS tube M7, the grid electrode of the seventh NMOS tube M7 is connected with the source electrode of the fifth NMOS tube M5, and the drain electrode of the seventh NMOS tube M7 is respectively connected with the source electrode of the sixth NMOS tube M6 and the driving transistor; the grid electrode of the sixth NMOS tube M6 is connected with the drain electrode of the sixth NMOS tube M6, and the drain electrode of the sixth NMOS tube M6 is connected with the driving power supply. In the specific design process, a first NMOS tube M1, a second NMOS tube M2, a third NMOS tube M3, a fourth NMOS tube M4, a fifth NMOS tube M5, a sixth NMOS tube M6 and a seventh NMOS tube M7 adopt thin film transistors; the length-width ratios of the channels of the first NMOS transistor M1, the second NMOS transistor M2 and the seventh NMOS transistor M7 are the same; the length-width ratios of the channels of the third NMOS tube M3, the fourth NMOS tube M4, the fifth NMOS tube M5 and the sixth NMOS tube M6 are the same. The size design of the thin film transistor channel is related to the differential mode gain and the common mode rejection ratio, and is mainly used for controlling the ratio of the channel width to length ratios of the differential driving transistors M1 and M2 and the differential load transistors M3 and M4.
The current mirror comprises a current source I B An eighth NMOS transistor M8, a ninth NMOS transistor M9 and a tenth NMOS transistor M10; the drain electrode of the eighth NMOS tube M8 is connected with the source electrode of the first NMOS tube M1 and the source electrode of the second NMOS tube, the drain electrode of the ninth NMOS tube M9 is connected with the source electrode of the fifth NMOS tube M5, and the drain electrode of the tenth NMOS tube M10 is connected with the current source I B Is connected to a current source I B Is connected with a driving power supply at the other end(ii) a The grid electrode of the ninth NMOS tube M9 and the grid electrode of the eighth NMOS tube M8 are respectively connected with the grid electrode of the tenth NMOS tube M10, and the grid electrode of the tenth NMOS tube M10 is connected with the drain electrode of the tenth NMOS tube M10; the sources of the eighth NMOS transistor M8, the ninth NMOS transistor M9 and the tenth NMOS transistor M10 are grounded. Current source I B The output current of (2) is 3.5 muA, and under the action of a driving power supply, a current source I B The output current of the first NMOS transistor M10 passes through the tenth NMOS transistor M10, at the moment, the tenth NMOS transistor M10, the eighth NMOS transistor M8 and the ninth NMOS transistor M9 are all in a saturated state, and the grids of the three NMOS transistors are connected, namely V gs10 =V gs8 =V gs9 From the transistor saturation region current formula I ds =0.5μ n C ox （W/L）(V gs- V th ) 2 In which μ n As the transport rate of carriers, C ox Is unit area gate oxide capacitance, V th The threshold voltage is obtained by controlling the W/L size of each NMOS tube, and stable current input can be provided for the differential input stage and the level conversion stage. The eighth NMOS transistor M8, the ninth NMOS transistor M9, and the tenth NMOS transistor M10 all use thin film transistors.
In the invention, the output end of a second signal emitter 4 is connected with the grid of a first NMOS tube M1 and the grid of a second NMOS tube M2, the second signal emitter 4 is mainly used for providing time division multiplexing signals, the processing time which is averagely distributed to each line is the same in one processing period, the time is taken as a parameter for signal division, and the signals of each line are not overlapped on a time axis, thereby achieving the purpose of multiplex transmission control. The second signal emitter 4 provides a level signal and a triangular wave signal respectively, the level signal is input through the first NMOS tube M1, and the triangular wave signal is input through the second NMOS tube M2; the main function of the first signal emitter 3 is to control the switching of the gating transistor 11 of each row, and the first signal emitter 3 is also the starting point for the activation of each row.
The driving process of the PWM driving circuit based on pixel sharing is as follows:
an initial stage in which the first signal emitter 3 distributes a signal to the light emitting units 1 located in the same row during one operation period; the gate transistor 11 of the light emitting cell is then activated and the second signal of each column is emittedThe emitter 4 distributes the signals to the corresponding signal processing modules 2; the comparator, the current mirror and the driving transistor are connected with a driving power supply, and a current source I B Constant currents are provided for the differential input stage, the level conversion stage and the amplification stage through an eighth NMOS transistor M8, a ninth NMOS transistor M9 and a tenth NMOS transistor M10 respectively; the second signal transmitter 4 transmits the level signal and the triangular wave signal to the differential input stage through a first NMOS transistor M1 and a second NMOS transistor M2 respectively;
in the operation stage, after the level signal and the triangular wave signal are transmitted to the differential stage, at the moment, because the two inverters of the differential pair are connected with the same equivalent current source, the disturbance of the input signal at one end can influence the current distributed to the other end, thereby controlling the working condition of the other end, when the triangular wave signal is increased, the working current of the inverter at the right end is increased, and correspondingly, the current distributed by the inverter at the left end is reduced, which is reflected that the total output voltage OUT1 is increased, namely, the differential stage performs an operation on the two signals, namely, the output voltage of the stage is increased
Wherein
A voltage amplification gain for the first stage; the stage output signal is transmitted to a level conversion stage; in the first level conversion stage, the DC level of the signal is converted, and a common drain amplifier is formed at the moment, namely M5 is in a saturation region, the output conductance of M5 is influenced by the change of the M5 grid input signal, the purpose of controlling the output DC level is realized, the output DC level of the stage can be matched with the DC amplification level of the amplification stage, and the output of the stage can be matched with the DC amplification level of the amplification stage
Wherein
For the purpose of the amplification gain of the stage,
the stage output signal is passed into an amplifier stage; the amplifier stage provides the main gain for the circuitThe stage is structured as an inverter, the larger the slope of the input-output curve of the inverter is, the larger the gain of the inverter is, and the output of the stage is the output of the comparator
Wherein
Is the voltage gain of the stage; since the input of the first stage is a large signal, which is amplified by the circuit and must reach saturation quickly, the overall output of the circuit is a square wave signal, i.e., VIN 2 >VIN 1 Time-out is high level
Otherwise, it is low level VSS.
In the light-emitting stage, the signal processing module 2 outputs a PWM voltage signal, and the signal enters the driving transistor 12 after flowing through the activated gating transistor 11 to drive the transistor 12 to generate a PWM current signal and control the micro LED13 to emit light; after the processing time of the row is finished, the first signal emitter 3 controls to close the signal, the first signal emitter 3 of the other row starts to activate the gating transistor 11 and repeats the above steps, so that the light emission of the other row is finished, and the pixel driving of the micro LEDs arranged in the array is realized in a reciprocating manner.
Due to the adoption of PWM signal output, higher driving frequency can be realized, and the uniformity of the brightness of each row of micro LEDs is ensured.
Referring to fig. 4, taking a 2 × 2 PWM pixel array as an example, IN1, tri, IN2 are all provided by the second signal emitter 4, and Vsw1 and Vsw2 are provided by the first signal emitter 3, and the pattern of all signals is not changed during the whole sharing process. The signal of the second signal transmitter 4 is a time division multiplexed signal; in one operation period, the first 1/2 period provides signals for the first row, and the second 1/2 period provides signals for the second row; the signal of the first signal emitter 3 is a switching signal; in one operation period, the Vsw1 is high and the Vsw2 is low in the first 1/2 period, and the first row is on; the last 1/2 period Vsw1 is low, vsw2 is high, and the second row is on.
The operation process comprises the following steps:
in the first 1/2 period, the second signal emitter 4 provides a level signal and a triangular wave signal for the first row, vsw1 is high, vsw2 is low, the gate transistors for the first row are turned on, the second row is turned off, and the pixel cells for the first row are activated. The signal is converted into a PWM voltage signal after being processed by the signal processing module 2, the signal flows through the gating transistors on the first row which are turned on and is added to the grid electrodes of the driving transistors, the driving transistors are controlled to generate PWM current signals, the micro LEDs on the first row are controlled to emit light, and the brightness and darkness of each micro LED are controlled by the specific voltage of IN1 and IN 2; in the same manner in the later 1/2 period, the second signal emitter 4 provides a level signal and a triangular wave signal of the second row, and the Vsw1 is low and the Vsw2 is high; the second row of micro LEDs is controlled to emit light in the same manner.
The number of transistors actually used in this embodiment is 28, referring to fig. 5, the number of transistors actually used in the conventional driving circuit is 52, the number of transistors in this embodiment is much smaller than that of the conventional driving circuit, and as the array scale increases, the number of transistors used in the pixel sharing method of the present invention is lower.
Claims (7)
1. A PWM drive circuit based on pixel sharing comprises a plurality of light-emitting units (1) which are arranged in an array, and is characterized in that: the LED driving circuit comprises a signal processing module (2) corresponding to each column of light-emitting units (1) and used for providing PWM driving signals, wherein any one light-emitting unit (1) in each column is in signal connection with the signal processing module (2); the light-emitting unit (1) corresponds to each row, the light-emitting unit further comprises a first signal emitter (3) used for providing a switching signal, and any one light-emitting unit (1) in each row is in signal connection with the first signal emitter (3);
the signal processing module comprises a comparator for outputting constant voltage and a current mirror for adjusting constant current, and the current mirror is in signal connection with the comparator;
the comparator comprises a differential input stage, a level conversion stage and an amplification stage;
the differential input stage comprises a first NMOS transistor M1, a second NMOS transistor M2, a third NMOS transistor M3 and a fourth NMOS transistor M4; the grids of the first NMOS tube M1 and the second NMOS tube M2 are connected with a gating transistor; the drain electrodes of the first NMOS tube M1 and the second NMOS tube M2 are respectively connected with the source electrodes of the third NMOS tube M3 and the fourth NMOS tube M4; the grid electrodes of the third NMOS tube M3 and the fourth NMOS tube M4 are connected with the drain electrodes of the third NMOS tube M3 and the fourth NMOS tube M4, and the drain electrodes of the third NMOS tube M3 and the fourth NMOS tube M4 are connected with a driving power supply;
the level conversion stage comprises a fifth NMOS transistor M5, and the grid electrode of the fifth NMOS transistor M5 is connected with the source electrode of a fourth NMOS transistor M4; the drain electrode of the fifth NMOS tube M5 is connected with a driving power supply;
the amplifying stage comprises a sixth NMOS tube M6 and a seventh NMOS tube M7, the grid electrode of the seventh NMOS tube M7 is connected with the source electrode of the fifth NMOS tube M5, and the drain electrode of the seventh NMOS tube M7 is respectively connected with the source electrode of the sixth NMOS tube M6 and the driving transistor; the grid electrode of the sixth NMOS tube M6 is connected with the drain electrode of the sixth NMOS tube M6, and the drain electrode of the sixth NMOS tube M6 is connected with a driving power supply;
the light-emitting unit (1) comprises a first signal emitter (4) corresponding to each column, and the first signal emitter is used for providing a time division multiplexing signal, and the output end of the first signal emitter (4) is connected with the grid electrode of the first NMOS tube M1 and the grid electrode of the second NMOS tube M2 of the signal processing module (2).
2. The pixel-sharing-based PWM driving circuit according to claim 1, wherein: the light-emitting unit (1) comprises a gating transistor (11) for controlling pixel switching, a driving transistor (12) for providing a current pulse signal and a micro LED (13) for displaying light emission, wherein the grid of the gating transistor (11) is connected with a first signal emitter (3), the source of the gating transistor (11) is connected with the grid of the driving transistor (12), the source of the driving transistor (12) is connected with the anode of the micro LED (13), and the cathode of the micro LED (13) is grounded.
3. The pixel-sharing-based PWM driving circuit according to claim 1, wherein: the current mirror comprises a current source I B An eighth NMOS transistor M8, a ninth NMOS transistor M9 and a tenth NMOS transistor M10; the drain electrode of the eighth NMOS tube M8 and the first NMOS tubeThe source of the NMOS transistor M1 is connected with the source of the second NMOS transistor, the drain of the ninth NMOS transistor M9 is connected with the source of the fifth NMOS transistor M5, and the drain of the tenth NMOS transistor M10 is connected with the current source I B Is connected to a current source I B The other end of the first power supply is connected with a driving power supply; the grid electrode of the ninth NMOS tube M9 and the grid electrode of the eighth NMOS tube M8 are respectively connected with the grid electrode of the tenth NMOS tube M10, and the grid electrode of the tenth NMOS tube M10 is connected with the drain electrode of the tenth NMOS tube M10; and the source electrodes of the eighth NMOS transistor M8, the ninth NMOS transistor M9 and the tenth NMOS transistor M10 are grounded.
4. The pixel-sharing-based PWM driving circuit according to claim 3, wherein: the first NMOS tube M1, the second NMOS tube M2, the third NMOS tube M3, the fourth NMOS tube M4, the fifth NMOS tube M5, the sixth NMOS tube M6, the seventh NMOS tube M7, the eighth NMOS tube M8, the ninth NMOS tube M9 and the tenth NMOS tube M10 are all thin film transistors.
5. A driving method of a PWM driving circuit based on pixel sharing is characterized by comprising the following steps:
step one, providing a PWM driving circuit based on pixel sharing according to any one of claims 1 to 4;
step two, in one operation period, the first signal emitter (3) distributes signals to the light-emitting units (1) in the same row;
activating a gating transistor (11) of the light-emitting unit, and distributing the signal to a corresponding signal processing module (2) by a second signal emitter (4) of each column;
step four, the signal processing module (2) converts the received signal into a PWM voltage signal, the signal enters the driving transistor (12) after flowing through the activated gating transistor (11), and the driving transistor (12) generates a PWM current signal and controls the micro LED (13) to emit light;
and step five, distributing the signals to the light-emitting units (1) positioned on the other row by the first signal emitter (3), and repeating the step three to the step four to realize pixel driving of the micro LEDs arranged in the array.
6. The driving method of the pixel sharing based PWM driving circuit according to claim 5, wherein the specific process of the fourth step is: the differential input stage of the signal processing module (2) operates the received signal and outputs the signal to the level conversion stage, the level conversion stage converts the direct current level of the signal and outputs the signal to the amplification stage in a matching manner, and the amplification stage performs gain amplification on the circuit voltage and outputs the voltage pulse signal in a square wave form.
7. The driving method of the pixel sharing based PWM driving circuit according to claim 6, wherein the signal received by the signal processing module (2) comprises a level signal and a triangle wave signal, the level signal and the triangle wave signal are respectively transmitted to the differential input stage through a first NMOS transistor M1 and a second NMOS transistor M2, and the level signal and the triangle wave signal are provided by a second signal transmitter (4).
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