CN113589572B

CN113589572B - Transparent display panel, display device and driving method thereof

Info

Publication number: CN113589572B
Application number: CN202110871390.XA
Authority: CN
Inventors: 张伟; 陈龙; 廖兵; 高营昌; 张如芹; 吴欢; 张胜德
Original assignee: BOE Technology Group Co Ltd; Chengdu BOE Optoelectronics Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Chengdu BOE Optoelectronics Technology Co Ltd
Priority date: 2021-07-30
Filing date: 2021-07-30
Publication date: 2023-11-03
Anticipated expiration: 2041-07-30
Also published as: CN113589572A

Abstract

The disclosure provides a transparent display panel, a display device and a driving method thereof, and belongs to the technical field of display. The transparent display panel comprises a transparent substrate base plate, a transparent display base plate and a dimming base plate; the transparent substrate comprises a transparent substrate base plate, a first surface and a second surface, wherein the transparent substrate base plate is provided with a first surface and a second surface which are oppositely arranged; the transparent display substrate is arranged on the first surface and comprises light-emitting sub-pixels distributed in an array manner; the dimming substrate is arranged on the second surface and comprises optical switches distributed in an array; the optical switches are arranged in a one-to-one correspondence overlapping mode with the light-emitting sub-pixels. The transparent display panel provided by the disclosure can reduce the interference of ambient light on a display screen.

Description

Transparent display panel, display device and driving method thereof

Technical Field

The disclosure relates to the technical field of display, in particular to a transparent display panel, a display device and a driving method thereof.

Background

The transparent display panel allows ambient light to pass through the panel so that the ambient background can be seen through the panel. The transparent display panel can be applied to various aspects such as enhanced realistic wearable intelligent glasses, vehicle-mounted display and the like.

However, the pixels themselves, whether or not they emit light, reflect ambient light through the screen. Then the display and the environmental background will be superimposed when the image is displayed, and the fusion of the virtual information with the real world cannot be achieved relatively truly.

It should be noted that the information disclosed in the above background section is only for enhancing understanding of the background of the present disclosure and thus may include information that does not constitute prior art known to those of ordinary skill in the art.

Disclosure of Invention

The present disclosure aims to overcome the shortcomings of the prior art, and provide a transparent display panel, a display device and a driving method thereof, which reduce interference of ambient light on a display screen.

According to a first aspect of the present disclosure, there is provided a transparent display panel including:

a transparent substrate having a first surface and a second surface disposed opposite to each other;

the transparent display substrate is arranged on the first surface and comprises light-emitting sub-pixels distributed in an array;

the dimming substrate is arranged on the second surface and comprises optical switches distributed in an array; the optical switches are arranged in a one-to-one correspondence overlapping mode with the light-emitting sub-pixels.

According to one embodiment of the present disclosure, the optical switch is a liquid crystal switch.

According to one embodiment of the present disclosure, the dimming substrate includes a first polarizing layer, a first substrate, a liquid crystal layer, a second substrate, and a second polarizing layer sequentially stacked on one side of the transparent substrate;

the first substrate is provided with a switch electrode of the liquid crystal switch and a switch driving circuit for driving the liquid crystal switch; the switch driving circuit is electrically connected with the switch electrode.

According to one embodiment of the present disclosure, the switch driving circuit includes:

a switching transistor electrically connected to the switching electrode and configured to apply a first power supply voltage or a switching reset voltage to the switching electrode in response to a switching scan signal;

the optical switch is configured to be in an off state when the switching electrode is loaded with the first power supply voltage and to be in an on state when the switching electrode is loaded with the switching reset voltage.

a switching driving transistor electrically connected to the switching electrode and configured to apply a first power voltage to the switching electrode under control of a first node;

one end of the switch storage capacitor is used for loading the first power supply voltage, and the other end of the switch storage capacitor is connected with the first node;

a switching data transistor connected to the first node and configured to apply a switching data voltage to the first node in response to a switching scan signal;

a switching reset transistor connected to the switching electrode and configured to apply a switching reset voltage to the switching electrode in response to a switching reset signal;

the optical switch is configured to be in an off state when the switching electrode is loaded with the first power supply voltage and to be in an on state when the switching electrode is loaded with a switching reset voltage.

According to one embodiment of the present disclosure, the first substrate is provided with a plurality of switching scan leads extending in a row direction;

each switch driving circuit is arranged into a switch driving circuit row corresponding to each switch scanning lead one by one; any one of the switch driving circuit rows includes a plurality of the switch driving circuits; wherein, the control end of each switch data transistor in the switch driving circuit row is electrically connected with the corresponding switch scanning lead;

in the adjacent switch driving circuit rows, the control ends of the switch reset transistors in the next row of switch driving circuit rows are electrically connected with the switch scanning leads corresponding to the last row of switch driving circuit rows.

According to one embodiment of the present disclosure, the transparent display substrate includes pixel driving circuits connected to the respective light emitting sub-pixels in a one-to-one correspondence;

the pixel driving circuit is configured to receive a pixel data voltage during a scanning phase;

wherein when the switching data voltage and the pixel data voltage are the same, the pixel driving circuit is capable of outputting a driving current to the display sub-pixel and the switching driving transistor is capable of loading the first power supply voltage to the switching electrode, or the pixel driving circuit is not capable of outputting a driving current to the display sub-pixel and the switching driving transistor is not capable of loading the first power supply voltage to the switching electrode.

According to a second aspect of the present disclosure, there is provided a display device including the above-described transparent display panel.

According to a third aspect of the present disclosure, there is provided a driving method of a display device, including:

driving each light-emitting sub-pixel and each light switch, so that when the light-emitting sub-pixel is in a display state, the light switch corresponding to the light-emitting sub-pixel is in a closing state; and when the luminous sub-pixel is in a non-display state, the optical switch corresponding to the luminous sub-pixel is in an on state.

According to one embodiment of the present disclosure, a driving method of the display device includes:

driving each of the optical switches and driving each of the light emitting sub-pixels; wherein driving any one of the optical switches includes:

loading the switch reset signal to the switch reset transistor of the switch driving circuit corresponding to the optical switch in a reset stage;

loading the switch scanning signal and the switch data voltage to the switch data transistor of the switch driving circuit corresponding to the optical switch in a scanning stage;

wherein driving the light emitting sub-pixel corresponding to the optical switch includes:

in the scanning stage, loading the pixel data voltage to a pixel driving circuit corresponding to the light-emitting sub-pixel; wherein the pixel data voltage and the switching data voltage are the same.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure. It will be apparent to those of ordinary skill in the art that the drawings in the following description are merely examples of the disclosure and that other drawings may be derived from them without undue effort.

Fig. 1 is a schematic structural diagram of a transparent display panel according to an embodiment of the disclosure.

Fig. 2 is a schematic structural diagram of a transparent display panel according to an embodiment of the disclosure.

Fig. 3 is a schematic structural diagram of a transparent display panel according to an embodiment of the disclosure.

Fig. 4 is a schematic structural diagram of a light emitting sub-pixel according to an embodiment of the present disclosure.

Fig. 5 is a schematic diagram illustrating an operation principle of an optical switch according to an embodiment of the present disclosure.

Fig. 6 is an equivalent schematic diagram of a switch driving circuit in an embodiment of the present disclosure.

Reference numerals illustrate:

BP, transparent substrate base plate; BP1, first surface; BP2, second surface; an EL and transparent display substrate; LC, dimming substrate; c100, a first polarizing layer; c200, a first substrate; c300, a liquid crystal layer; c400, a second substrate; c500, a second polarizing layer; WA, switching electrode; WB, switching common electrode; p, a light-emitting sub-pixel; w, optical switch; t1, a switch driving transistor; cs, switched storage capacitance; t2, switching data transistors; and T3, switching the reset transistor.

Detailed Description

Example embodiments will now be described more fully with reference to the accompanying drawings. However, the exemplary embodiments can be embodied in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and thus detailed descriptions thereof will be omitted. Furthermore, the drawings are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale.

Although relative terms such as "upper" and "lower" are used in this specification to describe the relative relationship of one component of an icon to another component, these terms are used in this specification for convenience only, such as in terms of the orientation of the examples described in the figures. It will be appreciated that if the device of the icon is flipped upside down, the recited "up" component will become the "down" component. When a structure is "on" another structure, it may mean that the structure is integrally formed with the other structure, or that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure through another structure.

The terms "a," "an," "the," "said" and "at least one" are used to indicate the presence of one or more elements/components/etc.; the terms "comprising" and "having" are intended to be inclusive and mean that there may be additional elements/components/etc. in addition to the listed elements/components/etc.; the terms "first," "second," and "third," etc. are used merely as labels, and do not limit the number of their objects.

The present disclosure provides a transparent display panel, and a display device and a driving method thereof based on the transparent display panel. Referring to fig. 1, the transparent display panel provided by the present disclosure includes:

a transparent substrate BP having a first surface BP1 and a second surface BP2 disposed opposite to each other;

the transparent display substrate EL is disposed on the first surface BP1 and includes light emitting sub-pixels P distributed in an array;

the dimming substrate LC is disposed on the second surface BP2 and includes arrayed optical switches W; the light switches W are arranged in a one-to-one correspondence overlapping manner with the light-emitting sub-pixels P.

In the transparent display panel of the present disclosure, the light emitting sub-pixel P for displaying a picture and the optical switch W for controlling whether or not the optical path is turned off are overlapped. When the display device is driven, each light emitting sub-pixel P and each light switch W may be driven, so that when the light emitting sub-pixel P is in a display state, the light switch W corresponding to the light emitting sub-pixel P is in an off state; and when the light emitting sub-pixel P is in a non-display state, the light switch W corresponding to the light emitting sub-pixel P is in an on state.

Fig. 1 is a schematic structural diagram of a transparent display panel of the present disclosure when displaying a picture. When the transparent display panel is in operation, the transparent display substrate EL can display a picture. In fig. 1, the outgoing light of the light-emitting subpixel P is indicated by a solid arrow; the light of the ambient background is indicated by the dashed arrow. The luminous sub-pixel P which is filled with squares to be indicated is in a display state; the light emitting sub-pixel P illustrated by diagonal line filling is in a non-display state. The optical switch W is closed by adopting dense-point filling; the optical switch W is opened by filling the sparse points. In the present disclosure, the light emitting sub-pixel P and the light switch W, which are correspondingly disposed, may be defined as one display unit. Referring to fig. 1, when a transparent display panel displays a picture, if a light emitting subpixel P in one display unit is not used for displaying the picture, the light emitting subpixel P may be in a non-display state; the light switch W in the display unit is in an on state so that light of the ambient background passes through the transparent display panel. If the light emitting sub-pixel P in one display unit is used for displaying a picture, the light emitting sub-pixel P may be in a display state; the light switch W in the display unit is turned off, so that light of the ambient background cannot pass through the transparent display panel. Thus, when the user views the screen from the first surface BP1 side, the portion of the display screen is not disturbed by the environmental background; the non-display screen portion may display an environmental background. Therefore, the high-quality display picture can be ensured, and the displayed picture can be fused into a real environment, so that the effect of augmented reality is achieved.

In the present disclosure, the light emitting subpixel P being in a display state does not mean that the light emitting subpixel P is in a real-time light emitting state, but means that the light emitting subpixel P needs to emit light for at least a period of time to display a picture in one display frame. The non-display state of the light emitting sub-pixel P does not mean a state of the light emitting sub-pixel P when any one does not emit light, but means that the light emitting sub-pixel P remains non-emitting light in one display frame so as not to be used for displaying a picture in the display frame.

The structure, principles and effects of the transparent display panel of the present disclosure are further explained and illustrated below with reference to the drawings.

The transparent substrate BP provided in the present disclosure may be an inorganic substrate (for example, a glass substrate) or an organic substrate (for example, a polymethyl methacrylate substrate), so as to provide support for the transparent display substrate EL and the light modulation substrate LC and to have good light transmittance. In one embodiment of the present disclosure, the transparent substrate BP may be a glass substrate.

Alternatively, referring to fig. 2, the transparent display substrate EL may include a pixel driving circuit layer F200 and a pixel layer F300 sequentially stacked on the first surface BP1 of the transparent substrate BP. The light emitting sub-pixel P is arranged on the pixel layer F300 for displaying a picture; the pixel driving circuit layer F200 is provided with pixel driving circuits connected in one-to-one correspondence with the light emitting sub-pixels P to realize driving of the respective light emitting sub-pixels P.

Alternatively, the pixel driving circuit layer F200 is provided with a pixel scanning lead line transmitting a pixel scanning signal, and a pixel data lead line for loading a pixel data voltage. The pixel driving circuit may be electrically connected to the pixel scan line and the pixel data line. In the scanning stage, pixel scanning signals are loaded on the pixel scanning leads, and pixel data voltages are loaded on the pixel data leads. The pixel driving circuit may receive the pixel data voltage in response to the pixel scan signal so as to be according to the pixel data voltage in the light emitting period; and outputs a driving current according to the pixel data voltage to drive the light emitting sub-pixel P to emit light. In the pixel driving circuit layer F200, any one of the pixel driving circuits may include a transistor F200M and a storage capacitor. The pixel driving circuit may be a 2T1C structure, a 3T1C structure, a 5T1C structure, a 6T1C structure, a 7T2C structure, an 8T1C structure, or other types of pixel driving circuits, in order to output a driving current according to a pixel data voltage; in the above architecture, T represents a transistor, and C represents a capacitor; the 2T1C architecture represents a pixel driving circuit composed of two transistors and 1 capacitor.

Alternatively, the transistor F200M may be a thin film transistor, which may be a top gate thin film transistor, a bottom gate thin film transistor, or a double gate thin film transistor; the material of the active layer of the thin film transistor may be an amorphous silicon semiconductor material, a low temperature polysilicon semiconductor material, a metal oxide semiconductor material, an organic semiconductor material or other types of semiconductor materials; the thin film transistor may be an N-type thin film transistor or a P-type thin film transistor. In one embodiment of the present disclosure, the thin film transistor is a low temperature polysilicon transistor.

It will be appreciated that the type between any two transistors in the individual transistors in the pixel drive circuit may be the same or different. Illustratively, in one embodiment, in one pixel driving circuit, a portion of the transistors may be N-type transistors and a portion of the transistors may be P-type transistors. Still further illustratively, in another embodiment of the present disclosure, in one pixel driving circuit, the material of the active layer of the partial transistor may be a low temperature polysilicon semiconductor material, and the material of the active layer of the partial transistor may be a metal oxide semiconductor material.

The transistor may have a first terminal, a second terminal, and a control terminal, one of the first terminal and the second terminal may be a source of the transistor and the other may be a drain of the transistor, and the control terminal may be a gate of the transistor. It is understood that the source and drain of a transistor are two opposite and interchangeable concepts; the source and drain of the transistor may be interchanged when the operating state of the transistor is changed, for example when the direction of the current is changed.

Alternatively, the pixel driving circuit layer F200 may include a semiconductor layer F203, a gate insulating layer F204, a gate layer F205, an interlayer dielectric layer F206, a source drain metal layer F207, and the like stacked between the transparent substrate BP and the pixel layer F300. Each of the thin film transistors and the storage capacitor may be formed of a film layer such as the semiconductor layer F203, the gate insulating layer F204, the gate layer F205, the interlayer dielectric layer F206, the source/drain metal layer F207, or the like. The positional relationship of each film layer can be determined according to the film layer structure of the thin film transistor. For example, in one embodiment of the present disclosure, the pixel driving circuit layer F200 may include a semiconductor layer F203, a gate insulating layer F204, a gate layer F205, an interlayer dielectric layer F206, and a source-drain metal layer F207, which are sequentially stacked, so that the thin film transistor formed is a top gate thin film transistor. For another example, in another embodiment of the present disclosure, the pixel driving circuit layer F200 may include a gate layer F205, a gate insulating layer F204, a semiconductor layer F203, an interlayer dielectric layer F206, and a source drain metal layer F207, which are sequentially stacked, so that the thin film transistor is a bottom gate thin film transistor. The pixel driving circuit layer F200 may also adopt a dual gate layer F205 structure, i.e., the gate layer F205 may include a first gate layer and a second gate layer, and the gate insulating layer F204 may include a first gate insulating layer for isolating the semiconductor layer F203 and the first gate layer, and a second gate insulating layer for isolating the first gate layer and the second gate layer. For example, in one embodiment of the present disclosure, the pixel driving circuit layer F200 may include a semiconductor layer F203, a first gate insulating layer, a first gate layer, a second gate insulating layer, a second gate layer, an interlayer dielectric layer F206, and a source drain metal layer F207, which are sequentially stacked on one side of the transparent substrate BP.

Optionally, the pixel driving circuit layer F200 may further include a passivation layer, and the passivation layer may be disposed on a surface of the source drain metal layer F207 remote from the transparent substrate BP so as to protect the source drain metal layer F207.

Alternatively, the pixel driving circuit layer F200 may further include a buffer material layer F201 disposed between the transparent substrate BP and the semiconductor layer F203, the gate layer F205, and the like are all located at a side of the buffer material layer F201 away from the transparent substrate BP. The material of the buffer material layer F201 may be an inorganic insulating material such as silicon oxide or silicon nitride. The buffer material layer F201 may be one inorganic material layer or a plurality of inorganic material layers stacked.

Optionally, the pixel driving circuit layer F200 may further include a planarization layer F208 between the source drain metal layer F207 and the pixel layer F300, and the planarization layer F208 may provide a planarized surface for the pixel electrode. Alternatively, the material of the planarization layer F208 may be an organic material.

The pixel layer F300 may be provided with light emitting sub-pixels P correspondingly electrically connected to the pixel driving circuit, and the light emitting sub-pixels P are arranged in an array. Each of the light emitting sub-pixels P emits light under the control of the pixel driving circuit to realize picture display. In the present disclosure, the light emitting subpixel P may be an Organic Light Emitting Diode (OLED), a Micro light emitting diode (Micro LED), a Mini light emitting diode (Mini LED), a quantum dot-organic light emitting diode (QD-OLED), a polymer organic light emitting diode (PLED), a quantum dot electroluminescent diode (QLED), or other types of light emitting elements. In the present disclosure, the transparent display substrate EL may include a plurality of light emitting sub-pixels P of different colors in order to realize color display. The light emitting sub-pixels P may include a red light emitting sub-pixel P for emitting red light, a green light emitting sub-pixel P for emitting green light, and a blue light emitting sub-pixel P for emitting blue light, for example.

Illustratively, in one embodiment of the present disclosure, the light emitting sub-pixel P is an organic electroluminescent light emitting diode (OLED), and the transparent display panel is an OLED transparent display panel. As follows, an example of a possible structure of the pixel layer is described using the light emitting sub-pixel P as an organic electroluminescent diode.

Alternatively, referring to fig. 2, the pixel layer F300 may be disposed at a side of the pixel driving circuit layer F200 remote from the transparent substrate BP, and may include a pixel electrode layer F301, a pixel defining layer F302, a support column layer F303, an organic light emitting function layer F304, and a common electrode layer F305, which are sequentially stacked. The pixel electrode layer F301 has a plurality of pixel electrodes in a display area of the display panel; the pixel defining layer F302 has a plurality of through pixel openings in the display area, the through pixel openings being disposed in one-to-one correspondence with the plurality of pixel electrodes, and any one of the pixel openings exposes at least a portion of the corresponding pixel electrode. The support pillar layer F303 includes a plurality of support pillars in the display area, and the support pillars are located on a surface of the pixel defining layer F302 away from the transparent substrate BP, so as to support a Fine Metal Mask (FMM) during the evaporation process. The organic light emitting functional layer F304 covers at least the pixel electrode exposed by the pixel defining layer F302.

Among them, referring to fig. 4, the organic light emitting functional layer F304 may include an organic electroluminescent material layer EL4, and may include one or more of a hole injection layer, a hole transport layer EL2, an electron blocking layer EL3, a hole blocking layer, an electron transport layer EL5, and an electron injection layer. The pixel electrode EL1 located at the pixel electrode layer F301 and the common electrode EL6 located at the common electrode layer F305 are sandwiched at both sides of the organic light emitting functional layer F304 to form a light emitting sub-pixel. Each film layer of the organic light emitting functional layer F304 may be prepared by an evaporation process, and a fine metal Mask or an Open Mask (Open Mask) may be used to define a pattern of each film layer during evaporation. The common electrode layer F305 may cover the organic light emitting functional layer F304 in the display region. In this way, the pixel electrode, the common electrode layer F305, and the organic light emitting functional layer F304 located between the pixel electrode and the common electrode layer F305 form the organic light emitting diode F300D, and any one of the organic light emitting diodes may serve as one light emitting subpixel P of the display panel.

In one embodiment of the present disclosure, the material of the pixel electrode layer may be a transparent metal oxide, for example, ITO (indium tin oxide) with a thickness of 50 to 150 nm.

In one embodiment of the present disclosure, the common electrode layer F305 may be a lens metal film, for example, a magnesium silver alloy film.

In some embodiments, the pixel layer F300 may further include a light extraction layer on a side of the common electrode layer F305 remote from the transparent substrate BP to enhance the light emitting efficiency of the organic light emitting diode. Further, the light extraction layer may also be multiplexed as a Cover Plate (CPL). Further, a cover protection layer may be formed on a side of the light extraction layer away from the transparent substrate BP, and the material of the cover protection layer may be lithium fluoride or the like.

Alternatively, the transparent display substrate EL may further include a thin film encapsulation layer F400. The thin film encapsulation layer F400 is disposed on a surface of the pixel layer F300 remote from the transparent substrate BP, and may include an inorganic encapsulation layer and an organic encapsulation layer alternately stacked. The inorganic packaging layer can effectively block external moisture and oxygen, and material degradation caused by invasion of the moisture and the oxygen into the organic light-emitting functional layer F304 is avoided. Alternatively, the edges of the inorganic encapsulation layer may be located at the peripheral region. The organic encapsulation layer is located between two adjacent inorganic encapsulation layers in order to achieve planarization and to attenuate stresses between the inorganic encapsulation layers. Wherein the edge of the organic encapsulation layer may be located between the edge of the display region and the edge of the inorganic encapsulation layer. Illustratively, the thin film encapsulation layer F400 includes a first inorganic encapsulation layer F401, an organic encapsulation layer F402, and a second inorganic encapsulation layer F403 sequentially stacked on a side of the pixel layer F300 remote from the transparent substrate BP.

In some embodiments, a protective layer may be further disposed on a side of the thin film encapsulation layer F400 remote from the transparent substrate BP to protect the thin film encapsulation layer F400; the film encapsulation layer F400 is prevented from being damaged in the preparation process of the dimming substrate LC and the normal use process of the transparent display panel.

In one embodiment of the present disclosure, the transparent display substrate EL may be formed on the first surface side of the transparent substrate BP; then, a dimming substrate LC is formed on the first surface side of the transparent substrate BP.

Referring to fig. 1 and 3, a dimming substrate LC is disposed on a second surface BP2 of a transparent substrate BP, which is provided with array-distributed optical switches W. When the light switch W is in an on state, light can pass through the transparent display panel from the position of the light switch W. When the optical switch W is in the off state, light cannot pass through the transparent display panel from the position of the optical switch W.

In the present disclosure, the light switch W is disposed overlapping the corresponding light emitting sub-pixel P, which means that the orthographic projection of the light switch W on the transparent substrate BP at least partially coincides with the orthographic projection of the corresponding light emitting sub-pixel P on the transparent substrate BP. In one embodiment of the present disclosure, the front projection of the optical switch W on the transparent substrate BP is completely coincident with the front projection of the corresponding light emitting subpixel P on the transparent substrate BP. In another embodiment of the present disclosure, the orthographic projection of the light emitting sub-pixel P on the transparent substrate BP is entirely within the orthographic projection of the corresponding optical switch W on the transparent substrate BP.

Optionally, the optical switch W is a liquid crystal switch. In this way, the optical switch W can be switched between the on state and the off state by controlling the twist of the liquid crystal.

In one embodiment of the present disclosure, the dimming substrate LC includes a first polarizing layer C100, a first substrate C200, a liquid crystal layer C300, a second substrate C400, and a second polarizing layer C500 sequentially stacked on one side of the transparent substrate BP. The first substrate C200 is provided with a switching electrode WA of the liquid crystal switch and a switch driving circuit for driving the liquid crystal switch; the switch driving circuit is electrically connected with the switch electrode WA. Wherein, the first substrate C200 and the second substrate C400 are provided with an alignment layer at a side close to the liquid crystal layer C300, so that the liquid crystal molecules in the liquid crystal layer C300 are aligned at a preset angle and direction. In one layer of the first and second substrates C200 and C400, a switching common electrode WB may also be provided. The switch driving circuit controls the voltage on the switch electrode WA so as to control the electric field between the switch electrode WA and the switch common electrode WB, thereby realizing the control of the arrangement state of liquid crystal molecules and further realizing the control of the state of the optical switch W. Referring to fig. 5, the liquid crystal layer C300 is sandwiched between the first and second polarizing layers C100 and C500; the incident light is changed into polarized light after passing through the first polarizing layer C100; after passing through the liquid crystal layer C300, the polarized light may be deflected in its polarization direction; when the second polarizer C500 is irradiated, if the polarization direction of the polarized light is identical to that of the second polarizer C500, the polarized light may be transmitted, and at this time, the light-on state is in an on state, and the incident light may be transmitted from the light-on state to be transmitted light. When the second polarizer C500 is irradiated, if the polarization direction of the polarized light is perpendicular to the polarization direction of the second polarizer C500, polarized light may not be transmitted, and at this time, the light-on state is in the off state, and incident light may not be transmitted from the light-on state.

In one embodiment of the present disclosure, the switching common electrode WB may be disposed on the second substrate C400. In another embodiment of the present disclosure, the switching common electrode WB may be disposed on the first substrate C200.

Further, a second power supply voltage may be applied to the switching common electrode WB.

Alternatively, the first substrate C200 may be further provided with a switch Scan lead for loading the switch Scan signal Scan, and the switch driving circuit may be electrically connected with the switch Scan lead. Further, the number of the switching scan lines is plural and extends in the row direction. Each switch driving circuit is arranged into a switch driving circuit row corresponding to each switch scanning lead one by one; any one of the switch driving circuit rows includes a plurality of the switch driving circuits. Each switch driving circuit on the switch driving circuit row can be electrically connected with a corresponding switch scanning lead. Thus, the progressive scanning of each switch driving circuit can be realized by means of the switch scanning lead, and further the progressive control of each optical switch W can be realized.

Alternatively, the switching driving circuit may load the first power supply voltage VDD to the switching electrode WA under the control of the switching Scan signal Scan. The optical switch W is configured to be in an off state when the switching electrode WA is loaded with the first power supply voltage VDD and to be in an on state when the switching electrode WA is loaded with a switching reset voltage Vreset. The configuration of the switch driving circuit can be configured as needed. In one embodiment of the present disclosure, the switch reset voltage may be equal to the second supply voltage.

In one embodiment of the present disclosure, the switch driving circuit may include a switch transistor. The switching transistor is electrically connected to the switching electrode WA and configured to apply a first power supply voltage VDD or a switching reset voltage Vreset to the switching electrode WA in response to a switching Scan signal Scan. As an exemplary possible implementation, the first substrate C200 may be provided with a plurality of switching data leads extending in the column direction, the switching data leads connecting a plurality of switching driving circuits arranged in different rows. The first end of the switching transistor may be electrically connected to the switching data lead, the second end may be electrically connected to the switching electrode WA, and the control end may be electrically connected to the switching scan lead. The switch data lead may be loaded with a first power voltage VDD or a switch reset voltage Vreset. In the scanning phase, the switch scanning lead can load a switch scanning signal Scan to the switch transistor to enable the switch transistor to be conducted; as such, the first power voltage VDD or the switching reset voltage Vreset on the switching data lead may be applied to the switching electrode WA. After the switching transistor is turned off, the voltage on the switching electrode WA is maintained so that the optical switch W is maintained in an off state or an on state.

In another embodiment of the present disclosure, referring to fig. 6, the switch driving circuit includes:

a switching driving transistor T1 electrically connected to the switching electrode WA and configured to load a first power supply voltage VDD to the switching electrode WA under the control of a first node N1;

a switch storage capacitor Cs, one end of which is used for loading the first power supply voltage VDD, and the other end of which is connected with the first node N1;

a switching Data transistor T2 connected to the first node N1 and configured to load a switching Data voltage Data to the first node N1 in response to a switching Scan signal Scan;

a switching Reset transistor T3 connected to the switching electrode WA and configured to load a switching Reset voltage Vreset to the switching electrode WA in response to a switching Reset signal Reset.

As an exemplary possible implementation, the first substrate C200 may be provided with a first power supply voltage lead for loading the first power supply voltage VDD, a switch Reset voltage lead for loading the switch Reset voltage Vreset, a switch Reset control lead for loading the switch Reset signal Reset, and a plurality of switch data leads extending in the column direction, the switch data leads connecting the switch driving circuits arranged in a plurality of different rows. The first end of the switch driving transistor T1 is electrically connected to the first power voltage lead, the second end is electrically connected to the switch electrode WA, and the control end is electrically connected to the first node N1. One end of the switch storage capacitor Cs is electrically connected to the first power supply voltage lead, and the other end is electrically connected to the first node N1. The first end of the switch data transistor T2 is electrically connected to the switch data lead, the second end is electrically connected to the first node N1, and the control end is electrically connected to the switch scan lead. The first end of the switch reset transistor T3 is electrically connected with the switch reset voltage lead, the second end of the switch reset transistor T3 is electrically connected with the switch electrode WA, and the control end of the switch reset transistor T3 is electrically connected with the switch reset control lead.

The display device of the present disclosure can drive the respective optical switches W row by row when driving the light-transmitting display panel. When any one of the optical switches W is driven, the following driving method may be adopted:

in the Reset phase, the switch Reset transistor T3 is loaded with the switch Reset signal Reset. Specifically, the switch Reset control lead may load the switch Reset transistor T3 with the switch Reset signal Reset to cause the switch Reset transistor T3 to be turned on. In this way, the switch reset voltage Vreset is applied to the switch electrode WA, so that the optical switch W is reset to the on state.

In the Scan stage, the switching Scan signal Scan and the switching Data voltage Data are loaded to the switching Data transistor T2. Specifically, the switch Scan lead loads the switch Scan signal Scan to the switch data transistor T2, so that the switch data transistor T2 is turned on; the switching Data lead loads the switching Data voltage Data to the switching Data transistor T2 such that the switching Data voltage Data is written to the first node N1. The switching driving transistor T1 is turned on or off under the control of the switching Data voltage Data at the first node N1. Specifically, when the switch driving transistor T1 is turned on, the first power supply voltage lead may charge the switch electrode WA to a voltage of the first power supply voltage VDD. When the switching driving transistor T1 is not turned on, the first power supply voltage lead may not charge the switching electrode WA, so that the voltage of the switching electrode WA is maintained at the switching reset voltage Vreset.

In a further embodiment, in the adjacent switch driving circuit rows, the control terminals of the switch reset transistors T3 in the next row of the switch driving circuit rows are electrically connected to the switch scan leads corresponding to the previous row of the switch driving circuit rows. In this way, the switch Scan signal Scan of the upper row of switch driving circuit rows can be multiplexed into the switch Reset signal Reset of the lower row of switch driving circuit rows; the switch scan leads corresponding to the upper row of switch drive circuit rows may be multiplexed into the switch reset control leads corresponding to the lower row of switch drive circuit rows.

In a further embodiment, the pixel driving circuit is configured to receive the pixel data voltage during a scanning phase. When the switching Data voltage Data and the pixel Data voltage are the same, the pixel driving circuit can output a driving current to the light emitting sub-pixel P and the switching driving transistor T1 can load the first power supply voltage VDD to the switching electrode WA, or the pixel driving circuit cannot output a driving current to the light emitting sub-pixel P and the switching driving transistor T1 cannot load the first power supply voltage VDD to the switching electrode WA.

When the light emitting sub-pixel P corresponding to the light switch W is driven, the pixel data voltage may be applied to the pixel driving circuit corresponding to the light emitting sub-pixel P in a scanning stage. In this way, the pixel driving circuit can control the light emission of the light emitting sub-pixel P according to the pixel data voltage. Wherein the pixel Data voltage and the switching Data voltage Data are the same. In other words, when driving one display unit, the pixel Data voltage of the light emitting subpixel P driving the display unit may be the same as the switching Data voltage Data of the light switch W driving the display unit. In this way, driving of the display device can be facilitated.

It should be noted that, although the steps of the driving method of the display device in the present disclosure are described in a specific order in the detailed description, this does not require or suggest that the steps must be performed in the specific order or that all of the illustrated steps must be performed to achieve desirable results. Additionally or alternatively, certain steps may be omitted, multiple steps combined into one step to perform, and/or one step decomposed into multiple steps to perform, etc.

Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any adaptations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

Claims

1. A transparent display panel, comprising:

the dimming substrate is arranged on the second surface and comprises optical switches distributed in an array; the optical switches are arranged in a one-to-one correspondence overlapping manner with the light-emitting sub-pixels; the optical switch is a liquid crystal switch;

the dimming substrate comprises a first polarizing layer, a first substrate, a liquid crystal layer, a second substrate and a second polarizing layer which are sequentially laminated on one side of the transparent substrate; the first substrate is provided with a switch electrode of the liquid crystal switch and a switch driving circuit for driving the liquid crystal switch; the switch driving circuit is electrically connected with the switch electrode;

the switch driving circuit includes:

the optical switch is configured to be in an off state when the switch electrode is loaded with the first power supply voltage, and to be in an on state when the switch electrode is loaded with a switch reset voltage;

the transparent display substrate comprises pixel driving circuits which are connected with the luminous sub-pixels in a one-to-one correspondence manner; the pixel driving circuit is configured to receive a pixel data voltage during a scanning phase;

2. The transparent display panel according to claim 1, wherein the first substrate is provided with a plurality of switching scan wirings extending in a row direction;

3. A display device comprising the transparent display panel of claim 1 or 2.

4. A driving method of a display device, characterized in that the display device comprises the transparent display panel according to claim 1 or 2; the driving method of the display device includes: