CN113539194B - Display device - Google Patents
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- CN113539194B CN113539194B CN202010323965.XA CN202010323965A CN113539194B CN 113539194 B CN113539194 B CN 113539194B CN 202010323965 A CN202010323965 A CN 202010323965A CN 113539194 B CN113539194 B CN 113539194B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2370/00—Aspects of data communication
- G09G2370/08—Details of image data interface between the display device controller and the data line driver circuit
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2370/00—Aspects of data communication
- G09G2370/14—Use of low voltage differential signaling [LVDS] for display data communication
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Crystallography & Structural Chemistry (AREA)
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- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
The embodiment of the disclosure discloses a display device, comprising: a display panel having thereon a pixel matrix, a source driving circuit and a gate driving circuit; a COF source driver electrically connected to a source driving circuit on the display panel; a horizontal direction circuit board (XB) electrically connected to the COF type source driver; the horizontal direction circuit board comprises at least 3 XB structures, and each XB structure is connected with 4 COF type source drivers; the COF source driver is connected with the XB structure through a mini-LVDS interface. The invention provides at least 3 XB structures under normal architecture and TCONLESS architecture, which is suitable for panels with larger size, can reduce the number of XB and connecting wires and lower the cost; after the connector is reduced, more wiring space is reserved for XB; the reduction of the number of connectors and FFCs is also significant to the design of the mechanism of the module; the Mini-LVDS signal transmits data to the COF by using a 6port3pair, so that the cost of a Driver IC is saved as a low-speed signal.
Description
Technical Field
The present disclosure relates to the field of display, and in particular, to a display device.
Background
The general liquid crystal display device mainly includes a source driving circuit, a gate driving circuit, a horizontal direction circuit board (X-board, abbreviated as XB board) disposed On a liquid crystal Panel (Panel), a System On Chip (SOC), a Timing Controller (TCON), and a flexible flat cable (Flexible Flat Cable, abbreviated as FFC) disposed On a System board or a motherboard (MB board), wherein the System On Chip receives an image data signal to be transmitted and outputs the image data signal to be transmitted, and then processes an input signal through a row expansion module and a column expansion module, and transmits the processed data to the Timing controller, which transmits the received data to the source driving circuit and the gate driving circuit through the horizontal direction circuit board, thereby driving the Panel to display.
Along with the release of productivity of each liquid crystal panel factory, the large-size liquid crystal panel has strong competition and high price descending pressure. The manufacturers of large-size televisions gradually change to a TCONLESS type liquid crystal panel for reducing the cost. In the related art of TCONLESS liquid crystal panels, all or part of the TCON functions are implemented by a System On Chip (SOC) on a system board (MB board), and the area of the SOC on the MB board can be kept unchanged after the SOC is increased by the TCON function. ST IC is called as Small TCON IC, and has the main function of high-speed signal conversion, and converts P2P or VBYONE high-speed signal output by front end SOC into mini-LVDS signal output; VBYONE (or V-by-One) is a digital interface standard developed for image transmission, the input and output levels of signals are LVDS (low voltage differential signal), and the signal frequency of the board card is about 1GHz.
With the development trend of large-size high PPI of TV products, the size of the liquid crystal panel tends to be larger, such as 70 inches, 75 inches, 100 inches, etc.; compared with the XB design of a small-size panel, the method is limited by the upper limit of the length of a PCB manufactured by a PCB factory, and the difficulty of COF (Chip-On-Flex) bonding after the PCB is overlong is increased. The current 70 inch 4K panel architecture is totally 12 source COFs, which is limited by the fact that XB boards cannot be overlong, a multi-block XB design is mostly adopted, each block is connected with 3 COFs, TCON output mini-LVDS data is 4 ports 6 pairs (each component of 4 groups of data is 6 branches), and each XB can be allocated to be responsible for 1port mini-LVDS data. The number of XB of the existing design is too large, and the XB is provided with 6 connectors and 4 FFCs, so that the cost is increased; on the other hand, the connector occupies an area on the PCB, increases the difficulty of circuit layout, and limits the mechanical design of each module.
Disclosure of Invention
To overcome at least some of the disadvantages and shortcomings in the related art, embodiments of the present disclosure provide a display device.
The present disclosure provides a display device including:
a display Panel (Panel) having thereon a pixel matrix, a source driving circuit, and a gate driving circuit;
a COF type SOURCE DRIVER (SOURCE DRIVER) electrically connected to a SOURCE driving circuit on the display panel;
a horizontal direction circuit board (XB) electrically connected to the COF type source driver;
the horizontal direction circuit board comprises at least 3 XB structures, and each XB structure is connected with 4 COF type source drivers; the COF source driver is connected with the XB structure through a mini-LVDS interface.
In one embodiment of the present invention, the signal output of the Mini-LVDS interface is uniformly distributed to the XB structure; the XB structure comprises: a first horizontal direction circuit board (XR), a second horizontal direction circuit board (XM), and a third horizontal direction circuit board (XL), each 2 of the COF type source drivers sharing 1 group (port) of data lines, each of the XB structurally having 2 groups (port) of data lines.
In one embodiment of the invention, the display device further comprises a main board or system board (MB);
the main board is provided with a system-on-chip (SOC); the Mini-LVDS interface has 6 sets (ports) of data lines.
In one embodiment of the present invention, the display apparatus further includes a Control Board (CB) having a timing control chip (TCON IC) thereon; the system-on-chip (SOC) is connected with the control board through a VBYONE interface to transmit control signals and data signals required by the display panel; the time sequence control chip is used for converting the received VBYONE signal into a mini-LVDS signal; the mini-LVDS signals are output in 6 groups of 3 branches (6 port3 pairs); the time sequence control chip is provided with an optical taste adjustment IP module; the optical taste adjustment IP module includes: mura elimination (Demura) IP core, white balance (white balance) adjustment IP core, low color shift (low color shift) compensation IP core, over Drive (OD) IP core, and dither process (dither) IP core, and acc IP core.
In one embodiment of the invention, the Control Board (CB) is connected to the second horizontal direction circuit board (XM) and a third horizontal direction circuit board (XL); the first horizontal direction circuit board (XR) and the second horizontal direction circuit board (XM) are connected by a flexible flat cable (FFC or FPC); the second horizontal direction circuit board (XM) transmits mini-LVDS signals of the first group (port 1) and the second group (port 2) to the first horizontal direction circuit board (XR) through a connector.
In one embodiment of the invention, the Control Board (CB) is connected to a second horizontal direction circuit board (XM); the second horizontal direction circuit board (XM) transmits mini-LVDS signals of the first group (port 1), the second group (port 2), the fifth group (port 5) and the sixth group (port 6) to the first horizontal direction circuit board (XR) and the third horizontal direction circuit board (XL) through connectors.
In one embodiment of the invention, the constituent modules are also free of (CB); the horizontal direction circuit board (XB) is provided with a nonvolatile memory (FLASH) and an ST IC; the FLASH is stored with display panel optical taste adjustment parameters (optical CODE); and the system-in-chip (SOC) reads the optical taste adjustment parameters on the FLASH to adjust the optical taste of a display Panel (Panel).
In one embodiment of the present invention, the System On Chip (SOC) is connected to a second horizontal direction circuit board (XM) through a preset interface for transmitting control signals and data signals required for the display panel; the second horizontal direction circuit board (XM) transmits mini-LVDS signals of the first group (port 1), the second group (port 2), the fifth group (port 5) and the sixth group (port 6) to the first horizontal direction circuit board (XR) and the third horizontal direction circuit board (XL) through connectors; the optical taste adjustment parameters include: a Mura elimination (Demura) parameter, a white balance (white balance) adjustment parameter, a low color shift (low color shift) compensation parameter, an OverDrive (OD) parameter, a dither process (dither) parameter, and an acc parameter.
In one embodiment of the present invention, the preset interface is a P2P interface; the ST IC may generate a control signal of a display Panel (Panel); the ST IC is used for converting the P2P interface signal into a mini-LVDS interface signal for a source driver to use; the mini-LVDS interface signal output is 6 groups of 3 branches (6 port3 pairs) each, and the 6port mini is used for being uniformly distributed to 3 XBs; the motherboard MB need not provide a timing signal.
In one embodiment of the present invention, the preset interface is a VBYONE interface; the ST IC is used for converting the VBYONE interface signal into a mini-LVDS interface signal; the mini-LVDS interface signals are output as 6 groups of 4 branches (6 port4 pairs); the VBYONE does not transmit optical data; the optical parameters are transmitted to a System On Chip (SOC) via an SPI bus (bus).
The invention provides at least 3 XB structures under normal architecture and TCONLESS architecture, which is suitable for panels with larger size, can reduce the number of XB and connecting wires and lower the cost; after the connector is reduced, more wiring space is reserved for XB; the reduction of the number of connectors and FFCs is also significant to the design of the mechanism of the module; the Mini-LVDS signal transmits data to the COF by using a 6port3pair, so that the cost of a Driver IC is saved as a low-speed signal.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and other drawings may be obtained according to these drawings without inventive effort for a person of ordinary skill in the art.
Fig. 1 is a schematic diagram of a display device according to an embodiment of the disclosure.
Fig. 2 is a schematic diagram of a display device including CB according to an embodiment of the disclosure.
Fig. 3 is a schematic diagram of a display device including CB according to an embodiment of the present disclosure.
Fig. 4 is a schematic diagram of a display device including CB according to another embodiment of the disclosure.
Fig. 5 is a schematic diagram of a TCON leave display apparatus in another embodiment of this disclosure.
Fig. 6 is a schematic diagram of a P2P signal converted to a mini-LVDS signal by an ST IC according to another embodiment of the disclosure.
Fig. 7 is a schematic diagram illustrating conversion of another P2P signal into a mini-LVDS signal by an ST IC according to another embodiment of the disclosure.
Fig. 8 is a schematic diagram of another TCONLESS display apparatus in another embodiment of the present disclosure.
Fig. 9 is a schematic diagram of a VBYONE signal converted to a mini-LVDS signal by an ST IC in another embodiment of the disclosure.
Detailed Description
For the purposes of making the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present disclosure, and it is apparent that the described embodiments are some embodiments of the present disclosure, but not all embodiments. Based on the embodiments in this disclosure, all other embodiments that a person of ordinary skill in the art would obtain without making any inventive effort are within the scope of protection of this disclosure.
The following description of the embodiments refers to the accompanying drawings, which illustrate specific embodiments in which the disclosure may be practiced. The directional terms mentioned in this disclosure, such as "up", "down", "front", "back", "left", "right", "inside", "outside", "side", etc., refer only to the directions of the attached drawings. Accordingly, directional terms are used to illustrate and understand the present disclosure, not to limit the present disclosure.
The drawings and description are to be regarded as illustrative in nature, and not as restrictive. In the drawings, like structural elements are denoted by like reference numerals. In addition, for the sake of understanding and convenience of description, the size and thickness of each component shown in the drawings are arbitrarily shown, but the present disclosure is not limited thereto.
In addition, in the description, unless explicitly described to the contrary, the word "comprising" will be understood to mean comprising the recited component, but not excluding any other components. Further, in the specification, "above" means above or below the target assembly, and does not mean necessarily on top based on the direction of gravity.
In order to further describe the technical means and effects adopted by the present disclosure to achieve the predetermined disclosure purpose, the following description refers to a specific implementation, structure, feature and effect of a display device according to the present disclosure with reference to the accompanying drawings and preferred embodiments.
Example 1
As shown in fig. 1, a display device is provided in one embodiment of the present disclosure. The display device includes:
a display Panel (Panel) 101 having thereon a pixel matrix, a source driving circuit, and a gate driving circuit;
a COF type SOURCE DRIVER (SOURCE DRIVER) 102 electrically connected to a SOURCE driving circuit on the display panel;
a horizontal direction circuit board (XB) 103 electrically connected to the COF type source driver;
wherein the horizontal direction circuit board 103 includes at least 3 XB structures, each of which is connected to 4 of the COF type source drivers 102; the COF source driver 102 is connected with the XB structure through a mini-LVDS interface.
Further, the signal output of the Mini-LVDS interface is uniformly distributed to the XB structure; the XB structure comprises: a first horizontal direction circuit board (XR) 1031, a second horizontal direction circuit board (XM) 1032, and a third horizontal direction circuit board (XL) 1033, each 2 of the COF source drivers sharing 1 group (port) of data lines, each of the XB structurally having 2 groups (port) of data lines.
Further, the display device also comprises a main board or a system board (MB), wherein the main board is provided with a System On Chip (SOC), and the Mini-LVDS interface is provided with 6 groups (ports) of data lines.
Further, as shown in fig. 3, the display device further includes a Control Board (CB) having a timing control chip (TCON IC) thereon; the system-on-chip (SOC) is connected with the control board through a VBYONE interface to transmit control signals and data signals required by the display panel; the time sequence control chip is used for converting the received VBYONE signal into a mini-LVDS signal; the mini-LVDS signals are output in 6 groups of 3 branches (6 port3 pairs); the time sequence control chip is provided with an optical taste adjustment IP module; the optical taste adjustment IP module includes: mura elimination (Demura) IP core, white balance (white balance) adjustment IP core, low color shift (low color shift) compensation IP core, over Drive (OD) IP core, and dither process (dither) IP core, and acc IP core.
Further, as shown in fig. 2, the Control Board (CB) is connected to the second horizontal direction circuit board (XM) and the third horizontal direction circuit board (XL); the first horizontal direction circuit board (XR) and the second horizontal direction circuit board (XM) are connected by a flexible flat cable (FFC or FPC); the second horizontal direction circuit board (XM) transmits mini-LVDS signals of the first group (port 1) and the second group (port 2) to the first horizontal direction circuit board (XR) through a connector.
Specifically, the embodiment is a framework containing CB, the composition modules of which are MB- & gt CB- & gt XB- & gt panel, wherein the MB is provided with an SOC, and the MB is connected with the CB through a VBYONE interface to transmit control data and data of the liquid crystal panel; CB has TCON IC; CB connects XM and XL, XR and XM are connected through FFC or FPC; the TCON IC on the CB converts the received VBYONE signal into a mini-LVDS signal, and outputs the mini-LVDS signal to the XB through a 6port3 pair; the TCON IC is also provided with an optical adjustment IP module such as demura/acc/od/alcs/dither; XM transmits mini-LVDS signals of port1port2 to XR through the connector.
The invention provides a 3-block XB structure under the normal architecture, which is suitable for a panel with a larger size, such as 70 inches, and can reduce the number of XB and connecting wires and reduce the cost; after the connector is reduced, more wiring space is reserved for XB; the reduction of the number of connectors and FFCs is also significant to the design of the mechanism of the module; the Mini-LVDS signal transmits data to the COF by using a 6port3pair, so that the cost of a Driver IC is saved as a low-speed signal.
Example two
As shown in fig. 1, a display device is provided in one embodiment of the present disclosure. The display device includes:
a display Panel (Panel) 101 having thereon a pixel matrix, a source driving circuit, and a gate driving circuit;
a COF type SOURCE DRIVER (SOURCE DRIVER) 102 electrically connected to a SOURCE driving circuit on the display panel;
a horizontal direction circuit board (XB) 103 electrically connected to the COF type source driver;
wherein the horizontal direction circuit board 103 includes at least 3 XB structures, each of which is connected to 4 of the COF type source drivers 102; the COF source driver 102 is connected with the XB structure through a mini-LVDS interface.
Further, the signal output of the Mini-LVDS interface is uniformly distributed to the XB structure; the XB structure comprises: a first horizontal direction circuit board (XR) 1031, a second horizontal direction circuit board (XM) 1032, and a third horizontal direction circuit board (XL) 1033, each 2 of the COF source drivers sharing 1 group (port) of data lines, each of the XB structurally having 2 groups (port) of data lines.
Further, the display device also comprises a main board or a system board (MB), wherein the main board is provided with a System On Chip (SOC), and the Mini-LVDS interface is provided with 6 groups (ports) of data lines.
Further, the display device further comprises a Control Board (CB) provided with a time sequence control chip (TCON IC); the system-on-chip (SOC) is connected with the control board through a VBYONE interface to transmit control signals and data signals required by the display panel; the time sequence control chip is used for converting the received VBYONE signal into a mini-LVDS signal; the mini-LVDS signals are output in 6 groups of 3 branches (6 port3 pairs); the time sequence control chip is provided with an optical taste adjustment IP module; the optical taste adjustment IP module includes: mura elimination (Demura) IP core, white balance (white balance) adjustment IP core, low color shift (low color shift) compensation IP core, over Drive (OD) IP core, and dither process (dither) IP core, and acc IP core.
Further, as shown in fig. 4, the Control Board (CB) is connected to the second horizontal direction circuit board (XM); the second horizontal direction circuit board (XM) transmits mini-LVDS signals of the first group (port 1), the second group (port 2), the fifth group (port 5) and the sixth group (port 6) to the first horizontal direction circuit board (XR) and the third horizontal direction circuit board (XL) through connectors.
Specifically, the embodiment is a framework containing CB, the composition modules of which are MB- & gt CB- & gt XB- & gt panel, wherein the MB is provided with an SOC, and the MB is connected with the CB through a VBYONE interface to transmit control data and data of the liquid crystal panel; CB has TCON IC; the CB is connected with the XM, the XL and the XR and the XM through an FFC or an FPC; the TCON IC on the CB converts the received VBYONE signal into a mini-LVDS signal, and outputs the mini-LVDS signal to the XB through a 6port3 pair; the TCON IC is also provided with an optical adjustment IP module such as demura/acc/od/alcs/dither; XM transmits mini-LVDS signals of port1port2 to XR and XL through connectors.
The invention provides a 3-block XB structure under normal architecture, which is suitable for a panel with a larger size, such as a 70-inch panel, and can reduce the number of XB and connecting wires and reduce the cost; after the connector is reduced, more wiring space is reserved for XB; the reduction of the number of connectors and FFCs is also significant to the design of the mechanism of the module; the Mini-LVDS signal transmits data to the COF by using a 6port3pair, so that the cost of a Driver IC is saved as a low-speed signal.
Example III
As shown in fig. 1, a display device is provided in one embodiment of the present disclosure. The display device includes:
a display Panel (Panel) 101 having thereon a pixel matrix, a source driving circuit, and a gate driving circuit;
a COF type SOURCE DRIVER (SOURCE DRIVER) 102 electrically connected to a SOURCE driving circuit on the display panel;
a horizontal direction circuit board (XB) 103 electrically connected to the COF type source driver;
wherein the horizontal direction circuit board 103 includes at least 3 XB structures, each of which is connected to 4 of the COF type source drivers 102; the COF source driver 102 is connected with the XB structure through a mini-LVDS interface.
Further, the signal output of the Mini-LVDS interface is uniformly distributed to the XB structure; the XB structure comprises: a first horizontal direction circuit board (XR) 1031, a second horizontal direction circuit board (XM) 1032, and a third horizontal direction circuit board (XL) 1033, each 2 of the COF source drivers sharing 1 group (port) of data lines, each of the XB structurally having 2 groups (port) of data lines.
Further, the display device also comprises a main board or a system board (MB), wherein the main board is provided with a System On Chip (SOC), and the Mini-LVDS interface is provided with 6 groups (ports) of data lines.
Further, the constituent modules are also free of (CB); the horizontal direction circuit board (XB) is provided with a nonvolatile memory (FLASH) and an ST IC; the FLASH is stored with display panel optical taste adjustment parameters (optical CODE); and the system-in-chip (SOC) reads the optical taste adjustment parameters on the FLASH to adjust the optical taste of a display Panel (Panel).
Further, the System On Chip (SOC) is connected to a second horizontal direction circuit board (XM) through a preset interface, for transmitting control signals and data signals required for the display panel; the second horizontal direction circuit board (XM) transmits mini-LVDS signals of the first group (port 1), the second group (port 2), the fifth group (port 5) and the sixth group (port 6) to the first horizontal direction circuit board (XR) and the third horizontal direction circuit board (XL) through connectors; the optical taste adjustment parameters include: a Mura elimination (Demura) parameter, a white balance (white balance) adjustment parameter, a low color shift (low color shift) compensation parameter, an OverDrive (OD) parameter, a dither process (dither) parameter, and an acc parameter.
Further, as shown in fig. 5, 6 and 7, the preset interface is a P2P interface; the ST IC may generate a control signal of a display Panel (Panel); the ST IC is used for converting the P2P interface signal into a mini-LVDS interface signal for a source driver to use; the mini-LVDS interface signal output is 6 groups of 3 branches (6 port3 pairs) each, and the 6port mini is used for being uniformly distributed to 3 XBs; the motherboard MB need not provide a timing signal. The conversion is specifically: the ST IC decodes the received P2P high-speed signal according to the specification definition, and then converts the data into mini-LVDS interface protocol for output; the above protocols have specific interface specifications, which are common in the industry and will not be described herein.
It should be noted that, unlike TCON ICs in the prior art, TCON ICs also have optical adjustment functions (i.e., optical taste IP core), such as demura, white balance, gamma, OD, etc., by which the front-end data is optimized, and the panel display taste is improved; while ST IC has no optical processing function, for example, in the present TCONLESS architecture, optical processing is performed by an algorithm performed by SOC.
Specifically, the embodiment is a TCON leave architecture, its constituent modules are mb→xb→panel, where the MB has SOC, and is connected with XM through a P2P interface, so as to transmit control data and data of the liquid crystal panel; the P2P signal is converted into a mini-LVDS signal through an ST IC on XM, and the mini-LVDS signal is output as a 6port3pair, so that a SOURCE DRIVER can use a mini-LVDS interface, the cost of SOURCE DRIVER is reduced, and 6port mini data can be uniformly distributed to 3 XBs; in addition, the optical CODE (demura/acc/od/alcs/dither) is put on the XB FLASH, the SOC does not need to adjust the Panel optical parameters, and only needs to read and use; XM transmits mini-LVDS signals of port1port2 and port5port6 to XR and XL respectively through connectors; the Panel control signal can also be generated by the ST IC, and MB need not provide any timing signal.
The invention provides a 3-block XB structure under the TCONLESS architecture, which is suitable for a panel with a larger size, such as a 70-inch panel, and can reduce the number of XB and connecting wires and reduce the cost; after the connector is reduced, more wiring space is reserved for XB; the reduction of the number of connectors and FFCs is also significant to the design of the mechanism of the module; the Mini-LVDS signal transmits data to the COF by using a 6port3pair, so that the cost of a Driver IC is saved as a low-speed signal.
Example IV
As shown in fig. 1, a display device is provided in one embodiment of the present disclosure. The display device includes:
a display Panel (Panel) 101 having thereon a pixel matrix, a source driving circuit, and a gate driving circuit;
a COF type SOURCE DRIVER (SOURCE DRIVER) 102 electrically connected to a SOURCE driving circuit on the display panel;
a horizontal direction circuit board (XB) 103 electrically connected to the COF type source driver;
wherein the horizontal direction circuit board 103 includes at least 3 XB structures, each of which is connected to 4 of the COF type source drivers 102; the COF source driver 102 is connected with the XB structure through a mini-LVDS interface.
Further, the signal output of the Mini-LVDS interface is uniformly distributed to the XB structure; the XB structure comprises: a first horizontal direction circuit board (XR) 1031, a second horizontal direction circuit board (XM) 1032, and a third horizontal direction circuit board (XL) 1033, each 2 of the COF source drivers sharing 1 group (port) of data lines, each of the XB structurally having 2 groups (port) of data lines.
Further, the display device also comprises a main board or a system board (MB), wherein the main board is provided with a System On Chip (SOC), and the Mini-LVDS interface is provided with 6 groups (ports) of data lines.
Further, the constituent modules are also free of (CB); the horizontal direction circuit board (XB) is provided with a nonvolatile memory (FLASH) and an ST IC; the FLASH is stored with display panel optical taste adjustment parameters (optical CODE); and the system-in-chip (SOC) reads the optical taste adjustment parameters on the FLASH to adjust the optical taste of a display Panel (Panel).
Further, the System On Chip (SOC) is connected to a second horizontal direction circuit board (XM) through a preset interface, for transmitting control signals and data signals required for the display panel; the second horizontal direction circuit board (XM) transmits mini-LVDS signals of the first group (port 1), the second group (port 2), the fifth group (port 5) and the sixth group (port 6) to the first horizontal direction circuit board (XR) and the third horizontal direction circuit board (XL) through connectors; the optical taste adjustment parameters include: a Mura elimination (Demura) parameter, a white balance (white balance) adjustment parameter, a low color shift (low color shift) compensation parameter, an OverDrive (OD) parameter, a dither process (dither) parameter, and an acc parameter.
Further, as shown in fig. 8 and 9, the preset interface is a VBYONE interface; the ST IC is used for converting the VBYONE interface signal into a mini-LVDS interface signal; the mini-LVDS interface signals are output as 6 groups of 4 branches (6 port4 pairs); the VBYONE does not transmit optical data; the optical parameters are transmitted to a System On Chip (SOC) via an SPI bus (bus). The conversion is specifically: the ST IC decodes the received VBO high-speed signal according to the specification definition, and then converts the data into mini-LVDS interface protocol for output; the above protocols have specific interface specifications, which are common in the industry and will not be described herein.
It should be noted that, unlike TCON ICs in the prior art, TCON ICs also have optical adjustment functions (i.e., optical taste IP core), such as demura, white balance, gamma, OD, etc., by which the front-end data is optimized, and the panel display taste is improved; while ST IC has no optical processing function, for example, in the present TCONLESS architecture, optical processing is performed by an algorithm performed by SOC.
Specifically, the embodiment is a TCON leave architecture, its constituent modules are mb→xb→panel, where the MB has SOC, and is connected with XM through VBYONE interface, to transmit control data and data of the liquid crystal panel; the VBYONE signal is converted into a mini-LVDS signal through an ST IC on the XM, and the mini-LVDS signal is output as a 6port4pair, so that a mini-LVDS interface can be used by a SOURCE DRIVER, the cost of SOURCE DRIVER is reduced, and 6port mini data can be uniformly distributed to 3 XBs; in addition, the optical CODE (demura/acc/od/alcs/dither) is put on the XB FLASH, the SOC does not need to adjust the Panel optical parameters, and only needs to read and use; XM transmits mini-LVDS signals of port1port2 and port5port6 to XR and XL respectively through connectors; the Panel control signal can also be generated by the ST IC, and MB need not provide any timing signal.
The invention provides a 3-block XB structure under the TCONLESS architecture, which is suitable for a panel with a larger size, such as a 70-inch panel, and can reduce the number of XB and connecting wires and reduce the cost; after the connector is reduced, more wiring space is reserved for XB; the reduction of the number of connectors and FFCs is also significant to the design of the mechanism of the module; the Mini-LVDS signal transmits data to the COF by using a 6port3pair, so that the cost of a Driver IC is saved as a low-speed signal.
The terms "in some embodiments" and "in various embodiments" and the like are used repeatedly. The term generally does not refer to the same embodiment; but it may also refer to the same embodiment. The terms "comprising," "having," "including," and the like are synonymous, unless the context clearly dictates otherwise.
While the present disclosure has been described with respect to the preferred embodiments, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the disclosure, and that any such changes and modifications as described in the foregoing embodiments are intended to be within the scope of the disclosure.
Claims (8)
1. A display device, comprising:
a display panel having thereon a pixel matrix, a source driving circuit and a gate driving circuit;
a COF source driver electrically connected to a source driving circuit on the display panel;
a horizontal direction circuit board electrically connected to the COF type source driver;
the horizontal direction circuit board comprises at least 3 XB structures, and each XB structure is connected with 4 COF type source drivers;
the COF source driver is connected with the XB structure through a mini-LVDS interface;
the horizontal direction circuit board comprises an STIC, wherein the STIC is used for converting signals received by a preset interface into mini-LVDS interface signals for the COF source driver;
the signal output of the Mini-LVDS interface is uniformly distributed to the XB structure;
the XB structure comprises: the COF type power supply comprises a first horizontal direction circuit board, a second horizontal direction circuit board and a third horizontal direction circuit board, wherein each horizontal direction circuit board is provided with 2 groups of data lines, and each 2 COF type source drivers share 1 group of data lines;
wherein the display device further comprises a main board or a system board;
the main board is provided with a system-level chip;
the Mini-LVDS interface has 6 sets of data lines.
2. The display device of claim 1, wherein the display device comprises a display device,
the display device also comprises a control panel, wherein the control panel is provided with a time sequence control chip;
the system-in-chip is connected with the control board through a VBYONE interface to transmit control signals and data signals required by the display panel;
the time sequence control chip is used for converting the received VBYONE signal into a mini-LVDS signal;
the mini-LVDS signals are output in 6 groups of 3 branches;
the time sequence control chip is provided with an optical taste adjustment IP module;
the optical taste adjustment IP module includes: the method comprises the steps of Mura elimination IP core, white balance adjustment IP core, low color cast compensation IP core, overvoltage driving IP core and dithering processing IP core.
3. The display device of claim 2, wherein the display device comprises a display device,
the control board is connected to the second horizontal direction circuit board and the third horizontal direction circuit board;
the first horizontal direction circuit board is connected with the second horizontal direction circuit board through a flexible flat cable;
the second horizontal direction circuit board transmits the mini-LVDS signals of the first group and the second group to the first horizontal direction circuit board through the connector.
4. The display device architecture of claim 2, wherein,
the control board is connected to the second horizontal direction circuit board;
the second horizontal direction circuit board transmits mini-LVDS signals of the first group, the second group, the fifth group and the sixth group to the first horizontal direction circuit board and the third horizontal direction circuit board through connectors respectively.
5. The display device of claim 1, wherein the display device comprises a display device,
the horizontal circuit board is provided with a nonvolatile memory and an STIC;
the nonvolatile memory is stored with display panel optical taste adjustment parameters;
the system-in-chip performs optical taste adjustment of the display panel by reading the optical taste adjustment parameters on the nonvolatile memory.
6. The display device of claim 5, wherein the display device comprises a display device,
the system-level chip is connected with the second horizontal direction circuit board through the preset interface and is used for transmitting control signals and data signals required by the display panel;
the second horizontal direction circuit board transmits mini-LVDS signals of the first group, the second group, the fifth group and the sixth group to the first horizontal direction circuit board and the third horizontal direction circuit board through connectors respectively;
the optical taste adjustment parameters include: mura elimination parameter, white balance adjustment parameter, low color shift compensation parameter, over-voltage driving parameter and jitter processing parameter.
7. The display device of claim 6, wherein the display device comprises a display device,
the preset interface is a P2P interface;
the STIC is used for converting the P2P interface signal into a mini-LVDS interface signal;
the mini-LVDS interface signal is output as 6 groups of 3 branches.
8. The display device of claim 6, wherein the display device comprises a display device,
the preset interface is a VBYONE interface;
the STIC is used for converting the VBYONE interface signal into a mini-LVDS interface signal;
the mini-LVDS interface signal output is 6 groups of 4 branches;
the optical taste adjustment parameters are transmitted to the system-on-chip via an SPI bus.
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