CN113535491A - Method, system and medium for testing multiple serial ports of mainboard - Google Patents
Method, system and medium for testing multiple serial ports of mainboard Download PDFInfo
- Publication number
- CN113535491A CN113535491A CN202110667274.6A CN202110667274A CN113535491A CN 113535491 A CN113535491 A CN 113535491A CN 202110667274 A CN202110667274 A CN 202110667274A CN 113535491 A CN113535491 A CN 113535491A
- Authority
- CN
- China
- Prior art keywords
- serial port
- test
- serial
- port group
- tested
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 232
- 238000000034 method Methods 0.000 title claims abstract description 30
- 238000003860 storage Methods 0.000 claims description 15
- 238000004590 computer program Methods 0.000 claims description 3
- 238000001514 detection method Methods 0.000 abstract description 6
- 238000004519 manufacturing process Methods 0.000 abstract description 3
- 230000002159 abnormal effect Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000012795 verification Methods 0.000 description 2
- 238000012550 audit Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2247—Verification or detection of system hardware configuration
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2273—Test methods
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
The invention discloses a method, a system and a medium for testing multiple serial ports of a mainboard, wherein the method comprises the following steps: setting a first reference number, and performing grouping operation on a plurality of serial ports to be tested according to the first reference number to obtain a plurality of serial port groups with the same number of the serial ports to be tested; if the number of the serial ports to be tested cannot be equally divided according to the first reference number, calling a serial port adjusting strategy; acquiring a serial port test instruction; according to the serial port test instruction, performing test operation on the serial port group to obtain a test result; switching the serial port group to execute the test operation according to the test result; recording and storing the test result; by the mode, the serial ports to be tested on the mainboard are tested after being grouped, so that the test times are reduced, the serial port detection speed is increased, the labor cost for mainboard detection is reduced, the working efficiency is increased, automatic test is realized, and the production speed of the factory mainboard is increased.
Description
Technical Field
The invention relates to the technical field of mainboard testing, in particular to a system, a method and a medium for mainboard multi-serial port testing.
Background
The information electronization is more and more widely applied in the modern society, the demand of industrial mainboard is more and more, and the peripheral module that attaches on the mainboard is more and more, and then the quantity of serial ports on the mainboard is also more and more, and the multiple serial ports mainboard is produced in reply.
The increase of the serial ports quantity of mainboard, in mainboard production test process, whether the welding that needs the manual work to go the serial ports on the detection mainboard is normal, the number of times of mainboard serial ports test can increase so, and consuming time more and more, has increased the cost of labor, and work efficiency is low.
Disclosure of Invention
The invention mainly solves the problems that the time consumption of the mainboard serial port test is longer, the labor cost is increased and the working efficiency is low in the mainboard generating test process.
In order to solve the above problems, the present invention adopts a technical solution that: the method for testing the multiple serial ports of the mainboard comprises the following steps:
test initialization: setting a first reference number, and performing grouping operation on a plurality of serial ports to be tested according to the first reference number to obtain a plurality of serial port groups with the same number of the serial ports to be tested; if the number of the serial ports to be tested cannot be equally divided according to the first reference number, calling a serial port adjusting strategy;
acquiring a test instruction: acquiring a serial port test instruction;
and (3) executing a serial port test: according to the serial port test instruction, performing test operation on the serial port group to obtain a test result;
switching the test serial port group: switching the serial port group to execute the test operation according to the test result;
and (4) storing a test result: and recording and storing the test result.
Further, the step of adjusting the serial port policy further includes: randomly selecting one serial port group from a plurality of serial port groups, and setting the serial port group as an adjusting serial port group;
and selecting the serial ports to be tested with the difference quantity from the adjusted serial port group and the remaining serial ports to be tested to be combined according to the difference value between the first reference quantity and the number of the remaining serial ports to be tested to obtain the serial port group.
Further, the step of performing a test operation further comprises: signals and receiving signals are mutually sent and received among the serial ports to be tested in the serial port group, and if all the serial ports to be tested in the serial port group can send and receive signals, the serial port group is tested successfully;
and if any one serial port to be tested in the serial port group can not send or receive signals, the test of the serial port group fails.
Further, the step of switching the test serial port group further includes:
if the test result is failure, stopping the test, and entering the step of storing the test result;
and if the test result is successful, recording the current test result and calling a last serial port group judgment strategy.
Further, the step of determining the policy by the last serial port group further includes:
judging whether the current serial port group is the last serial port group:
if yes, stopping testing, and entering the step of storing the test result;
if not, switching to the next serial port group, and entering the step of executing the serial port test.
Further, the step of saving the test result further comprises: and recording and storing the test steps and the test results of the plurality of serial port groups.
The utility model provides a system for mainboard multiple serial ports test which characterized in that includes: the test initialization module, the test instruction acquisition module, the serial port test execution module, the test serial port group switching module and the test result storage module are arranged in the test system;
the test initialization module is used for setting a first reference number and performing grouping operation on a plurality of serial ports to be tested according to the first reference number to obtain a plurality of serial port groups with the same number of serial ports to be tested; if the number of the serial ports to be tested cannot be equally divided according to the first reference number, calling a serial port adjusting strategy;
the test instruction acquisition module is used for acquiring a serial port test instruction;
the serial port executing test module is used for executing test operation on the serial port group according to the serial port test instruction to obtain a test result;
the switching test serial port group module is used for switching the serial port group to execute test operation according to the test result;
and the test result storage module is used for recording and storing the test result.
The invention also provides a computer readable storage medium, which stores a computer program, and when the computer program is executed by a processor, the steps of the method for testing the multiple serial ports of the mainboard are realized.
The invention has the beneficial effects that:
1. the method for testing the multiple serial ports of the mainboard can reduce the number of times of testing the serial ports on the mainboard, improve the detection speed of the serial ports of the mainboard and improve the working efficiency;
2. the system for testing the multiple serial ports of the mainboard can reduce the labor cost of mainboard detection and improve the working quality;
3. the medium for testing the multiple serial ports of the mainboard can realize automatic detection of the serial ports of the mainboard and improve the production speed of the mainboard of a factory.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a flowchart of a method for testing multiple serial ports of a motherboard according to embodiment 1 of the present invention;
fig. 2 is a schematic diagram of a system for testing multiple serial ports of a motherboard according to embodiment 2 of the present invention.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it is to be noted that, unless otherwise explicitly specified or limited, the terms "connected" and the like are to be interpreted broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; the two elements may be directly connected or indirectly connected through an intermediate medium, or may be communicated with each other inside the two elements, or may be wirelessly connected or wired connected. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, terms such as "reference number", "packet", "firmware", "motherboard", "serial port", "instruction", "signal", "transmission", "reception", "success", "failure", and the like, are to be understood in a broad sense. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
Furthermore, the terms "first", "second", "third", "fourth" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first," "second," "third," or "fourth" may explicitly or implicitly include at least one of the feature.
Example 1
The embodiment of the present invention provides a method for testing multiple serial ports of a motherboard, please refer to fig. 1, which includes the following steps:
s100, test initialization:
in order to explain the present invention more clearly, the number of serial ports on the motherboard is set to 8, and the number of serial ports on the motherboard is set to 2, which is to be described herein, but it is not limited to that the number of serial ports on the motherboard protected by the present invention is only 8, and the number of first reference numbers is only 2.
In order to explain the process of the present invention more clearly, 8 serial ports are respectively labeled as follows: the method comprises the steps of a serial port 1, a serial port 2, a serial port 3, a serial port 4, a serial port 5, a serial port 6, a serial port 7 and a serial port 8, wherein every two serial ports of the serial port on a mainboard are divided into one group, namely the serial port 1 and the serial port 2 are divided into a first group of serial ports, the serial port 3 and the serial port 4 are divided into a second group of serial ports, the serial port 5 and the serial port 6 are divided into a third group of serial ports, and the serial ports 7 and the serial port 8 are divided into a fourth group of serial ports, so that four groups of serial ports are obtained.
S200, acquiring a test instruction:
and completing serial port grouping to obtain a serial port test instruction, namely obtaining a signal to be tested.
S300, executing a serial port test:
firstly, testing a first group of serial port groups, wherein a serial port 1 sends signals, and a serial port 2 receives signals:
if the serial port 1 cannot normally send signals, recording that the test result of the first serial port group fails;
if the serial port 1 normally sends a signal, but the serial port 2 cannot normally receive the signal, recording that the test result of the first group of serial port groups fails;
if serial port 1 can normally send the signal and serial port 2 can normally receive this signal, then the conversion, serial port 2 sends the signal, and serial port 1 receives the signal:
if the serial port 2 cannot normally send signals, recording that the test result of the first serial port group fails;
if the serial port 2 sends a signal normally but the serial port 1 cannot receive the signal normally, recording that the test result of the first group of serial port group fails;
if the serial port 2 can normally send a signal and the serial port 1 can normally receive the signal, the first group of serial port group is tested normally, and the test result of the first group of serial port group is recorded successfully.
S400, switching the test serial port group:
judging a test result of the first group of serial port groups:
if the test result of the first serial port group is failure, stopping the test no matter whether other serial port groups exist in the follow-up process, and entering S500 to store the test result;
if the test result of the first serial port group is successful, judging whether the test serial port group is the last serial port group:
if yes, entering S500 to store the test result;
if not, the serial port group is switched to the subsequent serial port group for testing, in this embodiment, the serial port group is switched to the second serial port group for testing, and the step of executing the serial port test is repeated S300.
S500, storing a test result:
and summarizing and storing the test steps and test results of the four serial port groups to a specified position for subsequent test quality examination and verification.
Example 2
The embodiment of the present invention provides a method for testing multiple serial ports of a motherboard, which is different from embodiment 1 in the number of the serial ports to be tested, and please refer to fig. 1, including the following steps:
s100, test initialization:
in order to explain the present invention more clearly, the number of serial ports on the motherboard is set to 7, and the first reference number is set to 2, which should be noted that it cannot limit the number of serial ports on the motherboard protected by the present invention to only 7, and the first reference number is only 2.
In order to explain the process of the present invention more clearly, 8 serial ports are respectively labeled as follows: the method comprises a serial port 1, a serial port 2, a serial port 3, a serial port 4, a serial port 5, a serial port 6 and a serial port 7, wherein every two serial ports of the serial port on a mainboard are divided into a group, namely the serial port 1 and the serial port 2 are divided into a first group of serial ports, the serial port 3 and the serial port 4 are divided into a second group of serial ports, and the serial port 5 and the serial port 6 are divided into a third group of serial ports, at the moment, one serial port is arbitrarily selected from the first 6 serial ports to be combined with the serial port 7, the serial port 5 is selected here, the serial port 5 and the serial port 7 are combined into a fourth group of serial ports, and four groups of serial ports are obtained in total.
S200, acquiring a test instruction:
and completing serial port grouping to obtain a serial port test instruction, namely obtaining a signal to be tested.
S300, executing a serial port test:
it should be noted that, in order to clearly explain the testing process of the fourth serial port group, i.e. the last serial port group in this embodiment, it is assumed that the testing results of the first serial port group, the second serial port group and the third serial port group are both successful.
The fourth serial port group is tested, because the serial port 5 has tested that the sending signal and the receiving signal are both normal, firstly, the serial port 7 sends a signal, and the serial port 5 receives a signal:
if the serial port 7 can not normally send signals, recording that the test result of the fourth group of serial ports fails, and recording that the serial port 7 fails to send signals in the test step;
if the serial port 7 can normally send signals, the conversion is carried out, the serial port 5 sends signals, and the serial port 7 receives signals:
if the serial port 7 cannot normally receive the signal sent by the serial port 5, recording that the test result of the fourth serial port group fails, and recording that the serial port 7 fails to receive the signal in the test step;
and if the serial port 7 can normally receive the signal sent by the serial port 5, recording that the test result of the fourth serial port group is successful.
S400, switching the test serial port group:
judging a test result:
if the test result of the fourth group of serial port groups is failure, whether the test result is the last group of serial port groups is not judged, the test is stopped, and the step S500 of storing the test result is entered;
if the test result of the fourth group of serial port groups is successful, whether the test result is the last group of serial port groups is judged:
if yes, the test is stopped, and the step S500 of storing the test result is entered.
S500, storing a test result:
and summarizing and storing the test steps and test results of the four serial port groups to a specified position for subsequent test quality examination and verification.
Example 3
The embodiment of the present invention further provides a system for testing multiple serial ports of a motherboard, please refer to fig. 2, which includes: the test initialization module, the test instruction acquisition module, the serial port test execution module, the test serial port group switching module and the test result storage module are arranged in the test system;
a test initialization module:
the test initialization module is used for setting a first reference number and performing grouping operation on the plurality of serial ports to be tested according to the first reference number to obtain a plurality of serial port groups with the same number of serial ports to be tested; if the number of the serial ports to be tested cannot be equally divided according to the first reference number, calling a serial port adjusting strategy;
specifically, the test initialization module obtains the number of serial ports on the mainboard to be tested, and sets a first reference number, namely the number of each group when the serial ports are grouped, according to the number of the serial ports to be tested.
The test initialization module groups serial ports to be tested on the mainboard according to a first reference number, if the serial ports to be tested can be completely grouped, namely the serial ports to be tested can be divided into a plurality of groups, the number of the serial ports in each group is the first reference number, and a plurality of serial port groups are obtained;
if the serial ports cannot be completely grouped, the test initialization module groups the serial ports with optional differential numbers in the grouped serial port groups with the remaining serial ports according to the difference between the number of the remaining serial ports and the first reference number to obtain a plurality of serial port groups.
The module for obtaining the test instruction comprises:
the test instruction acquisition module is used for acquiring a serial port test instruction;
specifically, the test instruction obtaining module obtains a test instruction of the serial port and obtains a signal to be tested.
Executing a serial port test module:
the serial port executing test module is used for executing test operation on the serial port group according to the serial port test instruction to obtain a test result;
specifically, the execution serial port testing module firstly selects any one serial port group in the serial port groups for testing, any one serial port line in the selected serial port group is used as a signal sending serial port, other serial ports are used as signal receiving serial ports, and the signal sending serial port sends the obtained testing signal to the signal receiving serial port:
if the signal sent by the signal sending serial port is abnormal or any one serial port in the signal receiving serial ports receives abnormal signals, recording that the test result of the current serial port group fails, and stopping the test;
and if the signal sending serial port sends signals normally and the signal receiving serial port receives signals normally, replacing the signal sending serial port with a signal receiving serial port, replacing the signal receiving serial port with a signal sending serial port, and continuing to execute the test operation until all the serial ports in the current serial port group send signals and receive signals.
Switching the test serial port group module:
the switching test serial port group module is used for switching the serial port group to execute test operation according to the test result;
specifically, the switching test serial port group module judges a test result transmitted by the execution serial port test module:
if the test result is failure, stopping the test;
if the test result is successful, judging whether the serial port group executing the serial port test module test is the last serial port group:
if yes, stopping testing, and entering a test result storage module;
if not, the test serial port group is switched, the serial port group information is transmitted to the serial port execution test module, and the serial port execution test module continues to execute test operation on the serial port group.
A test result storage module:
the test result storage module is used for recording and storing test results;
specifically, the test result module obtains the test steps and the test results to a designated position for subsequent quality audit.
Example 4
This embodiment 3 has a computer-readable storage medium, where the storage medium is used to store computer software instructions for implementing the motherboard multi-serial port testing method described in the foregoing embodiments 1 and 2, and the storage medium includes a program set by the motherboard multi-serial port testing method; specifically, the executable program may be built in the system 100 for testing the motherboard multiple serial ports, so that the system 100 for testing the motherboard multiple serial ports may implement the methods for testing the motherboard multiple serial ports of embodiments 1 and 2 by executing the built-in executable program.
The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments.
It will be understood by those skilled in the art that all or part of the steps of implementing the above embodiments may be implemented by hardware, and a program that can be implemented by the hardware and can be instructed by the program to be executed by the relevant hardware may be stored in a computer readable storage medium, where the storage medium may be a read-only memory, a magnetic or optical disk, and the like.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes performed by the present specification and drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (8)
1. A method for testing multiple serial ports of a mainboard is characterized by comprising the following steps:
test initialization: setting a first reference number, and performing grouping operation on a plurality of serial ports to be tested according to the first reference number to obtain a plurality of serial port groups with the same number of the serial ports to be tested; if the number of the serial ports to be tested cannot be equally divided according to the first reference number, calling a serial port adjusting strategy;
acquiring a test instruction: acquiring a serial port test instruction;
and (3) executing a serial port test: according to the serial port test instruction, performing test operation on the serial port group to obtain a test result;
switching the test serial port group: switching the serial port group to execute the test operation according to the test result;
and (4) storing a test result: and recording and storing the test result.
2. The method for testing the multiple serial ports of the mainboard according to claim 1, wherein:
the step of the serial port adjustment strategy further comprises the following steps: randomly selecting one serial port group from a plurality of serial port groups, and setting the serial port group as an adjusting serial port group;
and selecting the serial ports to be tested with the difference quantity from the adjusted serial port group and the remaining serial ports to be tested to be combined according to the difference value between the first reference quantity and the number of the remaining serial ports to be tested to obtain the serial port group.
3. The method for testing the multiple serial ports of the mainboard according to claim 1, wherein:
the step of performing a test operation further comprises: signals and receiving signals are mutually sent and received among the serial ports to be tested in the serial port group, and if all the serial ports to be tested in the serial port group can send and receive signals, the serial port group is tested successfully;
and if any one serial port to be tested in the serial port group can not send or receive signals, the test of the serial port group fails.
4. The method for testing the multiple serial ports of the mainboard according to claim 3, wherein the method comprises the following steps:
the step of switching the test serial port group further comprises:
if the test result is failure, stopping the test, and entering the step of storing the test result;
and if the test result is successful, recording the current test result and calling a last serial port group judgment strategy.
5. The method for testing the multiple serial ports of the mainboard according to claim 4, wherein the method comprises the following steps:
the step of judging the strategy by the last serial port group further comprises the following steps:
judging whether the current serial port group is the last serial port group:
if yes, stopping testing, and entering the step of storing the test result;
if not, switching to the next serial port group, and entering the step of executing the serial port test.
6. The method for testing the multiple serial ports of the mainboard according to claim 1, wherein:
the step of saving the test results further comprises: and recording and storing the test steps and the test results of the plurality of serial port groups.
7. The utility model provides a system for mainboard multiple serial ports test which characterized in that includes: the test initialization module, the test instruction acquisition module, the serial port test execution module, the test serial port group switching module and the test result storage module are arranged in the test system;
the test initialization module is used for setting a first reference number and performing grouping operation on a plurality of serial ports to be tested according to the first reference number to obtain a plurality of serial port groups with the same number of serial ports to be tested; if the number of the serial ports to be tested cannot be equally divided according to the first reference number, calling a serial port adjusting strategy;
the test instruction acquisition module is used for acquiring a serial port test instruction;
the serial port executing test module is used for executing test operation on the serial port group according to the serial port test instruction to obtain a test result;
the switching test serial port group module is used for switching the serial port group to execute test operation according to the test result;
and the test result storage module is used for recording and storing the test result.
8. A computer-readable storage medium, in which a computer program is stored, which, when being executed by a processor, carries out the method steps of a motherboard multi-serial port test according to any one of claims 1 to 6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110667274.6A CN113535491B (en) | 2021-06-16 | 2021-06-16 | Method, system and medium for testing multiple serial ports of main board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110667274.6A CN113535491B (en) | 2021-06-16 | 2021-06-16 | Method, system and medium for testing multiple serial ports of main board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113535491A true CN113535491A (en) | 2021-10-22 |
| CN113535491B CN113535491B (en) | 2024-07-16 |
Family
ID=78124997
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110667274.6A Active CN113535491B (en) | 2021-06-16 | 2021-06-16 | Method, system and medium for testing multiple serial ports of main board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113535491B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050257076A1 (en) * | 2004-05-15 | 2005-11-17 | Hon Hai Precision Industry Co., Ltd. | System and method for controlling power sources of motherboards under test through networks |
| CN104461814A (en) * | 2013-09-16 | 2015-03-25 | 研祥智能科技股份有限公司 | Serial port testing method and system of computer |
| CN107544882A (en) * | 2017-08-24 | 2018-01-05 | 杭州金盔甲科技有限公司 | Multi-channel serial port method of testing and system |
-
2021
- 2021-06-16 CN CN202110667274.6A patent/CN113535491B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050257076A1 (en) * | 2004-05-15 | 2005-11-17 | Hon Hai Precision Industry Co., Ltd. | System and method for controlling power sources of motherboards under test through networks |
| CN104461814A (en) * | 2013-09-16 | 2015-03-25 | 研祥智能科技股份有限公司 | Serial port testing method and system of computer |
| CN107544882A (en) * | 2017-08-24 | 2018-01-05 | 杭州金盔甲科技有限公司 | Multi-channel serial port method of testing and system |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113535491B (en) | 2024-07-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107659465B (en) | Device and method for checking error frames of CAN (controller area network) bus of whole vehicle | |
| CN110658400B (en) | Embedded test method, microcontroller and system | |
| CN109733238B (en) | Fault detection method, device, storage medium and processor | |
| EP3859867A1 (en) | Battery management system, processing device, battery management method, and battery management and control system | |
| CN106155826A (en) | For detecting and process the method and system of mistake in bus structures | |
| CN113535491A (en) | Method, system and medium for testing multiple serial ports of mainboard | |
| CN111993947A (en) | Secondary battery replacement method, device and system, storage medium and computer equipment | |
| CN115276844B (en) | Communication module testing method and device, storage medium and electronic equipment | |
| CN114244735B (en) | Master and slave operation switching method, device and storage medium | |
| CN115174437B (en) | Network connection stability detection method and system | |
| CN109783259B (en) | Slow disk detection method and device and storage medium | |
| CN115454015A (en) | Controller node detection method, controller node detection device, control system, vehicle and storage medium | |
| CN115118618A (en) | Intelligent gateway performance test method and system | |
| CN113377067A (en) | Dynamic sensing monitoring acquisition compensation method and device for numerical control five-axis linkage machine tool | |
| CN114745220A (en) | Automatic addressing control method and system for master-slave distributed battery management system | |
| CN111240999A (en) | Method and system for improving script test execution efficiency | |
| CN111260133A (en) | Optimization method and device of quality monitoring model for monitoring research and development quality | |
| CN111002348A (en) | Robot performance testing method, robot and computer readable storage medium | |
| CN103378911B (en) | The control method of terminal reception antenna and terminal receiving system | |
| CN112927744B (en) | Memory repair method of 3D chip and related equipment | |
| CN117630798B (en) | Error monitoring method, device, equipment and medium for cluster type direct current electric energy meter | |
| CN117233865A (en) | Meteorological data determining method of photovoltaic subarrays, photovoltaic tracking system and medium | |
| CN117289199A (en) | Electric energy metering and collecting method and system | |
| CN1120596C (en) | Method for detecting input clock signal quality of synchronous clock supply system and its device | |
| CN116016106A (en) | Asset performance evaluation method and device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant |