CN113517863A - Low-noise amplifying circuit and radio frequency front-end module - Google Patents
Low-noise amplifying circuit and radio frequency front-end module Download PDFInfo
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- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/56—Modifications of input or output impedances, not otherwise provided for
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- H—ELECTRICITY
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- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
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Abstract
The invention discloses a low-noise amplification circuit and a radio frequency front-end module, wherein the low-noise amplification circuit comprises a signal input end, a signal output end, a first-stage amplification circuit, a second-stage amplification circuit, a first-stage output matching network and a second-stage output matching network; the first-stage amplification circuit and the second-stage amplification circuit are cascaded between the signal input end and the signal output end in series; one end of the first-stage output matching network is connected with the output end of the first-stage amplifying circuit, and the other end of the first-stage output matching network is connected with a first power supply end; and the second-stage output matching network is connected with the output end of the second-stage amplifying circuit at one end and connected with a second power supply end at the other end, wherein the output impedance of the low-noise amplifying circuit is associated with the second-stage output matching network. The technical scheme can rapidly carry out impedance matching on the output impedance of the low-noise amplification circuit and simultaneously can ensure the gain of the low-noise amplification circuit.
Description
Technical Field
The invention relates to the technical field of radio frequency integrated circuits, in particular to a low-noise amplifying circuit and a radio frequency front-end module.
Background
Receivers for transmitting or receiving radio frequency signals are typically included in radio frequency integrated circuits. The receiver comprises a low noise amplifier for amplifying the radio frequency signal. The low noise amplifier is used as a first stage of the receiver and is required to amplify a radio frequency signal transmitted or received by a radio frequency integrated circuit.
But instead. The existing low-noise amplification circuit can not provide enough gain and meet the condition of output impedance matching of the low-noise amplification circuit in the process of amplifying radio frequency signals.
Disclosure of Invention
The embodiment of the invention provides a low-noise amplification circuit and a radio frequency front-end module, which are used for solving the problem that the existing low-noise amplification circuit cannot simultaneously meet the output impedance matching and the gain of the low-noise amplification circuit.
A low-noise amplification circuit comprises a signal input end, a signal output end, a first-stage amplification circuit, a second-stage amplification circuit, a first-stage output matching network and a second-stage output matching network;
the first-stage amplification circuit and the second-stage amplification circuit are connected in series between the signal input end and the signal output end;
the first-stage output matching network is connected between the output end of the second-stage amplifying circuit and a first power supply end and is configured to be associated with the imaginary part of the output impedance of the low-noise amplifying circuit;
the second-stage output matching network is connected between the output end of the second-stage amplifying circuit and a second power supply end, is a resistance network and is configured to be associated with the real part of the output impedance of the low-noise amplifying circuit.
Further, a gain of the low noise amplification circuit is associated with the second stage output matching network.
Further, the resistor network is an output matching resistor, wherein the output impedance of the low-noise amplifying circuit is in direct proportion to the resistance value of the output matching resistor.
Further, the resistor network is an adjustable resistor configured to adjust a real part of an output impedance of the low noise amplification circuit.
Further, the resistance network comprises a plurality of impedance adjusting branches, and each impedance adjusting branch comprises a matching switch and a matching resistor which are connected in series.
Further, the first stage output matching network comprises a first capacitor and a first inductor which are connected in parallel.
Further, the first-stage amplifying circuit comprises a first blocking capacitor, a first amplifying transistor, a second amplifying transistor and a second blocking capacitor;
the first end of the first blocking capacitor is connected with the signal input end, and the second end of the first blocking capacitor is connected with the first end of the first amplifying transistor;
the second end of the first amplifying transistor is connected with the third end of the second amplifying transistor, and the third end of the first amplifying transistor is connected with a grounding end;
the first end of the second amplifying transistor is connected with a grounding end through the second blocking capacitor;
and the second end of the second amplifying transistor is connected with the output end of the first-stage amplifying circuit and the input end of the second-stage amplifying circuit.
Further, the second-stage amplification circuit comprises a third blocking capacitor, a fourth blocking capacitor, a third amplification transistor and a fourth amplification transistor;
the first end of the third blocking capacitor is used as the input end of the second-stage amplifying circuit and is connected with the output end of the first-stage amplifying circuit, and the second end of the third blocking capacitor is connected with the first end of the third amplifying transistor;
the second end of the third amplifying transistor is connected with the third end of the fourth amplifying transistor, and the third end of the third amplifying transistor is connected with a ground terminal;
and a first end of the fourth amplifying transistor is connected with a ground end through the fourth blocking capacitor, and a second end of the fourth amplifying transistor is used as an output end of the second-stage amplifying circuit and is connected with the second-stage output matching network.
Further, the low noise amplification circuit further comprises a first gain adjustment circuit and a second gain adjustment circuit;
one end of the first gain adjusting circuit is connected with the first-stage amplifying circuit, and the other end of the first gain adjusting circuit is connected with a grounding end and is configured to perform gain adjustment on the first-stage amplifying circuit;
and one end of the second gain adjusting circuit is connected with the second-stage amplifying circuit, and the other end of the second gain adjusting circuit is connected with a grounding end, and the second gain adjusting circuit is configured to perform gain adjustment on the second-stage amplifying circuit.
A radio frequency front end module comprises a substrate and a low-noise amplification chip arranged on the substrate, wherein the low-noise amplification chip is provided with a low-noise amplification circuit.
Further, the radio frequency front end module further comprises a first gain adjusting circuit and a second gain adjusting circuit; the first gain adjustment circuit comprises a first gain adjustment inductor arranged on the substrate, and the second gain adjustment circuit comprises a second gain adjustment inductor arranged on the substrate;
one end of the first gain adjusting inductor is connected with the first-stage amplifying circuit arranged on the low-noise amplifying chip, and the other end of the first gain adjusting inductor is connected with a grounding end;
one end of the second gain adjusting inductor is connected with the second-stage amplifying circuit arranged on the low-noise amplifying chip, and the other end of the second gain adjusting inductor is connected with a grounding end.
In the low-noise amplification circuit and the radio frequency front-end module, the first-stage output matching network of the low-noise amplification circuit is connected between the output end of the second-stage amplification circuit and the first power supply end, and is configured to be associated with the imaginary part of the output impedance of the low-noise amplification circuit; the second-stage output matching network is connected between the output end of the second-stage amplifying circuit and the second power supply end, the second-stage output matching network is a resistor network and is configured to be associated with the real part of the output impedance of the low-noise amplifying circuit, the second-stage output matching network is connected to the output end of the second-stage amplifying circuit, the output impedance and the gain of the low-noise amplifying circuit can be adjusted through the second-stage output matching network, and therefore the wide frequency range is achieved, impedance matching of the output end of the low-noise amplifying circuit can be guaranteed, and the gain of the low-noise amplifying circuit can be guaranteed.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments of the present invention will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without inventive labor.
FIG. 1 is a circuit diagram of a low noise amplifier circuit according to an embodiment of the present invention;
FIG. 2 is another circuit diagram of the low noise amplifier circuit according to an embodiment of the present invention;
FIG. 3 is another circuit diagram of the low noise amplifier circuit according to an embodiment of the present invention;
FIG. 4 is another circuit diagram of the low noise amplifier circuit according to an embodiment of the present invention;
FIG. 5 is another circuit diagram of the low noise amplifier circuit according to an embodiment of the present invention;
fig. 6 is another circuit diagram of the low noise amplifier circuit according to an embodiment of the invention.
In the figure: 10. a first stage amplification circuit; 20. a second stage amplification circuit; 30. a first stage output matching network; 40. a second stage output matching network; 41. an impedance adjusting branch; 50. a first gain adjustment circuit; 60. a second gain adjustment circuit.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It is to be understood that the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity to indicate like elements throughout.
It will be understood that when an element or layer is referred to as being "on" …, "adjacent to …," "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to the other elements or layers or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on …," "directly adjacent to …," "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.
Spatial relationship terms such as "under …", "under …", "below", "under …", "above …", "above", and the like, may be used herein for ease of description to describe the relationship of one element or feature to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, then elements or features described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary terms "below …" and "below …" can encompass both an orientation of up and down. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatial descriptors used herein interpreted accordingly.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.
In the following description, for purposes of explanation, specific details are set forth in order to provide a thorough understanding of the present invention. The following detailed description of the preferred embodiments of the invention, however, the invention is capable of other embodiments in addition to those detailed.
As shown in fig. 1, the present embodiment provides a low noise amplifier circuit, which includes a signal input terminal Vin, a signal output terminal Vout, a first stage amplifier circuit 10, a second stage amplifier circuit 20, a first stage output matching network 30, and a second stage output matching network 40; the first stage amplification circuit 10 and the second stage amplification circuit 20 are connected in series between a signal input end Vin and a signal output end Vout; a first-stage output matching network 30 connected between the output terminal of the second-stage amplification circuit 20 and the first power supply terminal, and configured to be associated with an imaginary part of an output impedance of the low-noise amplification circuit; a second stage output matching network 40 connected between the output of the second stage amplification circuit 20 and a second supply power terminal, the second stage output matching network 40 being a resistive network configured to be associated with the real part of the output impedance of the low noise amplification circuit.
The signal input terminal Vin is an input terminal of the low-noise amplifier circuit for inputting the radio frequency input signal. The signal output terminal Vout is an output terminal of the low-noise amplifier circuit that outputs the amplified radio frequency amplified signal. The radio frequency amplified signal is a radio frequency signal obtained by amplifying a radio frequency input signal by a first-stage amplifying circuit 10 and a second-stage amplifying circuit 20.
As an example, the first stage amplification circuit 10 and the second stage amplification circuit 20 are connected in series between the signal input terminal Vin and the signal output terminal Vout, and configured to amplify the radio frequency input signal in multiple stages. It should be noted that the low-noise amplification circuit in the present embodiment may include at least two stages of amplification circuits, where the second stage amplification circuit 20 is used as the last stage amplification circuit. For example: if the low-noise amplification circuit includes N stages of amplification circuits, the first N-1 stages of amplification circuits are all the first stage of amplification circuit 10, and the last stage of amplification circuit is the second stage of amplification circuit 20. The radio frequency input signal is amplified by the first N-1 first-stage amplifying circuits 10 and then is amplified by the second-stage amplifying circuit 20 in the last stage, so that the radio frequency amplified signal is output, and the gain of the low-noise amplifying circuit is ensured in a wide frequency band range.
As another example, the first-stage output matching network 30, having one end connected to the output terminal of the first-stage amplification circuit 10 and the other end connected to the first power supply terminal, is configured to be associated with the imaginary part of the output impedance of the low-noise amplification circuit. It can be understood that, if a plurality of first-stage amplifying circuits 10 are included in the low-noise amplifying circuit, an output end of each first-stage amplifying circuit 10 is correspondingly connected to one first-stage output matching network 30. In the present embodiment, the first-stage output matching network 30 is related to the imaginary part Im [ ] of the output impedance of the low-noise amplification circuit in addition to serving as the load of the first-stage amplification circuit 10, that is, the imaginary part Im [ ] of the output impedance of the low-noise amplification circuit mainly depends on the first-stage output matching network 30. The first stage output matching network 30 preferably includes a first capacitor and a first inductor connected in parallel. Further, the first capacitance and/or the first inductance may be arranged to be adjustable so as to adjust the imaginary part Im [ ] of the output impedance of the low noise amplification circuit for impedance matching.
As another example, the second-stage output matching network 40 has one end connected to the output terminal of the second-stage amplification circuit 20 and the other end connected to the second power supply terminal; the second stage output matching network 40 is a resistor network configured to be associated with the real part of the output impedance of the low noise amplification circuit, i.e. the second stage output matching network 40 in this application only affects the real part of the output impedance of the low noise amplification circuit, the imaginary part of the output impedance of the low noise amplification circuit depending on the first stage output matching network 30. In a specific embodiment, the output end of the low noise amplifier circuit usually needs to realize 50 ohm impedance matching, and the realization of 50 ohm impedance matching needs to ensure that the real part Re [ ] and the imaginary part Im [ ] of the output impedance both meet the impedance matching requirement. However, when the low-noise amplification circuit operates in a wide frequency band, the impedance matching of the output terminal of the low-noise amplification circuit depends mainly on the real part impedance of the output impedance. The output end of the first stage amplifying circuit 10 is connected with a first stage output matching network 30 which is configured to be associated with the imaginary part of the output impedance of the low noise amplifying circuit, the output end of the second stage amplifying circuit 20 is connected with a second stage output matching network 40, and the second stage output matching network 40 is a resistance network which is configured to be associated with the real part of the output impedance of the low noise amplifying circuit; therefore, the output impedance of the output end of the low-noise amplifying circuit can be accurately adjusted through the second-stage output matching network 40 in a wide frequency range, and impedance matching is achieved.
Further, the gain of the low noise amplification circuit in the present embodiment is associated with the second stage output matching network. In one embodiment, the low noise amplifier circuit is designed to achieve output impedance matching while ensuring a certain gain. While the total gain G of the low noise amplifier circuitain＝Gm1*Gm2*RoutIt can be seen that the gain G is amplified in the first stagem1And a second stage amplification gain Gm2The total gain of the low noise amplifier circuit is determined by the output impedanceRoutThe size of (2). Because the second-stage output matching network is a resistor network, the output impedance R of the low-noise amplifying circuit is ensuredoutIs mainly determined by the resistance value R presented by the resistance network; therefore, the impedance matching of the output end of the low-noise amplification circuit can be guaranteed within a wide frequency range by adjusting the second-stage output matching network, and the gain of the low-noise amplification circuit can be guaranteed. Wherein, the first stage amplifies the gain Gm1Is mainly related to the size of the amplifying transistor in the first stage amplifying circuit. Second stage amplification gain Gm2Is mainly related to the size of the amplifying transistor in the second stage amplifying circuit.
In one embodiment, referring to FIG. 2 below, the output impedance R of the low noise amplifier circuitoutIn addition to the total resistance R presented by the second stage output matching network 40, the impedance of the node B at the output of the second stage amplifier circuit 20, i.e. the output impedance R at the output of the low noise amplifier circuitout＝R//R0Wherein R isoutIs the actual output impedance of the low noise amplification circuit. R is the total resistance presented by second stage output matching network 40. R0Which is the impedance of node B at the output of the second stage amplifier circuit 20. It can be understood that, since the low noise amplification circuit includes N stages of amplification circuits, the first N-1 stages of amplification circuits are all the first stage amplification circuit 10, and the last stage amplification circuit is the second stage amplification circuit 20, so that the impedance R of the node B at the output terminal of the second stage amplification circuit 200Is much larger than the total resistance R presented in the second stage output matching network 40, and further based on the output impedance R of the low noise amplifier circuitout＝R//R0It can be directly derived that the output impedance of the low noise amplifier circuit is primarily related to the second stage output matching network 40.
Further, the output impedance of the low noise amplifier circuit is proportional to the total resistance R corresponding to the second stage output matching network 40, that is, the larger the total resistance R presented by the second stage output matching network 40 is, the larger the output impedance R of the low noise amplifier circuit isoutThe larger the gain, the larger the total gain of the low noise amplification circuit is in the case where the first stage amplification gain Gm1 and the second stage amplification gain Gm2 are determined. Conversely, the smaller the total resistance R presented by the second stage output matching network 40, the smaller the output impedance R of the low noise amplifier circuitoutThe smaller, the total gain G of the low noise amplifier circuitainThe smaller. Therefore, the output impedance and the gain of the low-noise amplifying circuit can be accurately adjusted through the second-stage output matching network 40, so that impedance matching of the output end of the low-noise amplifying circuit and the gain of the low-noise amplifying circuit can be guaranteed within a wide frequency range.
In the present embodiment, the first-stage output matching network 30 is connected between the output terminal of the second-stage amplification circuit 20 and the first power supply terminal, and is configured to be associated with the imaginary part of the output impedance of the low-noise amplification circuit; the second-stage output matching network 40 is connected between the output end of the second-stage amplifying circuit 20 and a second power supply end, the second-stage output matching network 40 is a resistor network and is configured to be associated with the real part of the output impedance of the low-noise amplifying circuit, the second-stage output matching network 40 of the resistor network type is connected to the output end of the second-stage amplifying circuit 20, so that the output impedance of the low-noise amplifying circuit is mainly determined by the second-stage output matching network 40 in a wide frequency range, the output impedance and the gain of the low-noise amplifying circuit can be adjusted through the second-stage output matching network 40, and therefore the wide frequency range is achieved, impedance matching of the output end of the low-noise amplifying circuit can be guaranteed, and the gain of the low-noise amplifying circuit can be guaranteed.
In one embodiment, the resistor network is an output matching resistor, wherein the output impedance of the low noise amplifier circuit is proportional to the resistance of the output matching resistor.
The output matching resistor is a resistor with a fixed resistance value. In an embodiment, since the output impedance and the gain of the low noise amplifier circuit are both related to the second stage output matching network 40, when the impedance matching of the output terminal of the low noise amplifier circuit needs to be considered, the resistance value of the output matching resistor connected to the output terminal of the second stage amplifier circuit can be directly determined according to the impedance matching value of the output terminal. When the total gain value of the low-noise amplifying circuit needs to be considered, the resistance value of the output matching resistor connected to the output end of the second-stage amplifying circuit can be directly determined according to the total gain value of the low-noise amplifying circuit, so that impedance matching of the output end of the low-noise amplifying circuit can be guaranteed within a wide frequency range, and the gain of the low-noise amplifying circuit can be guaranteed.
In one embodiment, as shown in fig. 2, the resistor network is an adjustable resistor R configured to adjust the real part of the output impedance of the low noise amplification circuit.
In a specific embodiment, the resistor network is set as an adjustable resistor R, so that the output impedance and the gain of the low-noise amplifying circuit can be adjusted in real time according to actual requirements. For example: the low-noise amplification circuit can set the adjustable resistor R to any resistance value meeting the requirements according to the received control instruction, so that the output impedance and the gain of the output end of the low-noise amplification circuit can be adjusted through the second-stage output matching network 40 within a wide frequency range.
In one embodiment, as shown in fig. 6, the second-stage output matching network 40 includes a plurality of impedance adjusting branches 41, each impedance adjusting branch 41 includes a matching switch and a matching resistor connected in series, a first end of the plurality of impedance adjusting branches 41 is connected to the output end of the second-stage amplifying circuit 20, and a second end of the plurality of impedance adjusting branches 41 is connected to the second power supply terminal.
As an example, the second-stage output matching network 40 includes a plurality of impedance adjusting branches 41, each impedance adjusting branch 41 includes a matching switch and a matching resistor connected in series, wherein a resistance value of the matching resistor in each impedance adjusting branch 41 can be set in a customized manner according to actual requirements, so as to adjust the output impedance and the gain of the low-noise amplifying circuit.
In the present embodiment, the second stage output matching network 40 includes a first impedance adjusting branch 41, a second impedance adjusting branch 41/./an nth impedance adjusting branch 41. The first impedance adjusting branch 41 includes a first matching switch S1 and a first matching resistor R1, and the second impedance adjusting branch 41 includes a second matching switch S2 and a second matching resistor R2/./the nth impedance adjusting branch 41 includes an nth matching switch Sn and an nth matching resistor Rn. It should be noted that, the first matching switch S1, the second matching switch S2/the nth matching switch Sn can respectively control the first matching resistor R1, the second matching resistor R2/the nth matching resistor Rn connected to the low noise amplifier circuit, so as to adjust the output impedance and the gain of the low noise amplifier circuit, so as to satisfy the impedance matching and ensure the gain. For example, when the first matching switch S1 is turned off and the second matching switch S2/nth matching switch Sn is turned off, the first matching resistor R1 functions as the second-stage output matching network, and the resistance value of the first matching resistor R1 is associated with the output impedance and gain of the low noise amplification circuit. As another example, when the first matching switch S1 and the second matching switch S2 are turned off and the remaining matching switches are turned off, the first matching resistor R1 and the second matching resistor R2 function as a second-stage output matching network, and the parallel resistance value of the first matching resistor R1 and the second matching resistor R2 is associated with the output impedance and gain of the noise amplification circuit.
In one embodiment, as shown in fig. 3 to 5, the first stage output matching network 30 may be formed by at least two of the first resistor R31, the first capacitor C31, and the first inductor L31 connected in parallel.
In this embodiment, the first stage output matching network 30 includes a first resistor R31 and a first capacitor C31 connected in parallel. Alternatively, the first stage output matching network 30 includes a first capacitor C31 and a first inductor L31 connected in parallel. Alternatively, the first stage output matching network 30 includes a first resistor R31 and a first inductor L31 connected in parallel. Alternatively, the first stage output matching network 30 includes a first resistor R31, a first capacitor C31, and a first inductor L31 connected in parallel. It should be noted that, the imaginary impedance in the output impedance of the low-noise amplifying circuit may be adjusted by selecting a parallel connection manner among the first resistor R31, the first capacitor C31, and the first inductor L31, and the corresponding parameter sizes of the first resistor R31, the first capacitor C31, and the first inductor L31 according to actual requirements.
It should be noted that, in an embodiment, when the first-stage output matching network 30 includes the first resistor R31, the first resistor R31 may affect the real part of the output impedance of the low-noise amplifier circuit, but in the present application, since the second-stage output matching network 40 in the form of a resistor network is connected to the output end of the second-stage amplifier circuit 20, the real part of the output impedance of the low-noise amplifier circuit is mainly determined by the second-stage output matching network 40, and the first resistor R31 in the first-stage output matching network 30 hardly affects the real part of the output impedance of the low-noise amplifier circuit.
In one embodiment, as shown in fig. 2, the first stage output matching network 30 includes a first capacitor C31 and a first inductor L31 connected in parallel, wherein the first capacitor C31 is an adjustable capacitor.
In the present embodiment, the first-stage output matching network 30 includes a first capacitor C31 and a first inductor L31 connected in parallel, and is configured to adjust an imaginary impedance of output impedances of the low-noise amplification circuit. Preferably, the first capacitor C31 is an adjustable capacitor, which facilitates adjustment of the imaginary part impedance of the output impedance of the low-noise amplifier circuit, so as to ensure that the adjustment of the imaginary part impedance of the output impedance of the low-noise amplifier circuit is realized in a wider frequency band range.
In one embodiment, as shown in fig. 2, the first stage amplifying circuit 10 includes a first dc blocking capacitor C11, a first amplifying transistor M11, a second amplifying transistor M12 and a second dc blocking capacitor C12; a first end of the first dc blocking capacitor C11 is connected to the signal input terminal Vin, and a second end of the first dc blocking capacitor C11 is connected to a first end of the first amplifying transistor M11; the second terminal of the first amplifying transistor M11 is connected to the third terminal of the second amplifying transistor M12, and the third terminal of the first amplifying transistor M11 is connected to the ground terminal; a first end of the second amplifying transistor M12 is connected to the ground terminal through a second dc blocking capacitor C12; a second terminal of the second amplifying transistor M12 is connected to an output terminal of the first stage amplifying circuit 10 and an input terminal of the second stage amplifying circuit 20.
As an example, the first amplifying transistor M11 and the second amplifying transistor M12 may be transistors or field effect transistors. The second amplifying transistor M12 may also be a plurality of cascaded triodes or a plurality of cascaded field effect transistors. When the first stage amplifying circuit 10 receives the rf input signal from the signal input terminal Vin, the rf input signal is amplified in multiple stages by the first amplifying transistor M11 and the second amplifying transistor M12, and a first stage rf amplified signal is output.
As another example, as shown in fig. 2 or 3, when the first and second amplifying transistors M11 and M12 are triodes, the first and second amplifying transistors M11 and M12 may be NPN transistors. A first end of the first dc blocking capacitor C11 is connected to the signal input terminal Vin, and a second end of the first dc blocking capacitor C11 is connected to a first end of the first amplifying transistor M11; the second terminal of the first amplifying transistor M11 is connected to the third terminal of the second amplifying transistor M12, and the third terminal of the first amplifying transistor M11 is connected to the ground terminal, and is configured to amplify the rf input signal.
As another example, the first terminal of the second amplifying transistor M12 is connected to the ground terminal through the second dc blocking capacitor C12; a second terminal of the second amplifying transistor M12 is connected to an output terminal of the first stage amplifying circuit 10 and an input terminal of the second stage amplifying circuit 20, and is configured to amplify the rf input signal amplified by the first amplifying transistor M11 again and output a first stage rf amplified signal. And the second blocking capacitor C12 is configured to filter the harmonic or interference signal input to the first end of the second amplifying transistor M12.
In one embodiment, as shown in fig. 2, the second stage amplifying circuit 20 includes a third dc blocking capacitor C21, a fourth dc blocking capacitor C22, a third amplifying transistor M21 and a fourth amplifying transistor M22; a first end of a third blocking capacitor C21 is used as an input end of the second-stage amplifying circuit 20 and is connected with an output end of the first-stage amplifying circuit 10, and a second end of a third blocking capacitor C21 is connected with a first end of a third amplifying transistor M21; a second terminal of the third amplifying transistor M21 is connected to a third terminal of the fourth amplifying transistor M22, and a third terminal of the third amplifying transistor M21 is connected to the ground terminal; a first terminal of the fourth amplifying transistor M22 is connected to the ground terminal through the fourth dc blocking capacitor C22, and a second terminal of the fourth amplifying transistor M22 is connected to the second-stage output matching network 40 as an output terminal of the second-stage amplifying circuit 20.
As an example, the third amplifying transistor M21 and the fourth amplifying transistor M22 may be transistors or field effect transistors. The fourth amplifying transistor M22 may also be a plurality of cascaded triodes or a plurality of cascaded field effect transistors. When the first-stage amplifying circuit 10 receives the rf input signal input from the signal input terminal Vin, the third amplifying transistor M21 and the fourth amplifying transistor M22 perform a second-stage amplifying process on the rf input signal amplified by the first-stage amplifying circuit, and output a second-stage rf amplified signal.
As another example, when the third and fourth amplifying transistors M21 and M22 are triodes, the third and fourth amplifying transistors M21 and M22 may be NPN transistors. A first end of a third blocking capacitor C21 is used as an input end of the second-stage amplifying circuit 20 and is connected with an output end of the first-stage amplifying circuit 10, and a second end of a third blocking capacitor C21 is connected with a first end of a third amplifying transistor M21; the second terminal of the third amplifying transistor M21 is connected to the third terminal of the fourth amplifying transistor M22, and the third terminal of the third amplifying transistor M21 is connected to the ground terminal, and is configured to amplify the first-stage rf amplified signal.
As another example, a first terminal of the fourth amplifying transistor M22 is connected to the ground terminal through the fourth dc blocking capacitor C22, and a second terminal of the fourth amplifying transistor M22 is connected to the second stage output matching network 40 as an output terminal of the second stage amplifying circuit 20, and is configured to amplify the first stage rf amplified signal amplified by the third amplifying transistor M21 again, and output the second stage rf amplified signal. And the second blocking capacitor C12 is configured to filter the harmonic or interference signal input to the first end of the fourth amplifying transistor M22.
In one embodiment, as shown in fig. 2, the low noise amplification circuit further includes a first gain adjustment circuit 50 and a second gain adjustment circuit 60; a first gain adjustment circuit 50, one end of which is connected to the first-stage amplification circuit 10 and the other end of which is connected to the ground terminal, and configured to perform gain adjustment on the first-stage amplification circuit 10; the second gain adjustment circuit 60 has one end connected to the second stage amplification circuit 20 and the other end connected to the ground end, and is configured to perform gain adjustment on the second stage amplification circuit 20.
As an example, the first gain adjustment circuit 50 has one end connected to the first stage amplification circuit 10 and the other end connected to the ground end, and is configured to perform gain adjustment on the first stage amplification circuit 10. Specifically, the first gain adjustment circuit 50 includes a first gain adjustment inductor L51, and the first gain adjustment inductor L51 has one end connected to the first stage amplification circuit 10 and the other end connected to the ground end, and is configured to perform gain adjustment on the first stage amplification circuit 10.
As another example, the second gain adjustment circuit 60, having one end connected to the second stage amplification circuit 20 and the other end connected to the ground, is configured to perform gain adjustment on the second stage amplification circuit 20. Specifically, the second gain adjustment circuit 60 includes a second gain adjustment inductor L61, and the second gain adjustment inductor L61 has one end connected to the first stage amplification circuit 10 and the other end connected to the ground end, and is configured to perform gain adjustment on the second stage amplification circuit 20.
In the present embodiment, the first gain adjustment circuit 50 has one end connected to the first stage amplification circuit 10 and the other end connected to the ground end, and is configured to perform gain adjustment on the first stage amplification circuit 10; the second gain adjustment circuit 60 has one end connected to the second stage amplification circuit 20 and the other end connected to the ground end, and is configured to perform gain adjustment on the second stage amplification circuit 20, so as to increase the gain of the low noise amplification circuit.
The embodiment provides a radio frequency front-end module, which comprises a substrate and a low-noise amplification chip arranged on the substrate, wherein the low-noise amplification chip is provided with the low-noise amplification circuit in the embodiment, and the low-noise amplification circuit can ensure a certain gain while realizing impedance matching of an output end.
In one embodiment, the rf front end module further includes a first gain adjustment circuit 50 and a second gain adjustment circuit 60; the first gain adjustment circuit 50 includes a first gain adjustment inductor L51, the second gain adjustment circuit 60 includes a second gain adjustment inductor L61, and the first gain adjustment inductor L51 has one end connected to the first stage amplification circuit 10 on the low noise amplification chip and the other end connected to the ground terminal; one end of the second gain adjusting inductor L61 is connected to the second stage amplifier circuit 20 on the low noise amplifier chip, and the other end is connected to the ground terminal; the first gain adjustment inductor L51 and the second gain adjustment inductor L61 are respectively disposed on the substrate.
In this embodiment, the first gain adjustment inductor L51 has one end connected to the first stage amplifier circuit 10 on the low noise amplifier chip and the other end connected to the ground end, and is configured to perform gain adjustment on the first stage amplifier circuit 10; the second gain adjustment inductor L61 has one end connected to the second stage amplifier circuit 20 on the low noise amplifier chip and the other end connected to the ground end, and is configured to perform gain adjustment on the second stage amplifier circuit 20. Further, since the total occupied area of the first gain adjustment inductor L51 and the second gain adjustment inductor L61 is large, and the first gain adjustment inductor L51 and the second gain adjustment inductor L61 are respectively disposed on the substrate, the total occupied area of the low-noise amplification chip can be reduced, the number of masks of the low-noise amplification chip can be reduced, and the cost of the low-noise amplification chip can be reduced.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present invention, and are intended to be included within the scope of the present invention.
Claims (11)
1. A low-noise amplification circuit is characterized by comprising a signal input end, a signal output end, a first-stage amplification circuit, a second-stage amplification circuit, a first-stage output matching network and a second-stage output matching network;
the first-stage amplification circuit and the second-stage amplification circuit are connected in series between the signal input end and the signal output end;
the first-stage output matching network is connected between the output end of the second-stage amplifying circuit and a first power supply end and is configured to be associated with the imaginary part of the output impedance of the low-noise amplifying circuit;
the second-stage output matching network is connected between the output end of the second-stage amplifying circuit and a second power supply end, is a resistance network and is configured to be associated with the real part of the output impedance of the low-noise amplifying circuit.
2. The low noise amplification circuit of claim 1, wherein a gain of the low noise amplification circuit is associated with the second stage output matching network.
3. The low noise amplifier circuit of claim 1, wherein the resistor network is an output matching resistor, and wherein an output impedance of the low noise amplifier circuit is proportional to a resistance of the output matching resistor.
4. The low noise amplification circuit of claim 1, wherein the resistor network is an adjustable resistor configured to adjust a real part of an output impedance of the low noise amplification circuit.
5. The low noise amplification circuit of claim 1, wherein the resistor network comprises a plurality of impedance adjustment branches, each of the impedance adjustment branches comprising a matching switch and a matching resistor connected in series.
6. The low noise amplification circuit of claim 1, wherein the first stage output matching network comprises a first capacitor and a first inductor connected in parallel.
7. The low-noise amplification circuit according to claim 1, wherein the first-stage amplification circuit includes a first dc blocking capacitor, a first amplification transistor, a second amplification transistor, and a second dc blocking capacitor;
the first end of the first blocking capacitor is connected with the signal input end, and the second end of the first blocking capacitor is connected with the first end of the first amplifying transistor;
the second end of the first amplifying transistor is connected with the third end of the second amplifying transistor, and the third end of the first amplifying transistor is connected with a grounding end;
the first end of the second amplifying transistor is connected with a grounding end through the second blocking capacitor;
and the second end of the second amplifying transistor is connected with the output end of the first-stage amplifying circuit and the input end of the second-stage amplifying circuit.
8. The low-noise amplification circuit according to claim 1, wherein the second-stage amplification circuit includes a third dc blocking capacitor, a fourth dc blocking capacitor, a third amplification transistor, and a fourth amplification transistor;
the first end of the third blocking capacitor is used as the input end of the second-stage amplifying circuit and is connected with the output end of the first-stage amplifying circuit, and the second end of the third blocking capacitor is connected with the first end of the third amplifying transistor;
the second end of the third amplifying transistor is connected with the third end of the fourth amplifying transistor, and the third end of the third amplifying transistor is connected with a ground terminal;
and a first end of the fourth amplifying transistor is connected with a ground end through the fourth blocking capacitor, and a second end of the fourth amplifying transistor is used as an output end of the second-stage amplifying circuit and is connected with the second-stage output matching network.
9. The low-noise amplification circuit according to claim 1, further comprising a first gain adjustment circuit and a second gain adjustment circuit;
one end of the first gain adjusting circuit is connected with the first-stage amplifying circuit, and the other end of the first gain adjusting circuit is connected with a grounding end and is configured to perform gain adjustment on the first-stage amplifying circuit;
and one end of the second gain adjusting circuit is connected with the second-stage amplifying circuit, and the other end of the second gain adjusting circuit is connected with a grounding end, and the second gain adjusting circuit is configured to perform gain adjustment on the second-stage amplifying circuit.
10. A radio frequency front end module, comprising a substrate and a low noise amplification chip disposed on the substrate, wherein the low noise amplification chip is provided with the low noise amplification circuit according to any one of claims 1 to 8.
11. The rf front-end module of claim 10, further comprising a first gain adjustment circuit and a second gain adjustment circuit; the first gain adjustment circuit comprises a first gain adjustment inductor arranged on the substrate, and the second gain adjustment circuit comprises a second gain adjustment inductor arranged on the substrate;
one end of the first gain adjusting inductor is connected with the first-stage amplifying circuit arranged on the low-noise amplifying chip, and the other end of the first gain adjusting inductor is connected with a grounding end;
one end of the second gain adjusting inductor is connected with the second-stage amplifying circuit arranged on the low-noise amplifying chip, and the other end of the second gain adjusting inductor is connected with a grounding end.
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| CN202110352291.0A CN113517863A (en) | 2021-03-31 | 2021-03-31 | Low-noise amplifying circuit and radio frequency front-end module |
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| CN202110352291.0A CN113517863A (en) | 2021-03-31 | 2021-03-31 | Low-noise amplifying circuit and radio frequency front-end module |
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