CN113516138B - Image processing method based on dual-mode memristor bridge synaptic circuit - Google Patents

Image processing method based on dual-mode memristor bridge synaptic circuit Download PDF

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CN113516138B
CN113516138B CN202110825319.8A CN202110825319A CN113516138B CN 113516138 B CN113516138 B CN 113516138B CN 202110825319 A CN202110825319 A CN 202110825319A CN 113516138 B CN113516138 B CN 113516138B
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王蕊
穆治诚
孙辉
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Civil Aviation University of China
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Abstract

The invention provides an image processing method based on a synapse circuit of a dual-mode memristive bridge, which comprises the following steps: constructing a dual-mode memristive bridge synaptic circuit through a linear memristor bridge synaptic circuit and a nonlinear memristor bridge synaptic circuit and an output memristive bridge synaptic circuit based on positive and negative pulses; performing simulation weight according to the dual-mode memristor bridge synaptic circuit, and constructing a dual-mode memristor bridge neural network through the simulation weight; and combining the dual-mode memristor bridge synaptic neural network with the cellular neural network, and performing edge extraction on the input image through the combined neural network to identify target elements in the input image. The invention has the beneficial effects that: the response time and the weight of the dual-mode memristive bridge synaptic neural network are faster and more accurate than those of the traditional method. Therefore, the dual-mode memristive bridge synaptic neural network is expected to be more real-time and solve more complex image processing.

Description

Image processing method based on dual-mode memristor bridge synaptic circuit
Technical Field
The invention relates to the technical field of image processing, in particular to an image processing method based on a dual-mode memristor bridge synaptic circuit.
Background
Artificial neural networks have been the focus of research. Since there are hundreds of millions of neurons and synapses in the human brain, implementing synaptic circuits is important for building brain-like machines. In artificial neural networks, a number of research results suggest that memristors may be used to simulate artificial synapses. In addition, it has great potential due to the nature of the memory synapse circuit. Among them, the most widely studied simulated synapse structure is the memory bridge structure, which has the advantages of simple structure, precise control, high integration level, etc.
However, in the prior art:
a synaptic bridge circuit composed of five identical memristors was proposed in conventional article of IEEE Circuit and System journal I, 59: 148-. Four memristors are used for controlling the positive and negative weights, and the last memristor is used for realizing the simulation of the synaptic weight. But this circuit cannot reach a zero weight. Meanwhile, the nonlinear phenomenon of memristance in the simulated synaptic circuit is also mentioned, which causes errors of weight simulation.
Von guang (2017), memristive bridge synapse-based neural network circuit research and application, major paper, Chinese, southwest university bipolar pulse method is used for inhibiting nonlinearity of memristance. However, it uses a synaptic bridge circuit composed of five identical memristors, which cannot be represented by a value of synaptic weight 0.
"Chenjing (2018), neural network based on memristor electronic synapse and application thereof, [ Master thesis ] [ China ]: university of southwest ] proposes a bridge synapse circuit composed of three identical memristors and two MOS transistors, which makes up the defect that the weight of a synapse circuit composed of five identical memristors cannot be zero, but cannot inhibit the nonlinearity of the memristors.
For the above-mentioned drawbacks, there is no solution for the time being.
Disclosure of Invention
The invention provides an image processing method based on a dual-mode memristor bridge synaptic circuit, which is used for solving the defects.
An image processing method based on a dual-mode memristive bridge synaptic circuit comprises the following steps:
constructing a dual-mode memristive bridge synaptic circuit through a linear memristor bridge synaptic circuit and a nonlinear memristor bridge synaptic circuit and an output memristive bridge synaptic circuit based on positive and negative pulses;
performing simulation weight according to the dual-mode memristor bridge synaptic circuit, and constructing a dual-mode memristor bridge neural network through the simulation weight;
and combining the dual-mode memristor bridge synaptic neural network with the cellular neural network, and performing edge extraction on the input image through the combined neural network to identify target elements in the input image.
As an embodiment of the invention: the method further comprises the following steps:
determining a physical structure of a memristor;
constructing a memristor bridge structure based on simulated synapse through a physical structure of the memristor;
according to the memristor bridge structure of the simulated synapse, a mathematical model of the memristor is built through charge control; wherein the content of the first and second substances,
the memristor model includes: a mathematical model of a linear memristor and a mathematical model of a nonlinear memristor.
As an embodiment of the present invention: the physical structure of the memristor includes: a metal platinum electrode and two layers of titanium dioxide films; wherein the content of the first and second substances,
the two layers of titanium dioxide films are clamped between the metal platinum motors;
the two titanium dioxide films comprise a non-doped layer and a low-resistance doped layer;
the non-doped layer has high memristance;
the low-resistance doped layer has semiconductor characteristics.
As an embodiment of the present invention: through charge control, build the mathematical model of recalling the resistance ware, include:
determining a mathematical equation of the memristor based on the physical structure and charge control of the memristor:
Figure BDA0003173551080000031
wherein Q (t) represents a charge quantity function; i (t) represents the current of the memristor at time t; determining a mathematical model of a linear memristor according to a mathematical equation of the memristor:
M 1 (t)=M(0)+k 1 Q(t)
Wherein M (0) represents the initial memristance;
Figure BDA0003173551080000032
M ON an ultimate resistance value of the memristor representing a thickness of the current doped layer; m OFF The limiting resistance value of the memristor representing the total thickness of the two TiO2 thin films; d represents the total thickness of the two TiO2 films;
determining a mathematical model of a nonlinear memristor according to a mathematical equation of the memristor:
Figure BDA0003173551080000033
wherein Δ M ═ M OFF -M ON
Figure BDA0003173551080000034
As an embodiment of the present invention: the method further comprises the following steps:
setting parameters through a simulated annealing algorithm according to the linear memristor bridge synaptic circuit and the nonlinear memristor bridge synaptic circuit;
the setting steps are as follows:
step 1 setting an initial input voltage V by measurement int Temperature T, end temperature T z Maximum number of iterations L per temperature T, interval time T s And a maximum value at which the input voltage changes at each instant, the input voltage being selected at each instant between the initial input voltage and the maximum voltage;
step 2: t ═ jT, j is the descent rate, j ∈ (0,1), and n is the number of iterations. An evaluation function is obtained for each iteration,
Figure BDA0003173551080000041
for each memristor at the current input voltage, the evaluation function is the linear memristor and the nonlinear memristor at the time t T The memristance difference between;
and step 3: randomly selecting t within a set voltage range T New input voltage V of time of day in . Then calculating the memristance and evaluation function of the nonlinear memristor
Figure BDA0003173551080000042
Figure BDA0003173551080000043
And 4, step 4: if it is not
Figure BDA0003173551080000044
Then
Figure BDA0003173551080000045
Otherwise, returning to the step 3 if n is n + 1;
and 5: if it is
Figure BDA0003173551080000046
Accepting the changed input voltage, otherwise judging whether to accept the voltage according to probability
Figure BDA0003173551080000047
Let n be n + 1;
step 6: if it is not
Figure BDA0003173551080000048
The algorithm is terminated;
and 7: if n is less than L, returning to the step 3;
and 8: if T is<T z The algorithm is terminated, otherwise step 2 is returned.
As an embodiment of the present invention: the method further comprises the following steps:
acquiring a memristive bridge synaptic circuit;
connecting the memristor bridge synaptic circuit with a switch circuit switched in a dual mode to form an output memristor bridge synaptic circuit with positive and negative pulses; wherein the content of the first and second substances,
the switch circuit for dual-mode switching at least comprises a positive pulse switch interface, a negative pulse switch interface and a pulse conversion control signal interface.
As an embodiment of the present invention: the dual-mode memristive bridge synapse circuit is also connected with a differential pair circuit and an effective load circuit; wherein the content of the first and second substances,
the dual-mode memristive bridge synaptic circuit is used for generating symmetrical positive and negative pulses and simulation weights, and determining an expected template operator through the positive and negative pulses and the simulation weights;
The differential pair circuit comprises a differential amplifier composed of transistors, and is used for being electrically connected with the output side of the dual-mode memristive bridge synapse circuit and converting the output voltage of the dual-mode memristive bridge synapse circuit into current;
the effective load circuit is electrically connected with the output side of the differential pair circuit and converts the current of the differential pair circuit into a voltage signal through a resistance load.
As an embodiment of the invention: the neural network combining the dual-mode memristive bridge synaptic neural network and the cellular neural network is used for determining a cellular neural network template in an edge extraction mode; the cellular neural network template is used for identifying target elements through pixel iteration.
As an embodiment of the invention: the dual-mode memristive bridge synaptic neural network comprises a plurality of dual-mode memristive bridge synaptic circuits, different pulse signals are generated through the dual-mode memristive bridge synaptic circuits, and various cell neural network templates are extracted from the edge through the different pulse signals.
As an embodiment of the present invention: and the cell neural network template extracted from the edge is used for comparing and identifying the characteristics of the target elements in the input image to determine the target elements.
The invention has the beneficial effects that:
the invention provides a novel dual-mode memristor bridge synaptic circuit for simulating synaptic weights, and the dual-mode memristor bridge synaptic circuit is combined with a cellular neural network to construct a dual-mode memristor bridge synaptic neural network. And applies the network to edge extraction of the image. The method can better solve the weight simulation error caused by the nonlinear memristor, thereby accelerating the speed of edge extraction and improving the acquisition precision of the cellular neural network template.
According to the invention, firstly, mathematical modeling is carried out on linear and nonlinear memristors, and corresponding simulation is carried out. In particular, the nonlinear memristor model is closer to an actual memristor. Then, a novel memristive bridge synaptic circuit and a dual-mode memristive bridge synaptic circuit are provided. The two circuits respectively inhibit the nonlinearity of the synapse weight and the output voltage, and reduce the weight simulation error. And finally, passing through a dual-mode memristive bridge neural network. The image is processed accordingly.
The implementation of the method is premised on determining the memristor change of different types of linear and nonlinear memristor models, and the method can verify that the memristor change of the nonlinear memristor models is closer to the physical characteristic. The invention provides for linearizing synaptic weights by varying an input voltage of a non-linear memristive bridge synaptic circuit. The invention further comprises a method for accurately inputting the voltage based on the simulated annealing method, so that the change of the synaptic circuit of the nonlinear memristor bridge is more linear. However, when the input voltage changes, the corresponding output voltage also changes, and the nonlinearity is intensified, so the dual-mode memristive bridge synaptic circuit is adopted in the invention, and because the influence of symmetrical positive and negative pulses on the synaptic weight is minimum, the output voltage and the synaptic weight are linearized. Finally, the neural network proposed herein is formed using dual-mode memristive bridge-synaptic circuits for extracting the edges of the image. The response time and the weight of the dual-mode memristive bridge synaptic neural network are faster and more accurate than those of the traditional method. Therefore, the dual-mode memristive bridge synaptic neural network is expected to be more real-time and solve more complex image processing.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and drawings.
The technical solution of the present invention is further described in detail by the accompanying drawings and embodiments.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
fig. 1 is a flowchart of a method for processing an image based on a dual-mode memristive bridge synaptic circuit according to an embodiment of the present disclosure.
FIG. 2 is a diagram of a memristor architecture in an embodiment of the present disclosure;
FIG. 3 is a linear schematic diagram of a memristor model with linear and nonlinear charge control based on a memristance vs.Q in an embodiment of the present disclosure;
FIG. 4 is a diagram illustrating the synaptic weights between the nonlinear and linear models by varying the input pair according to an embodiment of the present invention;
FIG. 5 is a graph of memristance comparisons between linear and nonlinear memristor models with and without the use of the modified simulated annealing method in an embodiment of the present disclosure;
FIG. 6 is a graph of output voltage variation for linear and nonlinear memristor models with and without the use of the modified simulated annealing method in an embodiment of the present invention;
FIG. 7 is a diagram of a synaptic electrical circuit of a dual-mode memristive bridge for generating positive and negative pulses and controlling synaptic weights in an embodiment of the present disclosure;
FIG. 8 is a graph comparing output voltages of a linear memristor circuit, a nonlinear memristor circuit employing an improved simulated annealing method, and a dual-mode memristor bridge synapse circuit in an embodiment of the present disclosure;
FIG. 9 is a circuit diagram of a dual-mode memristive bridge synaptic neural network in an embodiment of the present disclosure;
FIG. 10 is a graph of (a) edge extraction results using a conventional non-linear memristive bridge synaptic neural network, in an embodiment of the present disclosure;
FIG. 11 is a graph of edge extraction results using a dual-mode memristive bridge synaptic neural network in an embodiment of the present disclosure.
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it will be understood that they are described herein for the purpose of illustration and explanation and not limitation.
In the present invention:
a memristor is a synaptic element with nanometer dimensions and continuously variable memristance. A bridge type synaptic circuit formed by memristors is simple in structure and accurate in control. In practice, due to the nonlinear characteristic of the memristor, a certain influence is generated on the control of the synaptic circuit, and a weight error is caused.
The invention relates to an image processing method based on a dual-mode memristive bridge synaptic circuit, which is shown in the attached figure 1 and comprises the following steps:
step 100: constructing a dual-mode memristive bridge synaptic circuit through a linear memristor bridge synaptic circuit and a nonlinear memristor bridge synaptic circuit and an output memristive bridge synaptic circuit based on positive and negative pulses;
step 101: carrying out simulation weight according to the synapse circuit of the dual-mode memristive bridge, and constructing a neural network of the dual-mode memristive bridge through the simulation weight;
step 102: and combining the dual-mode memristor bridge synaptic neural network with the cellular neural network, and performing edge extraction on the input image through the combined neural network to identify target elements in the input image.
The working principle of the technical scheme is as follows: the invention provides a novel dual-mode memristor bridge synaptic circuit for simulating synaptic weights, and the dual-mode memristor bridge synaptic circuit is combined with a cellular neural network to construct a dual-mode memristor bridge synaptic neural network. And applies the network to edge extraction of the image. The method can better solve the weight simulation error caused by the nonlinear memristor, thereby accelerating the speed of edge extraction and improving the acquisition precision of the cellular neural network template.
The method firstly performs mathematical modeling on the linear memristor and the nonlinear memristor and performs corresponding simulation. In particular, the nonlinear memristor model is closer to the actual memristor. Then, a novel memristive bridge synaptic circuit and a dual-mode memristive bridge synaptic circuit are provided. The two circuits respectively inhibit the nonlinearity of the synapse weight and the output voltage, and reduce the weight simulation error. And finally, passing through a dual-mode memristive bridge neural network. The image is processed accordingly.
The implementation of the method is premised on determining the memristor change of different types of linear and nonlinear memristor models, and the method can verify that the memristor change of the nonlinear memristor models is closer to the physical characteristic. The invention provides for linearizing synaptic weights by varying an input voltage of a non-linear memristive bridge synaptic circuit. The invention further comprises a method for accurately inputting the voltage based on the simulated annealing method, so that the change of the synaptic circuit of the nonlinear memristor bridge is more linear. However, when the input voltage changes, the corresponding output voltage also changes, and the nonlinearity is intensified, so the dual-mode memristive bridge synaptic circuit is adopted in the invention, and because the influence of symmetrical positive and negative pulses on the synaptic weight is minimum, the output voltage and the synaptic weight are linearized. Finally, the neural network proposed herein is formed using dual-mode memristive bridge-synaptic circuits for extracting the edges of the image.
The beneficial effects of the above technical scheme are: the response time and the weight of the dual-mode memristive bridge synaptic neural network are faster and more accurate than those of the traditional method. Therefore, the dual-mode memristive bridge synaptic neural network is expected to be more real-time and solve more complex image processing.
In one practical embodiment: bird strike is a huge threat to modern civil aviation, and brings huge loss to the life and economy of people. Therefore, researchers and related departments are urgently looking for finding a proper bird repelling method at present. At present, birds are generally repelled by means of radar to obtain bird information, and then corresponding bird repelling equipment is used. However, the information displayed on the radar can only be related to the approximate bird flight direction, and the type and number of birds cannot be identified. If more detailed bird information can be obtained, a more effective and more targeted bird repelling method can be adopted. Therefore, the image processing method of the invention can solve the problems of bird species identification and bird counting according to bird images around or passing through an airport.
As an embodiment of the present invention: the method further comprises the following steps:
determining a physical structure of a memristor;
constructing a memristor bridge structure based on simulated synapse through a physical structure of the memristor;
According to the memristor bridge structure of the simulated synapse, a mathematical model of the memristor is built through charge control; wherein, the first and the second end of the pipe are connected with each other,
the memristor model includes: a mathematical model of a linear memristor and a mathematical model of a nonlinear memristor.
The working principle of the technical scheme is as follows: the invention is based on the synaptic circuit of the dual-mode memristive bridge, so the construction of the synaptic circuit of the dual-mode memristive bridge can be firstly carried out, but the construction of the synaptic circuit of the dual-mode memristive bridge is not limited by a memristor, because a mathematical model of the memristor is constructed in advance according to the memristor and a point and control, the construction of the neural network of the synaptic circuit of the dual-mode memristive bridge is further realized.
The beneficial effects of the above technical scheme are: the electric charge quantity is controllable by establishing a mathematical model of the linear memristor and a mathematical model of the nonlinear memristor, the electric charge quantity also represents that synapses are controllable, the synapses are controllable, and the synapses are controllable, so that the synapses of the nonlinear memristor model are close to the synapses of the linear memristor model, and the synapses required by image recognition are reached more quickly.
As an embodiment of the present invention: the physical structure of the memristor includes: a metal platinum electrode and two layers of titanium dioxide films; wherein the content of the first and second substances,
The two layers of titanium dioxide films are clamped between the metal platinum motors;
the two titanium dioxide films comprise a non-doped layer and a low-resistance doped layer;
the non-doped layer has high memristance;
the low-resistance doped layer has semiconductor characteristics.
The working principle of the technical scheme is as follows: the method is characterized in that controllable memristors are needed for establishing a synaptic circuit of the dual-mode memristor bridge, and the controllable memristors are divided into charge controllable memristors and magnetic flux control memristors; but because charge-controllable memristors have good nonlinear and linear characteristics; therefore, it is consistent with the present invention to implement synapses, and thus the present invention employs charge-controllable memristors as shown in fig. 2, where 1 is a memristor model and 2 is a memristor symbol. The memristor is formed by two layers of titanium dioxide (TiO) between two metal platinum electrodes 2 ) And (3) film composition. One layer of TiO 2 The thin film is a non-doped layer and has high memristance. Another layer of TiO 2 The thin film is a doped layer having semiconductor characteristics and corresponding to low resistance. The resistance value of the high-voltage memristor is M (t).
Figure BDA0003173551080000111
Where ω (t) is the thickness of the now doped layer and D is two TiO s 2 The total thickness of the film. M OFF And M ON And the limiting resistance values, i.e., the maximum resistance value and the minimum resistance value, of the D memristor, ω (t) ═ 0 and ω (t) ═ D, respectively.
The beneficial effects of the above technical scheme are: because nonlinear and linear data analysis is needed, the invention determines the memristor in advance, and the physical memristor determined by the invention is a circuit element with a nanometer size, so that the memristor generates a huge electric field when a tiny voltage is applied. Thus, the ion motion inside the memristor has a significant nonlinear characteristic.
As an embodiment of the present invention: through charge control, build the mathematical model of recalling the resistance ware, include:
determining a mathematical equation of the memristor based on the physical structure and charge control of the memristor:
Figure BDA0003173551080000112
wherein Q (t) represents a charge quantity function; i (t) represents the current of the memristor at time t; determining a mathematical model of a linear memristor according to a mathematical equation of the memristor:
M 1 (t)=M(0)+k 1 Q(t)
wherein M (0) represents the initial memristance;
Figure BDA0003173551080000113
M ON an ultimate resistance value of the memristor representing a thickness of the current doped layer; m OFF Represents two TiO 2 The limiting resistance value of the memristor for the total thickness of the thin film; d represents two TiO 2 The total thickness of the film;
determining a mathematical model of a nonlinear memristor according to a mathematical equation of the memristor:
Figure BDA0003173551080000121
wherein Δ M ═ M OFF -M ON
Figure BDA0003173551080000122
The working principle of the technical scheme is as follows: because the controllable memristor is needed for establishing the dual-mode memristor bridge circuit, two models of the controllable memristor are established; respectively a mathematical model of a linear memristor and a mathematical model of a nonlinear memristor; as shown in FIG. 3, the mathematical model of the memristor according to the present invention shows the relationship between the memristance change and the charge or flux for different types of linear and nonlinear memristor models, for which the memristance change reaches the threshold earlier than the nonlinear memristor; when the charge reaches or exceeds the upper or lower limit, the memristance will reach and maintain a maximum or minimum value. k is a radical of 1 And k 2 The parameter is expressed without practical meaning and is defined by specific limiting impedance value and TiO 2 The total thickness of the film is determined. Eta v Is a constant of memristor ion mobility in uniform field, eta v ≈10 -14 m 2 ·s -1 ·V -1
The beneficial effects of the above technical scheme are: according to the method, the dual-mode memristor bridge circuit can be judged to realize synapse weight control through the design of the mathematical model. The linearization of synaptic weights and output voltages may also be facilitated by the control of synaptic weights through the relationship between the nonlinear and linear models.
As an embodiment of the present invention: the method further comprises the following steps:
setting parameters through a simulated annealing algorithm according to the linear memristor bridge synaptic circuit and the nonlinear memristor bridge synaptic circuit;
the setting steps are as follows:
step 1 setting an initial input voltage V by measurement int Temperature T, end temperature T z Each of themMaximum number of iterations L of temperature T, interval time T s And a maximum value at which the input voltage changes at each instant, the input voltage being selected at each instant between the initial input voltage and the maximum voltage;
step 2: t ═ jT, j is the descent rate, j ∈ (0,1), and n is the number of iterations. An evaluation function is obtained for each iteration,
Figure BDA0003173551080000131
for each memristor at the current input voltage, the evaluation function is the linear memristor and the nonlinear memristor at the time t T The memristance difference between;
and step 3: randomly selecting t within a set voltage range T New input voltage V at a moment in . Then calculating the memristance and evaluation function of the nonlinear memristor
Figure BDA0003173551080000132
Figure BDA0003173551080000133
And 4, step 4: if it is not
Figure BDA0003173551080000134
Then
Figure BDA0003173551080000135
Otherwise, returning to the step 3 if n is n + 1;
and 5: if it is
Figure BDA0003173551080000136
Accepting the changed input voltage, otherwise judging whether to accept the voltage according to probability
Figure BDA0003173551080000137
Let n be n + 1;
step 6: if it is not
Figure BDA0003173551080000138
And 7: if n is less than L, returning to the step 3;
and 8: if T is<T z The algorithm is terminated, otherwise step 2 is returned.
The working principle of the technical scheme is as follows: the invention adopts a simulated annealing method to obtain more accurate input voltage, and then controls the change of the synaptic weight by the voltage; by varying the input V, as shown in FIG. 4 in A memristive bridge synaptic circuit based on improved simulated annealing of a nonlinear memristor model is constructed. Therefore, it is necessary to find the change input V in Influencing the entire circuit, e.g. increasing or decreasing input V in . Initial input V assuming linear and nonlinear memristor models in At 1v, the input is increased and decreased by 0.0005v, respectively. It can be found that by reducing the input V in The difference between linear and non-linear is larger and larger, and by increasing the input, the synaptic weight of the non-linear model can follow the synaptic weight V of the linear model within a certain range in . Then through the above steps, the invention can determine that the nonlinear memristor and the linear memristor bridge synaptic circuit set the same memristor parameters, as shown in FIGS. 5 and 6. FIG. 5 is a memristance M between linear and nonlinear memristor models with and without the modified simulated annealing method 1 And (6) comparing. As shown in FIG. 5, when the simulated annealing method selects the accurate input voltage, the memristance M of the synaptic circuit from the nonlinear memristive bridge 1 Can be significantly linearized. FIG. 6 is the output voltage variation of linear and nonlinear memristor models with and without the modified simulated annealing method. As can be seen from fig. 6, with the improved simulated annealing method, the output voltage of the synaptic circuit of the nonlinear memristive bridge is not linear, and the absolute value of the output voltage is much larger than that of the synaptic circuit of the linear memristive bridge, for example, due to the nonlinearity of the input voltage, the time is further.
The beneficial effects of the above technical scheme are: selecting proper input V by adopting simulated annealing method random search algorithm int Simple structure and high search speed
As an embodiment of the present invention: the method further comprises the following steps:
acquiring a memristive bridge synaptic circuit;
connecting the memristor bridge synaptic circuit with a switch circuit switched in a dual mode to form an output memristor bridge synaptic circuit with positive and negative pulses; wherein the content of the first and second substances,
The switch circuit for dual-mode switching at least comprises a positive pulse switch interface, a negative pulse switch interface and a pulse conversion control signal interface.
The principle of the technical scheme is as follows: when an input voltage or current acts on a memristor, the memristance changes. Thus, the present invention reduces the effect of the input voltage applied to the memristor by applying positive and negative pulses across the memristor by constructing the synaptic electrical circuit that can switch between the two modes and generate positive and negative pulses. As shown in FIG. 7, the dual mode switching is through a single pole double throw switch S 1 And (4) realizing. Switch S 1 With two interfaces K 1 And K 2 And a pulse conversion control signal interface. Control signal interface by signal P A Imposition of S 1 At K 1 And K 2 For control and output modes. Positive and negative pulse single-pole double-throw switch S 2 、S 3 And single-pole single-throw switch S 4 A handover occurs. Switch S 2 With two interfaces K 3 、K 4 Switch S 3 With two interfaces K 5 、K 6 Are respectively a signal P B And P C The applied double pulse switches the control signal interface. Single-pole single-throw switch S 4 With control of signal P by pulses D The applied pulses switch the control signal interface. The circuit part for obtaining the output voltage is composed of a MOS transistor T 1 And T 2 And (4) forming. MOS transistor T 1 And T 2 All turn-on voltages of V T The gate voltages of the two transistors are both V 1 . In the control phase, to obtain zero output voltage, let V 1 <V T . Otherwise, let V in the output stage 1 >V T . The specific effect is shown in fig. 8, where the red line represents the non-linear output voltage, since only the control mode is active. If so, the line of output voltage becomes more linear, as shown by the orange line. Verify the dual-mode memoryThe bridge-blocking synaptic circuit can realize linearization of synaptic weight and output voltage, and increase of weight acquisition speed. In FIG. 8, output voltage comparisons of a linear memristor circuit (blue line), a nonlinear memristor circuit using a modified simulated annealing method (red line), and a dual-mode memristive bridge synapse circuit (orange line)
The beneficial effects of the above technical scheme are: the speed of acquiring the weight can be increased.
As an embodiment of the present invention: the dual-mode memristive bridge synapse circuit is also connected with a differential pair circuit and an effective load circuit; wherein the content of the first and second substances,
the dual-mode memristive bridge synaptic circuit is used for generating symmetrical positive and negative pulses and simulation weights, and determining an expected template operator through the positive and negative pulses and the simulation weights;
the differential pair circuit comprises a differential amplifier composed of transistors, and is used for being electrically connected with the output side of the dual-mode memristive bridge synapse circuit and converting the output voltage of the dual-mode memristive bridge synapse circuit into current;
The effective load circuit is electrically connected with the output side of the differential pair circuit and converts the current of the differential pair circuit into a voltage signal through a resistance load.
The principle of the technical scheme is as follows: in the design process of the dual-mode memristive bridge synaptic circuit, the synaptic weight needs to change in a linear trend, so that a load band circuit and a differential pair circuit are required to support. As shown in fig. 9, the circuit is mainly divided into a dual-mode memristive bridge synapse circuit a, a differential pair circuit B and an effective load circuit C;
the beneficial effects of the above technical scheme are: the synaptic circuit in the control mode of the dual-mode memristive bridge synaptic circuit A changes the input voltage, so that the synaptic weight changes in a linear trend. In the output mode, by generating symmetrical positive and negative pulses, the influence on the synaptic weight of the synaptic circuit of the memristive bridge is minimum, and the expected template operator can be obtained more quickly. The whole neural network consists of a plurality of dual-mode memristive bridge synaptic circuits, and the synaptic circuits are mutually independent.
The output voltage of the dual-mode memristive bridge synaptic circuit is converted into a current through the differential pair circuit B.
Each dual-mode memristive bridge synaptic circuit is connected in series through a payload circuit C. The circuit converts current from the differential pair circuit through a resistive load into a voltage signal.
As an embodiment of the invention: the neural network combining the dual-mode memristive bridge synaptic neural network and the cellular neural network is used for determining a cellular neural network template in an edge extraction mode; the cellular neural network template is used for identifying target elements through pixel iteration.
As an embodiment of the present invention: the dual-mode memristive bridge synaptic neural network comprises a plurality of dual-mode memristive bridge synaptic circuits, different pulse signals are generated through the dual-mode memristive bridge synaptic circuits, and various cell neural network templates are extracted from the edge through the different pulse signals.
The principle and the beneficial effects of the technical scheme are as follows: the invention combines the dual-mode memristor bridge synaptic neural network with the cellular neural network template to realize the edge extraction of the pictures. A common cellular neural network template is 3 × 3, and thus is implemented herein using a plurality of dual-mode memristive bridge synaptic neural networks. In each circuit, by inputting different pulse signals, a corresponding output value can be obtained. As shown in figure 9:
the template based on edge extraction comprises
Figure BDA0003173551080000161
The parameters of the memristor in fig. 9 are shown in the formula below. The MOS transistor in FIG. 9 has a parameter V T =3v。
The pixels of the M × N image are inserted into a cellular neural network of a template size of 3 × 3, and the pixels are iterated according to the following equation.
Figure BDA0003173551080000171
Figure BDA0003173551080000172
Wherein v is x Is the state value, v y Is the output value, v u Is an input value, i is more than or equal to 1 and less than or equal to M, j is more than or equal to 1 and less than or equal to N, P 1 (i,j)={c(k,l)|max{|k-i|,|l-j|}≤1,1≤k≤M,1≤l≤N}
P 1 (i,j)={c(k,l)|max{|k-i|,|l-j|}≤1,1≤k≤M,1≤l≤N}。
In one embodiment, as shown in FIGS. 10 and 11: FIG. 10 shows the results of edge extraction using a nonlinear memristive bridge synaptic circuit. The bird image edge extraction result of the dual-mode memristive bridge synaptic neural network is realized by using the template, as shown in fig. 11. The edge extraction response speed of the dual-mode memristive bridge synaptic neural network is faster than that of a nonlinear memristive circuit. The invention carries out quantitative comparison on different edge extraction algorithms by using performance indexes FOM (figure Of Merit), wherein the FOM equation is as follows.
Figure BDA0003173551080000173
Wherein Q i Is the number of edge pixels of the original template. Q t Is the number of edge pixels actually detected. A is a compensation coefficient, a is 1/4, d i The shortest distance between the detected edge point and the edge point of the original template. FOM is in the range of [0,1 ]]The larger the FOM, the better the effect. Bird image edge results from different methods were evaluated and the FOM values are shown in table 1.
TABLE 1 two memristor bridge synaptic neural network index comparisons
Conventional methods Methods of the disclosure
FOM 0.9557 0.9865
Number of iterations 90 78
As can be seen from Table 1, the FOM value obtained by the method proposed herein is greater than that of the conventional method, indicating that the method has better edge extraction effect. The number of iterations of the method is also smaller than that of the conventional method. Therefore, the dual-mode memristive-bridge synaptic neural network has more efficient performance in terms of edge extraction than a traditional non-linear memristive-bridge synaptic neural network.
As an embodiment of the present invention: and the cell neural network template extracted from the edge is used for comparing and identifying the characteristics of the target elements in the input image to determine the target elements.
The method analyzes the memristor changes of different types of linear and nonlinear memristor models, and verifies that the memristor changes of the nonlinear memristor models are closer to physical characteristics. Then, it is proposed herein to linearize synaptic weights by varying the input voltage of the synaptic circuit of the nonlinear memristive bridge. Therefore, an accurate input voltage method based on a simulated annealing method is designed, so that the change of the synaptic circuit of the nonlinear memristive bridge is more linear. However, as the input voltage changes, the corresponding output voltage also changes, and the nonlinearity is exacerbated. Therefore, a dual-mode memristive bridge synaptic circuit is proposed, because symmetric positive and negative pulses have minimal influence on synaptic weights, so that the output voltage and synaptic weights are linearized. Finally, the neural network proposed herein is formed using dual-mode memristive bridge-synaptic circuits for extracting the edges of bird images. According to simulation results, the response time and the weight of the synaptic neural network of the dual-mode memristive bridge are faster and more accurate than those of the traditional method. Therefore, the dual-mode memristive bridge synaptic neural network is expected to be more real-time and solve more complex image processing.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

Claims (8)

1. An image processing method based on a synapse circuit of a dual-mode memristive bridge is characterized by comprising the following steps:
constructing a dual-mode memristive bridge synaptic circuit through a linear memristor bridge synaptic circuit and a nonlinear memristor bridge synaptic circuit and an output memristive bridge synaptic circuit based on positive and negative pulses;
performing simulation weight according to the dual-mode memristor bridge synaptic circuit, and constructing a dual-mode memristor bridge neural network through the simulation weight;
combining a dual-mode memristor bridge synaptic neural network with a cellular neural network, performing edge extraction on an input image through the combined neural network, and identifying a target element in the input image;
the method further comprises the following steps:
determining a physical structure of a memristor;
constructing a memristor bridge structure based on simulated synapse through a physical structure of the memristor;
according to the memristor bridge structure of the simulated synapse, a mathematical model of the memristor is built through charge control; wherein the content of the first and second substances,
The memristor model includes: a mathematical model of a linear memristor and a mathematical model of a nonlinear memristor;
wherein, through charge control, build the mathematical model of recalling the resistance ware, include:
determining a mathematical equation of the memristor based on the physical structure and charge control of the memristor:
Figure DEST_PATH_IMAGE001
wherein the content of the first and second substances,
Figure 534531DEST_PATH_IMAGE002
representing a function of the amount of charge;
Figure 274561DEST_PATH_IMAGE003
to represent
Figure 173247DEST_PATH_IMAGE004
Current of the memristor at a moment;
determining a mathematical model of a linear memristor according to a mathematical equation of the memristor:
Figure 883714DEST_PATH_IMAGE005
wherein the content of the first and second substances,
Figure 627679DEST_PATH_IMAGE006
represents an initial memristance;
Figure 989259DEST_PATH_IMAGE007
Figure 793267DEST_PATH_IMAGE008
an ultimate resistance value of the memristor representing a thickness of the current doped layer;
Figure 991030DEST_PATH_IMAGE009
represents two TiO 2 The limiting resistance value of the memristor for the total thickness of the thin film;
Figure 538686DEST_PATH_IMAGE010
represents two TiO 2 The total thickness of the film;
Figure 256237DEST_PATH_IMAGE011
is a constant of the memristor ion mobility in the uniform field,
Figure 496726DEST_PATH_IMAGE012
determining a mathematical model of a nonlinear memristor according to a mathematical equation of the memristor:
Figure 916206DEST_PATH_IMAGE013
wherein the content of the first and second substances,
Figure 267553DEST_PATH_IMAGE014
Figure 338146DEST_PATH_IMAGE015
2. the method of claim 1, in which a physical structure of the memristor comprises: a metal platinum electrode and two layers of titanium dioxide films; wherein the content of the first and second substances,
the two layers of titanium dioxide films are clamped between the metal platinum motors;
The two titanium dioxide films comprise a non-doped layer and a low-resistance doped layer;
the non-doped layer has high memristance;
the low-resistance doped layer has semiconductor characteristics.
3. The method of image processing based on a dual-mode memristive bridge synaptic electrical circuit of claim 1, wherein the method further comprises:
setting parameters through a simulated annealing algorithm according to the linear memristor bridge synaptic circuit and the nonlinear memristor bridge synaptic circuit;
the setting steps are as follows:
step 1: setting an initial input voltage V by measurement int Temperature T, end temperature T z Maximum number of iterations L per temperature T, interval time T s And a maximum value at which the input voltage changes at each instant, the input voltage being selected at each instant between the initial input voltage and the maximum voltage;
step 2: t = jT, j is the descent rate, j is the element (0, 1), n is the iteration number, the evaluation function of each iteration is obtained,
Figure 749536DEST_PATH_IMAGE016
for each memristor at the current input voltage, the evaluation function is the linear memristor and the nonlinear memristor in time
Figure 656312DEST_PATH_IMAGE017
The memristance difference between;
and step 3: randomly selected within a set voltage range
Figure 545770DEST_PATH_IMAGE017
New input voltage V at a moment in Then calculating the memristance and evaluation function of the nonlinear memristor
Figure 234984DEST_PATH_IMAGE018
And 4, step 4: if it is not
Figure 817275DEST_PATH_IMAGE019
Then
Figure 211348DEST_PATH_IMAGE020
(ii) a Otherwise, n = n +1, and the step 3 is returned;
and 5: if it is
Figure 904497DEST_PATH_IMAGE021
If not, judging whether to accept the voltage according to the probability
Figure 684103DEST_PATH_IMAGE022
Let n = n + 1;
step 6: if it is not
Figure 437296DEST_PATH_IMAGE023
Terminating the algorithm;
and 7: if n is less than L, returning to the step 3;
and 8: if T is<T z The algorithm is terminated, otherwise step 2 is returned.
4. The method of image processing based on a dual-mode memristive bridge synaptic electrical circuit of claim 1, wherein the method further comprises:
acquiring a memristive bridge synaptic circuit;
connecting the memristor bridge synaptic circuit with a switch circuit switched in a dual mode to form an output memristor bridge synaptic circuit with positive and negative pulses; wherein the content of the first and second substances,
the switch circuit for dual-mode switching at least comprises a positive pulse switch interface, a negative pulse switch interface and a pulse conversion control signal interface.
5. The method for processing the image based on the dual-mode memristive bridge-synaptic circuit according to claim 1, wherein a differential pair circuit and a payload circuit are further connected to the dual-mode memristive bridge-synaptic circuit; wherein the content of the first and second substances,
the dual-mode memristive bridge synaptic circuit is used for generating symmetrical positive and negative pulses and simulation weights, and determining an expected template operator through the positive and negative pulses and the simulation weights;
The differential pair circuit comprises a differential amplifier composed of transistors, and is used for being electrically connected with the output side of the dual-mode memristive bridge synapse circuit and converting the output voltage of the dual-mode memristive bridge synapse circuit into current;
the effective load circuit is electrically connected with the output side of the differential pair circuit and converts the current of the differential pair circuit into a voltage signal through a resistance load.
6. The method for processing the image based on the dual-mode memristive bridge synaptic electrical circuit according to claim 1, wherein the neural network of the dual-mode memristive bridge synaptic neural network in combination with the cellular neural network is used for determining the cellular neural network template by means of edge extraction; the cellular neural network template is used for identifying target elements through pixel iteration.
7. The method for processing the image based on the dual-mode memristive bridge synaptic electrical circuit according to claim 6, wherein the dual-mode memristive bridge synaptic electrical network comprises a plurality of dual-mode memristive bridge synaptic electrical circuits, different pulse signals are generated through the plurality of dual-mode memristive bridge synaptic electrical circuits, and a plurality of cell neural network templates are edge-extracted through the different pulse signals.
8. The method as claimed in claim 6, wherein the edge-extracted cellular neural network template is used for performing comparison recognition with features of a target element in an input image to determine the target element.
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