CN113514700A - System impedance checking method based on actual fault information - Google Patents

System impedance checking method based on actual fault information Download PDF

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CN113514700A
CN113514700A CN202110405831.7A CN202110405831A CN113514700A CN 113514700 A CN113514700 A CN 113514700A CN 202110405831 A CN202110405831 A CN 202110405831A CN 113514700 A CN113514700 A CN 113514700A
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罗小春
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    • G01MEASURING; TESTING
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    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
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Abstract

The invention provides a system impedance checking method based on actual fault information, which comprises the following steps: calculating the resistance value and the reactance value of the actual fault position from the bus; obtaining an initial impedance value of the system; calculating a no-load voltage rough value of the bus; calculating a preliminary impedance value of a fault loop according to the rough value of the no-load voltage of the bus and the short-circuit current value during fault; calculating a corrected value of the system impedance according to the type of the actual fault; taking the impedance correction value as an initial value, and calculating the no-load voltage of the bus; utilizing and calculating a theoretical current value of the fault short circuit; an optimum function is constructed with respect to the system impedance value, with the minimum value of the difference from the actual current value of the fault short sought as an objective function. The method and the device perform iterative calculation after each fault to obtain a relatively accurate system impedance value, have good timeliness and accuracy, and provide basic support for subsequent short-circuit current calculation, protection setting, fault positioning and other specific applications.

Description

System impedance checking method based on actual fault information
Technical Field
The invention relates to the technical field of power system relay protection, in particular to a system impedance checking method based on actual fault information.
Background
In a distribution line, the impedance presented from a power supply access point to a power supply side is called the system impedance of a power system, mainly an inductive impedance component, which is formed by superposing generator impedance, line impedance and transformer impedance and is commonly used in the fields of short-circuit capacity calculation, breaker breaking capacity verification, relay protection setting calculation and the like. For a long time, the system impedance in the prior art is generally calculated and provided to an adjacent power grid management mechanism by each power grid management mechanism, or provided to a lower power grid management mechanism from top to bottom, and other requirements such as design houses, users and the like. During calculation, system impedance calculation in a rich mode is generally performed according to parameters of equipment at all levels, such as parameters of a generator, a transformer and a power transmission and distribution line, and according to changes of a power grid operation mode. Because of the numerous parameters involved in calculation, the coordination between each department and each unit is extremely complicated, the ideal accuracy is difficult to achieve, and the updating cannot be carried out in time. Some documents in the art also propose a rough estimation of the system impedance according to the circuit principle based on the electrical parameters of the actual operation of the system, but this calculation method is greatly affected by the electrical transient data, so that the calculation accuracy is not high, and the calculation cannot be updated in time according to the actual conditions of the line.
The method for obtaining the system impedance is difficult to ensure the accuracy and timeliness of the system impedance, and brings great impression to subsequent units or users for use (such as calculation of short-circuit points and the like).
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides a system impedance checking method, which is based on the actual fault information of the system, obtains a relatively accurate system impedance value by performing iterative calculation after each fault occurs, has good timeliness, and provides basic support for subsequent short-circuit current calculation, protection setting, fault positioning and other specific applications.
In order to achieve the technical effect, the invention provides a system impedance checking method based on actual fault information, which comprises the following steps:
s1, calculating a resistance value Rdt and a reactance value Xdt between an actual fault position and a bus;
s2, obtaining an initial impedance value of the system, wherein the initial impedance value comprises an initial resistance value Rs _ raw and an initial reactance value Xs _ raw;
s3, calculating a rough no-load voltage value of the bus according to the bus voltage Ubus and the load current If before the fault and the initial impedance value of the system
Figure BDA0003022240620000011
Wherein,
Figure BDA0003022240620000012
j is an imaginary number;
s4, calculating a preliminary impedance value Zd _ raw of a fault loop according to the rough no-load voltage value Us0 of the bus and the short-circuit current value during fault;
s5, calculating a correction value Zs0 of the system impedance according to the type of the actual fault;
s6, taking the impedance correction value Zs0 as an initial value, and calculating the no-load voltage U0 of the bus; calculating a theoretical current value Id _ theory of the fault short circuit by using the U0 and the Zs 0;
and S7, constructing an optimal function related to the system impedance value by taking the minimum value of the difference between the Id _ theory and the actual current value Id _ fact of the fault short circuit as an objective function.
In some preferred embodiments, the method further comprises the steps of:
s8, after each bus is in fault, checking the system impedance value as Zs0 in the last fault, and repeating the steps S6-S7;
and S9, establishing an optimal function related to the system impedance value by taking the minimum value of the difference between the Id _ theory and the actual current value Id _ fact of the fault short circuit as a first objective function and the minimum value of the difference between the theoretical current value and the actual current value of the historical fault short circuit under the condition of the system impedance value as a second objective function.
In some preferred embodiments, before the step S1, the method further includes the steps of:
and collecting the bus information with faults, wherein the bus information comprises the accurate topological structure, the type and the length of the conducting wire, the actual fault position and the actual fault category of the distribution line.
In some preferred embodiments, the preliminary impedance value Zd _ raw in step S4 is calculated as follows:
respectively calculating the preliminary impedance value Zd _ raw according to the short circuit type of the system;
with respect to the short-circuiting of the two phases,
Figure BDA0003022240620000021
for a three-phase short-circuit,
Figure BDA0003022240620000022
wherein max (Ida, Idb, Idc) is a function seeking the maximum of the three-phase currents;
in some preferred embodiments, the method for calculating the corrected value Zs0 of the system impedance in step S5 includes:
if the actual fault type is a metal fault, the rough value Zs0 of the system impedance is calculated as follows:
Figure BDA0003022240620000023
wherein Φ is 270- (90- δ) - θ, δ is the line impedance angle at the actual fault point, and θ is the phase angle of the initial value of the system impedance;
if the actual fault type is the arc fault, calculating an arc impedance value RF according to the actual current value Id _ fact of the fault short circuit: 1443.57 Larc/Id _ fact, where Larc is the arc length;
the rough value of the system impedance Zs0 is calculated as follows:
Figure BDA0003022240620000031
where Φ is 270- (90- δ ') - θ, δ' is an impedance angle between the line resistance at the actual fault point and the line reactance at the actual fault point after superimposing the arc resistance on the line resistance.
In some preferred embodiments, the method for obtaining the initial impedance value of the system in step S2 includes: provided by a power system management department; or calculated based on system architecture and parameters.
The invention has the beneficial effects that:
based on the actual fault information of the system, the more accurate system impedance value is obtained by performing iterative calculation after each fault occurs, so that the method has good timeliness and accuracy, and provides basic support for subsequent short-circuit current calculation, protection setting, fault positioning and other specific applications; the distribution network operation unit can obtain an accurate system impedance value in a certain operation mode without the support of a front-end power network management department.
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Fig. 1 is a schematic flow chart of a system impedance checking method based on actual fault information according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a method for calculating impedance correction values Zs0 according to one embodiment of the invention;
fig. 3 is a flowchart illustrating an iterative checking method for the impedance correction value Zs0 according to each time the bus fails according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described with reference to the accompanying drawings. In the description of the present invention, it is to be understood that the terms "upper", "lower", "front", "rear", "left", "right", "top", "bottom", "inner", "outer", and the like, indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are merely for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention.
As shown in fig. 1, the present invention provides a system impedance checking method based on actual fault information, which includes the steps of:
and S1, calculating a resistance value Rdt and a reactance value Xdt from the actual fault position to the bus.
And the actual fault position is obtained by the line patrol result of the distribution network line operation and maintenance team on the fault. The calculation of the resistance Rdt and the reactance Xdt is well known in the art and will not be described herein. In some preferred embodiments, before step S1, the method further includes governing and collecting bus bar and fault information, specifically including: and collecting the bus information with faults, wherein the bus information comprises the accurate topological structure, the type and the length of the conducting wire, the actual fault position and the actual fault category of the distribution line. In the actual distribution line, more than one outgoing line corresponding to the bus is arranged, so that the specific outgoing line with a fault can be accurately managed and collected, all outgoing lines contained in the bus can be accurately managed and collected in advance, and after a data set is established and the fault occurs, the data corresponding to the outgoing lines can be searched in the data set.
And S2, obtaining an initial impedance value of the system, wherein the initial impedance value comprises an initial resistance value Rs _ raw and an initial reactance value Xs _ raw.
In some preferred embodiments, the system impedance is generally formed by superposing generator impedance, line impedance and transformer impedance, and in the existing power distribution network management work in China, the system resistance is generally provided by a superior power grid management organization, and when the system resistance is calculated, a plurality of departments and units are required to be matched, and the system impedance calculation in a rich mode is carried out according to the change of the power grid operation mode. However, due to poor timeliness and accuracy, the system impedance obtained for the first time is only used as an initial impedance value in the invention, so that the subsequent further iterative calibration is facilitated.
In other preferred embodiments, the calculation may be performed according to a system structure and parameters, and the specific method may include:
Figure BDA0003022240620000041
wherein,
Figure BDA0003022240620000042
the bus voltage phase difference value at two non-stop moments,
Figure BDA0003022240620000043
is the current phasor difference at the corresponding time instant.
It should be understood that no matter what method of obtaining the system impedance is used, it is not the gist of the present invention, as long as a rough value of the system impedance can be obtained as an initial value of the entire scheme. The method and the accuracy for obtaining the initial value of the system impedance are not further required by the application.
S3, calculating a rough no-load voltage value of the bus according to the bus voltage Ubus and the load current If before the fault and the initial impedance value of the system
Figure BDA0003022240620000044
Wherein,
Figure BDA0003022240620000045
j is an imaginary number; since the initial impedance value of the system at this time is not accurate, only a rough value about the no-load voltage of the bus can be obtained.
And S4, calculating a preliminary impedance value Zd _ raw of the fault loop according to the rough no-load voltage value Us0 of the bus and the short-circuit current value during fault. It is a conventional technical means in the art to calculate the impedance value from the voltage and the current, but because the distribution line has many short circuits, the impedance calculation method in each short circuit situation is not very same, and a person skilled in the art needs to select a corresponding calculation method according to the actual situation. In some preferred embodiments, a specific method for calculating the preliminary impedance value Zd _ raw according to the phase short type is given:
preliminary impedance value for two-phase short circuit type
Figure BDA0003022240620000046
For three-phase short circuit type, preliminary impedance value
Figure BDA0003022240620000047
Where max (Ida, Idb, Idc) is a function of the maximum value of the current in the circuit for which the three phases are sought.
And S5, calculating a corrected value Zs0 of the system impedance according to the type of the actual fault.
Wherein the categories of actual faults mainly include metal faults and arc faults. The system impedance under the two fault types is calculated in different modes, and a specific calculation method needs to be determined by a person skilled in the art by combining actual conditions and theoretical knowledge of the field.
In some preferred embodiments, as shown in fig. 2, another method for calculating a corrected value Zs0 of impedance is provided, which comprises:
if the actual fault type is a metal fault, the rough value Zs0 of the system impedance is calculated as follows:
Figure BDA0003022240620000051
wherein Φ is 270- (90- δ) - θ, δ is the line impedance angle at the actual fault point, and θ is the phase angle of the initial value of the system impedance;
if the actual fault type is the arc fault, calculating an arc impedance value RF according to the actual current value Id _ fact of the fault short circuit: 1443.57 Larc/Id _ fact, where Larc is the arc length;
the rough value of the system impedance Zs0 is calculated as follows:
Figure BDA0003022240620000052
where Φ is 270- (90- δ ') - θ, δ' is an impedance angle between the line resistance at the actual fault point and the line reactance at the actual fault point after superimposing the arc resistance on the line resistance.
In some preferred embodiments, the step of calculating the corrected value Zs0 of the system impedance further includes: and judging whether the impedance value exceeds the limit, if so, ending the process.
S6, taking the impedance correction value Zs0 as an initial value, and calculating the no-load voltage U0 of the bus; and calculating a theoretical current value Id _ theory of the fault short circuit by using the U0 and the Zs 0. It should be understood that the impedance correction value Zs0 at this time is an independent variable with respect to the theoretical current value Id _ theory, and therefore, the error of the impedance correction value Zs0 from the actual impedance value can be obtained by examining the error of the theoretical current value Id _ theory.
And S7, constructing an optimal function related to the system impedance value by taking the minimum value of the difference between the Id _ theory and the actual current value Id _ fact of the fault short circuit as an objective function. The optimal function may adopt other commonly used optimization function solving algorithms such as a gradient descent method, a newton method, a quasi-newton method, a conjugate gradient method, and the like, and a person skilled in the art may autonomously select a specific solving algorithm according to an actual situation, which is not further limited in the present invention. It should be noted that, as described above, since the impedance correction value Zs0 is an independent variable with respect to the theoretical current value Id _ term and the actual current value Id _ fact of the fault short circuit is definite, a more accurate impedance correction value Zs0 can be obtained by analyzing the error value between Id _ term and Id _ fact. In some preferred embodiments, an error determination step may be set, an error threshold is set, a threshold within the threshold range is considered to be normal, and the checking of the system impedance is continued; if the threshold value is exceeded, it indicates that there is an error in the previous step, and an error is reported to the system or the technician.
In other preferred embodiments, as shown in fig. 3, in order to perform an optimized check on the impedance correction value Zs0 and ensure the timeliness of the check result, the system impedance check method further includes the step of performing an iterative check on the impedance correction value Zs0 after each bus fault, including:
and S8, after each bus fault occurs, checking the system impedance value as Zs0 in the last fault, and repeating the steps S6-S7.
And S9, establishing an optimal function related to the system impedance value by taking the minimum value of the difference between the Id _ theory and the actual current value Id _ fact of the fault short circuit as a first objective function and the minimum value of the difference between the theoretical current value and the actual current value of the historical fault short circuit under the condition of the system impedance value as a second objective function. It should be noted that this step S9 is provided for the purpose of: and when the bus fails in a certain set operation mode and an accurate fault position is found, the system impedance can be accurately calibrated again until a certain optimal system impedance value is obtained, and under the optimal system impedance value, the total error of all historical system impedances calculated after all the short-circuit faults occurring before checking is minimum.
Further, the operations of processes described herein can be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The processes described herein (or variations and/or combinations thereof) may be performed under the control of one or more computer systems configured with executable instructions, and may be implemented as code (e.g., executable instructions, one or more computer programs, or one or more applications) collectively executed on one or more processors, by hardware, or combinations thereof. The computer program includes a plurality of instructions executable by one or more processors.
Further, the method may be implemented in any type of computing platform operatively connected to a suitable interface, including but not limited to a personal computer, mini computer, mainframe, workstation, networked or distributed computing environment, separate or integrated computer platform, or in communication with a charged particle tool or other imaging device, and the like. Aspects of the invention may be embodied in machine-readable code stored on a non-transitory storage medium or device, whether removable or integrated into a computing platform, such as a hard disk, optically read and/or write storage medium, RAM, ROM, or the like, such that it may be read by a programmable computer, which when read by the storage medium or device, is operative to configure and operate the computer to perform the procedures described herein. Further, the machine-readable code, or portions thereof, may be transmitted over a wired or wireless network. The invention described herein includes these and other different types of non-transitory computer-readable storage media when such media include instructions or programs that implement the steps described above in conjunction with a microprocessor or other data processor. The invention also includes the computer itself when programmed according to the methods and techniques described herein.
The foregoing shows and describes the general principles, essential features, and advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, which are described in the specification and illustrated only to illustrate the principle of the present invention, but that various changes and modifications may be made therein without departing from the spirit and scope of the present invention, which fall within the scope of the invention as claimed. The scope of the invention is defined by the appended claims and equivalents thereof.

Claims (6)

1. The system impedance checking method based on the actual fault information is characterized by comprising the following steps of:
s1, calculating a resistance value Rdt and a reactance value Xdt between an actual fault position and a bus;
s2, obtaining an initial impedance value of the system, wherein the initial impedance value comprises an initial resistance value Rs _ raw and an initial reactance value Xs _ raw;
s3, calculating a rough no-load voltage value of the bus according to the bus voltage Ubus and the load current If before the fault and the initial impedance value of the system
Figure FDA0003022240610000011
Wherein,
Figure FDA0003022240610000012
j is an imaginary number;
s4, calculating a preliminary impedance value Zd _ raw of a fault loop according to the rough no-load voltage value Us0 of the bus and the short-circuit current value during fault;
s5, calculating a correction value Zs0 of the system impedance according to the type of the actual fault;
s6, taking the impedance correction value Zs0 as an initial value, and calculating the no-load voltage U0 of the bus; calculating a theoretical current value Id _ theory of the fault short circuit by using the U0 and the Zs 0;
and S7, constructing an optimal function related to the system impedance value by taking the minimum value of the difference between the Id _ theory and the actual current value Id _ fact of the fault short circuit as an objective function.
2. The system impedance check method of claim 1, further comprising the steps of:
s8, after each bus is in fault, checking the system impedance value as Zs0 in the last fault, and repeating the steps S6-S7;
and S9, establishing an optimal function related to the system impedance value by taking the minimum value of the difference between the Id _ theory and the actual current value Id _ fact of the fault short circuit as a first objective function and the minimum value of the difference between the theoretical current value and the actual current value of the historical fault short circuit under the condition of the system impedance value as a second objective function.
3. The system impedance checking method according to claim 1, further comprising, before the step S1, the steps of:
and collecting the bus information with faults, wherein the bus information comprises the accurate topological structure, the type and the length of the conducting wire, the actual fault position and the actual fault category of the distribution line.
4. The system impedance checking method according to claim 1, wherein the preliminary impedance value Zd _ raw in step S4 is calculated as follows:
respectively calculating the preliminary impedance value Zd _ raw according to the short circuit type of the system;
with respect to the short-circuiting of the two phases,
Figure FDA0003022240610000013
for a three-phase short-circuit,
Figure FDA0003022240610000014
where max (Ida, Idb, Idc) is a function that seeks the maximum of the three phase currents.
5. The method for checking system impedance of claim 1, wherein the method for calculating the system impedance correction value Zs0 in step S5 includes:
if the actual fault type is a metal fault, the rough value Zs0 of the system impedance is calculated as follows:
Figure FDA0003022240610000021
wherein Φ is 270- (90- δ) - θ, δ is the line impedance angle at the actual fault point, and θ is the phase angle of the initial value of the system impedance;
if the actual fault type is the arc fault, calculating an arc impedance value RF according to the actual current value Id _ fact of the fault short circuit: 1443.57 Larc/Id _ fact, where Larc is the arc length;
the rough value of the system impedance Zs0 is calculated as follows:
Figure FDA0003022240610000022
where Φ is 270- (90- δ ') - θ, δ' is an impedance angle between the line resistance at the actual fault point and the line reactance at the actual fault point after superimposing the arc resistance on the line resistance.
6. The method for checking system impedance of claim 1, wherein the method for obtaining the initial impedance value of the system in step S2 includes: provided by a power system management department; or calculated based on system architecture and parameters.
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Publication number Priority date Publication date Assignee Title
CN114019306A (en) * 2021-11-03 2022-02-08 国网甘肃省电力公司陇南供电公司 Fault positioning method and system for override trip of low-voltage fault of distribution transformer
CN114019306B (en) * 2021-11-03 2024-05-03 国网甘肃省电力公司陇南供电公司 Fault positioning method and system for low-voltage fault override trip of distribution transformer

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