CN113493184A - Silicon gasification chip with porous thermal isolation structure - Google Patents
Silicon gasification chip with porous thermal isolation structure Download PDFInfo
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- CN113493184A CN113493184A CN202110834975.4A CN202110834975A CN113493184A CN 113493184 A CN113493184 A CN 113493184A CN 202110834975 A CN202110834975 A CN 202110834975A CN 113493184 A CN113493184 A CN 113493184A
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- gasification
- silicon substrate
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- thermal isolation
- chip
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- 238000002309 gasification Methods 0.000 title claims abstract description 108
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 79
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 79
- 239000010703 silicon Substances 0.000 title claims abstract description 79
- 238000002955 isolation Methods 0.000 title claims abstract description 42
- 239000000758 substrate Substances 0.000 claims abstract description 54
- 125000004122 cyclic group Chemical group 0.000 claims abstract description 10
- 239000007788 liquid Substances 0.000 abstract description 11
- 238000009413 insulation Methods 0.000 abstract description 6
- 238000005192 partition Methods 0.000 description 11
- 230000000903 blocking effect Effects 0.000 description 10
- 239000000919 ceramic Substances 0.000 description 10
- 230000000694 effects Effects 0.000 description 7
- 238000010438 heat treatment Methods 0.000 description 7
- 238000000889 atomisation Methods 0.000 description 5
- 238000005520 cutting process Methods 0.000 description 5
- 238000003763 carbonization Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 238000013021 overheating Methods 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 238000012546 transfer Methods 0.000 description 4
- 238000004140 cleaning Methods 0.000 description 3
- 238000009688 liquid atomisation Methods 0.000 description 3
- 239000002210 silicon-based material Substances 0.000 description 3
- 239000002184 metal Substances 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 238000001017 electron-beam sputter deposition Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61M—DEVICES FOR INTRODUCING MEDIA INTO, OR ONTO, THE BODY; DEVICES FOR TRANSDUCING BODY MEDIA OR FOR TAKING MEDIA FROM THE BODY; DEVICES FOR PRODUCING OR ENDING SLEEP OR STUPOR
- A61M11/00—Sprayers or atomisers specially adapted for therapeutic purposes
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B1/00—Devices without movable or flexible elements, e.g. microcapillary devices
- B81B1/002—Holes characterised by their shape, in either longitudinal or sectional plane
- B81B1/004—Through-holes, i.e. extending from one face to the other face of the wafer
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2201/00—Specific applications of microelectromechanical systems
- B81B2201/05—Microfluidics
- B81B2201/058—Microfluidics not provided for in B81B2201/051 - B81B2201/054
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- Health & Medical Sciences (AREA)
- Engineering & Computer Science (AREA)
- Heart & Thoracic Surgery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Anesthesiology (AREA)
- Biomedical Technology (AREA)
- Computer Hardware Design (AREA)
- Hematology (AREA)
- Life Sciences & Earth Sciences (AREA)
- Animal Behavior & Ethology (AREA)
- General Health & Medical Sciences (AREA)
- Public Health (AREA)
- Veterinary Medicine (AREA)
- Silicon Compounds (AREA)
Abstract
The invention discloses a silicon gasification chip with a porous thermal isolation structure, which comprises: silicon substrate and plate electrode, the plate electrode sets up on the silicon substrate surface, the plate electrode is the loop configuration, be provided with cyclic annular gasification access structure on the inboard silicon substrate of plate electrode, cyclic annular gasification access structure includes the first bar gasification access unit of a plurality of, be provided with arc gasification access structure on the silicon substrate of plate electrode one relative side, arc gasification access structure sets up in the plate electrode outside, arc gasification access structure includes a plurality of second bar gasification access unit, be provided with a plurality of heat that the array was arranged on the silicon substrate between silicon substrate edge and the arc gasification access structure and cut off the hole. Compared with the prior art, the chip adopting the silicon substrate can uniformly, quickly and energy-saving electrically heat and gasify liquid, the porous heat insulation structure reduces heat transferred to a non-effective working area, the uniformity of a thermal field of the silicon gasification chip is improved, and the power consumption is reduced.
Description
Technical Field
The invention belongs to the field of chips for liquid atomization, and particularly relates to a silicon gasification chip with a porous thermal isolation structure.
Background
Devices for micronization (also called atomization) of medicinal or scented liquids have been widely used in civilian, industrial and medical fields. In the prior art, liquid atomization is mainly carried out on a ceramic atomizer which consists of two parts, namely ceramic and a heating electrode. The bowl-shaped structure is made through high temperature sintering to pottery, and the heating film designs into specific shape and attaches to ceramic surface, and in the course of the work, the heating film forms the fog through evenly generating heat to liquid heating, gives off by ceramic honeycomb hole.
When a ceramic atomizer is processed, uniform ceramic micropores are difficult to manufacture, so that the uniformity of atomized liquid drops is poor, and the problems of local overheating, micropore blockage and incapability of carbonization are easily caused due to the non-uniform size of the ceramic micropores. In addition, in the heating film, the uniformity of the line size of the heating wire is poor, the productivity is low, and the shape of the product is limited.
Disclosure of Invention
The invention aims to: the silicon gasification chip with the porous thermal isolation structure is provided, the silicon substrate is adopted to replace ceramic, uniform and consistent single-diameter through micropores are convenient to process, and the gasification efficiency and the diameter uniformity of gasified liquid drops are improved; the silicon material improves the heat conduction performance and the temperature field uniformity of a working area, solves the problems of local overheating, micropore blockage and incapability of using carbonization, and the through and non-through porous heat insulation structure reduces the heat transferred to a non-effective working area, improves the thermal field uniformity of a silicon gasification chip and reduces the power consumption.
In order to achieve the purpose, the invention adopts the following technical scheme: a silicon gasification chip with porous thermal isolation structure, comprising: silicon substrate and plate electrode, the plate electrode sets up on the silicon substrate surface, the plate electrode is the loop configuration, be provided with cyclic annular gasification access structure on the inboard silicon substrate of plate electrode, cyclic annular gasification access structure includes the first bar gasification access unit of a plurality of, be provided with arc gasification access structure on the silicon substrate of plate electrode one relative side, arc gasification access structure sets up in the plate electrode outside, arc gasification access structure includes a plurality of second bar gasification access unit, be provided with a plurality of heat that the array was arranged on the silicon substrate between silicon substrate edge and the arc gasification access structure and cut off the hole.
As a further description of the above technical solution:
the silicon substrate on the inner side of the annular gasification channel structure is also provided with gasification through holes which are arranged in an array manner.
As a further description of the above technical solution:
the gasification through holes in the two adjacent rows of gasification through holes are arranged in a staggered manner.
As a further description of the above technical solution:
the diameter of the gasification through hole is equal to that of the thermal partition hole.
As a further description of the above technical solution:
the heat isolating holes in two adjacent rows of heat isolating holes are arranged in a staggered mode.
As a further description of the above technical solution:
the thermal isolation holes comprise through thermal isolation holes and non-through thermal isolation holes.
As a further description of the above technical solution:
the through heat isolating holes and the non-through heat isolating holes are arranged at intervals.
As a further description of the above technical solution:
the thickness of the silicon substrate is 100-500 microns.
In summary, due to the adoption of the technical scheme, the invention has the beneficial effects that:
1. according to the invention, a silicon substrate is adopted to replace ceramic, an annular gasification channel structure and an arc-shaped gasification channel structure are respectively arranged on the inner side and the outer side of an electrode plate on the silicon substrate, a plurality of first strip-shaped gasification channel units are combined to form a disconnected annular gasification channel structure, and a plurality of second strip-shaped gasification channel units are combined to form a disconnected arc-shaped gasification channel structure. When the silicon gasification chip works, the electrode plate heats the silicon substrate, the whole silicon substrate is used as an effective working area, the whole substrate base is heated to 150-. The silicon gasification chip can uniformly, quickly and energy-saving electrically heat and gasify liquid, the silicon material improves the heat conduction performance and the temperature field uniformity of a working area, and the problems of local overheating, micropore blockage and incapability of carbonization are solved.
2. According to the invention, the heat isolation holes are arranged at the edge of the silicon substrate and are arranged in an array mode, the heat isolation holes comprise through heat isolation holes and non-through heat isolation holes, and through and non-through porous heat insulation structures, so that on the basis of ensuring the structural strength of a chip, the heat transferred to a non-effective working area is reduced, the uniformity of a thermal field of a silicon gasification chip is improved, and the power consumption is reduced.
3. In the invention, in order to further improve the atomization effect, the silicon substrate on the inner side of the annular gasification channel structure is also provided with gasification through holes which are arranged in an array manner. In addition, the silicon substrate is convenient to process uniform single-diameter through micropores, the diameter of the gasification through hole is equal to that of the thermal partition hole, and the gasification efficiency and the diameter uniformity of the gasified liquid drops are improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
Fig. 1 is a schematic top view of a silicon gasification chip with a porous thermal isolation structure.
Fig. 2 is a sectional view taken along a-a of a silicon gasification chip having a porous thermal isolation structure.
FIG. 3 is a cross-sectional view taken along line B-B of a silicon gasification chip having a porous thermal isolation structure.
Illustration of the drawings:
1. a silicon substrate; 11. a first bar-shaped gasification channel unit; 12. a second strip-shaped gasification channel unit; 13. a gasification through hole; 2. an electrode plate; 3. a thermal cut-off hole; 31. penetrating the heat isolating hole; 32. a non-through thermal cut-off hole.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1-3, the present invention provides a technical solution: the invention adopts the following technical scheme: a silicon gasification chip with porous thermal isolation structure, comprising: silicon substrate 1 and plate electrode 2, plate electrode 2 sets up on silicon substrate 1 surface, plate electrode 2 is the loop configuration, be provided with cyclic annular gasification access structure on the inboard silicon substrate 1 of plate electrode 2, cyclic annular gasification access structure includes the first bar gasification access unit 11 of a plurality of, be provided with arc gasification access structure on the silicon substrate 1 of 2 opposite sides of plate electrode, arc gasification access structure sets up in the plate electrode 2 outside, arc gasification access structure includes a plurality of second bar gasification access unit 12, be provided with a plurality of heat that the array was arranged on the silicon substrate 1 between 1 edge of silicon substrate and the arc gasification access structure and cut off hole 3.
The silicon substrate 1 on the inner side of the annular gasification channel structure is also provided with the gasification through holes 13 which are arranged in an array mode, and the gasification through holes 13 in the two adjacent columns of gasification through holes 13 are arranged in a staggered mode, so that more gasification through holes 13 can be conveniently arranged, and the gasification effect is improved.
The diameter of the gasification through hole 13 is equal to that of the thermal isolation hole 3, the through thermal isolation hole 3 can also be used as a gasification channel, the diameter of the gasification through hole 13 is equal to that of the thermal isolation hole 3, and the diameter uniformity of the gasified liquid drops is better.
The heat partition holes 3 in the two adjacent rows of heat partition holes 3 are arranged in a staggered mode, so that the heat partition holes 3 are arranged more tightly, more heat partition holes 3 are arranged, the transfer area and the heat loss are reduced, and the heat insulation effect is improved.
The heat blocking holes 3 include through heat blocking holes 31 and non-through heat blocking holes 32. The through heat blocking holes 31 and the non-through heat blocking holes 32 have the same heat blocking effect. When the electrode plate heats the silicon substrate, the gas can penetrate through the thermal isolation hole 31 to be diffused, and a liquid atomization passage is increased. The through heat partition holes 31 and the non-through heat partition holes 32 are flexibly arranged according to requirements, and if more through heat partition holes 31 and fewer non-through heat partition holes 32 are arranged, the gasification effect is good and the cost is high; the number of the through heat blocking holes 31 is small, and the number of the non-through heat blocking holes 32 is large, so that the cost is low and the chip strength is high.
The through heat blocking holes 31 and the non-through heat blocking holes 32 are arranged at intervals. The number and the positions of the through heat isolation holes 31 and the non-through heat isolation holes 32 can be flexibly set according to requirements, and the through heat isolation holes 31 and the non-through heat isolation holes 32 are arranged at intervals, so that the gasification effect is more uniform.
The thickness of the silicon substrate 1 is 100-500 μm.
The working principle is as follows: the specific processing steps of the silicon gasification chip are as follows:
1) selecting a silicon substrate with the resistivity of 0.001-10000 omega-cm and the thickness of 100-;
2) growing a 10-1000nm Ti/Au material by adopting an electron beam evaporation or sputtering mode;
3) carrying out photoresist uniformizing photoetching on the material sheet (silicon substrate) on which the metal layer grows;
4) etching the exposed metal completely by using a plasma etching or chemical corrosive liquid mode to finish the processing of the electrode plate;
5) carrying out secondary photoetching on the material sheet of the processed electrode plate, and processing the micro-channel processing through hole (comprising a first strip-shaped gasification channel unit, a second strip-shaped gasification channel unit, a gasification through hole and a thermal isolation hole) by adopting a reactive ion etching method;
6) and removing the redundant photoresist by adopting a chemical cleaning mode combined with an oxygen plasma cleaning mode, and cleaning the material sheet.
The heat generated at a given atomizer power is Q ═ I × R × t, and excessive heat cannot be conducted to the housing edge in order to increase the atomization efficiency. The basic formula for Q heat transfer is: phi is KA Δ t. Heat flux (in W); k: total thermal conductivity in (W/m)2Deg.c); a: the heat transfer area and the contact area are in direct proportion to the heat conduction, so that the heat loss is reduced while the transfer area is reduced, and more atomization effects are generated under the condition of certain voltage and current. Therefore, the through and non-through porous heat insulation structure (heat insulation hole) is designed at the edge of the silicon substrate, and the heating is reduced on the basis of ensuring the structural strength of the chipThe heat generated by the electrode is transferred to a non-effective working area (namely the outside of the silicon substrate), so that the uniformity of a thermal field of the gasification chip is improved, and the power consumption is reduced.
The chip adopts the silicon substrate to replace ceramic, and the electrode plate inside and outside is provided with cyclic annular gasification passageway structure and arc gasification passageway structure respectively on the silicon substrate, and the cyclic annular gasification passageway structure of "disconnection" is formed in the combination of a plurality of first bar gasification passageway unit, and the arc gasification passageway structure of "disconnection" is formed in the combination of a plurality of second bar gasification passageway unit. When the silicon gasification chip works, the electrode plate heats the silicon substrate, the whole silicon substrate is used as an effective working area, the whole substrate base is heated to 150-. The silicon gasification chip can uniformly, quickly and energy-saving electrically heat and gasify liquid, the silicon material improves the heat conduction performance and the temperature field uniformity of a working area, and the problems of local overheating, micropore blockage and incapability of carbonization are solved. The silicon substrate edge sets up, the hot hole of cutting off of array arrangement, and the hot hole of cutting off is including cutting off the hole and the hot hole of cutting off of non-link up of cutting off of lining up, and the porous thermal-insulated structure that link up and non-link up reduces the heat that transmits to non-effective work area on the basis of guaranteeing chip structural strength, promotes the thermal field homogeneity of silicon gasification chip to reduce the consumption. In order to further improve the atomization effect, the silicon substrate on the inner side of the annular gasification channel structure is also provided with gasification through holes which are arranged in an array manner. In addition, the silicon substrate is convenient to process uniform single-diameter through micropores, the diameter of the gasification through hole is equal to that of the thermal partition hole, and the gasification efficiency and the diameter uniformity of the gasified liquid drops are improved.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be considered to be within the technical scope of the present invention, and the technical solutions and the inventive concepts thereof according to the present invention should be equivalent or changed within the scope of the present invention.
Claims (8)
1. A silicon gasification chip having a porous thermal isolation structure, comprising: silicon substrate (1) and electrode board (2), electrode board (2) set up silicon substrate (1) surface, electrode board (2) are the loop configuration, electrode board (2) are inboard be provided with cyclic annular gasification access structure on silicon substrate (1), cyclic annular gasification access structure includes a plurality of first bar gasification access unit (11), electrode board (2) one opposite side be provided with arc gasification access structure on silicon substrate (1), arc gasification access structure sets up the electrode board (2) outside, arc gasification access structure includes a plurality of second bar gasification access unit (12), silicon substrate (1) edge with between the arc gasification access structure be provided with a plurality of heat that the array was arranged on silicon substrate (1) and cut off hole (3).
2. The silicon gasification chip with the porous thermal isolation structure according to claim 1, wherein the silicon substrate (1) inside the annular gasification channel structure is further provided with gasification through holes (13) arranged in an array.
3. Silicon gasification chip with porous thermal isolation structure according to claim 2, characterized in that the gasification through holes (13) in two adjacent columns of gasification through holes (13) are arranged in a staggered manner.
4. Silicon gasification chip with porous thermal isolation structure according to claim 2 or 3, characterized in that the diameter of the gasification through hole (13) is equal to the diameter of the thermal isolation hole (3).
5. The silicon gasification chip with the porous thermal isolation structure according to claim 4, wherein the thermal isolation holes (3) in two adjacent columns of the thermal isolation holes (3) are arranged in a staggered manner.
6. The silicon gasification chip with the porous thermal isolation structure according to claim 5, wherein the thermal isolation holes (3) comprise through thermal isolation holes (31) and non-through thermal isolation holes (32).
7. The silicon gasification chip with the porous thermal isolation structure according to claim 6, wherein the through thermal isolation holes (31) and the non-through thermal isolation holes (32) are arranged at intervals.
8. The silicon gasification chip with porous thermal isolation structure as claimed in claim 1, wherein the thickness of the silicon substrate (1) is 100-500 μm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110834975.4A CN113493184A (en) | 2021-07-23 | 2021-07-23 | Silicon gasification chip with porous thermal isolation structure |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110834975.4A CN113493184A (en) | 2021-07-23 | 2021-07-23 | Silicon gasification chip with porous thermal isolation structure |
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| CN113493184A true CN113493184A (en) | 2021-10-12 |
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| CN202110834975.4A Pending CN113493184A (en) | 2021-07-23 | 2021-07-23 | Silicon gasification chip with porous thermal isolation structure |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114804005A (en) * | 2022-04-25 | 2022-07-29 | 山东工商学院 | MEMS micro-hotplate based on transverse composite dielectric film and manufacturing method |
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| CN108158040A (en) * | 2018-01-03 | 2018-06-15 | 云南中烟工业有限责任公司 | The MEMS electronic cigarettes chip and its manufacturing method of a kind of consistent heat generation |
| CN110025056A (en) * | 2019-05-31 | 2019-07-19 | 合肥微纳传感技术有限公司 | Three-dimensional heating MEMS atomizer for electronic cigarette |
| CN110063529A (en) * | 2019-05-31 | 2019-07-30 | 合肥微纳传感技术有限公司 | Secondary-atomizing device for electronic cigarette |
| CN209376696U (en) * | 2018-11-29 | 2019-09-13 | 深圳市合元科技有限公司 | Electronic smoke atomizer and electronic cigarette comprising the electronic smoke atomizer |
| CN215798499U (en) * | 2021-07-23 | 2022-02-11 | 美满芯盛(杭州)微电子有限公司 | Silicon gasification chip with porous thermal isolation structure |
-
2021
- 2021-07-23 CN CN202110834975.4A patent/CN113493184A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110000986A1 (en) * | 2009-07-03 | 2011-01-06 | Richard Syms | Electrospray Pneumatic Nebuliser Ionisation Source |
| CN108158040A (en) * | 2018-01-03 | 2018-06-15 | 云南中烟工业有限责任公司 | The MEMS electronic cigarettes chip and its manufacturing method of a kind of consistent heat generation |
| CN209376696U (en) * | 2018-11-29 | 2019-09-13 | 深圳市合元科技有限公司 | Electronic smoke atomizer and electronic cigarette comprising the electronic smoke atomizer |
| CN110025056A (en) * | 2019-05-31 | 2019-07-19 | 合肥微纳传感技术有限公司 | Three-dimensional heating MEMS atomizer for electronic cigarette |
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| CN215798499U (en) * | 2021-07-23 | 2022-02-11 | 美满芯盛(杭州)微电子有限公司 | Silicon gasification chip with porous thermal isolation structure |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114804005A (en) * | 2022-04-25 | 2022-07-29 | 山东工商学院 | MEMS micro-hotplate based on transverse composite dielectric film and manufacturing method |
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