CN113485754A - Chip starting method and device and electronic equipment - Google Patents

Chip starting method and device and electronic equipment Download PDF

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Publication number
CN113485754A
CN113485754A CN202110691644.XA CN202110691644A CN113485754A CN 113485754 A CN113485754 A CN 113485754A CN 202110691644 A CN202110691644 A CN 202110691644A CN 113485754 A CN113485754 A CN 113485754A
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Prior art keywords
chip
software program
slave chip
slave
starting
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张燚
罗罡
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New H3C Semiconductor Technology Co Ltd
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New H3C Semiconductor Technology Co Ltd
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Priority to CN202110691644.XA priority Critical patent/CN113485754A/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4405—Initialisation of multiprocessor systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Stored Programmes (AREA)

Abstract

The application provides a chip starting method, a chip starting device and electronic equipment. The chip starting method implemented by the main chip comprises the following steps: when the master chip controls the starting of a target slave chip, configuration information is sent through the SMI bus, wherein the configuration information comprises a chip identification of the target slave chip and configuration data for starting the target slave chip; the master chip sends software program data through the SMI bus, wherein the software program data comprise a chip identification of the target slave chip and a software program mirror image file of the target slave chip; and the master chip sends a starting address through an SMI bus so that the target slave chip executes the starting operation of the slave chip according to the configuration data, the software program image file and the starting address.

Description

Chip starting method and device and electronic equipment
Technical Field
The present disclosure relates to the field of integrated circuit technologies, and in particular, to a chip starting method and apparatus, and an electronic device.
Background
With the development of information technology, the board level integration degree of hardware products is higher and higher, and a plurality of same or different business processing chips are often integrated on one hardware board level. For example, besides the master CPU, a plurality of Network processing chips (NPs) for Network forwarding traffic and a plurality of Switch processing chips (switches) for Network switching traffic are integrated on the hardware board level of the router board.
In order to improve the service processing capability of the product, the specialization degree of the service processing chip is also higher and higher, and the service processing chip is usually only dedicated to service processing, so that other functional modules, such as an NP chip, are configured or not configured as little as possible, and are dedicated to network forwarding services, and the NP chip is generally not configured with functional modules such as start control.
In order to facilitate control management and improve flexibility of functional services, in chip design, a hardware board-level system often exists in a form of mounting and using a master chip and a slave chip. The master chip is generally a master control CPU for controlling and managing the entire board level, and the slave chip is generally a professional processing chip for service processing. In practical application, software of the slave chip is started and handed over to the master chip for control and management in software and hardware design. For example, in a router board card, the start of a plurality of NP chips is controlled and managed by a main chip. Therefore, how to utilize the master chip to activate and control the plurality of slave chips is crucial.
In the prior art, an external memory (such as a hard disk, an SD card, or a flash memory) is generally hung on each slave chip to store a software program corresponding to the slave chip, and after the slave chip is powered on, the slave chip automatically loads the software program from the corresponding external memory to a memory to start up, so that the slave chip starts up the external memory consuming a large amount, which not only increases the hardware cost, but also increases the area of the PCB of the service processing chip due to the multiplied increase of the external memory and complicates the wiring design. In addition, because the software programs are placed in the external memories corresponding to the slave chips one by one, if the software programs have bug bugs, the software programs in the external memories need to be maintained respectively, which results in higher maintenance cost; and the slave chip is started independently and is not controlled by the master chip, so that the slave chip is difficult to control in practical application.
Therefore, how to implement the starting of multiple slave chips based on the master chip without separately hooking external memories is one of the considerable technical problems.
Disclosure of Invention
In view of this, the present application provides a chip starting method, device and electronic apparatus, so as to realize starting of multiple slave chips based on a master chip without separately hooking an external memory.
Specifically, the method is realized through the following technical scheme:
according to a first aspect of the present application, a chip starting method is provided, which is applied to a slave chip, where the slave chip is connected to a master chip through a serial management interface SMI bus, and the slave chip corresponds to a memory space; the method comprises the following steps:
the master chip sends configuration information through the SMI bus, wherein the configuration information comprises chip identification for controlling the started slave chip and configuration data for starting the slave chip;
the slave chip receives software program data sent by the master chip through an SMI bus, wherein the software program data comprises a chip identification for controlling the started slave chip and a software program mirror image file of the slave chip;
the slave chip receives a starting address sent by the master chip through the SMI bus;
if the slave chip confirms that the chip identification of the slave chip is consistent with the configuration information and the chip identification of the slave chip carried in the software program data, writing the configuration data and the software program image file into a memory space corresponding to the slave chip;
and the slave chip executes the starting operation of the slave chip according to the configuration data, the software program image file and the starting address.
According to a second aspect of the present application, a chip starting method is provided, which is applied to a master chip, where the master chip is connected to a plurality of slave chips through a serial management interface SMI bus; the method comprises the following steps:
when the master chip controls the starting of a target slave chip, configuration information is sent through the SMI bus, wherein the configuration information comprises a chip identification of the target slave chip and configuration data for starting the target slave chip;
the master chip sends software program data through the SMI bus, wherein the software program data comprise a chip identification of the target slave chip and a software program mirror image file of the target slave chip;
and the master chip sends a starting address to the target slave chip through the SMI bus so that the target slave chip executes the starting operation of the slave chip according to the configuration data, the software program image file and the starting address.
According to a third aspect of the present application, a chip starting apparatus is provided, where the chip starting apparatus is disposed in a slave chip, the slave chip is connected to a master chip through a serial management interface SMI bus, and the slave chip corresponds to a memory space; the apparatus, comprising:
a receiving module, configured to receive configuration information sent by the master chip through the SMI bus, where the configuration information includes a chip identifier for controlling a started slave chip and configuration data for starting the slave chip;
the receiving module is further configured to receive software program data sent by the master chip through an SMI bus, where the software program data includes a chip identifier for controlling a started slave chip and a software program image file of the slave chip;
the receiving module is further configured to receive a start address sent by the main chip through the SMI bus;
the judging module is used for judging whether the chip identification of the judging module is consistent with the configuration information and the chip identification of the slave chip carried in the software program data;
the writing module is used for writing the configuration data and the software program image file into a memory space corresponding to the slave chip if the judging module confirms that the chip identification of the judging module is consistent with the configuration information and the chip identification of the slave chip carried in the software program data;
and the starting module is used for executing the starting operation of the slave chip according to the configuration data, the software program image file and the starting address.
According to a fourth aspect of the present application, a chip starting apparatus is provided, which is disposed in a master chip, and the master chip is connected to a plurality of slave chips through a serial management interface SMI bus; the apparatus, comprising:
the first sending module is used for sending configuration information through the SMI bus when starting of a target slave chip is controlled, wherein the configuration information comprises a chip identification of the target slave chip and configuration data used for starting the target slave chip;
a second sending module, configured to send software program data over the SMI bus, where the software program data includes a chip identifier of the target slave chip and a software program image file of the target slave chip;
and a third sending module, configured to send a start address to the target slave chip through the SMI bus, so that the target slave chip executes a start operation of the slave chip according to the configuration data, the software program image file, and the start address.
According to a fifth aspect of the present application, there is provided a slave chip comprising a processor and a machine-readable storage medium storing a computer program executable by the processor, the processor being caused by the computer program to perform the method provided by the first aspect of the present application.
According to a sixth aspect of the present application, there is provided a main chip comprising a processor and a machine-readable storage medium storing a computer program executable by the processor, the processor being caused by the computer program to perform the method provided by the second aspect of the present application.
According to a seventh aspect of the present application, an electronic device is provided, which includes a master chip and a plurality of slave chips, wherein the master chip is connected to the plurality of slave chips through a serial management interface SMI bus, and each slave chip corresponds to a memory space, wherein each slave chip is configured to perform the method provided in the first aspect of the present application, and the master chip is configured to perform the method provided in the second aspect of the present application.
The beneficial effects of the embodiment of the application are as follows:
the main chip is connected with each slave chip through an SMI bus, each slave chip corresponds to one memory space, and the main chip sends configuration data, software program data and a starting address to the target slave chip through the SMI bus, so that after the corresponding target slave chip receives the configuration data, the software program data and the starting address, the chip is started according to the starting address and by combining the two data, therefore, the main chip controls the starting of the slave chip, namely, the starting of the slave chip can be realized without an external memory, and the hardware cost of the board card is reduced.
Drawings
Fig. 1 is a schematic flowchart of a chip starting method according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of a service board card provided in the embodiment of the present application;
fig. 3 is a schematic flowchart of another chip starting method provided in an embodiment of the present application;
fig. 4 is a schematic structural diagram of a chip starting apparatus according to an embodiment of the present application;
FIG. 5 is a schematic structural diagram of another chip start-up apparatus provided in the embodiments of the present application;
fig. 6 is a schematic diagram of a hardware structure of a chip implementing the chip starting method provided in this embodiment.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with aspects such as the present application.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in this application, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the corresponding listed items.
It is to be understood that although the terms first, second, third, etc. may be used herein to describe various information, such information should not be limited to these terms. These terms are only used to distinguish one type of information from another. For example, first information may also be referred to as second information, and similarly, second information may also be referred to as first information, without departing from the scope of the present application. The word "if" as used herein may be interpreted as "at … …" or "when … …" or "in response to a determination", depending on the context.
The chip start-up method provided by the present application is explained in detail below.
Referring to fig. 1, fig. 1 is a flowchart of a chip starting method provided by the present application, where the method may be applied to a master chip, the master chip is disposed in a service board, the service board further includes a plurality of slave chips, and referring to fig. 2, the master chip is connected to the plurality of slave chips through a serial management interface SMI bus, that is, the master chip and the slave chips are connected in series, and all the slave chips and the master chip are connected in series on the SMI bus. In order to control the starting of the Slave chip by the Master chip, the software program image file of the Slave chip is stored by using a memory space pre-configured for each Slave chip, that is, each Slave chip corresponds to one memory space (not shown in fig. 2), because the Master chip and the Slave chip are connected through an SMI bus, the Master chip is used for providing an SMI bus clock as an SMI Master, and the Slave chip receives the control of the Master chip as an SMI Slave. A master chip and all slave chips are connected in an articulated mode through an SMI bus, the master chip manages the starting process of the slave chips through the SMI bus, and the problems that the slave chips are difficult to start and manage in a business board card with one master and multiple slaves (one master chip and multiple slave chips) and the consumable material is large are solved.
It should be noted that the Memory space may include, but is not limited to, a Memory of the chip itself (e.g., Static Random-Access Memory (SRAM)), a Double Data Rate Dynamic Random Access Memory (DDR SDRAM) externally hung outside the chip, and the like.
On this basis, when the main chip implements the chip starting method, the method may include the following steps:
s101, the master chip sends configuration information through an SMI bus when the control target slave chip is started.
The configuration information includes a chip identification of the target slave chip and configuration data for starting the target slave chip.
Specifically, according to the IEEE802.3 protocol in the SMI protocol specification, each slave chip is configured with a chip identifier. In practical application, the chip identifier may be an SMI ID, the SMI ID of the slave chip is determined by hardware board level design, the master chip starts or controls the slave chip by initiating an SMI access, and since each slave chip is connected to the SMI bus, the master chip carries the chip identifier in data when sending data to the target slave chip through the SMI bus, so that the target slave chip confirms that the data is sent to itself.
Based on the principle, when the master chip controls the starting of the target slave chip, the master chip carries the chip identification of the target slave chip in the configuration data. And then carrying configuration data for starting the slave chip in the configuration information and sending the configuration data to the outside through an SMI bus. Since all the slave chips are hung on the SMI bus, each slave chip can receive the configuration information, but only the slave chip corresponding to the chip identifier carried in the configuration information is the target slave chip, the subsequent starting operation is executed, and the other slave chips directly discard the received configuration information.
It should be noted that the services handled by different slave chips may be the same or different, and therefore, the configuration data and software programs required for starting up the slave chips are different. Based on the principle, when the control target slave chip is started, the configuration information carries the configuration data corresponding to the target slave chip.
It should be noted that, in general, the target slave chip may be selected in order for the master chip according to the actual requirements of the service. For example, the master chip may start the corresponding slave chips according to the execution sequence of each service, for example, the slave chip corresponding to the first service may start to execute a chip start-up process, and then the slave chip corresponding to the first service is taken as a target slave chip.
Optionally, before the master chip controls the starting of the target slave chip, the following process may be further included: the master chip scans to the target slave chip.
Specifically, the master chip performs a scan operation before starting the target slave chip, and when the target slave chip is scanned to indicate that the target slave chip is online and ready, the master chip sends configuration information to the target slave chip. And when the target slave chip is not scanned, the target slave chip is indicated to be not on line, and at the moment, even if the configuration information is sent, the target slave chip cannot receive the configuration information, so that when the target slave chip is not scanned, the configuration information cannot be sent to the target slave chip.
In addition, when the master chip performs the scanning operation on the target slave chip, the following process may be performed: the main chip sends a detection message through the SMI bus, the detection message carries a chip identifier of a target slave chip, when each slave chip receives the detection message, the chip identifier is analyzed from the detection message, if the analyzed chip identifier is consistent with the chip identifier of the slave chip, the slave chip is indicated to be the target slave chip, a detection response message is sent to the main chip through the SMI bus, and after the main chip receives the detection response message, the main chip indicates that the target slave chip is successfully scanned. If the analyzed chip identification is inconsistent with the chip identification of the slave chip, the slave chip is indicated to be not the target slave chip, the detection response message is not sent to the master chip, and if the master chip cannot receive the detection response message, the master chip confirms that the target slave chip is not scanned.
When the target slave chip is not scanned, the master chip can continue to scan the next slave chip, and then the next slave chip is taken as the target slave chip, and the operations are repeatedly executed.
Optionally, based on any one of the above embodiments, the chip starting method provided in this embodiment further includes: and after the main chip is successfully powered on, executing initialization operation.
Specifically, the initialization operation may include, but is not limited to, basic hardware initialization and SMI hardware initialization. Specifically, after the main chip is powered on, the main chip sequentially initializes its own basic hardware and also initializes its own SMI hardware. The master chip may then enable the SMI bus to control the booting of the slave chip. When the main chip SMI is initialized, basic parameters of the SMI bus, such as configuration frequency, scanning parameters and the like, are mainly configured.
And S102, the main chip sends software program data through the SMI bus.
The software program data comprises a chip identification of the target slave chip and a software program image file of the target slave chip.
In this step, after the master chip sends the configuration data to the target slave chip, the master chip may send the software program image file to the target slave chip, so that the target slave chip executes the software program after receiving the software program image file and starting the software program. Since the software programs corresponding to different slave chips are generally different, and the software programs corresponding to the same type of slave chips may be the same or different. Therefore, when the software program data is sent to the target slave chip, the chip identification of the target slave chip and the software program image file corresponding to the target slave chip are carried in the software program data.
S103, the master chip sends a starting address to the target slave chip through the SMI bus so that the target slave chip executes the starting operation of the slave chip according to the configuration data, the software program image file and the starting address.
In this step, after the configuration information and the software program data are sent to the target slave chip, in order to implement the starting of the target slave chip, the master chip sends a starting address to the target slave chip, so that after the slave chip receives the starting address, the starting operation of the target slave chip is executed from the starting address, and during the starting operation, the configuration information may be read or the software program image file may be called, and when the two data are needed, the starting operation of the target slave chip is executed based on the two data.
Specifically, since the software program data is sent by the master chip to the SMI bus, and all the slave chips are hooked on the SMI bus, each slave chip receives the software program data, each slave chip analyzes the chip identifier of the target slave chip from the software program data, and when the chip identifier of the analyzed target slave chip is consistent with the chip identifier of the slave chip, the slave chip is indicated as the target slave chip, so that the slave chip stores the software program image file in the software program data and then executes the start operation. And when the chip identification of the analyzed target slave chip is inconsistent with the chip identification of the slave chip, discarding the software program data.
It should be noted that, in this embodiment, the software program of each slave chip is maintained in the master chip, the software program is updated, the master chip senses the update operation, when the master chip finds that the software program of a certain slave chip (for convenience of description, the slave chip corresponding to the updated software program is taken as an example of a target slave chip), the updated software program data is generated based on the software program image file of the updated software program and the chip identifier of the target slave chip, and then the updated software program is sent to the outside through the SMI bus. That is, the software program image file included in the software program data in step S102 is the software program image file corresponding to the updated software program. Thus, after the target receives the updated software program updating data from the chip, the starting operation of the chip can be executed based on the updated software program image file. Therefore, the remote updating of the software program of the slave chip is realized, the operation is convenient and fast, the updating and maintenance cost of the software program is effectively saved, and the problems of difficulty in updating and high maintenance cost of the firmware of the slave chip are solved.
It should be noted that step S101 and step S102 may be executed simultaneously, or step S101 may be executed first, and then step S102 may be executed.
It should be noted that the configuration data, the software program and other related files may be stored in the memory space of the main chip in advance, or may be stored in a storage device externally connected to the main chip in advance, which may be determined according to actual situations. And then when the slave chip is started, reading the configuration data and the software program from the memory space of the master chip or an external storage device, and then sending the configuration data and the software program to the slave chip.
By implementing the chip starting method provided by the application, the master chip is connected with each slave chip through the SMI bus, each slave chip corresponds to one memory space (such as SRAM in the chip or DDR externally hung outside the chip), the master chip sends configuration data, software program data and a starting address to the target slave chip through the SMI bus, so that after the corresponding target slave chip receives the configuration data, the software program data and the starting address, the starting process of the slave chip is started based on the starting address, and then the slave chip is started by combining the two data, so that the master chip controls the starting of the slave chip, that is, the slave chip can be started without an external memory (a hard disk, an SD card or a flash memory), and the hardware cost of the board card is reduced.
Based on the same inventive concept, this embodiment further provides a chip starting method, where the method is applied to each Slave chip in the service board shown in fig. 2, each Slave chip is connected to the master chip through an SMI bus, each Slave chip corresponds to one memory space, the Slave chip serves as an SMI Slave to support IEEE802.3 protocol clause 22 and clause 45, and to support access to the memory space through the SMI bus. When the chip start-up procedure is implemented by each slave chip, the procedure shown in fig. 3 may be implemented, including the following steps:
s301, the slave chip receives configuration information sent by the master chip through the SMI bus, wherein the configuration information comprises chip identification for controlling the started slave chip and configuration data for starting the slave chip.
In this step, after the slave chip receives the configuration information, the chip identifier of the slave chip, which is to be controlled and started by the master chip, may be analyzed from the configuration information.
S302, the slave chip receives software program data sent by the master chip through the SMI bus, wherein the software program data comprises a chip identification and a software program mirror image file of the slave chip which controls starting.
In this step, after the slave chip receives the software program data through the SMI bus, the slave chip can analyze the chip identifier of the slave chip, which is controlled to be started by the master chip, from the software program data, and simultaneously analyze the software program data of the slave chip.
And S303, the slave chip receives a starting address sent by the master chip through the SMI bus.
In this step, the start address is used to control the start of the slave chip, and the slave chip stores the start address after receiving the start address, so as to prepare for the start of the slave chip.
And S304, if the slave chip confirms that the chip identification of the slave chip is consistent with the configuration information and the chip identification of the slave chip carried in the software program data, writing the configuration data and the software program image file into a memory space corresponding to the slave chip.
In this step, when the master chip sends the configuration information and the software program data at the same time, the slave chip may simultaneously determine whether the chip identifier of the slave chip is consistent with the chip identifier carried in the configuration information and the chip identifier carried in the software program data, and when the chip identifiers are consistent with each other, extract the configuration data from the configuration information, extract the software program image file from the software program data, and then write the extracted configuration data and software program image file into the memory space corresponding to the slave chip. When the chip identification of the chip is inconsistent with the chip identification in the configuration information, discarding the configuration information; and when the chip identification of the software program data is inconsistent with the chip identification in the software program data, discarding the software program data.
In addition, when the slave chip receives the configuration information first, the slave chip can extract the chip identifier from the configuration information first, then the slave chip can judge whether the chip identifier of the slave chip is consistent with the extracted chip identifier, if so, the configuration data is extracted from the configuration information, and then the extracted configuration data is written into the memory space corresponding to the slave chip; if not, the configuration information is discarded. Then, after the slave chip receives the software program data, the slave chip can extract the chip identifier from the software program data, then the slave chip can judge whether the chip identifier of the slave chip is consistent with the extracted chip identifier, if so, the software program image file is extracted from the software program data, and then the extracted software program image file is written into the memory space corresponding to the slave chip; if not, the software program data is discarded.
It should be noted that, in the present application, the number of software programs that need to be executed after the slave chip is powered on is relatively large, that is, there may be a plurality of software programs of the slave chip, and therefore, there may also be a plurality of software program image files for starting the slave chip.
S305, the slave chip executes the starting operation of the slave chip according to the configuration data, the software program image file and the starting address.
In this step, after the slave chip executes step S304, the configuration data may be extracted from the memory space to perform the basic configuration required for enabling the slave chip, and after the configuration is successful, the start address is read from the memory space, and then the start address is used to call the software program image file to perform the start operation of the slave chip, thereby implementing the start of the slave chip under the control of the master chip, that is, the controllable start of the slave chip, and without the participation of an external memory, and greatly saving the hardware cost and the hardware area.
It should be noted that the configuration data in this embodiment is basic configuration data for starting from the chip, and the configuration data may be, but is not limited to, a clock, starting and shutting down of several functions, and the like.
Optionally, the configuration information further includes a first storage address of the configuration data in the memory space corresponding to the slave chip, and the software program data further includes a second storage address of the software program image file in the memory space corresponding to the slave chip; on this basis, step S304 may be performed according to the following procedure: writing the configuration data into a corresponding position in a memory space corresponding to a slave chip according to the first storage address; and writing the software program image file into a corresponding position in a memory space corresponding to the slave chip according to the second storage address.
It should be noted that, in the present application, there may be a plurality of configuration information and software programs for starting the slave chip, and therefore, there may be a plurality of configuration data, first storage addresses, software program image files, and second storage addresses for starting the slave chip, but the configuration data corresponds to the first storage addresses one to one, and similarly, the software program image files correspond to the second storage addresses one to one, and the present application does not limit the number of the configuration data and the first storage addresses, and similarly, the present application does not limit the number of the software program image files and the second storage addresses, and may be determined specifically according to an actual situation.
Specifically, in practical applications, the location for storing the configuration data in the memory space is fixed, and therefore, the master chip may carry the first storage address of the configuration data in the memory space in the configuration information, and send the configuration information to the slave chip together. In this way, the slave chip receives the configuration information, and can parse the first storage address from the configuration information, and then write the configuration data to the location corresponding to the first storage address in the memory space corresponding to the slave chip. Accordingly, the second storage address of the software program image file is also the address of the software program image file in the memory space, so that the software program image file can be written into the memory space corresponding to the slave chip at the position corresponding to the second storage address based on the second storage address. Optionally, when there are a plurality of software program image files, there are a plurality of second storage addresses, and the second storage addresses correspond to the software program image files one to one, and based on each second storage address, the software program image file corresponding to the second storage address may be written to a location corresponding to the second storage address in the memory space corresponding to the slave chip.
It should be noted that the start address and the second storage address may be the same or different, and when the start address is different from the second storage address, the start address is also determined according to the second storage address.
Further, step S305 may be performed according to the following procedure: starting to execute starting operation by the slave chip according to the starting address; in the starting operation process, when the configuration data needs to be accessed, reading the configuration data according to the first storage address; and calling the software program image file according to the starting address to execute the starting operation of the slave chip.
Specifically, after the slave chip writes the configuration data and the software program image file into the corresponding position of the memory space, when the slave chip executes the chip start, the configuration data can be read from the memory space based on the first storage address, and then the basic functions such as the clock of the slave chip are configured according to the configuration data. And then reading the software program image file from the memory space according to the second storage address, and executing the software program image file to finish the starting of the slave chip.
Optionally, the memory space in this embodiment includes a register and a memory area, and the first storage address is a register address of the register to which the configuration data is to be written; the second storage address is an address of the software program image file in the memory area.
On this basis, the slave chip may perform the following process to write the configuration data into the corresponding position in the memory space corresponding to the slave chip according to the first storage address: and the slave chip writes the configuration data into the corresponding register according to the register address.
Specifically, the configuration data may be written into the register corresponding to the register address in the on-chip memory control corresponding to the slave chip based on the register address. It should be noted that the register corresponding to the register address is a register dedicated to storing configuration data.
On the basis, the slave chip can write the software program image file into the corresponding position in the memory space corresponding to the slave chip according to the second storage address according to the following processes: and the slave chip writes the software program image file into the memory area according to the second storage address.
Specifically, when the second storage address is an address of the memory area, the software program image file is written into a position corresponding to the second storage address in the memory area.
Further, the chip starting method provided by this embodiment further includes: and the slave chip writes the starting address into a corresponding target register of the slave chip.
On the basis, the slave chip can read the configuration data according to the first storage address and call the software program image file according to the second storage address to execute the starting operation of the slave chip according to the following processes: and the slave chip reads the starting address from the target register to start executing the starting operation of the slave chip, reads the configuration data from the register corresponding to the register address in the starting operation process, configures the slave chip, and calls the software program image file from the memory area according to the second storage address to execute the configured starting operation of the slave chip. Thereby, the starting of the control slave chip is realized under the condition of no external memory.
Optionally, the software program image file included in the software program data is a software program image file corresponding to the updated software program; similarly, when the software program data includes the second storage address, the second storage address included in the software program data at this time is the second storage address of the updated software program image file.
Specifically, when the master chip determines that the software program is updated, the software program image file and the second storage address corresponding to the updated software program may be carried in the software program data, that is, the updated software program image file and the updated second storage address are carried in the software program data and sent to the slave chip. Therefore, after the slave chip receives the updated software program image file and the updated second storage address, the slave chip can be started according to the updated second storage address and the updated software program image file. Therefore, remote upgrading and updating of the software of the slave chip are more convenient, and the maintenance cost is reduced.
In addition, the Slave chip realizes the complete SMI Slave function, can be used for a debugging interface of the master chip to the Slave chip, accesses a register and a memory area of the Slave chip through an SMI bus, and enriches the debugging function of the Slave chip.
Based on the same inventive concept, the application also provides a chip starting device corresponding to the chip starting method implemented by the main chip side. The chip starting device can be implemented by referring to the description of the main chip on the chip starting method, and is not discussed one by one here.
Referring to fig. 4, fig. 4 is a chip starting apparatus provided in an exemplary embodiment of the present application, and the chip starting apparatus is disposed in a master chip, and the master chip is connected to a plurality of slave chips through a serial management interface SMI bus; an apparatus, comprising:
a first sending module 401, configured to send configuration information through the SMI bus when controlling the starting of the target slave chip, where the configuration information includes a chip identifier of the target slave chip and configuration data for starting the target slave chip;
a second sending module 402, configured to send software program data via the SMI bus, where the software program data includes a chip identifier of the target slave chip and a software program image file of the target slave chip;
a third sending module 403, configured to send a start address to the target slave chip through the SMI bus, so that the target slave chip executes a start operation of the slave chip according to the configuration data, the software program image file, and the start address.
Optionally, the software program image file included in the software program data is a software program image file corresponding to the updated software program.
Optionally, the configuration information further includes a first storage address of the configuration data in the memory space;
optionally, the software program data further includes a second storage address of the software program image file in the memory space;
by implementing the chip starting device provided by this embodiment, the master chip is connected to each slave chip through the SMI bus, and each slave chip corresponds to one memory space, and the master chip sends the configuration data, the software program data and the starting address to the target slave chip through the SMI bus, so that after the corresponding target slave chip receives the configuration data, the software program data and the starting address, the chip is started according to the starting address and by combining the two data, thereby realizing that the master chip controls the starting of the slave chip, that is, the starting of the slave chip can be realized without an external memory, and the hardware cost of the board card is reduced.
Based on the same inventive concept, the application also provides a chip starting device corresponding to the chip starting method implemented from the chip side. The chip starting device can be implemented by referring to the description of the chip starting method from the chip, and is not discussed one by one here.
Referring to fig. 5, fig. 5 is a chip starting apparatus provided in an exemplary embodiment of the present application, where the chip starting apparatus is disposed in a slave chip, the slave chip is connected to a master chip through a serial management interface SMI bus, and the slave chip corresponds to a memory space; an apparatus, comprising:
a receiving module 501, configured to receive configuration information sent by a master chip through an SMI bus, where the configuration information includes a chip identifier for controlling a started slave chip and configuration data for starting the slave chip;
the receiving module 501 is further configured to receive software program data sent by the master chip through the SMI bus, where the software program data includes a chip identifier for controlling a started slave chip and a software program image file;
a receiving module 501, configured to receive a start address sent by the master chip through the SMI bus;
a judging module 502, configured to judge whether a chip identifier of the slave chip is consistent with the chip identifier of the slave chip carried in the configuration information and the software program data;
a writing module 503, configured to, if the determining module 502 determines that the chip identifier of the determining module is consistent with the configuration information and the chip identifier of the slave chip carried in the software program data, configure the data and the software program image file;
and the starting module 504 is used for executing the starting operation of the slave chip according to the configuration data, the software program image file and the starting address.
Optionally, the configuration information further includes a first storage address of the configuration data in a memory space corresponding to the slave chip; the software program data also comprises a second storage address of the software program image file in a memory space corresponding to the slave chip; then
The writing module 503 is specifically configured to write the configuration data into a corresponding position in a memory space corresponding to the slave chip according to the first storage address; writing the software program image file into a corresponding position in a memory space corresponding to the slave chip according to the second storage address;
optionally, the memory space includes a register and a memory area, and the first storage address is a register address of the register to which the configuration data is to be written; the second storage address is the address of the software program mirror image file in the memory area; then
The writing module 503 is specifically configured to write the configuration data into the corresponding register according to the register address;
the writing module 503 is further configured to write the software program image file into the memory area according to the second storage address.
Optionally, the writing module 503 is further configured to write the start address into a target register corresponding to the slave chip.
Optionally, the software program image file included in the software program data is a software program image file corresponding to the updated software program.
By implementing the chip starting device provided by this embodiment, the master chip is connected to each slave chip through the SMI bus, and each slave chip corresponds to one memory space, and the master chip sends the configuration data, the software program data and the starting address to the target slave chip through the SMI bus, so that after the corresponding target slave chip receives the configuration data, the software program data and the starting address, the chip is started according to the starting address and by combining the two data, thereby realizing that the master chip controls the starting of the slave chip, that is, the starting of the slave chip can be realized without an external memory, and the hardware cost of the board card is reduced.
Based on the same inventive concept, an embodiment of the present application provides an electronic device, where the electronic device includes a master chip and a plurality of slave chips, the master chip is connected to the plurality of slave chips through a serial management interface SMI bus, and each slave chip corresponds to one memory space, where each slave chip is configured to execute a chip starting method provided by the slave chip in any of the above embodiments of the present application, and the master chip is configured to execute the chip starting method provided by the master chip in any of the above embodiments of the present application. Optionally, the electronic device may include, but is not limited to, a service board card shown in fig. 2.
Based on the same inventive concept, the embodiment of the present application provides a chip, which may be the master chip or the slave chip. As shown in fig. 6, the chip includes a processor 601 and a machine-readable storage medium 602, where the machine-readable storage medium 602 stores a computer program capable of being executed by the processor 601, and the processor 601 is caused by the computer program to execute the chip starting method provided in any embodiment of the present application. In addition, the electronic device further comprises a communication interface 603 and a communication bus 604, wherein the processor 601, the communication interface 603 and the machine-readable storage medium 602 are in communication with each other via the communication bus 604.
The machine-readable storage medium 602 includes a memory space.
The communication bus mentioned above can be a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, or the like. The communication bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, only one thick line is shown, but this does not mean that there is only one bus or one type of bus.
The communication interface is used for communication between the chip and other equipment.
When the machine-readable storage medium includes a Memory space, the Memory space may be a Random Access Memory (RAM) or may include a DDR SRAM (Double Data Rate Dynamic Random Access Memory).
The Processor may be a general-purpose Processor, including a Central Processing Unit (CPU), a Network Processor (NP), and the like; but also Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components.
In addition, the present application provides a machine-readable storage medium, which stores a computer program, and when the computer program is called and executed by a processor, the computer program causes the processor to execute the chip starting method on the master chip side (when the chip is the master chip) provided in any embodiment of the present application, or execute the chip starting method on the slave chip side (when the chip is the slave chip) provided in any embodiment of the present application.
For the chip and the machine-readable storage medium embodiment, since the contents of the related method are substantially similar to those of the foregoing method embodiment, the description is relatively simple, and for the relevant points, reference may be made to the partial description of the method embodiment.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The implementation process of the functions and actions of each unit/module in the above device is specifically described in the implementation process of the corresponding step in the above method, and is not described herein again.
For the device embodiments, since they substantially correspond to the method embodiments, reference may be made to the partial description of the method embodiments for relevant points. The above-described embodiments of the apparatus are merely illustrative, wherein units/modules illustrated as separate components may or may not be physically separate, and components shown as units/modules may or may not be physical units/modules, may be located in one place, or may be distributed over a plurality of network units/modules. Some or all of the units/modules can be selected according to actual needs to achieve the purpose of the scheme of the application. One of ordinary skill in the art can understand and implement it without inventive effort.
The present invention is not intended to be limited to the particular embodiments shown and described, but is to be accorded the widest scope consistent with the principles and novel features herein disclosed.

Claims (12)

1. A chip starting method is characterized in that the chip starting method is applied to a slave chip, the slave chip is connected with a main chip through a serial management interface SMI bus, and the slave chip corresponds to a memory space; the method comprises the following steps:
receiving configuration information sent by the master chip through the SMI bus by the slave chip, wherein the configuration information comprises a chip identification for controlling the started slave chip and configuration data for starting the slave chip;
the slave chip receives software program data sent by the master chip through an SMI bus, wherein the software program data comprises a chip identification for controlling the started slave chip and a software program mirror image file of the slave chip;
the slave chip receives a starting address sent by the master chip through the SMI bus;
if the slave chip confirms that the chip identification of the slave chip is consistent with the configuration information and the chip identification of the slave chip carried in the software program data, writing the configuration data and the software program image file into a memory space corresponding to the slave chip;
and the slave chip executes the starting operation of the slave chip according to the configuration data, the software program image file and the starting address.
2. The method according to claim 1, wherein the configuration information further includes a first storage address of the configuration data in the memory space corresponding to the slave chip; the software program data also comprises a second storage address of the software program image file in a memory space corresponding to the slave chip; then
Writing the configuration data and the software program image file into a memory space corresponding to the slave chip, including:
writing the configuration data into a corresponding position in a memory space corresponding to the slave chip according to the first storage address;
and writing the software program image file into a corresponding position in a memory space corresponding to the slave chip according to the second storage address.
3. The method of claim 2, wherein the memory space includes registers and memory regions, and the first storage address is a register address of a register to which the configuration data is to be written; the second storage address is the address of the software program image file in the memory area;
writing the configuration data to a corresponding position in a memory space corresponding to the slave chip according to the first storage address, including:
the slave chip writes the configuration data into a corresponding register according to the register address;
the slave chip writes the software program image file into a corresponding position in a memory space corresponding to the slave chip according to the second storage address, including:
and the slave chip writes the software program image file into the memory area according to the second storage address.
4. The method of claim 1, further comprising:
and the slave chip writes the starting address into a target register corresponding to the slave chip.
5. The method according to claim 2, wherein the software program data includes a software program image file corresponding to the updated software program, and the second storage address includes a storage address of the updated software program image file in the memory space corresponding to the slave chip.
6. The chip starting method is applied to a main chip, wherein the main chip is connected with a plurality of slave chips through a serial management interface SMI bus; the method comprises the following steps:
when the master chip controls the starting of a target slave chip, configuration information is sent through the SMI bus, wherein the configuration information comprises a chip identification of the target slave chip and configuration data for starting the target slave chip;
the master chip sends software program data through the SMI bus, wherein the software program data comprise a chip identification of the target slave chip and a software program mirror image file of the target slave chip;
and the master chip sends a starting address to the target slave chip through the SMI bus so that the target slave chip executes the starting operation of the slave chip according to the configuration data, the software program image file and the starting address.
7. The method according to claim 6, wherein the software program data comprises a software program image file corresponding to the updated software program.
8. A chip starting device is characterized in that the chip starting device is arranged in a slave chip, the slave chip is connected with a main chip through a serial management interface SMI bus, and the slave chip corresponds to a memory space; the apparatus, comprising:
a receiving module, configured to receive configuration information sent by the master chip through the SMI bus, where the configuration information includes a chip identifier for controlling a started slave chip and configuration data for starting the slave chip;
the receiving module is further configured to receive software program data sent by the master chip through an SMI bus, where the software program data includes a chip identifier for controlling a started slave chip and a software program image file of the slave chip;
the receiving module is further configured to receive a start address sent by the main chip through the SMI bus;
the judging module is used for judging whether the chip identification of the judging module is consistent with the configuration information and the chip identification of the slave chip carried in the software program data;
the writing module is used for writing the configuration data and the software program image file into a memory space corresponding to the slave chip if the judging module confirms that the chip identification of the judging module is consistent with the configuration information and the chip identification of the slave chip carried in the software program data;
and the starting module is used for executing the starting operation of the slave chip according to the configuration data, the software program image file and the starting address.
9. The chip starting device is characterized by being arranged in a main chip, wherein the main chip is connected with a plurality of slave chips through a serial management interface SMI bus; the apparatus, comprising:
the first sending module is used for sending configuration information through the SMI bus when starting of a target slave chip is controlled, wherein the configuration information comprises a chip identification of the target slave chip and configuration data used for starting the target slave chip;
a second sending module, configured to send software program data over the SMI bus, where the software program data includes a chip identifier of the target slave chip and a software program image file of the target slave chip;
and a third sending module, configured to send a start address to the target slave chip through the SMI bus, so that the target slave chip executes a start operation of the slave chip according to the configuration data, the software program image file, and the start address.
10. A slave chip, characterized in that the slave chip comprises a processor and a machine-readable storage medium storing a computer program executable by the processor, the processor being caused by the computer program to perform the method of any of claims 1 to 5.
11. A master chip, characterized in that the master chip comprises a processor and a machine-readable storage medium storing a computer program executable by the processor, the processor being caused by the computer program to perform the method of claim 6 or 7.
12. An electronic device, comprising a master chip and a plurality of slave chips, wherein the master chip is connected to the plurality of slave chips through a serial management interface SMI bus, and each slave chip corresponds to a memory space, wherein each slave chip is configured to perform the method according to any one of claims 1 to 5, and the master chip is configured to perform the method according to claim 6 or 7.
CN202110691644.XA 2021-06-22 2021-06-22 Chip starting method and device and electronic equipment Pending CN113485754A (en)

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