CN113467593B

CN113467593B - Power failure storage circuit and method of automobile controller

Info

Publication number: CN113467593B
Application number: CN202110634742.XA
Authority: CN
Inventors: 刘俊福
Original assignee: Dongfeng Motor Group Co Ltd
Current assignee: Dongfeng Motor Group Co Ltd
Priority date: 2021-06-08
Filing date: 2021-06-08
Publication date: 2022-04-15
Anticipated expiration: 2041-06-08
Also published as: CN113467593A

Abstract

The invention provides a power-down storage circuit and a power-down storage method of an automobile controller, wherein two MCUs are used, when a user turns off an engine or a system is powered down due to accidental circuit break, an auxiliary MCU turns off a three-stage power supply to disconnect the connection with an electric energy storage module, and the electric energy storage module only supplies power to a main MCU and a data storage module, so that the power-down time of the system is prolonged, mass data can be conveniently stored by the MCU, and the function of preventing data loss is realized. The invention adopts the booster circuit in the electric energy storage module to improve the energy storage voltage and store more electric energy, prolongs the power-down time under the condition of not needing to greatly increase the capacitance value of the capacitor or configuring a large capacitor and a super capacitor, and saves the cost and the space. When the power supply is recovered after the power failure, the main MCU supplies power through the three-stage power supply, the electric energy storage module is closed, the influence of the capacitor bank on the power supply time is avoided, and the electric energy storage module can enter a working state more quickly.

Description

Power failure storage circuit and method of automobile controller

Technical Field

The invention belongs to the technical field of power failure storage, and particularly relates to a power failure storage circuit and a power failure storage method for an automobile controller.

Background

The automobile power supply mainly comprises three types: normal, ACC, ign (ignition) power; the normal electricity is kept smooth all the time and is used for supplying power to a system which still needs to play a role after the automobile key is pulled out; if the system is accessed without a key, the ACC power is conducted when the key is used for typing in an ACC gear, and the ACC power is mainly used for waking up the video entertainment system; the IGN power is supplied only after the engine is started, and is generally used for supplying power to electric appliances related to a power system of an automobile or for dormancy awakening.

With the development of automobile Electronic products, various intelligent internet connections, new energy sources and other related products are developed endlessly, and the amount of data transmitted between Electronic Control Units (ECUs) of an automobile is larger and larger, so that it takes longer time to store data when an automobile system is powered off. However, due to the requirement of the power consumption of the whole vehicle, a part of the ECUs are only powered by ON gear electricity; the existing power-down storage technology is that an electrolytic capacitor is added at a power Input end, and simultaneously an IO (Input/Output, or GPIO) port or an AD (analog to digital Input/Output) port of an MCU (micro control Unit) detects a power supply, when an automobile system is powered off due to unexpected power failure or normal flameout of the automobile, the MCU detects the power failure, starts to store data, and simultaneously the electrolytic capacitor starts to discharge, and continues to supply power to each controller of the automobile.

For example, if the operating current of the controller is 100mA, a 220uF aluminum electrolytic capacitor can be discharged from 12V to 5V for about 15ms, and if the operating current of the controller is larger, the aluminum electrolytic capacitor is powered off more quickly and is maintained for a shorter time. If the discharge time is prolonged by configuring the aluminum electrolytic capacitor with larger capacitance value, the capacitor has larger volume when the capacitance value is larger, and the following adverse effects are caused:

first, the area that bulky electric capacity took on PCB (Printed circuit board) is great, and when PCB laying out wiring moreover, the line needs keep a distance with electric capacity, and electric capacity also needs to separate bigger distance with other components and parts, flange, and this all can increase PCB's area.

Secondly, the height of the aluminum electrolytic capacitor with large capacitance value is higher, so that the height of the controller shell is not increased. These are disadvantageous in the development of miniaturization and weight reduction of automotive electronic products.

Third, the electrolytic capacitor with large capacity increases the cost, the leakage current is larger, the filter characteristics are affected, and the capacitor is heated, so that the explosion is easily caused. The specific formula is as follows: the capacitance value of the capacitor is U, and the magnitude of the leakage current is in direct proportion to the capacitance value.

Fourthly, when the 12V is electrified, the 12V electricity is not directly added to the input end of the power supply, and certain impedance exists from the positive electrode of the storage battery to the load through a wire harness and an anti-reverse diode, so that certain electrifying time is caused. The large capacitance delays the power-up time, i.e., the time from power-on to the controller's start of operation is delayed by the power-up time, and in some cases requires the controller to power up, i.e., respond quickly. And the data volume of the automobile controller is very huge at present, for example, the data volume of the automatic driving domain controller in one day can even reach several TB, and the power-down delay time of tens of milliseconds is far from sufficient for the data storage of the automatic driving related functions. The prior art can only aim at a simple-structured controller which has relatively small processed data volume and low real-time requirement.

The power-down delay circuit disclosed by the conventional power-down delay circuit comprises: the DC/DC power supply is characterized in that the input end and the output end of the DC/DC power supply are respectively connected with a VIN end and a VOUT end, a charging branch is connected between the VIN end and the DC/DC power supply, and a discharging branch is connected between the VOUT end and the DC/DC power supply; the charging branch circuit and the discharging branch circuit are connected through an electricity storage discharging unit. This prior art has two drawbacks:

first, this scheme uses a fixed series capacitor bank for energy storage, which reduces the discharge time, and is analyzed as follows: according to the principle of capacitance: if two capacitors C1 and C2 are connected in parallel, the total capacitor C is C1+ C2, and if two capacitors are connected in series, the total capacitor C is C1+ C2/(C1+ C2). The capacitor of the energy storage circuit is connected in series, under the condition of series connection, the discharge time depends on the capacitor with the shortest discharge time in the capacitor bank, the total capacitor is reduced, and the more the capacitors are connected in series, the smaller the total capacitor is. The LT-spice simulation circuit shown in fig. 1 can illustrate the problem, the circuit parameters are configured as follows, R5 ═ R4 ═ R7 ═ 100 Ω, which represents the series impedance on the wire harness, C1 ═ C2 ═ C3 ═ C4 ═ C5 ═ 100uF, the left circuit represents the solution of the above patent, only two capacitors are connected in series for simplification, the middle circuit is only one capacitor, the right circuit is two capacitors connected in parallel, which represents the solution of the present invention, the power supply V1 is a 5V voltage source, and V2 and V3 are 2.5V voltage sources; as shown in the three curves of fig. 2 represent voltages at two ends of C2, C3, and C5, respectively, the three power sources start to be all 0V, and power-up starts from 10ms, it can be seen that voltages of C2, C3, and C5 gradually rise to 2.5V, voltage of C2 rises faster, voltage of C5 rises slowest, voltage sources V1, V2, and V3 are zero at 100ms, and capacitances of the three circuits start to discharge, as can be seen from the graph, the voltage of C2 falls fastest, and the voltage of C5 falls slowest, which indicates that the energy storage circuit using parallel capacitors can discharge longer time under the condition of the same energy storage voltage. The energy storage circuit adopts the parallel capacitor bank, so that longer discharge time can be provided.

Secondly, the scheme is provided with two switches DK1 and DK2 which cannot be simultaneously opened, and DK1 is opened and DK2 is opened when power is on; DK1 is turned off and DK2 is turned on when power is off. However, what two switches are respectively controlled by the two switches and what power supply supplies power to the control module, and what way of power supply supplies power to realize that the DK1 is turned on and the DK1 is turned off when the power supply is powered off is not indicated in the scheme.

In addition, the prior art discloses a low-voltage power-down delay control device and a control method, and the main idea of the prior art is as follows: the power failure detection module monitors the state of a main power supply in real time, can monitor the state change of the main power supply in time, controls a load to perform data operation according to the state of the main power supply and the state of a backup power supply module in real time by combining with the control management module, ensures the safety performance of load data operation, controls the connection or disconnection of the backup power supply module according to the main power supply and the load state, can control and manage the backup power supply so as to control the timely connection of the backup power supply module to store energy or provide backup energy for the load, and controls the timely disconnection of the backup power supply module, realizes an effective time delay function when the main power supply is powered down, ensures the stability and safety and reliability of power failure time delay execution, and can reduce unnecessary energy consumption. The prior art has the defect that the problem of how to increase the power failure delay time is not involved, and the energy storage device needs to supply power to a load after passing through the booster circuit, namely the energy storage voltage is less than the working voltage of the load, so that the discharge time of the energy storage device is shorter.

In addition, the prior art discloses a power-down delay switching device and communication equipment, and the main ideas of the prior art are as follows: through the buck-boost conversion module, the energy storage module and the output voltage switching module, in the process that a direct-current power supply suddenly encounters power failure of a power grid, the delay circuit can be quickly turned on in the moment of power failure, and therefore stored energy is released to prolong the delay time of the system. The prior art has the defect that the problem that how to enable the system to be powered off quickly due to the fact that overvoltage protection is not triggered when the system is powered off is mainly solved, namely, the power-off delay time of the system is effectively and successfully started by the mode of increasing the power-off delay time, and the power-off delay time of the power-off delay time is not increased when the power-off delay circuit works.

Disclosure of Invention

The technical problem to be solved by the invention is as follows: a product and method are provided for extending the power down time of a system for an MCU to save data.

The technical scheme adopted by the invention for solving the technical problems is as follows: a power failure storage circuit of an automobile controller comprises a preprocessing module, a voltage reduction module, an enabling module, an MCU1, an MCU2, a power supply detection module, an electric energy storage module and a data storage module; the electric energy storage module comprises a boosting circuit, a capacitor bank, a first voltage reduction circuit and a second voltage reduction circuit; the power supply of the power supply detection module and the power supply of the preprocessing module are IGN; the preprocessing module converts the IGN into a primary power supply to supply power to the electric energy storage module and the voltage reduction module; the voltage reduction module converts the primary power supply into a secondary power supply to supply power to the MCU 1; the enabling module converts the secondary power supply into a tertiary power supply to supply power to the MCU2 and the data storage module; the MCU1 is an auxiliary MCU, receives a signal of the power detection module through an IO1 port to detect whether IGN power is lost or not, and controls the on-off of the enabling module through an IO2 port to supply power to the MCU 2; the MCU2 is a main MCU, receives signals of the power supply detection module through an IO2 port to detect whether IGN power is off or not, and is used for collecting and processing data and driving the module to work; when the IGN is not powered down, the MCU2 enables the booster circuit of the electric energy storage module through the IO1 port, so that the primary power supply sequentially passes through the booster circuit, the capacitor bank, the first voltage reduction circuit and the second voltage reduction circuit of the electric energy storage module and is output to the MCU2 and the data storage module for supplying power; when the IGN is powered off, the MCU2 disconnects the boost circuit of the electric energy storage module through the IO1, the capacitor bank of the electric energy storage module discharges, and the power is output to the MCU2 and the data storage module through the voltage reduction circuit 1 and the voltage reduction circuit 2 to supply power; the MCU2 exchanges data with a data storage module via a communication interface.

According to the scheme, the preprocessing module inputs IGN electricity and outputs a primary Power supply Power _ 1; CI and C2 are ESD capacitances; d1 is an anti-reverse diode; d2 is TVS tube; c3 is an aluminum electrolytic capacitor for filtering low-frequency noise; c4, C5, C6, C7, C8 and C9 are ceramic capacitors and form a pi-type filter together with an inductor L1; r1 is a discharge resistor; the preprocessing module is used for ensuring that each module circuit is not impacted by external static electricity and pulse and outputting a stable power supply for the next-stage circuit.

Further, the voltage reduction module inputs a primary Power supply Power _1 and outputs a secondary Power supply Power _ 2; and the FB voltage VFB of the Buck chip is a constant value, and the resistance regulation output voltage formed by R9 and R10 is as follows:

Vpower_2＝VFB*(R9+R10)/R10。

furthermore, the enabling module inputs a secondary Power supply Power _2 and outputs a tertiary Power supply Power _ 3; r3 is used to form a pass drive T1; r2 is a current limiting resistor; r3, R19 and R18 are bias resistors; c10 is accelerating capacitor, which is used to turn on or off the three-stage power supply rapidly when IGN is powered on or off; c12 is a filter capacitor.

Further, when the Power supply current of the three-stage Power source Power _3 is 100mA and the MCU1 supplies 5V, in order to reduce the voltage drop of T2, the emitter-collector current Ice of T2 is 100mA, the emitter-base voltage Ueb is 0.7V, the voltage drop when T1 is turned on is approximately zero, R2 is 820 Ω, R3 is 10k Ω, and the current Tb2 flowing through the base of T2 is (5-0.7)/0.82-0.7/10 is 5.17 mA; r19, R18 take 5.1k omega, when MCU1 IO2 is high-level, 2.5V voltage is received to T1 base, satisfies the requirement of opening.

According to the scheme, the power supply detection module comprises two circuit modules for preventing the MCU from misoperation caused by power serial; c25 and C26 are filter capacitors; the magnetic beads L5 are used for suppressing high-frequency interference; r11 is a pull-up resistor, R13 is a pull-down resistor, and R11 ═ R12 ═ R13 ═ R14 is selected; when the IGN is powered on, the triode T3 is conducted, and the IO1 port of the MCU1 detects a high level; when IGN powers down, through R12 and R13 configuration voltage threshold make IGN be less than certain voltage when T3 cut off, the IO1 mouth of MCU1 detects low level.

According to the scheme, the electric energy storage module comprises a boosting circuit, a capacitor bank, a first voltage reduction circuit and a second voltage reduction circuit; the boost circuit comprises a DC-DC boost chip U2 and peripheral devices thereof; the capacitor bank comprises C29, C39, C15, C16, C17 and C18; the first voltage reduction circuit comprises a DC-DC voltage reduction chip U3 and peripheral devices thereof; the second voltage reduction circuit comprises a DC-DC voltage reduction chip U4 and peripheral devices thereof; the input voltage of U3 is higher than U4;

the working process of the electric energy storage module is as follows: when the IGN is not powered down, the primary Power supply raises the voltage to Power-HV through the boost chip to charge the capacitor bank, and then supplies Power to the MCU2 through the buck chip; when the IGN is powered off, the capacitor bank discharges, and the voltage of the capacitor bank is reduced by the two DC-DC voltage reduction chips and then the capacitor bank continues to supply power to the MCU 2;

FB ports of U2, U3 and U4 are feedback pins, and output voltage is regulated through two resistors respectively; the feedback pin voltage of the U4 chip is VFB, and the output voltage formula is:

Vpower_3＝VFB*(R20+R21)/R7。

according to the scheme, the capacitor bank comprises two large-capacity aluminum electrolytic capacitors and four ceramic capacitors, wherein the ceramic capacitors are used for filtering, and the aluminum electrolytic capacitors are used for storing electric quantity; the discharge time is T1, the initial voltage, i.e., the energy storage voltage, is U1, the voltage after discharge, i.e., the lowest working voltage of the MCU2, is U2, and the working current when the MCU2 and the memory module store data is I, the formula of the discharge time of the capacitor is:

T1＝C*(U1-U2)/I。

according to the scheme, the data storage module is used for exchanging data with the MCU through the I2C, the SPI or a parallel port; if K is the data size, V is the transmission time, and K is the data size to be stored, the discharge time, i.e. the time T2 for the MCU and the memory module to store data, is defined as:

T2＝K/V。

a power failure storage method of an automobile controller comprises the following steps:

s1: the power-up logic is: when the IGN is powered on, the primary power supply is started after the preprocessing module, the secondary power supply is started after the voltage reduction module, and the MCU1 is powered by the secondary power supply; the MCUI opens the enabling module, and the three-level power supply is started to supply power to the MCU2 and the data storage module; the MCU2 is initialized, and a booster circuit of the electric energy storage module is opened through an IO1 port, so that a primary power supply charges the electric energy storage module;

s2: the power-down logic is: when the IGN is powered off, the MCU1 detects the IGN power failure through the IO1 port, and then turns off the enabling module through the IO2 port, so that the three-stage power supply is immediately turned off; when the MCU2 detects IGN power failure through the IO2 port, the boost circuit of the electric energy storage module is immediately closed through the IO1 port, the capacitor bank of the electric energy storage module discharges, and the electric energy is output to the MCU2 and the data storage module through the voltage reduction circuit 1 and the voltage reduction circuit 2 to supply power; the MCU2 stores data in the data storage module via the communication interface.

The invention has the beneficial effects that:

1. according to the power-down storage circuit and the power-down storage method of the automobile controller, the two MCUs are used, when a user turns off an engine or a system is powered down due to accidental circuit breaking, the auxiliary MCU turns off the connection between the three-level power supply and the electric energy storage module, and the electric energy storage module only supplies power to the main MCU and the data storage module, so that the power-down time of the system is prolonged, mass data can be conveniently stored by the MCU, and the function of preventing data loss is realized.

2. According to the invention, the booster circuit is adopted to boost the voltage before the capacitor bank of the electric energy storage module, so that the energy storage voltage is improved to store more electric energy, the power failure time is prolonged under the condition that the capacitance value of the capacitor is not required to be greatly increased or a large capacitor and a super capacitor are not required to be configured, and the cost and the space are saved.

3. When the power failure is recovered, the main MCU supplies power through the three-stage power supply, the electric energy storage module is in a closed state, the influence of a capacitor bank on the power-on time is avoided, and therefore the electric energy storage module can enter a working state more quickly; and the enabling module is controlled by a triode with an accelerating capacitor, so that the starting speed of the three-level power supply is higher.

Drawings

Fig. 1 is a simulation circuit diagram of the first prior art.

Fig. 2 is a graph comparing the discharge voltage of the capacitor in the first prior art.

Fig. 3 is a functional block diagram of an embodiment of the present invention.

FIG. 4 is a power-up logic diagram of an embodiment of the present invention.

FIG. 5 is a power down logic diagram of an embodiment of the present invention.

FIG. 6 is a circuit diagram of a pre-processing module according to an embodiment of the present invention.

Fig. 7 is a circuit diagram of a buck module according to an embodiment of the invention.

FIG. 8 is a circuit diagram of an enable module according to an embodiment of the present invention.

FIG. 9 is a circuit diagram of a power detection module according to an embodiment of the invention.

FIG. 10 is a circuit diagram of an electrical energy storage module of an embodiment of the present invention.

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.

As shown in fig. 3, the embodiment of the present invention is applicable to a controller with only one IGN power supply, and is illustrated in a 12V power supply system of a passenger car:

the IGN supplies power to the power supply detection module and converts the power into a primary power supply after passing through the preprocessing module, and the primary power supply is used for supplying power to the electric energy storage module and the voltage reduction module;

the primary power supply is converted into a secondary power supply through the voltage reduction module, and the secondary power supply is used for supplying power to the MCU 1;

the secondary power supply is converted into a tertiary power supply through the enabling module to supply power to the MCU2 and the data storage module, and the general IO2 port of the MCU1 controls the enabling module.

In fig. 3, the MCU2 is a main MCU and mainly collects, processes, and stores data, and drives important modules to work, the MCU1 is an auxiliary MCU, and has a main function of controlling the on/off of the enable module to supply power to the MCU2, and some non-essential signals can be processed by the MCU 1. The MCU1 detects whether IGN power is down through IO1 and MCU2 through IO2 port.

In the electric energy storage module, when the IGN is not powered down, the MCU2 enables the boost circuit through the IO1, so that a primary power supply passes through the boost circuit and then passes through the capacitor bank and the two voltage reduction circuits to be output to the MCU2 and the data storage module for power supply; when IGN falls the power supply, MCU2 passes through IO1 disconnection boost circuit, and at this moment, the electric capacity group discharges, and step-down circuit 1 and step-down circuit 2 give MCU2 and data storage module power supply. Data is exchanged between the MCU2 and the data storage module via a communication interface.

Fig. 4 and 5 are schematic diagrams of control logic of the power-down delay circuit system shown in fig. 3 during power-up and power-down, respectively.

The power-up logic is: when the IGN is powered on, the primary power supply is started after the pre-processing module, the secondary power supply is started after the voltage reduction module, and the MCU1 is supplied with power by the secondary power supply. The enabling module is opened to MCUI, and tertiary power supply is opened and is supplied power for MCU2 and data storage module, and MCU2 begins to initialize, and after MCU2 accomplished the initialization, MCU2 IO1 began to charge for the electric energy storage module through the boost circuit that enables in the module opening electric energy storage module.

The power-down logic is: when IGN powers down, MCU2 detects IGN through IO2 mouth and falls the power, closes boost circuit through IO1 immediately, and MCU1 detects IGN through IO1 and falls the power, closes tertiary power supply through IO2 control enable module's immediately. The power storage module continues to supply power to the MCU2 and the data storage module, and the MCU2 stores data to the data storage module.

As shown in FIG. 6, the IGN pre-processing module is an IGN Power pre-processing module, Power _1 is a primary Power supply, CI and C2 are ESD capacitors, preferably 1uF or less, and withstand voltage of 100V. D1 is an anti-reverse diode, and the maximum forward current should be larger than the main circuit working current. D2 is TVS tube, and the reverse working voltage is larger than the overvoltage test voltage 24V specified by ISO 16750 standard. C3 is an aluminum electrolytic capacitor, is 100uF, and plays a role in filtering low-frequency noise waves. C4, C5, C6, C7, C8 and C9 are ceramic capacitors and an inductor L1 to form a pi-type filter, and R1 is a discharge resistor, preferably more than 1M omega. The preprocessing module is used for ensuring that each module circuit of the controller is not impacted by external static electricity and pulse so as to input a stable power supply to the next-stage circuit.

Fig. 7 shows a voltage-reducing module, Power _2 shows a secondary Power supply, and after the primary Power supply passes through the voltage-reducing module, the secondary Power supply is turned on to supply Power to the MCU1, and the secondary Power supply may be 5V or 3.3V. The output voltage can be adjusted by the resistor formed by R9 and R10, the accuracy is 1%, Vpower _2 ═ VFB (R9+ R10)/R10, and VFB is the voltage of the FB terminal of the Buck chip and is a constant value, and a plurality of voltage reduction chips are available on the market.

As shown in the enabling module of FIG. 8, Power _3 is a three-stage Power source, R3 forms a channel to drive T1, R2 is a current-limiting resistor, R3, R19, R18 are bias resistors, C10 is an accelerating capacitor, and C12 is a 100nF filter capacitor. Specific numerical values of the resistor and the capacitor are configured according to situations, and the following analysis is to take the Power supply current of Power _3 as 100mA and the MCU1 as 5V, so that the voltage drop of T2 needs to be made as small as possible, according to the data manual of T2, when the base current of T2 reaches 5mA, the voltage drop is 0.1V, the base current is further increased, the voltage drop does not substantially decrease, the emitter-collector voltage Ice of T2 is 100mA, since Ueb is about 0.7V, the voltage drop of T1 is approximately zero, R2 is 820 Ω, and R3 is 10k Ω, and then Tb2 flowing through the base of T2 is (5-0.7)/0.82-0.7/10 is 5.17mA, which meets the design requirements. C10 is an accelerating capacitor of a few hundred pF so that MCU1 quickly turns on or off the three stage power supply when the IGN is powered up or down. R19, R18 can take common 5.1k omega, when MCU1 IO2 is high-level, 2.5V voltage is received to T1 base, satisfies the requirement of opening.

As shown in fig. 9, the power supply voltages of the MCU1 and the MCU2 may be different, and in order to prevent series connection between two IO ports and cause malfunction of the MCU, the power supply detection module is divided into two circuit modules, where the power supply detection module of the MCU1 is taken as an example, C25 and C26 are 100n filter capacitors, and L5 is a magnetic bead (suppressing high frequency interference). R11 is a pull-up resistor, R13 is a pull-down resistor, and R11 ═ R12 ═ R13 ═ R14 ═ 10k Ω may be selected. When IGN is 12V, the transistor T3 is turned on, and the MCU1 IO1 detects a high level. When IGN powers down, T3 turns off below a certain voltage (voltage threshold can be configured by R12 and R13), and MCU1 IO1 detects low level. The detection circuit principle of the MCU2 is the same.

The electrical energy storage module shown in fig. 10: the DC-DC voltage reduction circuit is composed of a capacitor bank, a DC-DC voltage boosting chip and two DC-DC voltage reduction chips. U2 and its peripheral devices correspond to the booster circuit of FIG. 2; c29, C39, C15, C16, C17 and C18 correspond to the capacitor bank in fig. 2, U3 and its peripheral devices correspond to the step-down circuit 1 in fig. 2, and U4 and its peripheral devices correspond to the step-down circuit 2 in fig. 2. The working principle of the electric energy storage module is as follows: when the IGN is not powered down, the voltage of a primary Power supply (for example, 12V) is boosted to Power-HV (high voltage) through a boost chip to charge a capacitor bank, and then the voltage is supplied to the MCU2 through a buck chip; when IGN falls down, the capacitor bank discharges, and the MCU2 is continuously supplied with Power through the voltage reduction chip, wherein the Power-HV voltage is far higher than the working voltage of the MCU2 and needs to be reduced through two DCDC chips, so that two voltage reduction chips of U3 and U4 are selected, a chip with higher input voltage needs to be selected for U3, and the voltage of U4 is reduced a little after U3, so that the selection can be performed according to U3. U2, U3 and U4, FB port in these 3 chips is the feedback pin, can adjust the output voltage through two resistances, the resistance precision is preferably under 1%. The output voltage formula is Vpower _3 ═ VFB (R20+ R21)/R7, where VFB is the feedback pin voltage of the U4 chip. Note that: the U3 and U4 have different input and output voltages, and different types of buck chips are needed.

The capacitor bank can be composed of two large-capacity aluminum electrolytic capacitors and four ceramic capacitors, the ceramic capacitors mainly play a role in filtering, the aluminum electrolytic capacitors store electric quantity, and appropriate capacitance values can be selected according to discharge time requirements.

The capacitance discharge time formula is as follows: t1 ═ C ═ U1-U2)/formula one, where T1 is discharge time, U1 is initial voltage, i.e., energy storage voltage, U2 is discharged voltage, i.e., lowest operating voltage of MCU2, and I is operating current when MCU2 and the memory module store data. It can be seen that the higher the storage voltage, the longer the discharge time. The invention improves the energy storage voltage of the capacitor bank through the booster circuit and prolongs the discharge time.

For example, if Power _ HV is designed to be 60V, Power _3 is 5V, the supply current is 100mA, and the capacitor bank is 220uF, the voltage drops from 60V to 3.3V, which is the time that the MCU2 can operate normally, considering that the energy conversion efficiency of two DCDCs is about 95%, and the discharge time is:

T1＝0.95*0.00022*(60-5)/0.1＝0.115s，

much longer than the discharge time of prior art implementations.

The data storage module may exchange data with the MCU through I2C, SPI, or parallel communication. The discharge time requirement formula is as follows: t2 ═ K/V where K is the amount of data, V is the transmission time (e.g. SPI max transmission rate 3.4MB/S, I2C is 400KB/S) K is the amount of data that needs to be saved. T2 is the time when the MCU stores the module to save data. The specific Power _ HV and capacitance of the capacitor bank are determined according to the storage time requirement.

The above embodiments are only used for illustrating the design idea and features of the present invention, and the purpose of the present invention is to enable those skilled in the art to understand the content of the present invention and implement the present invention accordingly, and the protection scope of the present invention is not limited to the above embodiments. Therefore, all equivalent changes and modifications made in accordance with the principles and concepts disclosed herein are intended to be included within the scope of the present invention.

Claims

1. The utility model provides a power failure save circuit of automobile controller which characterized in that: the device comprises a preprocessing module, a voltage reduction module, an enabling module, an MCU1, an MCU2, a power supply detection module, an electric energy storage module and a data storage module; the electric energy storage module comprises a boosting circuit, a capacitor bank, a first voltage reduction circuit and a second voltage reduction circuit;

the power supply of the power supply detection module and the power supply of the preprocessing module are IGN;

the preprocessing module converts the IGN into a primary power supply to supply power to the electric energy storage module and the voltage reduction module;

the voltage reduction module converts the primary power supply into a secondary power supply to supply power to the MCU 1;

the enabling module converts the secondary power supply into a tertiary power supply to supply power to the MCU2 and the data storage module;

the MCU1 is an auxiliary MCU, receives a signal of the power detection module through an IO1 port to detect whether IGN power is lost or not, and controls the on-off of the enabling module through an IO2 port to supply power to the MCU 2;

the MCU2 is a main MCU, receives signals of the power supply detection module through an IO2 port to detect whether IGN power is off or not, and is used for collecting and processing data and driving the module to work;

when the IGN is not powered down, the MCU2 enables the booster circuit of the electric energy storage module through the IO1 port, so that the primary power supply sequentially passes through the booster circuit, the capacitor bank, the first voltage reduction circuit and the second voltage reduction circuit of the electric energy storage module and is output to the MCU2 and the data storage module for supplying power;

when the IGN is powered off, the MCU2 disconnects the boost circuit of the electric energy storage module through the IO1, the capacitor bank of the electric energy storage module discharges electricity, and the electricity is output to the MCU2 and the data storage module through the first voltage reduction circuit and the second voltage reduction circuit to supply power;

the MCU2 exchanges data with a data storage module via a communication interface.

2. The power-down saving circuit of the automobile controller according to claim 1, characterized in that: the preprocessing module inputs IGN electricity and outputs a primary Power supply Power _ 1; CI and C2 are ESD capacitances; d1 is an anti-reverse diode; d2 is TVS tube; c3 is an aluminum electrolytic capacitor for filtering low-frequency noise; c4, C5, C6, C7, C8 and C9 are ceramic capacitors and form a pi-type filter together with an inductor L1; r1 is a discharge resistor; the preprocessing module is used for ensuring that each module circuit is not impacted by external static electricity and pulse and outputting a stable power supply for the next-stage circuit.

3. The power-down saving circuit of the automobile controller according to claim 2, characterized in that: the voltage reduction module inputs a primary Power supply Power _1 and outputs a secondary Power supply Power _ 2; and the FB voltage VFB of the Buck chip is a constant value, and the resistance regulation output voltage formed by R9 and R10 is as follows:

Vpower_2＝VFB*(R9+R10)/R10。

4. the power-down saving circuit of the automobile controller according to claim 3, wherein: the enabling module inputs a secondary Power supply Power _2 and outputs a tertiary Power supply Power _ 3; r3 is used to form a pass drive T1; r2 is a current limiting resistor; r3, R19 and R18 are bias resistors; c10 is accelerating capacitor, which is used to turn on or off the three-stage power supply rapidly when IGN is powered on or off; c12 is a filter capacitor.

5. The power-down saving circuit of the automobile controller according to claim 4, wherein: when the Power supply current of the three-stage Power source Power _3 is 100mA, and the MCU1 supplies 5V, in order to reduce the voltage drop of T2, the emitter-collector current Ice of T2 is 100mA, the emitter-base voltage Ueb is 0.7V, the voltage drop when T1 is turned on is approximately zero, and if R2 is 820 Ω and R3 is 10k Ω, the current Tb2 flowing through the base of T2 is (5-0.7)/0.82-0.7/10 is 5.17 mA; r19, R18 take 5.1k omega, when MCU1 IO2 is high-level, 2.5V voltage is received to T1 base, satisfies the requirement of opening.

6. The power-down saving circuit of the automobile controller according to claim 1, characterized in that: the power supply detection module comprises two circuit modules for preventing the MCU from misoperation caused by power serial; c25 and C26 are filter capacitors; the magnetic beads L5 are used for suppressing high-frequency interference; r11 is a pull-up resistor, R13 is a pull-down resistor, and R11 ═ R12 ═ R13 ═ R14 is selected; when the IGN is powered on, the triode T3 is conducted, and the IO1 port of the MCU1 detects a high level; when IGN powers down, through R12 and R13 configuration voltage threshold make IGN be less than certain voltage when T3 cut off, the IO1 mouth of MCU1 detects low level.

7. The power-down saving circuit of the automobile controller according to claim 1, characterized in that: the electric energy storage module comprises a boosting circuit, a capacitor bank, a first voltage reduction circuit and a second voltage reduction circuit; the boost circuit comprises a DC-DC boost chip U2 and peripheral devices thereof; the capacitor bank comprises C29, C39, C15, C16, C17 and C18; the first voltage reduction circuit comprises a DC-DC voltage reduction chip U3 and peripheral devices thereof; the second voltage reduction circuit comprises a DC-DC voltage reduction chip U4 and peripheral devices thereof; the input voltage of U3 is higher than U4;

Vpower_3＝VFB*(R20+R21)/R7。

8. the power-down saving circuit of the automobile controller according to claim 1, characterized in that:

the capacitor bank comprises two large-capacity aluminum electrolytic capacitors and four ceramic capacitors, wherein the ceramic capacitors are used for filtering, and the aluminum electrolytic capacitors are used for storing electric quantity; the discharge time is T1, the initial voltage, i.e., the energy storage voltage, is U1, the voltage after discharge, i.e., the lowest working voltage of the MCU2, is U2, and the working current when the MCU2 and the memory module store data is I, the formula of the discharge time of the capacitor is:

T1＝C*(U1-U2)/I。

9. the power-down saving circuit of the automobile controller according to claim 1, characterized in that: the data storage module is used for exchanging data with the MCU through an I2C, SPI or parallel port; if K is the data size, V is the transmission time, and K is the data size to be stored, the discharge time, i.e. the time T2 for the MCU and the memory module to store data, is defined as:

T2＝K/V。

10. the power-down saving method of the power-down saving circuit of the automobile controller according to any one of claims 1 to 9, characterized in that: the method comprises the following steps:

s2: the power-down logic is: when the IGN is powered off, the MCU1 detects the IGN power failure through the IO1 port, and then turns off the enabling module through the IO2 port, so that the three-stage power supply is immediately turned off; when the MCU2 detects IGN power failure through the IO2 port, the boost circuit of the electric energy storage module is immediately closed through the IO1 port, the capacitor bank of the electric energy storage module discharges, and power is output to the MCU2 and the data storage module through the first voltage reduction circuit and the second voltage reduction circuit; the MCU2 stores data in the data storage module via the communication interface.