CN113451236A - 一种传感芯片封装结构及方法 - Google Patents
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Abstract
本发明涉及芯片封装技术领域,提出一种传感芯片封装结构及方法。该封装结构包括:基板;硅转接板;以及多个芯片,所述多个芯片包括传感芯片以及非传感芯片,其中所述非传感芯片被塑封料塑封,并且所述传感芯片裸露。本发明通过在芯片的正面塑封之前在传感芯片上方布置保护罩,并且在塑封完成后磨去保护罩的顶部,可以很好的解决现有技术中感应芯片的感应信号无法穿透塑封料的问题,能够有效应用于传感芯片的封装。
Description
技术领域
本发明总的来说涉及芯片封装技术领域。具体而言,本发明涉及一种传感芯片封装结构及方法。
背景技术
在多芯片集成的***封装中,CoWoS(Chip on Wafer on Substrate)是一种通常使用的2.5D封装方法,利用了该封装方法的产品包括NVIDIA的Tesla V100和AMD的RadeonVII。然而采用CoWoS封装会在芯片表面覆盖塑封料,而通常感知芯片,例如MEMS(微机电***)芯片、光学传感器芯片、压力传感器芯片等采集的感应信号无法穿透塑封料,因此其不适合于传感芯片的封装。
发明内容
针对现有技术中通常使用的2.5D封装方法不适合于传感芯片封装的问题,本发明提出一种传感芯片封装结构,包括:
基板,所述基板上布置硅转接板;
硅转接板,所述硅转接板上布置多个芯片;以及
多个芯片,所述多个芯片包括传感芯片以及非传感芯片,其中所述非传感芯片被塑封料塑封,并且所述传感芯片裸露。
在本发明一个实施例中规定,其特征在于:
所述硅转接板内部具有多个硅通孔,所述硅通孔连通所述硅转接板的上表面和下表面。
在本发明一个实施例中规定:
所述多个硅通孔的上部与所述多个芯片连接;以及
所述多个硅通孔的下部具有凸块,所述多个硅通孔通过所述凸块与所述基板连接。
在本发明一个实施例中规定,所述传感芯片包括微机电***芯片、光学传感器芯片以及压力传感器芯片。
本发明还提出一种构造所述传感芯片封装结构的方法,其特征在于,包括下列步骤:
在硅转接板的内部构造多个硅通孔;
对所述硅转接板的上表面进行工艺处理;
将多个芯片布置在所述硅转接板的上表面,其中所述多个芯片与所述多个硅通孔的上部连接;
在传感芯片的上方布置保护罩;
将硅转接板的上表面通过塑封料塑封;
将硅转接板的下部减薄以在硅转接板的下表面露出多个硅通孔的下部,并且在所述多个硅通孔的下部构造凸块;
减薄塑封料并且磨去感知芯片上方的保护罩顶部,以使感知芯片裸露;以及
分切硅转接板,并且将布置于有多个芯片的硅转接板的模块贴装在基板上。
在本发明一个实施例中规定,在硅转接板的内部构造多个硅通孔包括下列步骤:
清洗硅转接板;
在硅转接板上涂覆光刻胶,并且对光刻胶做曝光、显影;
刻蚀硅转接板以形成多个硅通孔结构;
在所述多个硅通孔结构的侧壁上沉积介质绝缘层;
在所述多个硅通孔结构的侧壁上沉积金属种子层;以及
通过电镀以在多个硅通孔结构中填充金属。
在本发明一个实施例中规定,对所述硅转接板的上表面进行工艺处理包括下列步骤:
对所述硅转接板的上表面进行化学机械平坦化研磨;
在所述硅转接板的上表面构造金属互连结构;以及
在所述硅转接板的上表面构造凸点下金属化结构或者微凸块结构。
在本发明一个实施例中规定:所述保护罩包括塑料保护罩或者金属保护罩;所述保护罩的尺寸与所述传感芯片的尺寸相配合,包括10x10mm-35x35mm。
在本发明一个实施例中规定,将硅转接板的下部减薄以在硅转接板的下表面露出多个硅通孔的下部,并且在所述多个硅通孔的下部构造凸块包括下列步骤:
通过晶圆减薄设备的减薄磨轮减薄硅转接板的下部至距离硅通孔底部10-30um的距离;
使用含氟类气体刻蚀所述硅转接板5的下部至所述多个硅通孔的下部整体露出以形成减薄面;
通过CVD工艺在所述减薄面上沉积氧化硅层;
通过CMP工艺减薄所述氧化硅层,并且使多个硅通孔的填充金属露出;以及
在所述填充金属露出的位置构造UBM结构,并且在所述UBM机构构造凸块。
在本发明一个实施例中规定:
通过晶圆减薄设备的减薄磨轮减薄塑封料;
其中当使用塑料保护罩时,通过第一减薄磨轮减薄所述塑封料以及所述保护罩顶部至感知芯片露出;以及当使用金属保护罩时,通过所述第一减薄磨轮减薄所述塑封料至触及所述金属保护罩,并且调换第二减薄磨轮减薄所述塑封料以及所述保护罩顶部至感知芯片露出。
本发明至少具有如下有益效果:通过在芯片的正面塑封之前在传感芯片上方布置保护罩,并且在塑封完成后磨去保护罩的顶部,可以很好的解决现有技术中感应芯片的感应信号无法穿透塑封料的问题,能够有效应用于传感芯片的封装。
附图说明
为进一步阐明本发明的各实施例中具有的及其它的优点和特征,将参考附图来呈现本发明的各实施例的更具体的描述。可以理解,这些附图只描绘本发明的典型实施例,因此将不被认为是对其范围的限制。在附图中,为了清楚明了,相同或相应的部件将用相同或类似的标记表示。
图1-6示出了本发明一个实施例中构造传感芯片封装结构的过程结构示意图。
图7示出了本发明一个实施例中传感芯片封装结构的结构示意图。
图8示出本发明一个实施例中了构造传感芯片封装结构的流程示意图。
具体实施方式
应当指出,各附图中的各组件可能为了图解说明而被夸大地示出,而不一定是比例正确的。在各附图中,给相同或功能相同的组件配备了相同的附图标记。
在本发明中,除非特别指出,“布置在…上”、“布置在…上方”以及“布置在…之上”并未排除二者之间存在中间物的情况。此外,“布置在…上或上方”仅仅表示两个部件之间的相对位置关系,而在一定情况下、如在颠倒产品方向后,也可以转换为“布置在…下或下方”,反之亦然。
在本发明中,各实施例仅仅旨在说明本发明的方案,而不应被理解为限制性的。
在本发明中,除非特别指出,量词“一个”、“一”并未排除多个元素的场景。
在此还应当指出,在本发明的实施例中,为清楚、简单起见,可能示出了仅仅一部分部件或组件,但是本领域的普通技术人员能够理解,在本发明的教导下,可根据具体场景需要添加所需的部件或组件。另外,除非另行说明,本发明的不同实施例中的特征可以相互组合。例如,可以用第二实施例中的某特征替换第一实施例中相对应或功能相同或相似的特征,所得到的实施例同样落入本申请的公开范围或记载范围。
在此还应当指出,在本发明的范围内,“相同”、“相等”、“等于”等措辞并不意味着二者数值绝对相等,而是允许一定的合理误差,也就是说,所述措辞也涵盖了“基本上相同”、“基本上相等”、“基本上等于”。以此类推,在本发明中,表方向的术语“垂直于”、“平行于”等等同样涵盖了“基本上垂直于”、“基本上平行于”的含义。
另外,本发明的各方法的步骤的编号并未限定所述方法步骤的执行顺序。除非特别指出,各方法步骤可以以不同顺序执行。
下面结合具体实施方式参考附图进一步阐述本发明。
如图7所示提出一个传感芯片封装结构,包括基板701、硅转接板702以及多个芯片。其中,基板701上布置硅转接板702,硅转接板702上布置多个芯片。多个芯片包括传感芯片703以及非传感芯片704,其中非传感芯片704被塑封料705塑封,并且传感芯片703裸露。硅转接板702内部具有多个硅通孔706,硅通孔706连通硅转接板702的上表面和下表面。多个硅通孔706的上部与多个芯片连接,并且多个硅通孔706的下部具有凸块707,多个硅通孔706通过凸块707与基板701连接。
在本发明的一个实施例中还提出一个构造所述的传感芯片封装结构的方法,包括下列步骤:
如图1所示,首先在硅转接板101的内部构造多个硅通孔102,并且硅转接板101的上表面工艺处理。
构造多个硅通孔102可以包括下列步骤:
清洗硅转接板101。
在硅转接板101上涂覆光刻胶,并且对光刻胶做曝光、显影。
通过等离子体对硅转接板101做干法刻蚀,以形成多个硅通孔结构。
通过CVD(chemical vapor deposition化学气相沉积)工艺或者ALD(atomiclayer deposition原子层沉积)工艺,在硅通孔结构的侧壁形成介质绝缘层,介质绝缘层材料例如可以是氧化硅、氮化硅、氮氧化硅等。
通过PVD(Physical vapor deposition物理气相沉积)或者ALD工艺,在硅通孔结构的侧壁沉积金属种子层,金属种子层的材料例如可以是包括Ti、Ta、Cu,另外还可以使用氮化钛TiN、氮化钽TaN构造金属扩散阻挡层,防止之后电镀过程中电镀金属扩散至周围材料。
以及通过电镀方式完成硅通孔结构的金属填充,以完成多个硅通孔102的构造,常见的填充金属例如可以是Cu。
对硅转接板101的上表面进行工艺处理可以包括下列步骤:
对完成了硅通孔电镀的硅转接板101的上表面进行CMP(Chemical MechanicalPlanarization化学机械平坦化)研磨,使得硅转接板101仅保留硅通孔结构内的金属。
在硅转接板101的上表面构造金属互连结构。如果所述金属互连结构的线宽线距尺寸在微米量级,例如L/S=2/2um,通常使用有机物绝缘层加铜RDL(重新布线)工艺构造金属互连结构。如果线宽线距尺寸在微米以下量级,例如L/S=0.5/0.5um,通常使用大马士革铜工艺构造金属互连结构。
以及在完成金属互连结构的构造后,可以在需要贴装芯片的位置,构造UBM(underbump metal lization,凸点下金属化)结构或者微凸块结构。UBM结构的材料例如可以包括Ti/Cu、Ti/Cu/Ni/Cu、Ti/Cu/Ni/Au等;微凸块结构的材料例如可以包括Cu/SnAg、Cu/Ni/SnAg、Cu/Ni/Cu/SnAg等。
如图2所示,将多个芯片布置在硅转接板201的上表面,其中所述多个芯片与所述多个硅通孔202的上部连接。多个芯片中包括传感芯片203以及非传感芯片204。
如图3所示,在传感芯片301的上方布置保护罩302。例如可以先在传感芯片301周围的保护罩贴装位置上涂覆胶水,再将保护罩302倒扣在传感芯片上方,并且可以通过无氧烤箱将胶水高温固化,以保证保护罩301与硅转接板之间有足够的粘接强度。保护罩的材料例如可以是塑料类、金属类,金属保护罩例如可以是铜镀镍保护罩、不锈钢保护罩等。保护罩的尺寸与传感芯片的尺寸相配合,例如可以是10x10mm-35x35mm。
如图4所示,将硅转接板401的上表面通过塑封料402塑封。
如图5所示,将硅转接板501的下部减薄以在硅转接板的下表面露出多个硅通孔502的下部,并且在多个硅通孔502的下部构造凸块503,其中可以包括下列步骤:
可以通过晶圆减薄设备的减薄磨轮来减薄硅转接板501的下部,并且在距离硅通孔底部10-30um的距离时停下。
使用含氟类气体继续刻蚀硅转接板501的下部,并且在硅通孔结构整体露出之后停下以形成减薄面。
通过CVD工艺在所述减薄面上沉积氧化硅层。
通过CMP工艺减薄所述氧化硅层,并且使多个硅通孔502的填充金属露出。
以及在所述填充金属露出的位置构造UBM结构,并且在所述UBM机构上通过重复黄光、溅射、电镀、去胶工艺来构造凸块503。
如图6所示,减薄塑封料601并且磨去感知芯片602上方的保护罩603顶部,以使感知芯片602裸露。其中,可以通过晶圆减薄设备的减薄磨轮对塑封料601做整体减薄。如果使用塑料保护罩,在减薄过程可以不更换减薄磨轮,直至感知芯片露出,并通过湿法工艺,将感知芯片上散落的塑封料碎屑清洗干净。如果使用金属保护罩,在塑封料减薄至触及金属保护罩之后,需调换减薄磨轮,以适应金属硬度,以及研磨过程中出现的金属延展现象。
以及如图7所示,分切硅转接板并且将布置于有多个芯片的硅转接板702的模块贴装在基板701上,完成所述传感芯片封装结构的构造。
所述构造传感芯片封装结构的方法的整体流程图如图8所示。
尽管上文描述了本发明的各实施例,但是,应该理解,它们只是作为示例来呈现的,而不作为限制。对于相关领域的技术人员显而易见的是,可以对其做出各种组合、变型和改变而不背离本发明的精神和范围。因此,此处所公开的本发明的宽度和范围不应被上述所公开的示例性实施例所限制,而应当仅根据所附权利要求书及其等同替换来定义。
Claims (10)
1.一种传感芯片封装结构,其特征在于,包括:
基板,所述基板上布置硅转接板;
硅转接板,所述硅转接板上布置多个芯片;以及
多个芯片,所述多个芯片包括传感芯片以及非传感芯片,其中所述非传感芯片被塑封料塑封,并且所述传感芯片裸露。
2.根据权利要求1所述的传感芯片封装结构,其特征在于:
所述硅转接板内部具有多个硅通孔,所述硅通孔连通所述硅转接板的上表面和下表面。
3.根据权利要求2所述的传感芯片封装结构,其特征在于:
所述多个硅通孔的上部与所述多个芯片连接;以及
所述多个硅通孔的下部具有凸块,所述多个硅通孔通过所述凸块与所述基板连接。
4.根据权利要求1所述的传感芯片封装结构,其特征在于,所述传感芯片包括微机电***芯片、光学传感器芯片以及压力传感器芯片。
5.一种构造权利要求1-4之一所述的传感芯片封装结构的方法,其特征在于,包括下列步骤:
在硅转接板的内部构造多个硅通孔;
对所述硅转接板的上表面进行工艺处理;
将多个芯片布置在所述硅转接板的上表面,其中所述多个芯片与所述多个硅通孔的上部连接;
在传感芯片的上方布置保护罩;
将硅转接板的上表面通过塑封料塑封;
将硅转接板的下部减薄以在硅转接板的下表面露出多个硅通孔的下部,并且在所述多个硅通孔的下部构造凸块;
减薄塑封料并且磨去感知芯片上方的保护罩顶部,以使感知芯片裸露;以及
分切硅转接板,并且将布置于有多个芯片的硅转接板的模块贴装在基板上。
6.根据权利要求5所述的构造传感芯片封装结构的方法,其特征在于,在硅转接板的内部构造多个硅通孔包括下列步骤:
清洗硅转接板;
在硅转接板上涂覆光刻胶,并且对光刻胶做曝光、显影;
刻蚀硅转接板以形成多个硅通孔结构;
在所述多个硅通孔结构的侧壁上沉积介质绝缘层;
在所述多个硅通孔结构的侧壁上沉积金属种子层;以及
通过电镀以在多个硅通孔结构中填充金属。
7.根据权利要求5所述的构造传感芯片封装结构的方法,其特征在于,对所述硅转接板的上表面进行工艺处理包括下列步骤:
对所述硅转接板的上表面进行化学机械平坦化研磨;
在所述硅转接板的上表面构造金属互连结构;以及
在所述硅转接板的上表面构造凸点下金属化结构或者微凸块结构。
8.根据权利要求5所述的构造传感芯片封装结构的方法,其特征在于:所述保护罩包括塑料保护罩或者金属保护罩;所述保护罩的尺寸与所述传感芯片的尺寸相配合,包括10×10mm-35×35mm。
9.根据权利要求6所述的构造传感芯片封装结构的方法,其特征在于,将硅转接板的下部减薄以在硅转接板的下表面露出多个硅通孔的下部,并且在所述多个硅通孔的下部构造凸块包括下列步骤:
通过晶圆减薄设备的减薄磨轮减薄硅转接板的下部至距离硅通孔底部10-30um的距离;
使用含氟类气体刻蚀所述硅转接板5的下部至所述多个硅通孔的下部整体露出以形成减薄面;
通过CVD工艺在所述减薄面上沉积氧化硅层;
通过CMP工艺减薄所述氧化硅层,并且使多个硅通孔的填充金属露出;以及
在所述填充金属露出的位置构造UBM结构,并且在所述UBM机构构造凸块。
10.根据权利要求8所述的构造传感芯片封装结构的方法,其特征在于,其特征在于:
通过晶圆减薄设备的减薄磨轮减薄塑封料;
其中当使用塑料保护罩时,通过第一减薄磨轮减薄所述塑封料以及所述保护罩顶部至感知芯片露出;以及当使用金属保护罩时,通过所述第一减薄磨轮减薄所述塑封料至触及所述金属保护罩,并且调换第二减薄磨轮减薄所述塑封料以及所述保护罩顶部至感知芯片露出。
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