CN113437049A - 一种铪基铁电存储器及其制备方法 - Google Patents

一种铪基铁电存储器及其制备方法 Download PDF

Info

Publication number
CN113437049A
CN113437049A CN202110683895.3A CN202110683895A CN113437049A CN 113437049 A CN113437049 A CN 113437049A CN 202110683895 A CN202110683895 A CN 202110683895A CN 113437049 A CN113437049 A CN 113437049A
Authority
CN
China
Prior art keywords
hafnium
ferroelectric memory
based ferroelectric
aluminum
bottom electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202110683895.3A
Other languages
English (en)
Other versions
CN113437049B (zh
Inventor
朱颢
陈佩瑶
刘逸伦
曹园园
孙清清
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fudan University
Original Assignee
Fudan University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fudan University filed Critical Fudan University
Priority to CN202110683895.3A priority Critical patent/CN113437049B/zh
Publication of CN113437049A publication Critical patent/CN113437049A/zh
Application granted granted Critical
Publication of CN113437049B publication Critical patent/CN113437049B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40—Oxides
    • C23C16/403—Oxides of aluminium, magnesium or beryllium
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40—Oxides
    • C23C16/405—Oxides of refractory metals or yttrium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02181—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing hafnium, e.g. HfO2
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Organic Chemistry (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Semiconductor Memories (AREA)

Abstract

本发明公开一种铪基铁电存储器及其制备方法。该铪基铁电存储器包括多个铪基铁电存储器单元，所述铪基铁电存储器单元包括：衬底；底电极，形成在所述衬底上；铪基铁电体，其为经退火后的铪铝氧薄膜，形成在所述底电极上；顶电极，形成在所述铪铝氧薄膜上。基于高质量的铁电HAO薄膜形成非易失性铁电存储器单元，实现了长期保持，高耐用性和稳定的存储特性，以及高剩余极化强度，并利用多个铪基铁电存储器单元搭建逻辑电路，实现了存算一体的功能。

Description

一种铪基铁电存储器及其制备方法
技术领域
本发明涉及存储器技术领域，具体涉及一种铪基铁电存储器及其制备方法。
背景技术
随着工艺节点的快速缩小，人们在制造工艺中遇到越来越多的棘手的问题，摩尔定律的延续因此也即将走向尾声，但是科技的发展永无止境，因此对集成电路行业的要求也越来越高，为了继续将摩尔定律延续下去，人们开始寻找更多的替代方式，其中氧化铪作为一种高K介质材料，具有非常多的特性，可以满足CMOS工艺中的栅介质材料所需性质，能够很好地与硅基底匹配兼容到集成电路制造工艺中。
HfO2作为取代二氧化硅材料作为MOS管中的栅介质层，具有天生的许多优点。介电常数高(约为25)，能量带隙宽(约5.7eV)，与硅晶格具有适配的晶格参数，在硅基底上能够稳定存在，同时氧化铪具有高的热稳定性和可靠性。
2011年，更具重大意义的发现出现了，HfO2薄膜被报道通过一定的手段能够诱导出铁电性，该报道在学术界引起了广泛的兴趣。同时人工智能作为在人类在科学道路上的必经之路，打破固有的“存储墙”障碍，实现存算一体融合的脚步刻不容缓。
发明内容
为了解决上述问题，本发明公开一种铪基铁电存储器，包括多个铪基铁电存储器单元，利用多个铪基铁电存储器单元搭建逻辑电路，实现存算一体的功能，其中，所述铪基铁电存储器单元包括：衬底；底电极，形成在所述衬底上；铪基铁电体，其为经退火后的铪铝氧薄膜，形成在所述底电极上；顶电极，形成在所述铪铝氧薄膜上。
本发明的铪基铁电存储器中，优选为，所述底电极为Ti/Pt。
本发明的铪基铁电存储器中，优选为，所述顶电极为TiN。
本发明还公开一种铪基铁电存储器制备方法，包括以下步骤：在衬底上形成底电极；在所述底电极上形成铪铝氧薄膜；在所述铪铝氧薄膜上形成顶电极；进行退火使所述铪铝氧薄膜结晶形成铁电体获得铪基铁电存储器单元，利用多个铪基铁电存储器单元搭建逻辑电路，实现存算一体的功能。
本发明的铪基铁电存储器制备方法中，优选为，所述底电极为Ti/Pt。
本发明的铪基铁电存储器制备方法中，优选为，所述顶电极为TiN。
本发明的铪基铁电存储器制备方法中，优选为，采用原子层沉积方法形成所述铪铝氧薄膜。
本发明的铪基铁电存储器制备方法中，优选为，采用原子层沉积方法形成所述铪铝氧薄膜的过程中，铪元素和铝元素的生长循环比为34:1。
本发明的铪基铁电存储器制备方法中，优选为，所述退火过程在氮气氛围下进行，温度为500℃～800℃，时间为30s。
本发明基于高质量的铁电铪铝氧薄膜形成非易失性铁电存储器单元，实现了长期保持，高耐用性和稳定的存储特性，以及高剩余极化强度，并利用多个铪基铁电存储器单元搭建逻辑电路，实现了存算一体的功能。
附图说明
图1是铪基铁电存储器制备方法的流程图。
图2是形成底电极后的器件结构示意图。
图3是形成铪铝氧薄膜后的器件结构示意图。
图4是光刻形成电极图案后的器件结构示意图。
图5是形成顶电极后的器件结构示意图。
图6是铪基铁电存储器单元器件结构示意图。
图7A，图7B是或非门(NOR)和非门(NOT)的逻辑电路图；图7C是利用多个铪基铁电存储器单元搭建或非门(NOR)和非门(NOT)的示意图。
具体实施方式
为了使本发明的目的、技术方案及优点更加清楚明白，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，应当理解，此处所描述的具体实施例仅用以解释本发明，并不用于限定本发明。所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例，都属于本发明保护的范围。
在本发明的描述中，需要说明的是，术语“上”、“下”、“垂直”“水平”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本发明和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本发明的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性。
此外，在下文中描述了本发明的许多特定的细节，例如器件的结构、材料、尺寸、处理工艺和技术，以便更清楚地理解本发明。但正如本领域的技术人员能够理解的那样，可以不按照这些特定的细节来实现本发明。除非在下文中特别指出，器件中的各个部分可以由本领域的技术人员公知的材料构成，或者可以采用将来开发的具有类似功能的材料。
图1是铪基铁电存储器制备方法的流程图。如图1所示，包括底电极形成步骤S1，首先以氧化硅/硅片作为衬底100，将衬底100依次在丙酮、异丙醇和去离子水中超声15分钟，完成后用高纯氮***吹干，保证衬底100表面洁净。但是本发明不限定于此，还可以选用p型Si、Pt、GaAs、GaN等作为衬底材料。然后，采用物理气相沉积(PVD)技术在清洗好的氧化硅/硅片衬底100上依次先后淀积15nm厚的Ti和50nm厚的Pt，作为底电极101，所得结构如图2所示。
铁电层制备步骤S2，利用原子层沉积(ALD)技术在底电极101上生长铪铝氧薄膜102即轻微铝元素掺杂的氧化铪薄膜，所得结构如图3所示。以四双(乙基甲基氨)铪(IV)(TEMAH)作为铪源，以三甲基铝(TMA)铝源，铪元素和铝元素的生长循环比为34:1，生长周期为105个循环周期(cycle)，厚度约为10nm，生长温度为300℃。
顶电极制备步骤S3，首先，对经过上述制备工艺得到的样品进行光学曝光，经过匀胶、前烘、曝光、后烘、显影和定影一系列步骤得到具有100μm× 100μm的电极图案103，所得结构如图4所示。然后，利用PVD技术生长TiN层作为顶电极104，所得结构如图5所示。
快速热退火步骤S4，将样品在氮气氛围下进行快速热退火(RTP)，使铪铝氧薄膜结晶形成铁电体。退火温度优选为500℃～800℃，退火时间为30s。将快速热退火后的样品浸泡在去胶液中去掉多余的光刻胶，显现出顶电极104，获得了铪基铁电存储器单元10，所得结构如图6所示。利用ALD技术精确可控的生长出高质量HAO薄膜。经过优化退火条件并采用TiN淀积后退火工艺，成功制备出具有高铁电性的HAO薄膜材料，且漏电小，薄膜均匀性高，粗糙度小。将其集成到具有TiN/HAO/Pt/Ti电容器结构的非易失性存储器件中，实现了长期保持，高耐用性和稳定的存储特性，以及高剩余极化强度。
存算一体功能实现步骤S5，根据忆阻器辅助逻辑(MAGIC)操作原理，利用由多个铪基铁电存储器单元10组成的阵列搭建逻辑电路，实现存算一体的功能。如图7A，图7B和图7C所示，搭建或非门(NOR)和非门(NOT)的逻辑电路，实现简单逻辑门的运算。
本发明的铪基铁电存储器，包括多个铪基铁电存储器单元10，利用多个铪基铁电存储器单元10搭建逻辑电路，实现存算一体的功能，其中，铪基铁电存储器单元10，如图6所示包括：衬底100；底电极101，形成在衬底100 上；铪基铁电体，其为经退火后的铪铝氧薄膜102，形成在底电极101上；顶电极104，形成在铪铝氧薄膜102上。底电极为Ti/Pt，顶电极为TiN。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到的变化或替换，都应涵盖在本发明的保护范围之内。

Claims (9)

1.一种铪基铁电存储器，其特征在于，
包括多个铪基铁电存储器单元，利用多个铪基铁电存储器单元搭建逻辑电路，实现存算一体的功能，
其中，所述铪基铁电存储器单元包括：
衬底；
底电极，形成在所述衬底上；
铪基铁电体，其为经退火后的铪铝氧薄膜，形成在所述底电极上；
顶电极，形成在所述铪铝氧薄膜上。
2.根据权利要求1所述的铪基铁电存储器，其特征在于，
所述底电极为Ti/Pt。
3.根据权利要求1所述的铪基铁电存储器，其特征在于，
所述顶电极为TiN。
4.一种铪基铁电存储器制备方法，其特征在于，
包括以下步骤：
在衬底上形成底电极；
在所述底电极上形成铪铝氧薄膜；
在所述铪铝氧薄膜上形成顶电极；
进行退火使所述铪铝氧薄膜结晶形成铁电体获得铪基铁电存储器单元；
利用多个铪基铁电存储器单元搭建逻辑电路，实现存算一体的功能。
5.根据权利要求4所述的铪基铁电存储器制备方法，其特征在于，
所述底电极为Ti/Pt。
6.根据权利要求4所述的铪基铁电存储器制备方法，其特征在于，
所述顶电极为TiN。
7.根据权利要求4所述的铪基铁电存储器制备方法，其特征在于，
采用原子层沉积方法形成所述铪铝氧薄膜。
8.根据权利要求7所述的铪基铁电存储器制备方法，其特征在于，
采用原子层沉积方法形成所述铪铝氧薄膜的过程中，铪元素和铝元素的生长循环比为34:1。
9.根据权利要求4所述的铪基铁电存储器制备方法，其特征在于，
所述退火过程在氮气氛围下进行，温度为500℃～800℃，时间为30s。
CN202110683895.3A 2021-06-21 2021-06-21 一种铪基铁电存储器及其制备方法 Active CN113437049B (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110683895.3A CN113437049B (zh) 2021-06-21 2021-06-21 一种铪基铁电存储器及其制备方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110683895.3A CN113437049B (zh) 2021-06-21 2021-06-21 一种铪基铁电存储器及其制备方法

Publications (2)

Publication Number Publication Date
CN113437049A true CN113437049A (zh) 2021-09-24
CN113437049B CN113437049B (zh) 2022-10-11

Family

ID=77756735

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110683895.3A Active CN113437049B (zh) 2021-06-21 2021-06-21 一种铪基铁电存储器及其制备方法

Country Status (1)

Country Link
CN (1) CN113437049B (zh)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102104110A (zh) * 2010-11-16 2011-06-22 复旦大学 一种阻变特性优化的阻变存储器及其制备方法
US20150076437A1 (en) * 2013-09-13 2015-03-19 Micron Technology, Inc. Methods of forming a ferroelectric memory cell and related semiconductor device structures
CN107134487A (zh) * 2017-06-06 2017-09-05 湘潭大学 一种基于氧化铪的铁电栅结构及其制备工艺
CN107146759A (zh) * 2017-05-04 2017-09-08 湘潭大学 一种基于离子注入掺杂的氧化铪铁电栅制备方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102104110A (zh) * 2010-11-16 2011-06-22 复旦大学 一种阻变特性优化的阻变存储器及其制备方法
US20150076437A1 (en) * 2013-09-13 2015-03-19 Micron Technology, Inc. Methods of forming a ferroelectric memory cell and related semiconductor device structures
CN107146759A (zh) * 2017-05-04 2017-09-08 湘潭大学 一种基于离子注入掺杂的氧化铪铁电栅制备方法
CN107134487A (zh) * 2017-06-06 2017-09-05 湘潭大学 一种基于氧化铪的铁电栅结构及其制备工艺

Also Published As

Publication number Publication date
CN113437049B (zh) 2022-10-11

Similar Documents

Publication Publication Date Title
Silva et al. Advances in dielectric thin films for energy storage applications, revealing the promise of group IV binary oxides
KR100493881B1 (ko) 반도체 기재 물질 상의 삼산화티탄칼슘 계면 주형 구조물
CN107146759B (zh) 一种基于离子注入掺杂的氧化铪铁电栅制备方法
US6236076B1 (en) Ferroelectric field effect transistors for nonvolatile memory applications having functional gradient material
Song et al. Epitaxial ferroelectric La-doped Hf0. 5Zr0. 5O2 thin films
US5962069A (en) Process for fabricating layered superlattice materials and AB03 type metal oxides without exposure to oxygen at high temperatures
Xiao et al. Thermally stable and radiation hard ferroelectric Hf0. 5Zr0. 5O2 thin films on muscovite mica for flexible nonvolatile memory applications
CA2215052A1 (en) Low temperature process for fabricating layered superlattice materials and making electronic devices including same
US20210035994A1 (en) Methods for forming ferroelectric memory devices
KR20200021276A (ko) 전자 소자 및 그 제조방법
KR100346563B1 (ko) 강유전성 메모리 게이트 유닛을 갖는 반도체 구조를형성하기 위한 방법, 및 강유전성 메모리 셀
CA2145879A1 (en) Process for fabricating layered superlattice materials and making electronic devices including same
Li et al. Ferroelectric thin films: performance modulation and application
KR100562731B1 (ko) 고유전율 게이트 산화막상의 강유전체 박막의ｍｏｃｖｄ용 시드층 프로세스
CN113437049B (zh) 一种铪基铁电存储器及其制备方法
KR101056867B1 (ko) 초저 표면거칠기를 갖는 강유전성 ｐｖｄｆ／ｐｍｍａ 박막을 적용한 비휘발성 메모리 디바이스의 제조방법
US6362503B1 (en) Low temperature process for fabricating layered superlattice materials and making electronic devices including same
CN115775687A (zh) 一种镓掺杂的氧化铪基铁电薄膜电容器及其制备方法
CN113363384B (zh) 一种HfO2基铁电隧道结器件及其制备方法
CN115084360A (zh) 一种具有局域调控特性的铁电多值存储器及其制备方法
KR100744026B1 (ko) 플래시 메모리 소자의 제조방법
WO2022190817A1 (ja) 強誘電性薄膜の形成方法、それを備える半導体装置
KR100265345B1 (ko) 반도체 장치의 고유전체 캐패시터 제조방법
Demkov et al. Ferroelectric Oxides on Silicon
Demkov et al. Ferroelectric Oxides on Sili

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant