CN113437033B - Packaging structure, preparation method thereof and electronic device - Google Patents
Packaging structure, preparation method thereof and electronic device Download PDFInfo
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- CN113437033B CN113437033B CN202110718033.XA CN202110718033A CN113437033B CN 113437033 B CN113437033 B CN 113437033B CN 202110718033 A CN202110718033 A CN 202110718033A CN 113437033 B CN113437033 B CN 113437033B
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- 238000004806 packaging method and process Methods 0.000 title claims abstract description 24
- 238000002360 preparation method Methods 0.000 title abstract description 8
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 120
- 229910021389 graphene Inorganic materials 0.000 claims abstract description 119
- 229910000679 solder Inorganic materials 0.000 claims description 51
- 239000000919 ceramic Substances 0.000 claims description 41
- 239000000758 substrate Substances 0.000 claims description 37
- 238000009826 distribution Methods 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 7
- 238000004519 manufacturing process Methods 0.000 claims description 2
- 230000017525 heat dissipation Effects 0.000 abstract description 11
- 230000003139 buffering effect Effects 0.000 abstract description 3
- 238000005336 cracking Methods 0.000 abstract 1
- 239000010408 film Substances 0.000 description 15
- 239000000463 material Substances 0.000 description 6
- 239000003822 epoxy resin Substances 0.000 description 5
- 229920000647 polyepoxide Polymers 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 239000010409 thin film Substances 0.000 description 4
- 229910002804 graphite Inorganic materials 0.000 description 2
- 239000010439 graphite Substances 0.000 description 2
- -1 graphite alkene Chemical class 0.000 description 2
- 229920001187 thermosetting polymer Polymers 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 239000004615 ingredient Substances 0.000 description 1
- 238000001746 injection moulding Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000009828 non-uniform distribution Methods 0.000 description 1
- 238000013021 overheating Methods 0.000 description 1
- 238000010125 resin casting Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The invention provides a packaging structure, a preparation method thereof and an electronic device. Based on the technical scheme of the invention, the graphene heat conduction layer formed by stacking the multiple layers of two-dimensional graphene films can effectively improve the heat dissipation efficiency of the packaging structure, and the multilayer stacking structure can play a role in buffering at an interface with high mechanical stress, so that the warping and cracking of components of the packaging structure caused by overlarge stress at the interface can be avoided.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a packaging structure, a preparation method thereof and an electronic device.
Background
Electronic packages are generally composed of various conductive and insulating materials having different coefficients of thermal expansion. In a typical ceramic ball grid array package, a silicon chip is mounted on a multilayer ceramic substrate module by solder joints embedded in an epoxy underfill, and the module is then integrally interconnected to a PCB by solder balls to form the final secondary package.
When the chip is powered on, the package changes temperature and the materials with different coefficients of thermal expansion have deformed at different rates, and this non-uniform distribution of coefficients of thermal expansion can cause thermally induced mechanical stresses in the components of the package. When the package assembly begins to cool, the PCB shrinks more than the multilayer ceramic substrate module. This uneven shrinkage can lead to overall bending of the entire assembly and relative horizontal displacement between the top and bottom of the solder balls. When the package is cooled to room temperature, the free shrinkage of the solder joint at the interface is limited by the adjacent material having a lower coefficient of thermal expansion.
Disclosure of Invention
In order to solve the problems that the ceramic ball grid array structure in the prior art is low in heat dissipation efficiency and uneven in thermal expansion to generate stress to cause damage of the packaging structure, the application provides the packaging structure, the preparation method of the packaging structure and the electronic device.
In a first aspect, the present invention provides a package structure, including at least one ball grid array component, where a graphene thermal conductive layer is disposed, and solder balls in the ball grid array component are embedded in the graphene thermal conductive layer.
In one embodiment, the graphene thermal conductive layer is formed by stacking a plurality of two-dimensional graphene thin films.
In one embodiment, the graphene thermal conductive layer of the ball grid array assembly has a recessed hole therein to receive the solder ball.
In one embodiment, the functional components connected to each other by the ball grid array component have surfaces in contact with surfaces of the graphene thermal conductive layers corresponding to the ball grid array component. By the embodiment, rapid heat transfer can be realized to the maximum extent; simultaneously, also make corresponding graphite alkene heat-conducting layer play support, the fixed action to corresponding functional unit.
In one embodiment, the graphene thermal conductive layer is further disposed on an upper surface of a chip in the package structure.
In an embodiment, a distribution area corresponding to the solder balls embedded in the graphene thermal conduction layer in each ball grid array component is not less than a preset value. By means of the present embodiment, it is ensured that the solder balls have a sufficient total connection area, satisfying the need for a stable electrical connection of the respective functional components.
In a second aspect, the present invention provides a method for manufacturing a package structure, including:
forming a first graphene heat conduction layer embedded with a solder ball on a printed circuit board;
mounting a double-sided copper-clad ceramic substrate on the first graphene heat conduction layer and connecting the double-sided copper-clad ceramic substrate with the printed circuit board through the solder balls;
forming a second graphene heat conduction layer embedded with a solder ball on the double-sided copper-clad ceramic substrate;
mounting a chip on a second graphene heat conduction layer and enabling the chip to be connected with the double-sided copper-clad ceramic substrate through the solder balls;
and forming a third graphene heat conduction layer on the upper surface of the chip.
In one embodiment, multiple layers of two-dimensional graphene thin films are grown sequentially to form the graphene thermal conductive layer.
In one embodiment, when each layer of the two-dimensional graphene film is grown, embedding holes for embedding the solder balls are formed on the two-dimensional graphene film according to a preset layout.
In a third aspect, the present invention provides an electronic device, which includes the above package structure.
The features mentioned above can be combined in various suitable ways or replaced by equivalent features as long as the object of the invention is achieved.
Compared with the prior art, the packaging structure, the preparation method thereof and the electronic device provided by the invention at least have the following beneficial effects:
the invention provides a packaging structure, and mainly provides a graphene heat conduction layer formed by stacking multiple layers of two-dimensional graphene films. On one hand, graphene is a material with the highest heat conductivity in the existing known materials, so that heat dissipation paths from a chip to a double-sided copper-clad ceramic substrate and from the double-sided copper-clad ceramic substrate to a printed circuit board can be increased, and the heat dissipation efficiency of the packaging structure is effectively improved. On the other hand, the graphene heat conduction layer is formed by stacking a plurality of layers of two-dimensional graphene films, and compared with graphene with a three-dimensional structure, the multilayer stacking structure can play a buffering role on an interface with high mechanical stress, and the phenomenon that the assembly of the packaging structure is warped and cracked due to overlarge stress at the interface can be avoided.
Drawings
The invention will be described in more detail hereinafter on the basis of embodiments and with reference to the accompanying drawings. Wherein:
fig. 1 shows a schematic structural diagram of a package structure of the present invention.
In the drawings, like parts are provided with like reference numerals. The drawings are not to scale.
Reference numerals are as follows:
the heat-conducting structure comprises a printed circuit board 1, a printed circuit board 2, solder balls 2, an epoxy resin layer 3, a heat radiator 4, a graphene heat-conducting layer 5, a first graphene heat-conducting layer 51, a second graphene heat-conducting layer 52, a third graphene heat-conducting layer 53, a chip 6 and a copper-clad ceramic substrate 7 on two sides.
Detailed Description
The invention will be further explained by the following embodiments in conjunction with the drawings.
The embodiment of the invention provides a packaging structure, which comprises at least one ball grid array component, wherein a graphene heat conduction layer 5 is arranged at the position of the ball grid array component, and solder balls 2 in the ball grid array component are embedded in the graphene heat conduction layer 5.
Specifically, as shown in fig. 1, a ceramic ball grid array package structure is adopted, and the package structure has two ball grid array components corresponding to the adopted double-sided copper-clad ceramic substrate 7. One ball grid array assembly is arranged on the upper surface of the printed circuit board 1 and is used for connecting the double-sided copper-clad ceramic substrate 7 to the printed circuit board 1; and the other ball grid array assembly is arranged on the upper surface of the double-sided copper-clad ceramic substrate 7 and is used for connecting the chip 6 to the double-sided copper-clad ceramic substrate 7. Thus, the ball grid array module realizes the electrical connection between the chip 6 and the double-sided copper-clad ceramic substrate 7 and between the double-sided copper-clad ceramic substrate 7 and the printed circuit board 1. However, the solder balls 2 in the ball grid array assembly are generally solder balls, which have poor thermal conductivity, and the heat inside the package structure cannot be dissipated in time, so that the normal use is easily affected.
Therefore, a graphene heat conduction layer 5 is further disposed for the ball grid array component, solder balls in the ball grid array component are all embedded in the graphene heat conduction layer 5, and the graphene heat conduction layer 5 and the ball grid array component are located on the same plane, as shown in fig. 1. Graphene is a material with the highest heat conductivity in the existing known materials, so that heat dissipation paths from the chip 6 to the double-sided copper-clad ceramic substrate 7 and from the double-sided copper-clad ceramic substrate 7 to the printed circuit board 1 can be increased, and the heat dissipation efficiency of the packaging structure is effectively improved.
Preferably, the graphene thermal conductive layer 5 is formed by stacking a plurality of two-dimensional graphene thin films.
Specifically, graphene heat-conducting layer 5 adopts multilayer two-dimensional graphene film to pile up and forms, compares in three-dimensional structure's graphite alkene, and its multilayer stack structure can play the cushioning effect at high mechanical stress's interface, can avoid interface department too big stress to lead to packaging structure's subassembly to produce warpage and fracture. Specifically, the two-dimensional graphene thin film is generally one or several atoms thick, and is stacked to form a multi-layer two-dimensional graphene structure, and is connected by virtue of intermolecular force, which is weaker than a chemical bond of the three-dimensional graphene, so that stress can be effectively buffered.
It should be noted that, in the ceramic ball grid array package structure according to the embodiment of the present invention, the graphene thermal conductive layer 5 is disposed for the ball grid array component, and on the basis of not changing the original package structure of the package body to a large extent, the problems of poor thermal conductivity of the solder balls in the ball grid array component and overheating deformation of the corresponding component caused thereby are solved. Therefore, in the practical application process, even if other types of package structures are adopted, as long as the corresponding structures have the ball grid array components, the graphene heat conduction layer 5 in the invention can be applied. Further, as long as a thermal interface which needs heat conduction or stress buffering exists in the package structure, the graphene heat conduction layer structure formed by stacking the multiple layers of two-dimensional graphene films can be applied to the interface.
Preferably, the functional components connected to each other by the ball grid array component have surfaces in contact with the surfaces of the graphene heat conducting layers 5 corresponding to the ball grid array component.
Specifically, referring to fig. 1 of the drawings, the lower surface of the chip 6, the upper and lower surfaces of the double-sided copper-clad ceramic substrate 7 and the upper surface of the printed circuit board 1 are all in contact with the corresponding graphene heat conduction layer 5, so that rapid heat transfer can be realized to the greatest extent; meanwhile, the corresponding graphene heat conduction layer 5 plays a role in supporting and fixing the corresponding functional component.
In one embodiment, the graphene thermal conductive layer 5 of the ball grid array assembly has embedding holes therein for receiving the solder balls 2.
Specifically, the embedding holes are processed in the graphene heat conduction layer 5 in advance, so that the arrangement of the solder balls 2 in the ball grid array assembly is convenient.
In one embodiment, the upper surface of the chip 6 in the package structure is also provided with a graphene thermal conductive layer 5.
Specifically, due to the excellent heat dissipation performance of the graphene, the graphene heat conduction layer 5 arranged on the upper surface of the chip 5 can effectively improve the effect that the chip 5 dissipates heat from the upper surface to the outside. The graphene heat conduction layer 5 does not correspond to the ball grid array component, so that no embedding hole is formed.
Preferably, a heat sink 4 is disposed on the graphene heat conduction layer 5 on the upper surface of the chip 6, and the heat sink 4 is an aluminum heat sink or a copper heat sink.
Specifically, referring to fig. 1 of the drawings, the graphene heat conduction layer 5 on the upper surface of the chip 6 can transfer heat of the chip 6 to the heat sink 4 above, and the heat is rapidly dissipated through the heat sink 4.
In one embodiment, the distribution area of the solder balls 2 embedded in the graphene thermal conduction layer 5 in each ball grid array component is not smaller than a preset value.
Specifically, it is ensured that the corresponding solder balls have a sufficient total connection area, and the requirement of stable electrical connection of the corresponding functional components is met, and the specific size of the preset value can be adjusted according to actual conditions.
The embodiment of the invention also provides a preparation method of the packaging structure, which is used for preparing the packaging structure and comprises the following steps:
a. forming a first graphene thermal conduction layer 51 with solder balls 2 embedded on a printed circuit board 1;
a1, sequentially growing a plurality of layers of two-dimensional graphene films and a first graphene heat conduction layer 51 by adopting a chemical vapor deposition method;
a2, when growing each layer of two-dimensional graphene film, forming embedding holes for embedding the solder balls 2 on the two-dimensional graphene film according to a preset layout by using a mask;
specifically, the distribution area corresponding to the solder balls 2 cannot be smaller than a preset value, and then the distribution area corresponding to the embedding holes needs to be controlled, that is, the distribution density of the embedding holes is determined according to the diameter of the embedding holes, the total distribution area corresponding to the embedding holes is not smaller than the preset value, it is ensured that the solder balls corresponding to the embedding holes have enough total connection area, and the requirement of stable electrical connection of corresponding functional parts is met.
a3, printing solder balls 2 in each embedding hole;
specifically, the solder balls 2 adopt solder balls, the solder paste is demoulded through holes in the steel plate, and the solder balls are printed in embedding holes of the graphene heat conduction layer 5;
b. mounting the double-sided copper-clad ceramic substrate 7 on the first graphene heat conduction layer 51 and connecting the first graphene heat conduction layer with the printed circuit board 1 through the solder balls 2;
c. forming a second graphene heat conduction layer 52 embedded with solder balls 2 on the double-sided copper-clad ceramic substrate 7;
c1, sequentially growing a plurality of layers of two-dimensional graphene films and a second graphene heat conduction layer 52;
c2, forming embedding holes for embedding the solder balls 2 on each two-dimensional graphene film according to a preset layout when each two-dimensional graphene film is grown;
specifically, the specific requirements of the embedding hole in the second graphene thermal conduction layer 52 are the same as those of the first graphene thermal conduction layer 51 described above.
c3, solder balls 2 are printed in each embedding hole.
d. Mounting the chip 6 on the second graphene heat conduction layer 52 and enabling the chip to be connected with the double-sided copper-clad ceramic substrate 7 through the solder balls 2;
e. forming a third graphene heat conduction layer 53 on the upper surface of the chip 6;
specifically, the third graphene heat conduction layer 53 is also formed by sequentially growing multiple layers of two-dimensional graphene films, but the third graphene heat conduction layer 53 is only used for heat dissipation and does not correspond to an electrical connection structure, and therefore, no embedding hole is provided.
f. Forming an epoxy resin layer 3 around the chip 6 by injection molding;
specifically, epoxy resin, curing agent and other ingredients are mixed in proportion and then injected into a mold, and the thermosetting fluid is crosslinked and cured into a thermosetting product. The epoxy resin casting product integrates excellent electrical property and mechanical property.
g. A heat sink 4 is mounted on the third graphene thermal conductive layer 53.
Specifically, as shown in fig. 1, the heat spreader 4 is fastened on the double-sided copper-clad ceramic substrate 7 and covers the chip 6 and the epoxy resin layer 3, and the inner surface of the top of the heat spreader is in contact with the third graphene thermal conductive layer 53 on the upper surface of the chip 6.
The steps described above are only general ones of the main steps of the method according to the embodiment of the present invention, and are not intended to limit the order of the steps. In specific application, the sequence of the steps is determined according to actual conditions, and the sequence of the corresponding steps can be exchanged.
An embodiment of the present invention provides a package structure as shown in fig. 1, which is similar to a sandwich structure and can be prepared by the above preparation method, and the package structure mainly includes a three-layer functional component structure and three graphene heat-conducting layers 5. The three graphene heat conduction layers 5 are all multilayer two-dimensional graphene film stacking structures, and the thickness of each layer of two-dimensional graphene film can be controlled according to actual requirements, for example, the thickness can be one atom thickness or multiple atom thicknesses.
In the multilayer functional component structure of the packaging structure, the bottom layer is a printed circuit board 1, the middle layer is a double-sided copper-clad ceramic substrate 7, and the upper layer is a chip 6. The printed circuit board 1 and the double-sided copper-clad ceramic substrate 7, and the double-sided copper-clad ceramic substrate 7 and the chip 6 are electrically and physically connected through a ball grid array assembly, and respectively correspond to the first graphene heat conduction layer 51 and the second graphene heat conduction layer 52, so that the first graphene heat conduction layer 51 and the second graphene heat conduction layer 52 are respectively provided with embedding holes for accommodating solder balls in the ball grid array assembly. The third graphene heat conduction layer 53 is arranged on the upper surface of the chip 6, is used for heat dissipation only, does not correspond to a ball grid array component, and further does not have an embedding hole. In the packaging structure, a heat dissipation channel with a good heat dissipation effect is formed by three graphene heat conduction layers 5.
The embodiment of the invention also provides an electronic device which comprises the packaging structure and further has all the technical effects of the packaging structure.
In the description of the present invention, it is to be understood that the terms "upper", "lower", "bottom", "top", "front", "rear", "inner", "outer", "left", "right", and the like, indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are only for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed in a particular orientation, and be operated, and thus, should not be construed as limiting the present invention.
Although the invention herein has been described with reference to particular embodiments, it is to be understood that these embodiments are merely illustrative of the principles and applications of the present invention. It is therefore to be understood that numerous modifications may be made to the illustrative embodiments and that other arrangements may be devised without departing from the spirit and scope of the present invention as defined by the appended claims. It should be understood that various dependent claims and the features described herein may be combined in ways different from those described in the original claims. It is also to be understood that features described in connection with individual embodiments may be used in other described embodiments.
Claims (6)
1. A packaging structure comprises at least one ball grid array assembly, wherein a graphene heat conduction layer is arranged at the position of the ball grid array assembly, and solder balls in the ball grid array assembly are embedded in the graphene heat conduction layer;
the graphene heat conduction layer is formed by stacking a plurality of layers of two-dimensional graphene films, and embedding holes for accommodating the solder balls are formed in the graphene heat conduction layer of the ball grid array assembly;
the packaging structure is prepared by adopting the following method:
forming a first graphene heat conduction layer embedded with solder balls on a printed circuit board;
mounting a double-sided copper-clad ceramic substrate on the first graphene heat conduction layer and connecting the double-sided copper-clad ceramic substrate with the printed circuit board through the solder balls;
forming a second graphene heat conduction layer embedded with a solder ball on the double-sided copper-clad ceramic substrate;
mounting a chip on a second graphene heat conduction layer and enabling the chip to be connected with the double-sided copper-clad ceramic substrate through the solder balls;
forming a third graphene heat conduction layer on the upper surface of the chip;
sequentially growing a plurality of layers of two-dimensional graphene films to form the graphene heat conduction layer, and forming embedding holes for embedding the solder balls on each layer of two-dimensional graphene film according to a preset layout when each layer of two-dimensional graphene film is grown;
the lower surface of the chip and the upper surface of the double-sided copper-clad ceramic substrate are respectively in contact with the upper surface and the lower surface of the second graphene heat conduction layer, and the lower surface of the double-sided copper-clad ceramic substrate and the upper surface of the printed circuit board are respectively in contact with the upper surface and the lower surface of the first graphene heat conduction layer.
2. The package structure according to claim 1, wherein the functional components connected to each other by the ball grid array component have surfaces in contact with surfaces of the graphene thermal conductive layers corresponding to the ball grid array component.
3. The package structure of claim 1, wherein the graphene thermal conductive layer is further disposed on an upper surface of a chip in the package structure.
4. The package structure of claim 1, wherein a distribution area corresponding to the solder balls embedded in the graphene thermal conduction layer in each ball grid array component is not smaller than a preset value.
5. A method for manufacturing a package structure, comprising:
forming a first graphene heat conduction layer embedded with a solder ball on a printed circuit board;
mounting a double-sided copper-clad ceramic substrate on the first graphene heat conduction layer and enabling the double-sided copper-clad ceramic substrate to be connected with the printed circuit board through the solder balls;
forming a second graphene heat conduction layer embedded with a solder ball on the double-sided copper-clad ceramic substrate;
mounting a chip on a second graphene heat conduction layer and enabling the chip to be connected with the double-sided copper-clad ceramic substrate through the solder balls;
forming a third graphene heat conduction layer on the upper surface of the chip;
the method comprises the following steps that a plurality of layers of two-dimensional graphene films are sequentially grown to form a graphene heat conduction layer, and embedding holes for embedding solder balls are formed in the two-dimensional graphene films according to a preset layout when each layer of the two-dimensional graphene film is grown;
the lower surface of the chip and the upper surface of the double-sided copper-clad ceramic substrate are respectively in contact with the upper surface and the lower surface of the second graphene heat conduction layer, and the lower surface of the double-sided copper-clad ceramic substrate and the upper surface of the printed circuit board are respectively in contact with the upper surface and the lower surface of the first graphene heat conduction layer.
6. An electronic device, characterized in that it comprises a package structure according to any one of claims 1 to 4.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110718033.XA CN113437033B (en) | 2021-06-28 | 2021-06-28 | Packaging structure, preparation method thereof and electronic device |
| PCT/CN2021/141276 WO2023273244A1 (en) | 2021-06-28 | 2021-12-24 | Packaging structure, preparation method therefor, and electronic device |
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| CN202110718033.XA CN113437033B (en) | 2021-06-28 | 2021-06-28 | Packaging structure, preparation method thereof and electronic device |
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| CN113437033B true CN113437033B (en) | 2022-07-15 |
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| CN102881667A (en) * | 2012-10-08 | 2013-01-16 | 日月光半导体制造股份有限公司 | Semiconductor packaging structure |
| KR102055361B1 (en) * | 2013-06-05 | 2019-12-12 | 삼성전자주식회사 | Semiconductor package |
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| TWI694566B (en) * | 2019-06-06 | 2020-05-21 | 恆勁科技股份有限公司 | Semiconductor package carrier board and manufacturing method thereof and electronic package |
| CN110707058A (en) * | 2019-09-24 | 2020-01-17 | 杭州臻镭微波技术有限公司 | Manufacturing method of three-dimensional heterogeneous module based on graphene as heat dissipation coating |
| CN113437033B (en) * | 2021-06-28 | 2022-07-15 | 珠海格力电器股份有限公司 | Packaging structure, preparation method thereof and electronic device |
-
2021
- 2021-06-28 CN CN202110718033.XA patent/CN113437033B/en active Active
- 2021-12-24 WO PCT/CN2021/141276 patent/WO2023273244A1/en unknown
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JPH08298296A (en) * | 1995-04-27 | 1996-11-12 | Matsushita Electric Works Ltd | Pbga package and pbga package mounting substrate |
| TW201324697A (en) * | 2011-10-13 | 2013-06-16 | Sumitomo Bakelite Co | Semiconductor package and semiconductor device |
| CN107039362A (en) * | 2015-12-11 | 2017-08-11 | 瑞萨电子株式会社 | Semiconductor devices |
| CN111477613A (en) * | 2020-06-04 | 2020-07-31 | 上海新微技术研发中心有限公司 | Three-dimensional chip packaging structure and packaging method |
| CN112055509A (en) * | 2020-07-31 | 2020-12-08 | 南京旭羽睿材料科技有限公司 | Graphene heat dissipation film with uniform heat dissipation, and preparation method and application thereof |
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| Publication number | Publication date |
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| CN113437033A (en) | 2021-09-24 |
| WO2023273244A1 (en) | 2023-01-05 |
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