CN113433584A - Pixel circuit in pixel detector compatible with electron collection and hole collection - Google Patents

Pixel circuit in pixel detector compatible with electron collection and hole collection Download PDF

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CN113433584A
CN113433584A CN202110721517.XA CN202110721517A CN113433584A CN 113433584 A CN113433584 A CN 113433584A CN 202110721517 A CN202110721517 A CN 202110721517A CN 113433584 A CN113433584 A CN 113433584A
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voltage pulse
pixel
reverse voltage
comparator
output
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CN113433584B (en
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王永生
崔嘉炜
李蕾
付方发
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Harbin Institute of Technology
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Harbin Institute of Technology
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01TMEASUREMENT OF NUCLEAR OR X-RADIATION
    • G01T5/00Recording of movements or tracks of particles; Processing or analysis of such tracks
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01TMEASUREMENT OF NUCLEAR OR X-RADIATION
    • G01T1/00Measuring X-radiation, gamma radiation, corpuscular radiation, or cosmic radiation
    • G01T1/16Measuring radiation intensity
    • G01T1/17Circuit arrangements not adapted to a particular type of detector

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Abstract

A pixel circuit in a pixel detector compatible with electron collection and hole collection relates to the field of semiconductor integrated circuit design. The invention aims to solve the problems of low resolution and low use efficiency of the existing method for amplifying the electrons with negative charges and the holes with positive charges by respectively adopting different devices. The method and the device can obtain the energy amplitude information of the hit pixel particles, the time information of the hit pixel and the position of the hit pixel through a preamplifier, a comparator, a track and time information obtaining module, a regulator and an energy amplitude information obtaining module. It is used in pixel detectors.

Description

Pixel circuit in pixel detector compatible with electron collection and hole collection
Technical Field
The invention relates to a pixel circuit structure in a pixel detector compatible with electron collection and hole collection, belonging to the field of semiconductor integrated circuit design.
Background
In applications such as high-energy physical experiments and space particle detection, a large number of high-energy particles exist, the energy amplitudes of the high-energy particles are different, and in order to collect and detect the particles, a single-chip active pixel detector or a mixed pixel detector is generally required to be used for the application scenes internationally. The pixel detector is typically comprised of a semiconductor particle detection device and an analog front end readout circuit. The semiconductor front-end detection device with different structure types can collect electrons or holes at a collecting point, an analog front-end reading circuit amplifies the electrons or the holes, the prior analog front-end reading device respectively adopts different analog front-end reading devices for amplifying the electrons with negative charges and the holes with positive charges, and the same set of analog front-end reading chip is not adopted for accurately detecting the track, time and energy information of different charged particles.
Disclosure of Invention
The invention aims to solve the problems of low resolution and low use efficiency of the existing method for amplifying the electrons with negative charges and the holes with positive charges by respectively adopting different devices. Pixel circuits in pixel detectors are now provided that are compatible with electron collection and hole collection.
A pixel circuit in a pixel detector compatible with electron collection and hole collection, the circuit comprising a preamplifier, a comparator, a track and time information acquisition module, a trimmer, and an energy amplitude information acquisition module,
the preamplifier is simultaneously connected with a positive phase input end of the comparator and the energy amplitude information acquisition module and is used for amplifying negatively charged electrons or positively charged holes collected after the pixels in the front-end detector are hit by incident particles, the negatively charged electrons are amplified to obtain a forward voltage pulse signal, the positively charged holes are amplified to obtain a reverse voltage pulse signal, and the forward voltage pulse signal or the reverse voltage pulse signal is sent to the comparator;
the comparator is connected with the track and time information acquisition module and used for outputting a forward voltage pulse to the track and time information acquisition module when receiving a forward voltage pulse signal and one type of reference voltage and outputting a reverse voltage pulse to the track and time information acquisition module when receiving a reverse voltage pulse signal and the other type of reference voltage;
the track and time information acquisition module is used for processing the forward voltage pulse or the reverse voltage pulse to obtain the hit time information of the pixel and the position of the hit pixel;
the adjuster is connected with the inverting input end of the comparator and used for setting an input signal, a control signal and a reference voltage for the input end of the adjuster according to the structure type of the front-end detector, so that the adjuster outputs a reference voltage, when the structure type of the front-end detector is used for collecting electrons with negative charges, the adjuster outputs a direct current bias voltage higher than that input to the preamplifier as one reference voltage, when the structure type of the front-end detector is used for collecting holes with positive charges, the adjuster outputs a direct current bias voltage lower than that input to the preamplifier as another reference voltage, and one reference voltage or the other reference voltage is transmitted to the inverting input end of the comparator;
and the energy amplitude information acquisition module is used for carrying out peak value holding on the forward voltage pulse signal or the reverse voltage pulse signal output by the preamplifier to obtain the energy amplitude information of the hit pixel particles.
Preferably, the track and time information acquisition module includes an inverter, an alternative data selector, a pulse width controller and a digital logic control circuit,
the inverter is connected between the output end of the comparator and the one-of-two data selector and is used for converting the forward voltage pulse output by the comparator into a reverse voltage pulse or converting the reverse voltage pulse into a forward voltage pulse and inputting the forward voltage pulse to the one-of-two data selector;
the alternative data selector is connected with the pulse width controller and is used for selecting a reverse voltage pulse from the forward voltage pulse output by the comparator and the reverse voltage pulse output by the inverter, or selecting a reverse voltage pulse from the reverse voltage pulse output by the comparator and the forward voltage pulse output by the inverter, wherein the reverse voltage pulse is acquired by the alternative data selector;
the pulse width controller is connected with the digital logic control circuit and is used for shaping the pulse width of the reverse voltage into a forward pulse with a set width;
and the digital logic control circuit is used for processing the positive pulse with the set width to obtain the time information of the hit of the pixel and the position of the hit pixel.
Preferably, the track and time information acquisition module further comprises a schmitt inverter,
and the Schmitt phase inverter is connected between the comparator and the alternative data selector and is used for filtering fluctuation in the forward voltage pulse or the reverse voltage pulse output by the comparator to obtain the non-interference forward voltage pulse or reverse voltage pulse.
Preferably, the pulse width controller includes 4 inverters having a delay function, 1 inverter having a logical not function and an nor gate,
4 inverters with time delay function, which are used for generating a fixed time delay for the reverse voltage pulse output by the alternative data selector to obtain the reverse voltage pulse with the fixed time delay;
the inverter with logic negation function is used for receiving the reverse voltage pulse with fixed time delay and outputting the forward voltage pulse with fixed time delay;
and the NOR gate is used for receiving the forward voltage pulse with fixed time delay and the reverse voltage pulse output by the alternative data selector and outputting the forward pulse with set width.
Preferably, the energy magnitude information obtaining module includes a controller, an analog switch, a peak hold circuit, and an analog one-out-of-two data selector,
the peak hold circuit includes a peak hold circuit of a forward voltage and a peak hold circuit of a reverse voltage,
the controller is connected with the analog switch and is used for inputting a control signal for collecting electrons or a control signal for collecting holes to the analog switch;
the analog switch is connected between the preamplifier and the peak holding circuit and is used for sending a forward voltage pulse signal output by the preamplifier to the peak holding circuit of forward voltage after receiving a control signal for collecting electrons, and sending a reverse voltage pulse signal output by the preamplifier to the peak holding circuit of reverse voltage after receiving the control signal for collecting holes;
the peak value holding circuit of the forward voltage is connected with the analog alternative data selector and is used for receiving the forward voltage pulse signal to carry out peak value holding;
the peak value holding circuit of the reverse voltage is connected with the analog alternative data selector and is used for receiving the reverse voltage pulse signal to carry out peak value holding;
and the analog alternative data selector is used for receiving the forward voltage pulse signal or the reverse voltage pulse signal to obtain the energy amplitude information of the pixel particles hit.
Preferably, the controller is further configured to input a control signal to the one-of-two data selector;
an alternative data selector for selecting a reverse voltage pulse from the forward voltage pulse output from the comparator and the reverse voltage pulse output from the inverter, or selecting a reverse voltage pulse from the reverse voltage pulse output from the comparator and the forward voltage pulse output from the inverter, according to a control signal output from the controller;
the control signal input by the input end of the regulator is input by the controller.
Preferably, the preamplifier is implemented using a charge sensitive amplifier.
Preferably, the regulator is implemented using a threshold adjustment digital-to-analog converter.
Preferably, an input signal, a control signal and a reference voltage are provided for the input of the threshold adjustment digital-to-analog converter, wherein the input signal has 3.
Preferably, the front-end detector is of a type that collects negatively charged electrons or positively charged holes.
The invention has the beneficial effects that:
the invention provides a pixel circuit structure in a pixel detector compatible with electron collection and hole collection. The method is internationally proposed for the first time to adopt the same analog front-end reading chip, is compatible with electron collection and hole collection detection, and has wide application prospect in the fields of space science engineering and basic physical research. The pixel circuit structure has the advantages that the compatible electron and hole collection is realized, the preamplifier can amplify the negatively charged electrons collected by the front-end detector and can amplify the positively charged holes, so that the track, time and energy information of different charged particles can be accurately detected by the same device, and the pixel circuit structure has the advantages of high use efficiency, high resolution, high sensitivity, low power consumption and the like.
The application has the advantages that:
1. the existing pixel circuit can only amplify a single charge type, but the current directions generated are different due to different charge types collected by different detector structure types, and the traditional pixel circuit cannot be compatible with the requirements of different detector structure types on electron collection and hole collection.
2. The signal output by the comparator can be shaped to a fixed width by the pulse width controller after being logically processed, and the pulse width controller has the advantages that: the pulse width of the analog voltage output by the pre-amplifier CSA is affected by the energy amplitude of the particles and the reset voltage of the CSA, and when the particles with different energy amplitudes hit or the reset voltage is different, the output voltage width of the pre-amplifier CSA is different, which causes the output pulse width of the comparator to be different. When the output voltage width of the preamplifier CSA is large, the comparator output pulse with large pulse width can be generated, the digital circuit at the rear stage is interfered by signal stacking to work, the pulse is shaped to a fixed width by adopting the pulse width controller, and the digital circuit at the rear stage can be effectively prevented from being interfered by the signal stacking at the front stage.
3. When the collecting point collects electrons, the preamplifier CSA generates a positive output voltage pulse; when the collecting point collects the holes, the preamplifier CSA generates an inverted output voltage pulse, the direction of the voltage pulse is opposite, and the reference voltage of the comparator is required to be configured according to an electron collecting mode or a hole collecting mode, and is configured to be higher than the reference voltage of the direct-current bias voltage input to the preamplifier or lower than the reference voltage of the direct-current bias voltage input to the preamplifier, so that the comparator can output a forward pulse or an inverted pulse when the pixel is hit.
When particles with different energy amplitudes hit, the amplitude of the output pulse of the pre-amplifier CSA is different, and comparator reference voltages with different gradients can be obtained by configuring the input DAC _3bit _2, DAC _3bit _1 and DAC _3bit _0 of the DAC.
4. The preamplifier adopts a Charge Sensitive Amplifier (CSA) and has the advantages of high stability, better noise performance and strong anti-interference capability, and is more suitable for a pixel circuit of a pixel detector, and the linear amplification of charge information at an input sensitive node can be realized.
Drawings
FIG. 1 is a schematic diagram of a pixel circuit in a pixel detector compatible with electron collection and hole collection;
FIG. 2 is a block diagram of a pulse width controller;
fig. 3 is a signal diagram of the operation of the pulse width controller.
Detailed Description
The first embodiment is as follows: referring to fig. 1, a pixel circuit in a pixel detector compatible with electron collection and hole collection according to this embodiment is specifically described, and the circuit includes a preamplifier 1, a comparator 2, a track and time information acquisition module 3, an adjuster 4 and an energy amplitude information acquisition module 5,
the preamplifier 1 is simultaneously connected with a positive phase input end of the comparator 2 and the energy amplitude information obtaining module 5, and is used for amplifying negatively charged electrons or positively charged holes collected after a pixel in a front-end detector is hit by incident particles, the negatively charged electrons are amplified to obtain a forward voltage pulse signal, the positively charged holes are amplified to obtain a reverse voltage pulse signal, and the forward voltage pulse signal or the reverse voltage pulse signal is sent to the comparator 2 and the energy amplitude information obtaining module 5;
the comparator 2 is connected with the track and time information acquisition module 3 and used for outputting a forward voltage pulse to the track and time information acquisition module 3 when receiving a forward voltage pulse signal and a reference voltage and outputting a reverse voltage pulse to the track and time information acquisition module 3 when receiving a reverse voltage pulse signal and another reference voltage;
a track and time information obtaining module 3, configured to process the forward voltage pulse or the reverse voltage pulse to obtain time information of the hit pixel and a position of the hit pixel;
a regulator 4 connected to the inverting input terminal of the comparator 2 for setting an input signal, a control signal and a reference voltage for the input terminal of the regulator 4 according to the structure type of the front-end detector, so that the regulator 4 outputs a reference voltage, when the structure type of the front-end detector is for collecting negatively charged electrons, the regulator 4 outputs a dc offset voltage higher than that input to the preamplifier as one reference voltage, and when the structure type of the front-end detector is for collecting positively charged holes, the regulator 4 outputs a dc offset voltage lower than that input to the preamplifier as another reference voltage, and transmits the one reference voltage or the other reference voltage to the inverting input terminal of the comparator 2;
and the energy amplitude information obtaining module 5 is configured to perform peak holding on the forward voltage pulse signal or the reverse voltage pulse signal output by the preamplifier 1 to obtain energy amplitude information of the pixel particle hit.
IN this embodiment, as shown IN fig. 1, an input end PIX _ IN of the CSA is connected to a front end detection device, the detector collects different types of charges and generates output currents IN different directions, the CSA converts the collected output currents generated by electrons or holes into voltage signals to be output, the preamplifier 1 outputs CSA _ OUT and generates forward or reverse voltage pulses according to the different types of the collected charges, the CSA _ OUT is connected to two signal paths, one of the CSA _ OUT signals is a Hit indication signal indicating that a pixel is Hit (indicating that a pixel collects negatively charged electrons or positively charged holes at a collection point after receiving high-energy incident particles) through the track and time information acquisition module 3, and is used for indicating time information indicating the occurrence of a pixel Hit event and indicating the position of the Hit pixel for track reading; and the other signal path is an energy amplitude reading path formed by selecting different PDH circuits through an electron or hole working mode to finish the analog voltage holding of the energy amplitude.
In order to be compatible with the electron collection and the hole collection, the reference voltage of the comparator can be configured by the DAC, and an appropriate reference voltage is selected according to the electron collection mode or the hole collection mode, and the comparator can output a forward pulse or a reverse pulse when the pixel is hit, and carry out logic processing on signals output by the comparator under different charge type collection modes to obtain the information that the pixel is hit. The output of the CSA can be configured by an electron collection mode or a hole collection mode, and a forward peak holding circuit PDH or a backward peak holding circuit PDH is selected to complete analog quantity holding, and the PDH has the functions of holding an analog voltage peak value generated by collecting charges, completing analog voltage acquisition holding of an energy amplitude, and forming an energy amplitude reading path.
After the signal output by the comparator is subjected to logic processing, the pulse width can be shaped to a fixed width through the pulse width controller, and the phenomenon that the front-stage signal stack interferes with the work of a rear-stage digital circuit can be effectively prevented.
In this embodiment, the front-end detector receives incident particles with energy. The track indicates which pixel of the plurality of pixels is hit, i.e., the address of the pixel; the time finger is hit by the event occurrence.
The internationally applied front-end detectors have different structural types, so that the types of charges (electrons or holes) collected by the collection points are different, so that a pixel circuit compatible with electron collection and hole collection is provided.
The input terminal of the regulator is artificially configured, and since the structure type of the front-end detector is used, the signals to be input by the regulator are configured according to the structure type of the front-end detector, DAC _3bit _2, DAC _3bit _1, and DAC _3bit _0 in fig. 1 are input signals, VREF is a reference voltage, and P _ E _ select is a control signal input by the controller, which is the same signal as the control signal input to the analog switch, the control signal input to the one-out-of-two data selector, and the control signal input to the analog one-out-of-two data selector.
This comparator reference voltage CMP _ VREF should be configured to be a higher voltage than CSA _ VREF if the CSA outputs a positive going pulse. This is because when the CSA is not collecting charge, the output voltage is the CSA _ VREF, which is the dc bias voltage of the CSA or the CSA common mode voltage. Taking the example of collecting electrons (when the pixel is hit by CSA to output a positive pulse), when the pixel is not hit, the comparator output is low because CSA _ VREF is lower than CMP _ VREF, and when the pixel is hit, the output of CSA will generate a pulse higher than CSA _ VREF, and the comparator output will generate a high pulse. The hole collection mode is the same, but in the opposite direction.
In fig. 1, P _ E _ select on the left side of the regulator is an electron hole mode selection configuration signal, when configured in the electron collection mode, since the CSA output is a forward pulse, the reference voltage of the comparator should be configured to be higher than the dc bias voltage input to the preamplifier, and DAC _3bit _2, DAC _3bit _1, and DAC _3bit _0 are specific voltage values used to configure the dc bias voltage higher than the input to the preamplifier (for the DAC circuit, the voltage values are also related to VREF, but VREF is a reference voltage value and not a configuration signal), and the specific voltage values can be configured to be different voltages through the three configuration bits to form voltage gradients to meet the detection requirements of particles with different energy magnitudes.
The second embodiment is as follows: referring to fig. 2 and fig. 3, this embodiment is further described with reference to the pixel circuit in the pixel detector compatible with electron collection and hole collection described in the first embodiment, in this embodiment, the track and time information acquisition module 3 includes an inverter 3-2, an alternative data selector 3-3, a pulse width controller 3-4 and a digital logic control circuit 3-5,
an inverter 3-2 connected between the output terminal of the comparator 2 and the one-of-two data selector 3-3 for converting the forward voltage pulse output from the comparator 2 into a reverse voltage pulse or converting the reverse voltage pulse into a forward voltage pulse to be input to the one-of-two data selector 3-3;
an alternative data selector 3-3 connected to the pulse width controller 3-4 for selecting a reverse voltage pulse from the forward voltage pulse output from the comparator 2 and the reverse voltage pulse output from the inverter 3-2, or selecting a reverse voltage pulse from the reverse voltage pulse output from the comparator 2 and the forward voltage pulse output from the inverter 3-2, which are acquired by the alternative data selector 3-3;
the pulse width controller 3-4 is connected with the digital logic control circuit 3-5 and is used for shaping the pulse width of the reverse voltage into a forward pulse with a set width;
and the digital logic control circuit 3-5 is used for processing the forward pulse with the set width to obtain the time information of the hit of the pixel and the position of the hit pixel.
In this embodiment, Delay _ Unit _ in fig. 2 is a signal at the input end of the pulse width controller; delay _ Unit _ out is a signal at the output end of the pulse width controller; INV is an inverter; bias is the inverter bias signal; the Delay _ Unit _ in and the signal passing through 5 inverters (wherein the first four inverters have bias signals and can play a role of time Delay, the last inverter has no bias signal and only plays a role of logic negation) are input to a two-input NOR gate, and the output Delay _ Unit _ out of the two-input NOR gate is a signal at the output end of the pulse width controller.
FIG. 3 is a signal diagram of the operation of the pulse width controller, when a pixel is hit, the output terminal of the alternative data selector (i.e. the input terminal of the pulse width controller) will generate an inverted pulse, which has a non-constant pulse width and may be very long, and if not processed, the signal stack will affect the operation of the subsequent circuit; the signal Delay _ Unit _ in is a reverse pulse, the signal A is output through four inverters with a Delay function, the signal has a fixed Delay on a time axis, and the logic is unchanged; the B signal is a signal of A passing through a logic NOT gate; the Delay _ Unit _ in and B pass through a two-input nor gate, and the output Delay _ Unit _ out is a signal with a fixed pulse width. The signal stack is effectively avoided from influencing the working condition of the rear-stage circuit.
The third concrete implementation mode: in this embodiment, the pixel circuit of the pixel detector compatible with electron collection and hole collection described in the second embodiment is further explained, in this embodiment, the track and time information obtaining module 3 further includes a schmitt inverter 3-1,
and the Schmitt inverter 3-1 is connected between the comparator 2 and the alternative data selector 3-3 and is used for filtering fluctuation in the forward voltage pulse or the reverse voltage pulse output by the comparator 2 to obtain the interference-free forward voltage pulse or reverse voltage pulse.
In the embodiment, the Schmitt inverter is used for improving the anti-interference capability, the Schmitt inverter is added to the output of the comparator, and the output of the comparator has small disturbance and interference and cannot influence a post-stage circuit, so that misoperation is avoided.
The fourth concrete implementation mode: this embodiment is further described with respect to the pixel circuit of the pixel detector compatible with electron collection and hole collection described in the second embodiment, in this embodiment, the pulse width controller 3-4 includes 4 inverters with delay function, 1 inverter with logic not function and nor gate,
4 phase inverters with time delay function, which are used for generating a fixed time delay for the reverse voltage pulse output by the alternative data selector 3-3 to obtain the reverse voltage pulse with the fixed time delay;
the inverter with logic negation function is used for receiving the reverse voltage pulse with fixed time delay and outputting the forward voltage pulse with fixed time delay;
and the NOR gate is used for receiving the forward voltage pulse with fixed time delay and the reverse voltage pulse output by the alternative data selector 3-3 and outputting the forward pulse with set width.
The fifth concrete implementation mode: in this embodiment, the pixel circuit in the pixel detector compatible with electron collection and hole collection described in the third embodiment is further explained, in this embodiment, the energy amplitude information obtaining module 5 includes a controller, an analog switch 5-1, a peak holding circuit, and an analog one-out-of-two data selector 5-4,
the peak hold circuit includes a peak hold circuit 5-2 for a forward voltage and a peak hold circuit 5-3 for a reverse voltage,
the controller is connected with the analog switch 5-1 and is used for inputting a control signal for collecting electrons or a control signal for collecting holes to the analog switch 5-1;
the analog switch 5-1 is connected between the preamplifier 1 and the peak holding circuit and is used for sending a forward voltage pulse signal output by the preamplifier 1 to the peak holding circuit 5-2 of forward voltage after receiving a control signal for collecting electrons, and sending a reverse voltage pulse signal output by the preamplifier 1 to the peak holding circuit 5-3 of reverse voltage after receiving a control signal for collecting holes;
the peak value holding circuit 5-2 of the forward voltage is connected with the analog alternative data selector 5-4 and used for receiving the forward voltage pulse signal to carry out peak value holding;
the peak value holding circuit 5-3 of the reverse voltage is connected with the analog alternative data selector 5-4 and used for receiving the reverse voltage pulse signal to carry out peak value holding;
and the analog alternative data selector 5-4 is used for receiving the forward voltage pulse signal or the reverse voltage pulse signal to obtain the energy amplitude information of the pixel hitting particles.
The sixth specific implementation mode: in this embodiment, a pixel circuit in the pixel detector compatible with electron collection and hole collection described in the fifth embodiment is further described, in this embodiment, the controller is further configured to input a control signal to the one-of-two data selector 3-3;
an alternative data selector 3-3 for selecting a reverse voltage pulse from the forward voltage pulse output from the comparator 2 and the reverse voltage pulse output from the inverter 3-2, or selecting a reverse voltage pulse from the reverse voltage pulse output from the comparator 2 and the forward voltage pulse output from the inverter 3-2, according to a control signal output from the controller;
the control signal input by the input end of the regulator 4 is input by a controller.
In this embodiment, the comparator outputs pulses in different directions, and when collecting electrons, the CSA outputs a positive pulse, and the signal after passing through the comparator is also a positive pulse; when collecting the cavity, CSA outputs as the reverse pulse, the signal after the comparator is the reverse pulse too; with this inverter, it is ensured that when a pixel is hit, the input of the one-of-two data selector is a forward pulse and a reverse pulse, and the direction of the pulse passing through the one-of-two data selector is selected to be a fixed direction and not affected by the type of collected charge. Facilitating the processing of the following digital logic circuit.
The seventh embodiment: in this embodiment, a pixel circuit in the pixel detector compatible with electron collection and hole collection described in the first embodiment is further described, in this embodiment, the preamplifier 1 is implemented by using a charge sensitive amplifier.
In this embodiment, the preamplifier employing the charge-sensitive amplifier (CSA) has the advantages of being capable of linearly amplifying charge information at an input sensitive node, high in stability, better in noise performance and strong in anti-interference capability, and is more suitable for a pixel circuit of a pixel detector.
The specific implementation mode is eight: in this embodiment, a pixel circuit in the pixel detector compatible with electron collection and hole collection described in the first embodiment is further described, and in this embodiment, the adjuster 4 is implemented by using a threshold adjustment digital-to-analog converter.
In this embodiment, the output of the CSA is connected to a comparator, and the reference voltage CMP _ VREF of the comparator can be configured according to the electron or hole collection mode and the DAC _3bit _2, DAC _3bit _1, and DAC _3bit _0 of the DAC. When the CSA outputs a reverse voltage pulse, the CMP _ VREF is configured to be lower than the CSA output common mode voltage by the electron or hole collection mode selection bit P _ E _ select, and when the CSA output pulse is generated, the comparator can output the reverse pulse; when the CSA outputs a positive voltage pulse, the CMP _ VREF is configured to be higher than the CSA output common mode voltage by the electron or hole collection mode selection bit P _ E _ select, and when the CSA output pulse is generated, the comparator can output the positive pulse; the output of the comparator and the non-signal output by the comparator pass through an alternative data selector, the data selector is controlled by a P _ E _ select signal, when the output pulse of the comparator is in a positive direction, the signal passing through the Schmitt inverter is in a reverse direction, and the selector directly outputs the reverse pulse; when the comparator output pulse is in the reverse direction, the signal passing through the schmitt inverter is in the positive direction, and the selector outputs the non-signal of the positive pulse, i.e. the reverse pulse. The pulse signal after logic processing can pass through a pulse width controller circuit, the pulse width of the output pulse is controlled through four cascaded NOT gates with fixed delay, the pulse is shaped into a forward pulse with fixed width, and the phenomenon that a front-stage signal stack interferes with a rear-stage digital circuit can be effectively prevented.
The output of the CSA is simultaneously connected with an analog switch, the analog switch is configured by an electron or hole collection mode selection bit P _ E _ select, when the collected charges are electrons, the CSA _ OUT is a forward pulse, and therefore a peak holding circuit PDH + connected to a forward voltage carries OUT peak holding on the forward pulse of the CSA; when the collected charges are holes, CSA _ OUT is a reverse pulse, and therefore, a peak hold circuit PDH-of a reverse voltage is connected to peak hold the reverse pulse of this CSA. The maintained peak may reflect the energy amplitude information incident on the detection device particles. The voltage signals output by PDH + and PDH-pass through an Analog one-Out-of-two data selector, the data selector is configured by an electron or hole collection mode selection bit P _ E _ select, the output voltage of PDH + is selected as an Analog output to an Analog Out port during electron injection, and the output voltage of PDH-is selected as an Analog output to the Analog Out port during hole injection.
The specific implementation method nine: in this embodiment, an input signal, a control signal and a reference voltage are set for an input end of the threshold adjustment digital-to-analog converter, where the number of the input signals is 3.
The detailed implementation mode is ten: in this embodiment, the structure type of the front end detector is a front end detector for collecting negatively charged electrons or a front end detector for collecting positively charged holes.
IN the embodiment, the detection device is connected with an input end PIX _ IN of the CSA, the PN junction of the detection device is reversely biased when the detection device works, when particles enter the detection device, electron-hole pairs are generated IN a depletion region, and when the collection point collects the electrons, reverse output current is generated; when the collecting point collects the holes, a positive output current is generated. The preamplifier adopts a CSA (charge sensitive amplifier), has the advantages of realizing the linear amplification of charge information at an input sensitive node, having high stability, low noise and strong anti-interference capability, and is used for converting a charge signal collected by a detection device into an analog voltage signal and carrying out inverse amplification, and generating a positive output voltage pulse when a collection point collects electrons; the collection point generates an inverted output voltage pulse as it collects the holes.
The circuit structure of the application is a circuit in a pixel detector, which is also called a pixel analog front end reading circuit (pixel circuit), a front end detection device and the pixel analog front end reading circuit form a pixel, if the pixel array is 10 × 10, 10 × 10 front end detection devices and 10 × 10 pixel analog front end circuits are provided, the two front end detection devices and the 10 × 10 pixel analog front end circuits are in one-to-one correspondence, hit means that the front end detection devices receive incident high-energy particles and generate electron-hole pairs, due to the fact that the front end detector structure types are different, the types of charges collected at a collection point are different, and the voltage pulse directions obtained by amplifying the collected charges by a preamplifier are different. The type of charge that the preamplifier amplifies depends on the type of detector configuration.

Claims (10)

1. Pixel circuit in a pixel detector compatible with electron collection and hole collection, characterized in that said circuit comprises a preamplifier (1), a comparator (2), a track and time information acquisition module (3), a trimmer (4) and an energy amplitude information acquisition module (5),
the preamplifier (1) is simultaneously connected with a positive phase input end of the comparator (2) and the energy amplitude information obtaining module (5) and is used for amplifying negatively charged electrons or positively charged holes collected after a pixel in a front-end detector is hit by incident particles, the negatively charged electrons are amplified to obtain a forward voltage pulse signal, the positively charged holes are amplified to obtain a reverse voltage pulse signal, and the forward voltage pulse signal or the reverse voltage pulse signal is sent to the comparator (2) and the energy amplitude information obtaining module (5);
the comparator (2) is connected with the track and time information acquisition module (3) and is used for outputting a forward voltage pulse to the track and time information acquisition module (3) when receiving a forward voltage pulse signal and a reference voltage and outputting a reverse voltage pulse to the track and time information acquisition module (3) when receiving a reverse voltage pulse signal and another reference voltage;
the track and time information acquisition module (3) is used for processing the forward voltage pulse or the reverse voltage pulse to obtain the hit time information of the pixel and the position of the hit pixel;
the adjuster (4) is connected with the inverting input end of the comparator (2) and used for setting an input signal, a control signal and a reference voltage for the input end of the adjuster (4) according to the structure type of the front-end detector, so that the adjuster (4) outputs a direct current offset voltage which is higher than that input to the preamplifier to serve as a reference voltage when the structure type of the front-end detector is used for collecting electrons with negative charges, and outputs a direct current offset voltage which is lower than that input to the preamplifier to serve as another reference voltage when the structure type of the front-end detector is used for collecting holes with positive charges, and one reference voltage or the other reference voltage is transmitted to the inverting input end of the comparator (2);
and the energy amplitude information obtaining module (5) is used for carrying out peak value holding on the forward voltage pulse signal or the reverse voltage pulse signal output by the preamplifier (1) to obtain the energy amplitude information of the hit pixel particles.
2. Pixel circuit in a compatible electron and hole collecting pixel detector according to claim 1, characterized in that the track and time information acquisition module (3) comprises an inverter (3-2), an alternative data selector (3-3), a pulse width controller (3-4) and a digital logic control circuit (3-5),
an inverter (3-2) connected between the output terminal of the comparator (2) and the one-out-of-two data selector (3-3) for converting the forward voltage pulse output from the comparator (2) into a reverse voltage pulse or converting the reverse voltage pulse into a forward voltage pulse and inputting the forward voltage pulse to the one-out-of-two data selector (3-3);
the alternative data selector (3-3) is connected with the pulse width controller (3-4) and is used for selecting a reverse voltage pulse from the forward voltage pulse output by the comparator (2) and the reverse voltage pulse output by the inverter (3-2) acquired by the alternative data selector (3-3) or selecting a reverse voltage pulse from the reverse voltage pulse output by the comparator (2) and the forward voltage pulse output by the inverter (3-2);
the pulse width controller (3-4) is connected with the digital logic control circuit (3-5) and is used for shaping the pulse width of the reverse voltage into a forward pulse with a set width;
and the digital logic control circuit (3-5) is used for processing the positive pulse with the set width to obtain the time information of the hit of the pixel and the position of the hit pixel.
3. Pixel circuit in a compatible electron and hole collecting pixel detector according to claim 2, characterized in that the track and time information acquisition module (3) further comprises a Schmitt inverter (3-1),
and the Schmitt inverter (3-1) is connected between the comparator (2) and the alternative data selector (3-3) and is used for filtering fluctuation in the forward voltage pulse or the reverse voltage pulse output by the comparator (2) to obtain the interference-free forward voltage pulse or reverse voltage pulse.
4. Pixel circuit in a compatible electron and hole collecting pixel detector according to claim 2, characterized in that the pulse width controller (3-4) comprises 4 inverters with delay function, 1 inverter with logic not function and an OR-NOT gate,
4 phase inverters with time delay function, which are used for generating a fixed time delay for the reverse voltage pulse output by the alternative data selector (3-3) to obtain the reverse voltage pulse with the fixed time delay;
the inverter with logic negation function is used for receiving the reverse voltage pulse with fixed time delay and outputting the forward voltage pulse with fixed time delay;
and the NOR gate is used for receiving the forward voltage pulse with fixed time delay and the reverse voltage pulse output by the alternative data selector (3-3) and outputting the forward pulse with set width.
5. Pixel circuit in a compatible electron collecting and hole collecting pixel detector according to claim 3, characterized in that the energy magnitude information obtaining module (5) comprises a controller, an analog switch (5-1), a peak hold circuit and an analog one-out-of-two data selector (5-4),
the peak hold circuit comprises a peak hold circuit (5-2) of forward voltage and a peak hold circuit (5-3) of reverse voltage,
a controller connected with the analog switch (5-1) and used for inputting a control signal for collecting electrons or a control signal for collecting holes to the analog switch (5-1);
the analog switch (5-1) is connected between the preamplifier (1) and the peak holding circuit and is used for sending a forward voltage pulse signal output by the preamplifier (1) to the peak holding circuit (5-2) of forward voltage after receiving a control signal for collecting electrons, and sending a reverse voltage pulse signal output by the preamplifier (1) to the peak holding circuit (5-3) of reverse voltage after receiving a control signal for collecting holes;
the peak value holding circuit (5-2) of the forward voltage is connected with the analog alternative data selector (5-4) and is used for receiving the forward voltage pulse signal to carry out peak value holding;
the peak value holding circuit (5-3) of the reverse voltage is connected with the analog alternative data selector (5-4) and is used for receiving the reverse voltage pulse signal to carry out peak value holding;
and the analog alternative data selector (5-4) is used for receiving the forward voltage pulse signal or the reverse voltage pulse signal to obtain the energy amplitude information of the pixel hitting particles.
6. A pixel circuit in a pixel detector compatible with electron collection and hole collection according to claim 5, wherein the controller is further configured to input a control signal to the one-of-two data selector (3-3);
an alternative data selector (3-3) for selecting a reverse voltage pulse from the forward voltage pulse output from the comparator (2) and the reverse voltage pulse output from the inverter (3-2) or selecting a reverse voltage pulse from the reverse voltage pulse output from the comparator (2) and the forward voltage pulse output from the inverter (3-2) according to a control signal output from the controller;
the control signal input by the input end of the regulator (4) is input by a controller.
7. A pixel circuit in a pixel detector compatible with electron and hole collection according to claim 1, characterized in that the preamplifier (1) is implemented with a charge sensitive amplifier.
8. A pixel circuit in a pixel detector compatible with electron and hole collection according to claim 1, characterized in that the adjuster (4) is implemented using a threshold adjustment digital-to-analog converter.
9. The pixel circuit of claim 8, wherein the threshold adjustment digital-to-analog converter inputs are provided with an input signal, a control signal and a reference voltage, wherein the input signal has 3.
10. The pixel circuit of claim 1, wherein the front-end detector is configured to collect negatively charged electrons or positively charged holes.
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