CN113422535A - Inverter topology circuit and inverter - Google Patents

Inverter topology circuit and inverter Download PDF

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Publication number
CN113422535A
CN113422535A CN202110981556.3A CN202110981556A CN113422535A CN 113422535 A CN113422535 A CN 113422535A CN 202110981556 A CN202110981556 A CN 202110981556A CN 113422535 A CN113422535 A CN 113422535A
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Prior art keywords
switching tube
switch
midpoint
bridge arm
clamping
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CN202110981556.3A
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CN113422535B (en
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翁炳文
吴俊雄
杨波
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Hangzhou Hemai Power Electronics Co ltd
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Hangzhou Hemai Power Electronics Co ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/12—Arrangements for reducing harmonics from ac input or output
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/38—Means for preventing simultaneous conduction of switches

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

The invention discloses an inverter topology circuit, comprising: the power supply comprises a Heric topology, a first output inductor, a second output inductor and a clamping module; the alternating current side of the Heric topology is respectively connected with the first output inductor and the second output inductor; the clamping module comprises an output clamping capacitor and an auxiliary clamping switch, the output clamping capacitor comprises a first clamping capacitor and a second clamping capacitor, and the first end of the first clamping capacitor is connected with the first end of the alternating current side of the inverter topology circuit; the second end of the first clamping capacitor is connected with the first end of the second clamping capacitor, and the connection point is used as the midpoint of the output clamping capacitor; the second end of the second clamping capacitor is connected with the second end of the alternating current side of the inverter topology circuit; one end of the auxiliary clamping switch is connected with the midpoint of a follow current bridge arm in the Heric topology, and the other end of the auxiliary clamping switch is connected with the midpoint of the output clamping capacitor.

Description

Inverter topology circuit and inverter
Technical Field
The invention belongs to the technical field of power electronics, and particularly relates to an inverter topology circuit and an inverter.
Background
At present, a conventional household low-power single-phase photovoltaic inverter is generally designed in a non-isolation type. Compared with an isolated design scheme, the non-isolated design scheme has high conversion efficiency and lower cost. In the non-isolated inverter scheme, the Heric topology is widely adopted due to its excellent device cost, efficiency performance and theoretically constant common mode voltage.
However, due to the existence and inconsistency of device parasitic parameters in the Heric inverter, the common-mode voltage in the freewheeling stage can cause LC resonance, so that high-frequency common-mode current is generated to circulate in equipment and a power grid, and certain harm is caused.
Disclosure of Invention
The invention aims to provide an inverter topology circuit and an inverter, which can prevent LC resonance caused by common-mode voltage of the inverter topology circuit in a follow current stage and avoid high-frequency common-mode current generated by the inverter topology circuit from circulating in equipment and a power grid, thereby protecting the normal operation of subsequent equipment.
In order to achieve the above purpose, the embodiments of the present application provide the following technical solutions:
an inverter topology circuit comprising: a Heric topology, a first output inductor, a second output inductor;
the Heric topology comprises a first bridge arm, a second bridge arm and a follow current bridge arm, wherein the first bridge arm comprises a first switching tube and a third switching tube which are connected in series, the connection point of the first switching tube and the third switching tube is used as the midpoint of the first bridge arm, and the midpoint of the first bridge arm is used as the first end of the alternating current side of the Heric topology; the second bridge arm comprises a second switching tube and a fourth switching tube which are connected in series, the connection point of the second switching tube and the fourth switching tube is used as the middle point of the second bridge arm, and the middle point of the second bridge arm is used as the second end of the alternating current side of the Heric topology; the first bridge arm and the second bridge arm are connected in parallel, one end of the first bridge arm and the second bridge arm which are connected in parallel is used as a positive pole of a direct current side of a Heric topology, and the other end of the first bridge arm and the second bridge arm which are connected in parallel is used as a negative pole of the direct current side of the Heric topology;
the follow current bridge arm comprises a fifth switching tube and a sixth switching tube, one end of the fifth switching tube is connected with the first end of the alternating current side of the Heric topology, the other end of the fifth switching tube is connected with one end of the sixth switching tube, a connection point is used as the midpoint of the follow current bridge arm, and the other end of the sixth switching tube is connected with the second end of the alternating current side of the Heric topology;
the first end of the alternating current side of the Heric topology is connected with the first end of the first output inductor, and the second end of the first output inductor is used as the first end of the alternating current side of the inverter topology circuit; the second end of the alternating current side of the Heric topology is connected with the first end of the second output inductor, and the second end of the second output inductor is used as the second end of the alternating current side of the inverter topology circuit;
wherein the inverter topology circuit further comprises a clamping module,
the clamping module comprises an output clamping capacitor and an auxiliary clamping switch,
the output clamping capacitor comprises a first clamping capacitor and a second clamping capacitor, and the first end of the first clamping capacitor is connected with the first end of the alternating current side of the inverter topology circuit; the second end of the first clamping capacitor is connected with the first end of the second clamping capacitor, and a connection point is used as a midpoint of the output clamping capacitor; the second end of the second clamping capacitor is connected with the second end of the alternating current side of the inverter topology circuit;
one end of the auxiliary clamping switch is connected with the midpoint of a follow current bridge arm in the Heric topology, and the other end of the auxiliary clamping switch is connected with the midpoint of the output clamping capacitor.
Further, the auxiliary clamping switch comprises a seventh switch tube, a diode connected in anti-parallel with the seventh switch tube, and a parasitic capacitor connected in parallel with the seventh switch tube;
diodes which are reversely connected in parallel with the first switching tube to the sixth switching tube and parasitic capacitors which are connected in parallel with the first switching tube to the sixth switching tube are arranged or exist;
and each switching tube in the Heric topology and a seventh switching tube in the auxiliary clamping switch are respectively an MOS transistor or an IGBT.
Furthermore, the reverse parallel body diode of the auxiliary clamping switch points to the midpoint of the freewheeling bridge arm from the midpoint of the output clamping capacitor, and the cathode of the reverse parallel body diode of the fifth switching tube is connected with the cathode of the reverse parallel body diode of the sixth switching tube.
Further, when the grid voltage is in a positive half cycle, the second switching tube and the third switching tube are kept turned off, the fifth switching tube is kept turned on, the first switching tube and the fourth switching tube share the high-frequency switch, the sixth switching tube and the auxiliary clamping switch share the high-frequency switch, and the first switching tube and the auxiliary clamping switch are alternately turned on;
when the voltage of a power grid is in a negative half cycle, the first switching tube and the fourth switching tube are kept turned off, the sixth switching tube is kept turned on, the second switching tube and the third switching tube share a high-frequency switch, the fifth switching tube and the auxiliary clamping switch share a high-frequency switch, and the second switching tube and the auxiliary clamping switch are alternately turned on.
Further, when the grid voltage is in the positive half cycle, a dead zone is arranged between the first switching tube and the auxiliary clamping switch; when the voltage of the power grid is positioned in the negative half cycle, a dead zone is arranged between the second switching tube and the auxiliary clamping switch.
Furthermore, the reverse parallel body diode of the auxiliary clamping switch points to the midpoint of the output clamping capacitor from the midpoint of the freewheeling bridge arm, and the anode of the reverse parallel body diode of the fifth switching tube is connected with the anode of the reverse parallel body diode of the sixth switching tube.
Further, when the grid voltage is in a positive half cycle, the second switching tube and the third switching tube are kept off, the sixth switching tube is kept on, the first switching tube and the fourth switching tube share a high-frequency switch, the fifth switching tube and the auxiliary clamping switch share a high-frequency switch, and the first switching tube and the auxiliary clamping switch are alternately switched on;
when the voltage of the power grid is in a negative half cycle, the first switching tube and the fourth switching tube are kept turned off, the fifth switching tube is kept turned on, the second switching tube and the third switching tube share a high-frequency switch, the sixth switching tube and the auxiliary clamping switch share a high-frequency switch, and the second switching tube and the auxiliary clamping switch are alternately turned on.
Further, when the grid voltage is in the positive half cycle, a dead zone is arranged between the first switching tube and the auxiliary clamping switch; when the voltage of the power grid is positioned in the negative half cycle, a dead zone is arranged between the second switching tube and the auxiliary clamping switch.
Further, the auxiliary clamping switches are diodes, diodes connected in reverse parallel with the first switching tube to the sixth switching tube and parasitic capacitors connected in parallel with the first switching tube to the sixth switching tube are arranged or exist, when the cathode of the reverse parallel diode of the fifth switching tube is connected with the cathode of the reverse parallel diode of the sixth switching tube, the diodes of the auxiliary clamping switches point to the midpoint of the freewheeling bridge arm from the midpoint of the output clamping capacitors, and when the anode of the reverse parallel diode of the fifth switching tube is connected with the anode of the reverse parallel diode of the sixth switching tube, the diodes of the auxiliary clamping switches point to the midpoint of the output clamping capacitors from the midpoint of the freewheeling bridge arm.
The application also provides an inverter, which comprises a control unit and an inverter power unit, wherein the control unit is used for controlling the operation of the inverter power unit, and the inverter power unit comprises the inverter topology circuit.
Compared with the prior art, the clamping module is arranged, high-frequency voltage oscillation in the follow current bridge arm can be clamped, and interference caused by the high-frequency oscillation is reduced.
Drawings
FIG. 1 is a schematic diagram of a prior art Heric inverter topology;
FIG. 2 is a schematic diagram of a first embodiment of an inverter topology circuit according to the present application;
FIG. 3 is a timing diagram of a modulation method of a circuit switch tube in the entire power frequency cycle of a power grid according to the first embodiment of the present application;
FIG. 4 is a schematic diagram of a second embodiment of an inverter topology circuit according to the present application;
FIG. 5 is a timing diagram of a modulation method of a circuit switch tube in the entire power frequency cycle of the power grid according to the second embodiment of the present application;
FIG. 6 is a schematic diagram showing the comparison of the common mode voltage of the system with and without the clamp module provided by the present application;
FIG. 7 is a schematic diagram of a third embodiment of an inverter topology circuit according to the present application;
fig. 8 is a schematic diagram of a fourth embodiment of the inverter topology circuit according to the present application.
Detailed Description
The present invention will be described in detail with reference to the specific embodiments shown in the drawings, which are not intended to limit the present invention, and structural, methodological, or functional changes made by those skilled in the art according to the specific embodiments are included in the scope of the present invention.
In a non-isolated single-phase inverter in the prior art, a common topology structure of the non-isolated single-phase inverter is a Heric inverter topology circuit shown in fig. 1, which specifically includes: heric topology 10, first output inductor L1, second output inductor L2.
The Heric topology 10 includes a first leg 11, a second leg 12, and a freewheeling leg 13. Wherein, the first bridge arm 11 comprises a first switch tube S1And a third switching tube S3A first switch tube S1And a third switching tube S3Is taken as the midpoint of the first leg 11, and the midpoint of the first leg 11 is taken as the ac side first end of the Heric topology. As an alternative implementation, the first switching tube S1And a third switching tube S3The transistor can be an MOS transistor or an IGBT, and the drawing method of the switch transistor in the first drawing of the application is a simplified drawing method. Specifically, if the first switch tube S of the present application1And a third switching tube S3Is an MOS transistor, and the first switch transistor S1And a third switching tube S3Are all provided or have body diodes connected in inverse parallel, at this time, the first switch tube S1Is connected to the dc-side positive electrode of the Heric topology 10 as a first end of the first leg 11. First switch tube S1Source electrode and third switch tube S3Is connected to the drain of the first leg 11, the connection point being the midpoint of the first leg. Third switch tube S3As a second terminal of the first leg 11, is connected to the negative dc side of the Heric topology 10. First switch tube S1And a third switching tube S3The gates of (a) need to be respectively switched in the driving signals to control the on and off states of the two. Specifically, the first switch tube S1And a third switching tube S3Parasitic capacitances are also provided or present in parallel with themselves, respectively.
The second bridge arm 12 comprises a second switch tube S connected in series2And a fourth switching tube S4A second switch tube S2And a fourth switching tube S4The connecting point of (a) is used as the midpoint of the second bridge arm 12, and the midpoint of the second bridge arm 12 is used as the second end of the alternating current side of the Heric topology; first arm 11 and second arm 12 are connected in parallel, one end of the parallel connection is a positive electrode on the direct current side of Heric topology 10, and the other end of the parallel connection is a negative electrode on the direct current side of Heric topology 10. The structure of the second bridge arm 12 can refer to the structure of the first bridge arm 11, and as an optional implementation manner, the second switch tube S2And a fourth switching tube S4Can be MOS tube or IGBT. In particular, if the second switch tube S of the present application2And a fourth switching tube S4Is a MOS transistor, and a second switch transistor S2And a fourth switching tube S4Are all provided or present with body diodes connected in anti-parallel, at which time the second switching tube S2Is connected to the dc side positive electrode of the Heric topology 10 as a first end of the second leg 12. A second switch tube S2Source electrode and fourth switch tube S4Is connected to the drain of the second leg 12, the connection point being the midpoint of the second leg. Fourth switch tube S4As a second terminal of second leg 12, is connected to the negative dc-side of Heric topology 10. A second switch tube S2And a fourth switching tube S4The gates of (a) need to be respectively switched in the driving signals to control the on and off states of the two. In particular, the second switch tube S2And a fourth switching tube S4Parasitic capacitances are also provided or present in parallel with themselves, respectively.
The follow current bridge arm 13 comprises a fifth switching tube S5And a sixth switching tube S6Fifth switching tube S5Is connected to the first end of the alternating current side of the Heric topology, a fifth switching tube S5And the other end of the sixth switching tube S6One end of which is connected, the connection point being the midpoint of the freewheeling leg 13,sixth switching tube S6And the other end of the first terminal is connected with the second end of the alternating current side of the Heric topology. Specifically, the fifth switch tube S5And a sixth switching tube S6Can be MOS tube or IGBT. As an optional implementation manner, the fifth switch tube S in the present application5And a sixth switching tube S6Is a MOS transistor, a fifth switch transistor S5And a sixth switching tube S6A body diode connected in anti-parallel with itself and a parasitic capacitance connected in parallel with itself are provided or present, respectively.
In FIG. 1, S1~S6Respectively a first to a sixth switching tube, D1~D6Reverse parallel body diodes, C, of the first to sixth switching tubes, respectively1~C6The first to sixth switch tubes are respectively connected with parasitic capacitors in parallel.
The dc side of the Heric topology 10 is used as the dc side of the Heric inverter topology circuit, the first end of the ac side of the Heric topology is connected to the first end of the first output inductor L1, and the second end of the first output inductor L1 is used as the first end of the ac side of the inverter topology circuit provided by the present application. The second terminal of the alternating current side of the Heric topology 10 is connected to the first terminal of the second output inductor L2, and the second terminal of the second output inductor L2 is used as the second terminal of the alternating current side of the inverter topology circuit provided by the present application.
In practical applications, each switch tube in the Heric topology 10 is provided with or has a parasitic capacitor connected in parallel with itself, so that the parasitic capacitor is easy to be connected with the first output inductor L1And a second output inductor L2LC resonance occurs, which results in large high frequency capacitive leakage current doped in the ac side output of the Heric topology 10 and can cause electrical damage to subsequent devices.
In order to solve the problem that high-frequency capacitive leakage current doped in alternating current after inversion is large and causes electric power damage to subsequent equipment, the application provides an inversion topological circuit. As shown in fig. 2, the inverter topology circuit provided by the present application further includes a clamping module 20, where the clamping module 20 includes an output clamping capacitor 22 and an auxiliary clamping switch 21. As an alternative implementation, the output clamping capacitor 22 includes a first clamping capacitor 221 and a second clamping capacitor 222. A first end of the first clamping capacitor 221 is connected to a first end of the ac side of the inverter topology circuit. A second terminal of the first clamping capacitor 221 is connected to a first terminal of the second clamping capacitor 222, and the connection point serves as a midpoint of the output clamping capacitor 22. A second terminal of the second clamping capacitor 222 is connected to a second terminal of the ac side of the inverter topology circuit.
One end of the auxiliary clamping switch 21 is connected with the midpoint of the freewheeling arm 13 in the Heric topology 10, and the other end of the auxiliary clamping switch 21 is connected with the midpoint of the output clamping capacitor 22. As an alternative implementation, the auxiliary clamp switch 21 includes a seventh switch tube S7And a seventh switching tube S7Antiparallel body diode D7And a seventh switching tube S7Parallel parasitic capacitance C7. Wherein, the seventh switch tube S7Can be MOS tube or IGBT. If the seventh switch tube S7Is an MOS transistor, then according to a seventh switch transistor S7The present application provides two inverter topology circuits.
First embodiment
As shown in fig. 2, a seventh switch tube S7Is connected with the midpoint of the freewheeling arm 13, and a seventh switching tube S7Is connected to the midpoint of the output clamp capacitor 22, and in this case to the seventh switching transistor S7Antiparallel body diode D7Is directed from the midpoint of the output clamp capacitor 22 to the midpoint of the freewheeling leg 13, and the fifth switching tube S in the freewheeling leg 135Reverse parallel body diode D of5Cathode and sixth switching tube S6Reverse parallel body diode D of6Are connected to each other. Specifically, in the freewheeling arm 13 at this time, the fifth switching tube S5Is connected with the first end of the alternating current side of the Heric topology, and a fifth switching tube S5Drain electrode of and the sixth switching tube S6Is connected to the drain of the freewheeling arm 13 at the point of connection. Sixth switching tube S6Is connected to the second terminal of the ac side of the Heric topology. The drain of the seventh switch is connected to the midpoint of the freewheeling leg 13, and the source of the seventh switch is connected to the midpoint of the output clamp capacitor 22.
For the inverter topology circuit provided in the first embodiment, the present application provides a modulation method for the inverter topology circuit, and the operating principle of the inverter topology circuit provided in the first embodiment of the present application is as follows.
As shown in fig. 3, the inverter topology circuit of the first embodiment is provided with a modulation timing sequence of 7 switches of the circuit in the whole power frequency cycle of the power grid. When the network voltage is in the positive half cycle, the second switch tube S2And a third switching tube S3Keep off, the fifth switch tube S5Kept on, the first switch tube S1And a fourth switching tube S4Common high-frequency switch, sixth switching tube S6And an auxiliary clamping switch 21, the first switch tube S1And the auxiliary clamp switch 21 are alternately turned on.
Fig. 2 of the present application omits a load mounted on the ac side when the inverter topology circuit operates. When the grid voltage is in the positive half cycle, the inverter topology circuit has two working states.
Wherein, the first working state is as follows: a second switch tube S2And a third switching tube S3Keep off, the fifth switch tube S5Kept on, the first switch tube S1And a fourth switching tube S4In a conducting state, the sixth switching tube S6When the auxiliary clamping switch 21 is in a turn-off state, the inverter topology circuit is in a positive half-cycle active output state at the moment, and current starts from the positive pole and passes through the first switching tube S1A first output inductor L1A load, a second output inductor L2And a fourth switching tube S4And finally, the current flows back to the negative electrode of the power supply.
The second working state is as follows: a second switch tube S2And a third switching tube S3Keep off, the fifth switch tube S5Kept on, the first switch tube S1And a fourth switching tube S4In the off state, the sixth switching tube S6And when the auxiliary clamping switch 21 is in a conducting state, the inverter topology circuit is in a positive half-cycle freewheeling state at the moment. The direct current side and the alternating current side of the inverter topology circuit are decoupled, and current flows through the first output inductor L in sequence due to the fact that current follow current exists in the inductor1A load, a second output inductor L2The sixth switching tube S6Reverse parallel body diode D of6The fifth switch tube S5. In the process, when the potential of the midpoint of the freewheel arm 13 is higher than the potential of the midpoint of the output clamp capacitor 22, the seventh switch tube S7Conduction causes the midpoint of the freewheel leg 13 to be clamped to half the equivalent dc voltage. When the potential of the midpoint of the freewheeling arm 13 is lower than the potential of the midpoint of the output clamping capacitor 22, the seventh switching tube S7Reverse parallel body diode D of7The load is conducted by the forward voltage, so that the midpoint of the freewheeling arm 13 is clamped to half of the equivalent direct-current voltage.
And the switching time sequence of each switching tube when the power grid voltage is positioned in the negative half cycle and the switching time sequence when the power grid voltage is positioned in the positive half cycle have symmetry. Specifically, when the grid voltage is in the negative half cycle, the first switch tube S1And a fourth switching tube S4Kept off, the sixth switching tube S6Kept on, the second switch tube S2And a third switching tube S3Common high-frequency switch, fifth switch tube S5And an auxiliary clamping switch 21, the second switch tube S2And the auxiliary clamp switch 21 are alternately turned on. Similar to the situation that the grid voltage is in the positive half cycle, the inverter topology circuit also has two working states when the grid voltage is in the negative half cycle.
Wherein the third operating state is: first switch tube S1And a fourth switching tube S4Kept off, the sixth switching tube S6Kept on, the second switch tube S2And a third switching tube S3In a conducting state, the fifth switch tube S5When the auxiliary clamping switch 21 is in a turn-off state, the inverter topology circuit is in a negative half-cycle active output state at the moment, and current starts from the positive pole and passes through the second switching tube S2A second output inductor L2A load, a first output inductor L1A third switch tube S3And finally, the current flows back to the negative electrode of the power supply.
The fourth working state is as follows: first switch tube S1And a fourth switching tube S4Kept off, the sixth switching tube S6Kept on, the second switch tube S2And a third switching tube S3In the off state, the fifth switching tube S5And the auxiliary clamping switch 21 is in a conducting state, and the inverter topology circuit is in a negative half-cycle freewheeling state at the moment. The direct current side and the alternating current side of the inverter topology circuit are decoupled, and current flows through the second output inductor L in sequence due to the fact that current follow current exists in the inductor2A load, a first output inductor L1The fifth switch tube S5Reverse parallel body diode D of5The sixth switching tube S6. In the process, when the potential of the midpoint of the freewheel arm 13 is higher than the potential of the midpoint of the output clamp capacitor 22, the seventh switch tube S7And the current is conducted, so that the midpoint of the freewheeling arm 13 is clamped to half of the equivalent direct-current voltage. When the potential of the midpoint of the freewheeling arm 13 is lower than the potential of the midpoint of the output clamping capacitor 22, the seventh switching tube S7Reverse parallel body diode D of7The load is conducted by the forward voltage, so that the midpoint of the freewheeling arm 13 is clamped to half of the equivalent direct-current voltage.
In order to ensure that there is no risk of shoot-through between the alternately conducting switches, as an alternative implementation, a dead zone is provided between the alternately conducting switches. Specifically, when the grid voltage is in the positive half cycle, the first switch tube S1And the auxiliary clamping switch 21, due to the sixth switching tube S6And the auxiliary clamping switch 21 are switched at high frequency together, so that the sixth switching tube S6And a first switch tube S1A dead space is also arranged between the two.
When the power grid voltage is positioned in the negative half cycle, the second switch tube S2A dead zone is arranged between the auxiliary clamping switch 21 and the first switch tube S5Is switched at high frequency together with the auxiliary clamp switch 21, so that the fifth switch tube S5And a first switch tube S1A dead space is also arranged between the two.
Second embodiment
As shown in fig. 4, a seventh switching tube S7Is connected with the midpoint of the freewheeling arm 13, and a seventh switching tube S7Is connected to the midpoint of the output clamp capacitor 22, which in this case is connected to the seventh switch transistor S7Antiparallel body diode D7Is directed from the midpoint of the freewheeling leg 13The middle point of the output clamping capacitor 22 and a fifth switching tube S in the freewheeling arm 135Reverse parallel body diode D of5Anode and sixth switching tube S6Reverse parallel body diode D of6Are connected with each other. Specifically, in the freewheeling arm 13 at this time, the fifth switching tube S5Is connected to the first end of the AC side of the Heric topology, and a fifth switching tube S5Source electrode of and the sixth switching tube S6Is connected to the source of the freewheeling arm 13 at the point of connection. Sixth switching tube S6Is connected to the second terminal of the ac side of the Heric topology. Seventh switching tube S7Is connected with the midpoint of the freewheeling arm 13, and a seventh switching tube S7Is connected to the midpoint of the output clamp capacitor 22.
For the inverter topology circuit provided in the second embodiment, the present application provides a modulation method for the inverter topology circuit, and the operating principle of the inverter topology circuit provided in the second embodiment of the present application is as follows.
As shown in fig. 5, the inverter topology circuit of the second embodiment is provided with a modulation timing sequence of 7 switches of the circuit in the whole power frequency cycle of the power grid. When the network voltage is in the positive half cycle, the second switch tube S2And a third switching tube S3Kept off, the sixth switching tube S6Kept on, the first switch tube S1And a fourth switching tube S4Common high-frequency switch, fifth switch tube S5And an auxiliary clamping switch 21, the first switch tube S1And the auxiliary clamp switch 21 are alternately turned on.
Fig. 4 of the present application omits a load mounted on the ac side when the inverter topology circuit operates. When the grid voltage is in the positive half cycle, the inverter topology circuit has two working states.
Wherein, the first working state is as follows: a second switch tube S2And a third switching tube S3Kept off, the sixth switching tube S6Kept on, the first switch tube S1And a fourth switching tube S4In a conducting state, the fifth switch tube S5When the auxiliary clamping switch 21 is in an off state, the inverter topology circuit is in a positive half cycleIn an active output state, current starts from the positive pole and passes through the first switch tube S1A first output inductor L1A load, a second output inductor L2And a fourth switching tube S4And finally, the current flows back to the negative electrode of the power supply.
The second working state is as follows: a second switch tube S2And a third switching tube S3Kept off, the sixth switching tube S6Kept on, the first switch tube S1And a fourth switching tube S4In the off state, the fifth switching tube S5And when the auxiliary clamping switch 21 is in a conducting state, the inverter topology circuit is in a positive half-cycle freewheeling state at the moment. The direct current side and the alternating current side of the inverter topology circuit are decoupled, and current flows through the first output inductor L in sequence due to the fact that current follow current exists in the inductor1A load, a second output inductor L2The sixth switching tube S6The fifth switch tube S5Reverse parallel body diode D of5. In the process, when the potential of the midpoint of the freewheel arm 13 is higher than the potential of the midpoint of the output clamp capacitor 22, the seventh switch tube S7Reverse parallel body diode D of7The freewheeling leg 13 is clamped to half the equivalent dc voltage at its midpoint by conducting with a forward voltage. When the potential of the midpoint of the freewheeling arm 13 is lower than the potential of the midpoint of the output clamping capacitor 22, the seventh switching tube S7And the current is conducted, so that the midpoint of the freewheeling arm 13 is clamped to half of the equivalent direct-current voltage.
And the switching time sequence of each switching tube when the power grid voltage is positioned in the negative half cycle and the switching time sequence when the power grid voltage is positioned in the positive half cycle have symmetry. Specifically, when the grid voltage is in the negative half cycle, the first switch tube S1And a fourth switching tube S4Keep off, the fifth switch tube S5Kept on, the second switch tube S2And a third switching tube S3Common high-frequency switch, sixth switching tube S6And an auxiliary clamping switch 21, the second switch tube S2And the auxiliary clamp switch 21 are alternately turned on. Similar to the situation that the grid voltage is in the positive half cycle, the inverter topology circuit also has two working states when the grid voltage is in the negative half cycle.
Wherein, the thirdThe working state is as follows: first switch tube S1And a fourth switching tube S4Keep off, the fifth switch tube S5Kept on, the second switch tube S2And a third switching tube S3In a conducting state, the sixth switching tube S6When the auxiliary clamping switch 21 is in a turn-off state, the inverter topology circuit is in a negative half-cycle active output state at the moment, and current starts from the positive pole and passes through the second switching tube S2A second output inductor L2A load, a first output inductor L1A third switch tube S3And finally, the current flows back to the negative electrode of the power supply.
The fourth working state is as follows: first switch tube S1And a fourth switching tube S4Keep off, the fifth switch tube S5Kept on, the second switch tube S2And a third switching tube S3In the off state, the sixth switching tube S6And the auxiliary clamping switch 21 is in a conducting state, and the inverter topology circuit is in a negative half-cycle freewheeling state at the moment. The direct current side and the alternating current side of the inverter topology circuit are decoupled, and current flows through the second output inductor L in sequence due to the fact that current follow current exists in the inductor2A load, a first output inductor L1The fifth switch tube S5The sixth switching tube S6Reverse parallel body diode D of6. In the process, when the potential of the midpoint of the freewheel arm 13 is higher than the potential of the midpoint of the output clamp capacitor 22, the seventh switch tube S7Reverse parallel body diode D of7The load is conducted by the forward voltage, so that the midpoint of the freewheeling arm 13 is clamped to half of the equivalent direct-current voltage. When the potential of the midpoint of the freewheeling arm 13 is lower than the potential of the midpoint of the output clamping capacitor 22, the seventh switching tube S7And the current is conducted, so that the midpoint of the freewheeling arm 13 is clamped to half of the equivalent direct-current voltage.
In order to ensure that there is no risk of shoot-through between the alternately conducting switches, as an alternative implementation, a dead zone is provided between the alternately conducting switches. Specifically, when the grid voltage is in the positive half cycle, the first switch tube S1And the auxiliary clamping switch 21, due to the fifth switch tube S5Is switched at high frequency together with the auxiliary clamp switch 21, so that the fifth switch tube S5And a first switch tube S1A dead space is also arranged between the two.
When the power grid voltage is positioned in the negative half cycle, the second switch tube S2A dead zone is arranged between the auxiliary clamping switch 21 and the sixth switching tube S6High frequency switching is performed together with the auxiliary clamping switch 21, so that the sixth switching tube S6And a first switch tube S1A dead space is also arranged between the two.
As shown in fig. 6, a schematic diagram of the common mode voltage of the system is provided to determine whether the auxiliary clamp switch 21 is operating. Because each switch tube is connected with a parasitic capacitor in parallel, the switch tubes are not ideally consistent. When the inverter topology circuit is in a freewheeling state, due to the existence of parasitic inductance in an actual line, high-frequency oscillation exists in the voltage at the first terminal on the alternating current side of the herc topology and the voltage at the second terminal on the alternating current side of the herc topology, the waveform at the second terminal on the alternating current side of the herc topology without the auxiliary clamp switch 21 is as shown in fig. 6, and the voltage at the second terminal on the alternating current side of the herc topology is not ideally maintained at half the bus voltage. Furthermore, since the first terminal voltage on the ac side of the Heric topology and the second terminal voltage on the ac side of the Heric topology are not symmetrical, both the differential mode and the common mode may be disturbed by high frequencies at the inverter output. When the auxiliary clamping switch 21 participates in the work, the midpoint of the freewheeling arm 13 can be clamped to half of the equivalent direct-current voltage, and the interference caused by high-frequency oscillation is reduced.
As another alternative implementation, the auxiliary clamp switch 21 may be a diode. One end of the auxiliary clamping switch 21 is connected with the midpoint of the freewheeling arm 13 in the Heric topology 10, and the other end of the auxiliary clamping switch 21 is connected with the midpoint of the output clamping capacitor 22. According to the conducting direction of the auxiliary clamping switch 21, the application provides two inverter topology circuits.
Third embodiment
As shown in fig. 7, when the fifth switch tube S5Reverse parallel body diode D of5Cathode and sixth switching tube S6Reverse parallel body diode D of6Is directed from the midpoint of the output clamp capacitor 22 to the freewheel bridgeThe midpoint of the arm 13.
The operating principle of the inverter topology circuit of the third embodiment is similar to that of the inverter topology circuit of the first embodiment, except that the inverter topology circuit of the third embodiment does not need to control the auxiliary clamp switch 21. In the freewheeling state of the inverter topology circuit, the auxiliary clamp switch 21 is a diode, and the effect of clamping the midpoint of the freewheeling arm 13 to half of the equivalent direct-current voltage can be achieved.
Fourth embodiment
As shown in fig. 8, when the fifth switch tube S5Reverse parallel body diode D of5Anode and sixth switching tube S6Reverse parallel body diode D of6When the anodes of the auxiliary clamp switches 21 are connected, the diodes of the auxiliary clamp switches point from the midpoint of the freewheel leg 13 to the midpoint of the output clamp capacitor 22.
The operating principle of the inverter topology circuit of the fourth embodiment is similar to that of the inverter topology circuit of the second embodiment, except that the inverter topology circuit of the fourth embodiment does not need to control the auxiliary clamp switch 21. In the freewheeling state of the inverter topology circuit, the auxiliary clamp switch 21 is a diode, and the effect of clamping the midpoint of the freewheeling arm 13 to half of the equivalent direct-current voltage can be achieved.
In summary, the clamp module 20 is added in the present application, and can clamp the high-frequency oscillation at the inverter port during freewheeling, and since the auxiliary clamp switch 21 is only for the high-frequency current path, the capacity of the auxiliary clamp switch itself does not need to be the same as that of each switching tube in the Heric topology 10, and very significant loss is not introduced. On the premise that the structure and the control are relatively simple, the voltage oscillation in the follow current state of the inverter topology circuit is reduced.
The application also provides an inverter, which comprises a control unit and an inverter power unit, wherein the control unit is used for controlling the inverter power unit to work, and the inverter power unit comprises the inverter topology circuit of any one of the above embodiments.
While the invention has been described with reference to certain preferred embodiments, it will be understood by those skilled in the art that the following descriptions are provided for illustration and example only and not for the purpose of limiting the invention as defined by the appended claims: rather, the invention is intended to cover alternatives, modifications, substitutions, combinations and simplifications which may be equally effective without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (10)

1. An inverter topology circuit comprising: a Heric topology, a first output inductor, a second output inductor;
the Heric topology comprises a first bridge arm, a second bridge arm and a follow current bridge arm, wherein the first bridge arm comprises a first switching tube and a third switching tube which are connected in series, the connection point of the first switching tube and the third switching tube is used as the midpoint of the first bridge arm, and the midpoint of the first bridge arm is used as the first end of the alternating current side of the Heric topology; the second bridge arm comprises a second switching tube and a fourth switching tube which are connected in series, the connection point of the second switching tube and the fourth switching tube is used as the middle point of the second bridge arm, and the middle point of the second bridge arm is used as the second end of the alternating current side of the Heric topology; the first bridge arm and the second bridge arm are connected in parallel, one end of the first bridge arm and the second bridge arm which are connected in parallel is used as a positive electrode of a Heric topology direct current side, and the other end of the first bridge arm and the second bridge arm which are connected in parallel is used as a negative electrode of the Heric topology direct current side;
the follow current bridge arm comprises a fifth switching tube and a sixth switching tube, one end of the fifth switching tube is connected with the first end of the alternating current side of the Heric topology, the other end of the fifth switching tube is connected with one end of the sixth switching tube, a connection point is used as the midpoint of the follow current bridge arm, and the other end of the sixth switching tube is connected with the second end of the alternating current side of the Heric topology;
the first end of the alternating current side of the Heric topology is connected with the first end of the first output inductor, and the second end of the first output inductor is used as the first end of the alternating current side of the inverter topology circuit; the second end of the alternating current side of the Heric topology is connected with the first end of the second output inductor, and the second end of the second output inductor is used as the second end of the alternating current side of the inverter topology circuit;
characterized in that the inverter topology circuit further comprises a clamping module,
the clamping module comprises an output clamping capacitor and an auxiliary clamping switch,
the output clamping capacitor comprises a first clamping capacitor and a second clamping capacitor, and the first end of the first clamping capacitor is connected with the first end of the alternating current side of the inverter topology circuit; the second end of the first clamping capacitor is connected with the first end of the second clamping capacitor, and a connection point is used as a midpoint of the output clamping capacitor; the second end of the second clamping capacitor is connected with the second end of the alternating current side of the inverter topology circuit;
one end of the auxiliary clamping switch is connected with the midpoint of a follow current bridge arm in the Heric topology, and the other end of the auxiliary clamping switch is connected with the midpoint of the output clamping capacitor.
2. The inverting topology circuit of claim 1, wherein: the auxiliary clamping switch comprises a seventh switching tube, a diode connected with the seventh switching tube in an anti-parallel mode, and a parasitic capacitor connected with the seventh switching tube in a parallel mode;
diodes which are reversely connected in parallel with the first switching tube to the sixth switching tube and parasitic capacitors which are connected in parallel with the first switching tube to the sixth switching tube are arranged or exist;
and each switching tube in the Heric topology and a seventh switching tube in the auxiliary clamping switch are respectively an MOS transistor or an IGBT.
3. The inverting topology circuit of claim 2, wherein: the reverse parallel body diode of the auxiliary clamping switch points to the midpoint of the follow current bridge arm from the midpoint of the output clamping capacitor, and the cathode of the reverse parallel body diode of the fifth switching tube is connected with the cathode of the reverse parallel body diode of the sixth switching tube.
4. The inverting topology circuit of claim 3, wherein: when the voltage of a power grid is in a positive half cycle, the second switching tube and the third switching tube are kept turned off, the fifth switching tube is kept turned on, the first switching tube and the fourth switching tube share a high-frequency switch, the sixth switching tube and the auxiliary clamping switch share a high-frequency switch, and the first switching tube and the auxiliary clamping switch are alternately turned on;
when the voltage of a power grid is in a negative half cycle, the first switching tube and the fourth switching tube are kept turned off, the sixth switching tube is kept turned on, the second switching tube and the third switching tube share a high-frequency switch, the fifth switching tube and the auxiliary clamping switch share a high-frequency switch, and the second switching tube and the auxiliary clamping switch are alternately turned on.
5. The inverting topology circuit of claim 4, wherein: when the power grid voltage is positioned in the positive half cycle, a dead zone is arranged between the first switching tube and the auxiliary clamping switch; when the voltage of the power grid is positioned in the negative half cycle, a dead zone is arranged between the second switching tube and the auxiliary clamping switch.
6. The inverting topology circuit of claim 2, wherein: the pointing direction of the reverse parallel body diode of the auxiliary clamping switch is from the midpoint of the follow current bridge arm to the midpoint of the output clamping capacitor, and the anode of the reverse parallel body diode of the fifth switching tube is connected with the anode of the reverse parallel body diode of the sixth switching tube.
7. The inverting topology circuit of claim 6, wherein: when the voltage of a power grid is in a positive half cycle, the second switching tube and the third switching tube are kept turned off, the sixth switching tube is kept turned on, the first switching tube and the fourth switching tube share a high-frequency switch, the fifth switching tube and the auxiliary clamping switch share a high-frequency switch, and the first switching tube and the auxiliary clamping switch are alternately turned on;
when the voltage of the power grid is in a negative half cycle, the first switching tube and the fourth switching tube are kept turned off, the fifth switching tube is kept turned on, the second switching tube and the third switching tube share a high-frequency switch, the sixth switching tube and the auxiliary clamping switch share a high-frequency switch, and the second switching tube and the auxiliary clamping switch are alternately turned on.
8. The inverting topology circuit of claim 7, wherein: when the power grid voltage is positioned in the positive half cycle, a dead zone is arranged between the first switching tube and the auxiliary clamping switch; when the voltage of the power grid is positioned in the negative half cycle, a dead zone is arranged between the second switching tube and the auxiliary clamping switch.
9. The inverting topology circuit of claim 1, wherein: the auxiliary clamping switches are diodes, diodes which are reversely connected in parallel with the auxiliary clamping switches and parasitic capacitors which are connected in parallel with the auxiliary clamping switches are arranged or exist in the first switching tube to the sixth switching tube, when the cathode of the reverse parallel diode of the fifth switching tube is connected with the cathode of the reverse parallel diode of the sixth switching tube, the diodes of the auxiliary clamping switches point to the midpoint of the follow current bridge arm from the midpoint of the output clamping capacitors, and when the anode of the reverse parallel diode of the fifth switching tube is connected with the anode of the reverse parallel diode of the sixth switching tube, the diodes of the auxiliary clamping switches point to the midpoint of the output clamping capacitors from the midpoint of the follow current bridge arm.
10. An inverter, comprising a control unit and an inverter power unit, wherein the control unit is configured to control the inverter power unit to operate, and the inverter power unit comprises the inverter topology circuit according to any one of claims 1 to 9.
CN202110981556.3A 2021-08-25 2021-08-25 Inverter topology circuit and inverter Active CN113422535B (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114172404A (en) * 2022-01-29 2022-03-11 杭州禾迈电力电子股份有限公司 Inverter topology circuit and inverter
CN114825894A (en) * 2022-06-22 2022-07-29 锦浪科技股份有限公司 Wave-by-wave current limiting control method and device for Heric inverter circuit and inverter
CN114884337A (en) * 2022-07-08 2022-08-09 深圳市高斯宝电气技术有限公司 HERIC inverter circuit

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104377982A (en) * 2014-11-25 2015-02-25 东南大学 Zero-voltage switching Heric type non-isolated photovoltaic grid-connected inverter
CN106033939A (en) * 2015-03-13 2016-10-19 南京航空航天大学 LCL non-isolation type grid-connected inverter system
CN108566110A (en) * 2018-02-02 2018-09-21 山东理工大学 A kind of active neutral point clamp photovoltaic inverter circuit of T shapes and its control method
WO2020152900A1 (en) * 2019-01-22 2020-07-30 住友電気工業株式会社 Power converter, and method for controlling same
US20210057907A1 (en) * 2019-08-21 2021-02-25 Sungrow (Shanghai) Co., Ltd. Overvoltage Absorption Circuit And Single-Phase Heric Topology

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104377982A (en) * 2014-11-25 2015-02-25 东南大学 Zero-voltage switching Heric type non-isolated photovoltaic grid-connected inverter
CN106033939A (en) * 2015-03-13 2016-10-19 南京航空航天大学 LCL non-isolation type grid-connected inverter system
CN108566110A (en) * 2018-02-02 2018-09-21 山东理工大学 A kind of active neutral point clamp photovoltaic inverter circuit of T shapes and its control method
WO2020152900A1 (en) * 2019-01-22 2020-07-30 住友電気工業株式会社 Power converter, and method for controlling same
US20210057907A1 (en) * 2019-08-21 2021-02-25 Sungrow (Shanghai) Co., Ltd. Overvoltage Absorption Circuit And Single-Phase Heric Topology

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114172404A (en) * 2022-01-29 2022-03-11 杭州禾迈电力电子股份有限公司 Inverter topology circuit and inverter
CN114172404B (en) * 2022-01-29 2022-05-17 杭州禾迈电力电子股份有限公司 Inverter topology circuit and inverter
CN114825894A (en) * 2022-06-22 2022-07-29 锦浪科技股份有限公司 Wave-by-wave current limiting control method and device for Heric inverter circuit and inverter
CN114884337A (en) * 2022-07-08 2022-08-09 深圳市高斯宝电气技术有限公司 HERIC inverter circuit

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