CN113406701A - In-situ shallow-dissection system based on parametric array - Google Patents
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Abstract
The invention discloses an in-situ shallow-dissection system based on a parametric array, which comprises a system control module, a transmitting circuit, a receiving circuit and a transducer array, wherein the transmitting circuit, the receiving circuit and the transducer array are controlled by the system control module; the digital-to-analog converter is connected with the input end and the system control module, and the transducer array is connected with the impedance matching circuit and used for transmitting acoustic signals; the receiving circuit comprises an original frequency signal receiving circuit and a difference frequency signal receiving circuit, the original frequency signal receiving circuit directly receives an original frequency signal of the transmitting circuit, and the difference frequency signal receiving circuit receives an acoustic signal transmitted by the transducer array; the original frequency signal receiving circuit and the difference frequency signal receiving circuit receive signals and then send the signals to the system control module for signal processing. The invention can realize high-power signal transmission and simultaneously ensure the quality of the received echo signal, and can be applied to in-situ monitoring of the formation deformation of a hydrate pilot production area.
Description
Technical Field
The invention relates to the field of monitoring for measuring seabed shallow layer bottom structure information, in particular to an in-situ shallow profile system based on a parametric array.
Background
The natural gas hydrate (combustible ice) is an internationally recognized important strategic energy source following petroleum and natural gas, and the industrialization of the natural gas hydrate is roughly divided into 5 stages of theoretical research and simulation experiments, exploratory pilot production, experimental pilot production, productive pilot production and commercial exploitation. In the pilot production process of combustible ice, the physical characteristics of a deposition layer can be changed, secondary disasters are easy to induce, and the drilling safety is influenced. The shallow stratum change near the well head of the trial production area is easy to induce secondary disasters such as seabed landslide, ground settlement, methane leakage, unstable collapse of well wall and the like.
If the operation is improper in the construction process, the natural gas hydrate in the sedimentary deposit can be disturbed and rapidly decomposed, and the release and eruption of a large amount of natural gas can cause explosion, thereby causing serious casualties and economic loss. There is no international experience of long term hydrate production, which results in a lack of data accumulation for superficial formation changes. With the shift of the key point of submarine natural gas hydrate resource development work in China from investigation to trial production, in-situ monitoring work on the change data of shallow strata near an exploitation area in the long-term exploitation process is urgently needed.
The shallow stratum profiler is a system for detecting underwater shallow stratum structure based on the water acoustics principle, and the working principle is to transmit detection signals to the sea bottom, receive signals returned by sound waves when the sound waves meet acoustic impedance interfaces in the process of propagation of sea water and sedimentary layers, and finally reflect stratum acoustics characteristics by processing echo signals. However, the traditional shallow profile analyzer mostly adopts a dragging type working mode, a signal receiving and transmitting circuit and a control system of the traditional shallow profile analyzer are positioned at a dry end, and a signal receiving and transmitting transducer is arranged in water.
For example, chinese patent publication No. CN212172493U discloses a three-dimensional shallow profiler dragging device, and chinese patent publication No. CN210882528U discloses a freely retractable shallow profiler. However, at present, there is only a few deep-sea in-situ shallow-stratum profile detection equipment suitable for shallow-stratum detection in a hydrate pilot-production area.
With the long-term experimental exploitation of natural gas hydrate in China, the problem of environmental monitoring in an exploitation area becomes more important, so that in-situ shallow stratum long-term monitoring equipment which has independent intellectual property rights and is applied to shallow stratum monitoring in a hydrate trial exploitation area is developed, technical support is provided for exploitation of deep sea natural gas hydrate resources in China, and the in-situ shallow stratum long-term monitoring equipment has important scientific significance and important application value.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides an in-situ shallow profile system based on a parametric array, which is used for solving the problem of deep-sea in-situ shallow profile detection of shallow stratum detection in a hydrate trial mining area.
An in-situ shallow-dissection system based on a parametric array comprises a system control module, a transmitting circuit, a receiving circuit and a transducer array, wherein the transmitting circuit, the receiving circuit and the transducer array are controlled by the system control module; the digital-to-analog converter is connected with the input end and the system control module, and the transducer array is connected with the impedance matching circuit and used for transmitting acoustic signals;
the receiving circuit comprises a primary frequency signal receiving circuit and a difference frequency signal receiving circuit, the primary frequency signal receiving circuit directly receives a primary frequency signal of the transmitting circuit, and the difference frequency signal receiving circuit receives an acoustic signal transmitted by the transducer array; and the original frequency signal receiving circuit and the difference frequency signal receiving circuit receive signals and then send the signals to the system control module for signal processing.
Furthermore, the system control module comprises an instruction layer, a main control layer and a hardware control layer, wherein the instruction layer adopts an MCU or a PC end to issue instructions to the main control layer, the MCU is used for the autonomous control of the system to issue instructions, and the PC end is used for manual operation to issue instructions;
the main control layer identifies the call from the instruction layer through TCP communication or serial port communication and makes corresponding operation;
the hardware control layer is communicated with the main control layer through UPP and I2C, and is used for realizing tasks issued by the main control layer, including control of the receiving circuit and the transmitting circuit.
Furthermore, the original frequency signal receiving circuit and the difference frequency signal receiving circuit respectively comprise a low-noise preamplifier, an adjustable gain amplifier, a low-pass filter and an analog-to-digital converter; the original frequency signal receiving circuit is also provided with a receiving and transmitting switch between the low-noise preamplifier and the impedance matching circuit, and the receiving and transmitting switch plays a role in blocking a high-voltage transmitting signal of the transmitting circuit so as to protect the circuit; the difference frequency signal receiving circuit is provided with a receiving transducer in front of a low noise preamplifier.
Furthermore, the transducer array corresponds to a plurality of impedance matching circuits, and each impedance matching circuit is connected with the digital-to-analog converter through a power amplifier.
Furthermore, when the transmitting circuit works, the system control module enables the PA _ EN, and the system control module selects a multi-channel transmitting signal or only uses a single-channel transmitting signal through software.
Furthermore, the transducer array adopts a low-frequency transducer or a high-frequency transducer, when the receiving circuit works, the system control module selects to receive echo signals from the low-frequency transducer or the high-frequency transducer through the receiving channel selector, and simultaneously controls the gain of the receiving circuit VGA through the digital-to-analog converter.
Further, the impedance matching circuit is designed by the following steps:
(1) establishing an equivalent model of the transducer through an admittance-frequency curve of the transducer, and obtaining values of each circuit element through nonlinear fitting and parameter identification of the transducer admittance;
(2) an impedance matching circuit which meets the requirements of impedance matching and high-power operation is designed based on a matching transformer.
In the step (1), the equivalent model of the transducer is a BVD model, and the transducer admittance formula is as follows:
wherein R issExpressed as: rs=R0+Rxm,R0Is the dielectric loss, R, of the piezoceramic materialxmIs a characteristic acoustic emission, ω ═ 2 π f is the angular frequency, C0Is equivalent parallel capacitor, series resonance resistor RsRepresenting radiation and mechanical losses, LsAnd CsCharacterizing a resonance characteristic of the transducer;
series resonant frequency omegasAnd parallel resonant frequency omegapRespectively expressed as:
at the series resonance frequency ω ═ ωsWhere admittance is maximal:
thus, R can be derived from the real and imaginary parts of the maximum admittance, respectivelysAnd C0:
To ensure admittance at parallel resonancepMinimum, find CsComprises the following steps:
finally, calculate LsComprises the following steps:
in the step (2), when designing the impedance matching circuit, in order to implement impedance matching, a dual-port impedance matching network is provided, the input impedance of the first port is conjugate matched with the impedance of the excitation source, and the output impedance of the second port is conjugate with the impedance of the load, specifically as follows:
when the series resonance frequency point is selected as the operating frequency, LsAnd CsA resonance is generated and the resonance is generated,the BVD model is reduced to C0And RsAre connected in parallel; for impedance matching, the input impedance Z of the transducer is matchedinEqual to the output impedance Z of the power amplifiergComplex conjugation of, i.e.The output impedance of a conventional power amplifier is purely resistive, ZgSimplified as RgTo do soReduced to Zin=Rin=Rg(ii) a In order to make the transducer parallel capacitance generate resonance, a parallel inductance is used;
when the output resistance of the power amplifier is matched with the real part of the impedance of the transducer by using a matching transformer, the excitation inductance of the transformer and the parallel capacitor C of the transducer are simultaneously matched0To resonate with C0Resonance is generated, and the excitation inductance of the transformer is as follows:
in order to realize resistance value matching, when the turn ratio of the matching transformer is 1:1, the output resistor R of the power amplifiergEqual to the series resonance resistance R of the transducers(ii) a When the turn ratio of the matching transformer is 1: n, the output resistance of the power amplifier is reduced to 1/n2So that the turns ratio of the matching transformer is
Compared with the prior art, the invention has the following beneficial effects:
1. the in-situ shallow-dissection system based on the parametric array can realize a signal transmitting circuit with high power and high energy conversion efficiency and two paths of receiving channels of original frequency and difference frequency, realizes high-power signal transmission and simultaneously ensures the quality of received echo signals, and can simultaneously carry out depth measurement, terrain measurement and shallow stratum measurement, and the system can be applied to in-situ monitoring of stratum deformation of a hydrate trial mining area.
2. The invention adopts a three-layer modular structure system, has low average power consumption and strong system reliability, is convenient for the later secondary development and provides better human-computer interaction so as to be convenient for debugging and testing.
3. The invention provides an impedance matching circuit design method based on a matching transformer, which can ensure the maximum power output of a power amplifier and improve the power transmission efficiency between the power amplifier and a transducer to the maximum extent.
Drawings
FIG. 1 is a schematic diagram of an in-situ shallow profile system based on a parametric array according to the present invention;
FIG. 2 is a timing diagram of signals transmitted and received by the in-situ shallow-section system based on the parametric array according to the present invention;
FIG. 3 is a flow chart of the impedance matching circuit design method based on the matching transformer of the present invention;
fig. 4 is a schematic diagram of a two-port impedance matching circuit.
Detailed Description
The invention will be described in further detail below with reference to the drawings and examples, which are intended to facilitate the understanding of the invention without limiting it in any way.
As shown in fig. 1, an in-situ shallow profile system based on a parametric array includes a system control module 1, a transmitting circuit 2, a receiving circuit 4, and a transducer array 3.
The system control module 1 uses a three-layer modular structure design combining an FPGA as a hardware control layer, a DSP as a main control layer and an MCU (STM32) or PC end as an instruction layer. The instruction layer MCU is used for autonomous system work, and comprises functions of timing awakening, sound wave receiving and transmitting setting and the like; the instruction layer PC end is used for manually operating the shallow dissection system and has more functions than the MCU; the main control layer is similar to RPC service, and identifies the call from the instruction layer through TCP communication or serial port communication and makes corresponding operation; the hardware control layer is communicated with the main control layer through UPP and I2C, and mainly realizes the tasks sent from the main control layer, including the interaction with AD/DA and the control of the signal transceiver module part.
The transmission circuit 2 is composed of one digital-to-analog converter 21, a plurality of power amplifiers 22, and a plurality of impedance matching circuits 23. The power amplifier 22 can increase the transmit power to ensure the sound source level of the parametric array at the original frequency and the difference frequency. The impedance matching circuit 23 can improve the power transmission efficiency, and plays a role in preventing the power amplifier from excessively heating and protecting the power amplifier.
The receiving circuit 4 is further divided into an original frequency signal receiving circuit and a difference frequency signal receiving circuit. The original frequency signal receiving circuit not only has the function of depth measurement, but also provides an important reference starting time point for Time Variable Gain (TVG) compensation of a difference frequency channel. The difference frequency signal receiving circuit is responsible for processing the difference frequency self-demodulation signal so as to obtain the profile information of the stratum. The original frequency signal receiving circuit is composed of a low noise preamplifier 411, an adjustable gain amplifier 412, a low pass filter 413 and an analog-to-digital converter 414, and the difference frequency signal receiving circuit is mainly composed of a low noise preamplifier 421, an adjustable gain amplifier 422, a low pass filter 423 and an analog-to-digital converter 424. The original frequency signal receiving circuit also has a transceiving switch 415 in front of the low noise preamplifier 411, which plays a role of blocking the high voltage transmitting signal so as to protect the circuit. The difference frequency signal receiving circuit is provided with a receiving transducer 425 before the low noise preamplifier 421.
The transducer array 4 is a sound emission device of the system, and compared with a single transducer, the transducer array has the advantages of high transmission power, high directivity, low side lobe and the like. The transducer array 4 corresponds to a plurality of impedance matching circuits 23, and each impedance matching circuit 23 is connected to the digital-to-analog converter 21 through a power amplifier 22.
Furthermore, when the transmitting circuit 2 is operated, the system control module 1 enables the PA _ EN, the power amplifiers 22 of the multiple channels can be enabled independently, and the flexibility in use is high, that is, the system control module 1 can select the transmitting parameter signal or only use a single channel to transmit the signal through software.
Further, the signal of the selected AD9708 is input to the power amplifier (the control module controls the DAC _ SEL implementation), thereby driving the transducer to emit an acoustic signal.
Further, the system control module 1 selects to receive the echo signal from the low frequency transducer or the high frequency transducer through an LNA _ SEL (receiving channel selector) when the receiving circuit 4 is in operation, and the control module controls the gain of the receiving circuit VGA through an AD9708 (at this time, the control module controls the DAC _ SEL to select the signal input of the DAC to the VGA).
Fig. 2 shows a timing chart of signals transmitted and received by an in-situ shallow profile system based on a parametric array. And the control module command layer (MCU or PC end) sequentially issues task commands, the DSP carries out corresponding actions on the commands and executes corresponding actions, and the FPGA can be called to work in the period. Namely, the command layer sequentially executes the steps of setting a transmitting waveform, setting a receiving and transmitting gain, selecting a transmitting mode (a parametric array mode or a single waveform mode), starting transmitting and receiving and finally storing echo data. The DSP of the main control layer executes corresponding function action every time receiving an instruction, returns an execution status code after the execution is finished, returns 'OK' if the execution is successful, and returns corresponding characters if the execution is failed. And the FPGA of the hardware control layer only executes the hardware interaction and high-speed reading and writing which are good in the performance, if starting transmission and receiving, the FPGA drives the high-speed DAC to transmit signals, then the echo signals received by the receiving end are read from the high-speed ADC immediately, and the echo signals are written back to the cache of the DSP. That is, the operations on the hardware are completely performed by the FPGA and the call interface is provided to the DSP. After the DSP executes the calling action, the DSP only needs to synchronously wait for the FPGA to finish execution. Similarly, as for the MCU of the instruction layer, the FPGA of the bottom layer is transparent, and the MCU can indirectly complete the task through the DSP by adjusting the corresponding instruction flow according to the task requirement. The layered design mode simplifies the logic required to be responsible for each layer, and the processor of each layer only processes simple and single linear tasks, so that the overall stability of the system can be effectively improved.
As shown in fig. 3, for a method for designing an impedance matching circuit based on a matching transformer, the maximum power output of a power amplifier can be ensured and the power transmission efficiency between the power amplifier and a transducer can be improved to the maximum extent by the criterion of calculating the optimal turn ratio. Firstly, an equivalent model of the transducer is established through an admittance-frequency curve of the transducer, and values of circuit elements are obtained through parameter identification through nonlinear fitting of measured admittance. Then, an impedance matching circuit satisfying impedance matching and high power operation requirements is designed based on the matching transformer. In order to ensure the maximum output power of the power amplifier (i.e. the output voltage and the output current are maximized at the same time), a matching transformer is designed to match the impedance of the transducer to a specific resistance, which is equal to the ratio of the maximum voltage to the output voltage.
(1) Establishing an equivalent model of a transducer
The transducer may be equivalent to a resistor in parallel with a capacitor, but both the capacitor and the resistor change with frequency. Therefore, the model is only suitable for impedance matching at a single frequency. The Butterworth-Van Dyke (BVD) model is one of the most common models for piezoelectric transducers, and can be determined by measuring the impedance or admittance of the transducer. The BVD model may reflect the characteristics of the sensor over a range of frequencies and is therefore suitable for the design of a broadband impedance matching circuit.
Based on the BVD model, the formula for deriving the transducer admittance is as follows:
wherein R issCan be expressed as: rs=R0+Rxm,R0Is the dielectric loss, R, of the piezoceramic materialxmIs a characteristic acoustic emission, ω ═ 2 π f is the angular frequency, C0Is equivalent parallel capacitor, series resonance resistor RsRepresenting radiation and mechanical losses, LsAnd CsThe resonance characteristics of the transducer are characterized.
Series resonant frequency omegasAnd parallel resonant frequency omegapExpressed as:
at the series resonance frequency ω ═ ωsWhere admittance is maximal:
thus, R can be derived from the real and imaginary parts of the maximum admittance, respectivelysAnd C0:
To ensure admittance at parallel resonancepMinimum, find CsComprises the following steps:
finally, calculate LsComprises the following steps:
(2) designing impedance matching circuit based on matching transformer
After obtaining an equivalent model of the transducer, an impedance matching circuit is designed. According to impedance matching theory, maximum power will be transferred from the excitation source to the load if the load impedance is the complex conjugate of the source impedance. To achieve impedance matching, a two-port impedance matching network is required, with the input impedance of port # 1 being conjugate matched to the driver impedance and the output impedance of port # 2 being conjugate to the load impedance, as shown in fig. 4.
When we select the series resonance frequency point as the operating frequency, LsAnd CsResonance generation, BVD model reduction to C0And RsAre connected in parallel. For impedance matching, the input impedance Z of the transducer is matchedinShould equal the power amplifier output impedance ZgComplex conjugation of, i.e.The output impedance of a conventional power amplifier is purely resistive, ZgCan be simplified to RgTo do soReduced to Zin=Rin=Rg. In order to resonate the transducer parallel capacitance, a parallel inductance may be used. When the output resistance of the power amplifier is matched with the real part of the impedance of the transducer by using the matching transformer, the excitation inductance of the transformer can be simultaneously matched with the parallel capacitor C of the transducer0Resonance is generated. To be in contact with C0Resonance is generated, and the exciting inductance of the transformer is as follows:
in order to realize resistance value matching, when the turn ratio of the matching transformer is 1:1, the output resistor R of the power amplifiergShould be equal to the series resonance resistance R of the transducers(ii) a When the turn ratio of the matching transformer is 1: n, the output resistance of the power amplifier is reduced to 1/n2So the turns ratio of the matching transformer should be equal to
The embodiments described above are intended to illustrate the technical solutions and advantages of the present invention, and it should be understood that the above-mentioned embodiments are only specific embodiments of the present invention, and are not intended to limit the present invention, and any modifications, additions and equivalents made within the scope of the principles of the present invention should be included in the scope of the present invention.
Claims (9)
1. An in-situ shallow-dissection system based on a parametric array comprises a system control module, a transmitting circuit, a receiving circuit and a transducer array, wherein the transmitting circuit, the receiving circuit and the transducer array are controlled by the system control module; the digital-to-analog converter is connected with the input end and the system control module, and the transducer array is connected with the impedance matching circuit and used for transmitting acoustic signals;
the receiving circuit comprises a primary frequency signal receiving circuit and a difference frequency signal receiving circuit, the primary frequency signal receiving circuit directly receives a primary frequency signal of the transmitting circuit, and the difference frequency signal receiving circuit receives an acoustic signal transmitted by the transducer array; and the original frequency signal receiving circuit and the difference frequency signal receiving circuit receive signals and then send the signals to the system control module for signal processing.
2. The in-situ shallow profile system based on the parametric array as claimed in claim 1, wherein the system control module comprises an instruction layer, a main control layer and a hardware control layer, the instruction layer adopts an MCU or a PC end to issue instructions to the main control layer, wherein the MCU is used for the autonomous control of the system to issue instructions, and the PC end is used for manual operation to issue instructions;
the main control layer identifies the call from the instruction layer through TCP communication or serial port communication and makes corresponding operation;
the hardware control layer is communicated with the main control layer through UPP and I2C, and is used for realizing tasks issued by the main control layer, including control of the receiving circuit and the transmitting circuit.
3. The in-situ shallow profile system based on the parametric array as claimed in claim 1, wherein the original frequency signal receiving circuit and the difference frequency signal receiving circuit each comprise a low noise preamplifier, an adjustable gain amplifier, a low pass filter and an analog-to-digital converter; the original frequency signal receiving circuit is also provided with a receiving and transmitting switch between the low-noise preamplifier and the impedance matching circuit, and the receiving and transmitting switch plays a role in blocking a high-voltage transmitting signal of the transmitting circuit so as to protect the circuit; the difference frequency signal receiving circuit is provided with a receiving transducer in front of a low noise preamplifier.
4. The in-situ shallow profile system based on a parametric array as claimed in claim 1, wherein the transducer array corresponds to a plurality of impedance matching circuits, and each impedance matching circuit is connected to the digital-to-analog converter through a power amplifier.
5. The in-situ shallow profile system based on the parametric array as claimed in claim 1, wherein the transmit circuit is enabled by a system control module PA _ EN when operating, and the system control module selects the multi-channel transmit signal or only uses the single-channel transmit signal through software.
6. The in-situ shallow profile system based on the parametric array as claimed in claim 1, wherein the transducer array employs a low frequency transducer or a high frequency transducer, and when the receiving circuit works, the system control module selectively receives the echo signal from the low frequency transducer or the high frequency transducer through the receiving channel selector, and simultaneously controls the gain of the receiving circuit VGA through the digital-to-analog converter.
7. The in-situ shallow profile system based on a parametric array as claimed in claim 1, wherein the impedance matching circuit is designed by the following steps:
(1) establishing an equivalent model of the transducer through an admittance-frequency curve of the transducer, and obtaining values of each circuit element through nonlinear fitting and parameter identification of the transducer admittance;
(2) an impedance matching circuit which meets the requirements of impedance matching and high-power operation is designed based on a matching transformer.
8. The parametric array-based in-situ shallow profile system of claim 7, wherein in step (1), the equivalent model of the transducer is a BVD model, and the transducer admittance is expressed as follows:
wherein R issExpressed as: rs=R0+Rxm,R0Is the dielectric loss, R, of the piezoceramic materialxmIs a characteristic acoustic emission, ω ═ 2 π f is the angular frequency, C0Is equivalent parallel capacitor, series resonance resistor RsRepresenting radiation and mechanical losses, LsAnd CsCharacterizing a resonance characteristic of the transducer;
series resonant frequency omegasAnd parallel resonant frequency omegapRespectively expressed as:
at the series resonance frequency ω ═ ωsWhere admittance is maximal:
thus, R can be derived from the real and imaginary parts of the maximum admittance, respectivelysAnd C0:
To ensure admittance at parallel resonancepMinimum, find CsComprises the following steps:
finally, calculate LsComprises the following steps:
9. the in-situ shallow profile system based on parametric array as claimed in claim 8, wherein in step (2), when designing the impedance matching circuit, in order to implement impedance matching, a two-port impedance matching network is provided, wherein an input impedance of the first port is conjugate matched with an impedance of the excitation source, and an output impedance of the second port is conjugate with a load impedance, specifically as follows:
when the series resonance frequency point is selected as the operating frequency, LsAnd CsResonance generation, BVD model reduction to C0And RsAre connected in parallel; for impedance matching, the input impedance Z of the transducer is matchedinEqual to the output impedance Z of the power amplifiergComplex conjugation of, i.e.The output impedance of a conventional power amplifier is purely resistive, ZgSimplified as RgTo do soReduced to Zin=Rin=Rg(ii) a In order to make the transducer parallel capacitance generate resonance, a parallel inductance is used;
when the output resistance of the power amplifier is matched with the real part of the impedance of the transducer by using a matching transformer, the excitation inductance of the transformer and the parallel capacitor C of the transducer are simultaneously matched0To resonate with C0Resonance is generated, and the excitation inductance of the transformer is as follows:
in order to realize resistance value matching, when the turn ratio of the matching transformer is 1:1, the output resistor R of the power amplifiergEqual to the series resonance resistance R of the transducers(ii) a When the turn ratio of the matching transformer is 1: n, the output resistance of the power amplifier is reduced to 1/n2So that the turns ratio of the matching transformer is
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
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CN115460509A (en) * | 2022-09-02 | 2022-12-09 | 湖南大学 | Method and apparatus for widening bandwidth of transducer using nonlinear non-Foster system |
CN115460509B (en) * | 2022-09-02 | 2024-06-04 | 湖南大学 | Transducer bandwidth widening method and device using nonlinear non-foster system |
CN117376775A (en) * | 2023-12-08 | 2024-01-09 | 青岛哈尔滨工程大学创新发展中心 | Method and circuit for improving electric matching and acoustic performance and power factor of underwater acoustic transducer |
CN117376775B (en) * | 2023-12-08 | 2024-02-27 | 青岛哈尔滨工程大学创新发展中心 | Method and circuit for improving electric matching and acoustic performance and power factor of underwater acoustic transducer |
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