CN113380610A - Method for improving electrical performance of strip-shaped groove structure GaN vertical Schottky diode based on self-alignment process - Google Patents
Method for improving electrical performance of strip-shaped groove structure GaN vertical Schottky diode based on self-alignment process Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 101
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 85
- 238000005530 etching Methods 0.000 claims abstract description 53
- 229910052751 metal Inorganic materials 0.000 claims abstract description 50
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- 239000000758 substrate Substances 0.000 claims abstract description 34
- 238000001259 photo etching Methods 0.000 claims abstract description 27
- 238000010894 electron beam technology Methods 0.000 claims abstract description 23
- 238000005468 ion implantation Methods 0.000 claims abstract description 23
- 238000009616 inductively coupled plasma Methods 0.000 claims abstract description 19
- 238000001312 dry etching Methods 0.000 claims abstract description 16
- 238000002474 experimental method Methods 0.000 claims abstract description 13
- 238000000137 annealing Methods 0.000 claims abstract description 12
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- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 7
- 239000008367 deionised water Substances 0.000 claims description 7
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- 230000015556 catabolic process Effects 0.000 abstract description 7
- 229910002601 GaN Inorganic materials 0.000 description 56
- 238000004151 rapid thermal annealing Methods 0.000 description 10
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/66196—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices with an active layer made of a group 13/15 material
- H01L29/66204—Diodes
- H01L29/66212—Schottky diodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/47—Schottky barrier electrodes
- H01L29/475—Schottky barrier electrodes on AIII-BV compounds
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
- H01L29/8725—Schottky diodes of the trench MOS barrier type [TMBS]
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Abstract
The invention discloses a method for improving the electrical property of a bar-shaped groove structure GaN vertical Schottky diode based on a self-alignment process, which adopts a standard photoetching process to prepare a photoresist etching mask on the front surface of a self-supporting substrate GaN; performing an alignment mark etching experiment on the self-supporting substrate GaN by adopting an Inductively Coupled Plasma (ICP) dry etching process; evaporating a Ti/Al/Ni/Au metal layer on the back surface of the self-supporting substrate GaN substrate by adopting an electron beam process and carrying out rapid annealing treatment to form ohmic contact; preparing a strip-shaped metal Ni mask on the front surface of a self-supporting substrate GaN substrate by adopting photoetching and electron beam processes; etching the strip-shaped metal Ni mask by adopting an ICP (inductively coupled plasma) dry etching process, and then injecting Ar ions into the front surface of the GaN self-supporting substrate; and finally, preparing a Ni/Al composite metal layer on the front surface of the self-supporting substrate GaN substrate after ion implantation to form the metal-insulating layer-semiconductor structure GaN Schottky diode. The reverse leakage of the common vertical GaN Schottky diode can be effectively reduced, and the breakdown voltage is improved.
Description
Technical Field
The invention belongs to the technical field of wide bandgap semiconductor devices, and particularly relates to a method for improving the electrical property of a strip-shaped groove structure GaN vertical Schottky diode based on a self-alignment process.
Background
Third generation wide bandgap semiconductor materials, represented by gallium nitride (GaN), are rapidly becoming the first choice for high frequency high power devices due to their high critical breakdown field strength and high electron saturation drift velocity. Especially, the Schottky diode has important application prospect in the field of power diode rectifying devices, and the Schottky diode (SBD) has important application in circuits such as detection circuits, mixing circuits and the like as an important two-terminal electronic element. However, an important problem exists at present in that reverse leakage of the prepared schottky diode is generally large, so that the device is subjected to early pre-breakdown under a very low reverse bias voltage, and the performance and application of the device are seriously reduced, so how to effectively reduce the reverse leakage magnitude is very important for expanding the application of the GaN schottky diode. The invention aims to provide a GaN self-aligned trench structure, and finally forms a corresponding GaN-SBD with a metal-insulating layer-semiconductor (MIS) structure, so that the reverse leakage of a GaN Schottky diode can be effectively reduced.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a method for improving the electrical property of the bar-shaped groove structure GaN vertical Schottky diode based on the self-alignment process aiming at the defects in the prior art, so that the reverse leakage of the self-supporting GaN substrate vertical Schottky diode is finally reduced, the breakdown voltage of the device is improved, the power loss is favorably reduced, and the overall voltage withstanding level of the device is improved.
The invention adopts the following technical scheme:
a method for improving electrical properties of a bar-shaped groove structure GaN vertical Schottky diode based on a self-alignment process comprises the steps of preparing a photoresist etching mask on the front surface of a self-supporting substrate GaN by adopting a standard photoetching process; then, carrying out an alignment mark etching experiment on the self-supporting substrate GaN by adopting an Inductively Coupled Plasma (ICP) dry etching process; evaporating a Ti/Al/Ni/Au metal layer on the back surface of the self-supporting substrate GaN substrate by adopting an electron beam process, and performing rapid annealing treatment to form ohmic contact; preparing a strip-shaped metal Ni mask on the front surface of a self-supporting substrate GaN substrate prepared by ohmic contact by adopting photoetching and electron beam processes; etching the strip-shaped metal Ni mask by adopting an ICP (inductively coupled plasma) dry etching process, and then injecting Ar ions into the front surface of the etched self-supporting substrate GaN; and finally, preparing a Ni/Al composite metal layer on the front surface of the self-supporting substrate GaN substrate after ion implantation by adopting photoetching and electron beam processes to form the metal-insulating layer-semiconductor structure GaN Schottky diode.
Specifically, the thickness of the photoresist etching mask prepared on the front surface of the self-supporting substrate GaN by adopting a standard photoetching process is 1-1.5 microns.
Specifically, the thickness of a Ti/Al/Ni/Au metal layer evaporated on the back surface of the self-supporting substrate GaN substrate is 200-300 nm.
Specifically, the temperature of the rapid annealing treatment is 750-850 ℃, and the time of the annealing treatment is 20-30 s.
Further, the rapid annealing treatment is performed in an inert gas Ar environment.
Specifically, the thickness of the strip-shaped metal Ni mask is 200-300 nm.
Specifically, the etching time on the strip-shaped metal Ni mask is 5-15 min.
Specifically, Ar ions are implanted into the front surface of the etched self-supporting substrate GaN by adopting an ion implantation process.
Specifically, the thickness of the Ni/Al composite metal layer is 50-100 nm.
Specifically, before a photoresist etching mask is prepared on the front surface of the self-supporting substrate GaN by adopting a standard photoetching process, the self-supporting substrate GaN is sequentially subjected to ultrasonic cleaning in acetone, absolute ethyl alcohol and deionized water.
Compared with the prior art, the invention has at least the following beneficial effects:
compared with the traditional Schottky diode, the bar-shaped groove structure device can greatly reduce the electric field concentration effect at the edge of the anode, thereby reducing the reverse electric leakage and improving the overall voltage resistance level of the device; the etching mask, the Ar ion injection mask and the Schottky anode metal of the device are prepared at one time by adopting a self-alignment process, so that errors caused by multiple times of alignment are avoided, and the process is simple and practical.
Furthermore, the thickness of the etching mask is 1-1.5 μm, so that the area of the front surface of the gallium nitride which does not need to be etched can be fully protected, and a good alignment mark pattern can be formed.
Furthermore, the Ti/Al/Ni/Au metal composite layer is a common and mature GaN ohmic contact preparation process at present, and the reason that the thickness is 200-300 nm is to ensure that the probe cannot prick the electrode when the electrical property is tested.
Further, the ohmic contact annealing temperature is 750-850 ℃, the time is 20-30 s, the process is also a mature process of GaN ohmic contact annealing at present, and at the temperature and the time, metal Ti can fully react with GaN to form corresponding alloy, so that ohmic contact with better contact resistance is formed.
Further, the current GaN ohmic contact annealing atmosphere has 2 atmospheres, under inert gas Ar or N2Under the environment, GaN can form good ohmic contact under both atmosphere environments.
Furthermore, the reason that the thickness of the strip-shaped metal Ni mask is 200-300 nm is that the Ni with the thickness of 200-300 nm obtained by TRIM software simulation can resist bombardment of Ar ion injection, and the GaN at the bottom is ensured not to form a high-resistance layer.
Furthermore, the etching time directly determines the depth of the trench etching, and the purpose of this is to see the influence of the trench depth on the reverse leakage.
Further, Ar ion implantation is also a well-established method for forming a high-resistance insulating layer from GaN, and after Ar ions bombard GaN crystal lattices, the damaged crystal lattices easily form the insulating layer.
Furthermore, a Ni/Al composite metal layer with the thickness of 50-100 nm is covered on the groove structure, so that the test is convenient
Furthermore, the aim of cleaning the GaN substrate is to remove some impurities and organic pollutants on the surface and avoid the influence on the performance of the device
In conclusion, the reverse leakage of the common vertical GaN Schottky diode can be effectively reduced, and the breakdown voltage is improved; the self-alignment process avoids device preparation errors caused by multiple times of alignment, and is simple and practical.
The technical solution of the present invention is further described in detail by the accompanying drawings and embodiments.
Drawings
Fig. 1 is a graph comparing reverse electrical characteristics of a self-aligned trench structure GaN vertical schottky diode.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It is also to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the specification of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
Various structural schematics according to the disclosed embodiments of the invention are shown in the drawings. The figures are not drawn to scale, wherein certain details are exaggerated and possibly omitted for clarity of presentation. The shapes of various regions, layers and their relative sizes and positional relationships shown in the drawings are merely exemplary, and deviations may occur in practice due to manufacturing tolerances or technical limitations, and a person skilled in the art may additionally design regions/layers having different shapes, sizes, relative positions, according to actual needs.
The invention relates to a method for improving the electrical property of a strip-shaped groove structure GaN vertical Schottky diode based on a self-alignment process, which comprises the following steps:
s1, sequentially carrying out ultrasonic cleaning on the self-supporting substrate GaN in acetone, absolute ethyl alcohol and deionized water;
s2, preparing a mask with the thickness of 1-1.5 mu m for etching AZ6130 photoresist on the surface of the GaN cleaned in the step S1 by adopting a standard photoetching process;
s3, performing an alignment mark etching experiment on the GaN of the etching mask in the step S2 by adopting an Inductively Coupled Plasma (ICP) dry etching process;
s4, after the alignment mark etching in the step S3 is finished, evaporating a Ti/Al/Ni/Au metal layer on the back of the GaN substrate by adopting an electron beam process, wherein the thickness of the Ti/Al/Ni/Au metal layer is 200-300 nm, and treating the metal layer for 20-30S in an Ar environment at 750-850 ℃ by adopting RTA (rapid thermal annealing) equipment to form corresponding ohmic contact;
s5, preparing a strip-shaped metal Ni mask with the thickness of 200-300 nm on the front surface of the GaN substrate prepared in the step S4 through ohmic contact by adopting photoetching and electron beam processes, wherein the corresponding layer Ni is used as an etching mask of a strip-shaped groove structure in the subsequent process, an Ar ion implantation mask and a Schottky metal electrode;
s6, performing an etching experiment on the strip-shaped groove structure in the step S5 by adopting an ICP dry etching process;
s7, performing an Ar ion implantation process on the etched GaN front surface of the groove structure in the step S6 by adopting an ion implantation process;
s8, preparing Ni/Al metal with the thickness of 50-100 nm on the front side of the GaN substrate subjected to ion implantation in the step S7 by adopting photoetching and electron beam processes to form a corresponding metal-insulating layer-semiconductor (MIS) structure GaN Schottky diode.
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example 1
S1, sequentially carrying out ultrasonic cleaning on the self-supporting substrate GaN in acetone, absolute ethyl alcohol and deionized water;
s2, preparing a mask with the thickness of 1 mu m of AZ6130 photoresist etching on the surface of the GaN cleaned in the step S1 by adopting a standard photoetching process;
s3, performing an alignment mark etching experiment on the GaN of the etching mask in the step S2 by adopting an Inductively Coupled Plasma (ICP) dry etching process;
s4, after the alignment mark etching in the step S3 is finished, evaporating a Ti/Al/Ni/Au metal layer on the back of the GaN substrate by adopting an electron beam process, wherein the thickness of the metal layer is 200nm, and processing the metal layer for 20S in an Ar environment at 750 ℃ by adopting RTA (rapid thermal annealing) equipment to form corresponding ohmic contact;
s5, preparing a strip-shaped metal Ni mask with the thickness of 200nm on the front surface of the GaN substrate prepared in the step S4 through ohmic contact by adopting photoetching and electron beam processes, wherein the corresponding layer Ni is used as an etching mask of a strip-shaped groove structure in the subsequent process, an Ar ion implantation mask and a Schottky metal electrode;
s6, performing an etching experiment on the strip-shaped groove structure in the step S5 by adopting an ICP dry etching process, wherein the etching time is 5 min;
s7, performing an Ar ion implantation process on the etched GaN front surface of the groove structure in the step S6 by adopting an ion implantation process;
and S8, preparing Ni/Al metal with the thickness of 50nm on the front surface of the GaN substrate subjected to ion implantation in the step S7 by adopting photoetching and electron beam processes to form a corresponding metal-insulator-semiconductor (MIS) structure GaN Schottky diode.
Finally, the final test shows that the leakage of the device is obviously reduced, and the breakdown voltage is obviously improved.
Example 2
S1, sequentially carrying out ultrasonic cleaning on the self-supporting substrate GaN in acetone, absolute ethyl alcohol and deionized water;
s2, preparing a mask with the thickness of 1.5 mu m of AZ6130 photoresist etching on the surface of the GaN cleaned in the step S1 by adopting a standard photoetching process;
s3, performing an alignment mark etching experiment on the GaN of the etching mask in the step S2 by adopting an Inductively Coupled Plasma (ICP) dry etching process;
s4, after the alignment mark etching in the step S3 is finished, evaporating a Ti/Al/Ni/Au metal layer on the back of the GaN substrate by adopting an electron beam process, wherein the thickness is 300nm, and processing the metal layer for 30S in an Ar environment at 850 ℃ by adopting RTA (rapid thermal annealing) equipment to form corresponding ohmic contact;
s5, preparing a 300nm strip-shaped metal Ni mask on the front surface of the GaN substrate prepared in the step S4 through ohmic contact by adopting photoetching and electron beam processes, wherein the corresponding layer Ni is used as an etching mask of a strip-shaped groove structure in the subsequent process, and Ar ions are injected into the mask and the Schottky metal electrode;
s6, carrying out an etching experiment on the strip-shaped groove structure in the step S5 by adopting an ICP dry etching process, wherein the etching time is 8 min;
s7, performing an Ar ion implantation process on the etched GaN front surface of the groove structure in the step S6 by adopting an ion implantation process;
s8, adopting photoetching and electron beam technology to prepare Ni/Al metal with the thickness of 100nm on the front surface of the GaN substrate after ion implantation in the step S7 so as to form a corresponding metal-insulating layer-semiconductor (MIS) structure GaN Schottky diode.
The final test results were similar to those in example 1, with reduced reverse leakage and significant breakdown voltage improvement.
Example 3
S1, sequentially carrying out ultrasonic cleaning on the self-supporting substrate GaN in acetone, absolute ethyl alcohol and deionized water;
s2, preparing a mask with the thickness of 1.2 mu m of AZ6130 photoresist etching on the surface of the GaN cleaned in the step S1 by adopting a standard photoetching process;
s3, performing an alignment mark etching experiment on the GaN of the etching mask in the step S2 by adopting an Inductively Coupled Plasma (ICP) dry etching process;
s4, after the alignment mark etching in the step S3 is finished, evaporating a Ti/Al/Ni/Au metal layer on the back of the GaN substrate by adopting an electron beam process, wherein the thickness is 240nm, and processing the metal layer for 24S in an Ar environment by adopting RTA (rapid thermal annealing) equipment at 790 ℃ to form corresponding ohmic contact;
s5, preparing a 240nm strip-shaped metal Ni mask on the front surface of the GaN substrate prepared in the step S4 through ohmic contact by adopting photoetching and electron beam processes, wherein the corresponding layer Ni is used as an etching mask of a strip-shaped groove structure in the subsequent process, and Ar ions are injected into the mask and the Schottky metal electrode;
s6, carrying out an etching experiment on the strip-shaped groove structure in the step S5 by adopting an ICP dry etching process, wherein the etching time is 11 min;
s7, performing an Ar ion implantation process on the etched GaN front surface of the groove structure in the step S6 by adopting an ion implantation process;
s8, preparing Ni/Al metal with the thickness of 50-100 nm on the front side of the GaN substrate subjected to ion implantation in the step S7 by adopting photoetching and electron beam processes to form a corresponding metal-insulating layer-semiconductor (MIS) structure GaN Schottky diode.
The reverse performance improvement of example 3 is basically the same as that of example 1 and example 2, and no obvious difference exists.
Example 4
S1, sequentially carrying out ultrasonic cleaning on the self-supporting substrate GaN in acetone, absolute ethyl alcohol and deionized water;
s2, preparing a mask with the thickness of 1.2 mu m of AZ6130 photoresist etching on the surface of the GaN cleaned in the step S1 by adopting a standard photoetching process;
s3, performing an alignment mark etching experiment on the GaN of the etching mask in the step S2 by adopting an Inductively Coupled Plasma (ICP) dry etching process;
s4, after the alignment mark etching in the step S3 is finished, evaporating a Ti/Al/Ni/Au metal layer on the back of the GaN substrate by adopting an electron beam process, wherein the thickness is 270nm, and processing for 27S in an Ar environment at 840 ℃ by adopting RTA (rapid thermal annealing) equipment to form corresponding ohmic contact;
s5, preparing a 280nm strip-shaped metal Ni mask on the front surface of the GaN substrate prepared in the step S4 through ohmic contact by adopting photoetching and electron beam processes, wherein the corresponding layer Ni is used as an etching mask of a strip-shaped groove structure in the subsequent process, and Ar ions are injected into the mask and the Schottky metal electrode;
s6, carrying out an etching experiment on the strip-shaped groove structure in the step S5 by adopting an ICP dry etching process, wherein the etching time is 15 min;
s7, performing an Ar ion implantation process on the etched GaN front surface of the groove structure in the step S6 by adopting an ion implantation process;
s8, preparing Ni/Al metal with the thickness of 50-100 nm on the front side of the GaN substrate subjected to ion implantation in the step S7 by adopting photoetching and electron beam processes to form a corresponding metal-insulating layer-semiconductor (MIS) structure GaN Schottky diode.
The improvement of the embodiment 4 is basically the same as that of the embodiments 1, 2 and 3; the effect of the four embodiments described above is to study the effect of different trench structure depths on device performance.
Referring to fig. 1, the comparison between the reverse electrical characteristics of the GaN vertical schottky diode with the self-aligned trench structure and the conventional GaN vertical schottky diode shows that the reverse leakage of the GaN-SBD with the new structure is significantly reduced, which indicates that the MIS structure has significant effect on reducing the reverse leakage of the GaN schottky diode with the self-supporting substrate.
In summary, compared with a diode device with a common structure, the method for improving the electrical performance of the bar-shaped groove structure GaN vertical schottky diode based on the self-alignment process has the advantage that the reverse characteristic is remarkably improved.
The above-mentioned contents are only for illustrating the technical idea of the present invention, and the protection scope of the present invention is not limited thereby, and any modification made on the basis of the technical idea of the present invention falls within the protection scope of the claims of the present invention.
Claims (10)
1. A method for improving the electrical property of a bar-shaped groove structure GaN vertical Schottky diode based on a self-alignment process is characterized in that a standard photoetching process is adopted to prepare a photoresist etching mask on the front surface of a self-supporting substrate GaN; then, carrying out an alignment mark etching experiment on the self-supporting substrate GaN by adopting an Inductively Coupled Plasma (ICP) dry etching process; evaporating a Ti/Al/Ni/Au metal layer on the back surface of the self-supporting substrate GaN substrate by adopting an electron beam process, and performing rapid annealing treatment to form ohmic contact; preparing a strip-shaped metal Ni mask on the front surface of a self-supporting substrate GaN substrate prepared by ohmic contact by adopting photoetching and electron beam processes; etching the strip-shaped metal Ni mask by adopting an ICP (inductively coupled plasma) dry etching process, and then injecting Ar ions into the front surface of the etched self-supporting substrate GaN; and finally, preparing a Ni/Al composite metal layer on the front surface of the self-supporting substrate GaN substrate after ion implantation by adopting photoetching and electron beam processes to form the metal-insulating layer-semiconductor structure GaN Schottky diode.
2. The method according to claim 1, wherein the thickness of the photoresist etching mask prepared on the front surface of the self-supporting substrate GaN by adopting a standard photoetching process is 1-1.5 μm.
3. The method of claim 1, wherein the thickness of the Ti/Al/Ni/Au metal layer evaporated from the back surface of the free-standing substrate GaN substrate is 200-300 nm.
4. The method according to claim 1, wherein the temperature of the rapid annealing treatment is 750 to 850 ℃ and the time of the annealing treatment is 20 to 30 seconds.
5. The method of claim 4, wherein the rapid annealing process is performed in an inert gas Ar environment.
6. The method of claim 1, wherein the strip-shaped metal Ni mask has a thickness of 200-300 nm.
7. The method according to claim 1, wherein the etching time on the strip-shaped metal Ni mask is 5-15 min.
8. The method of claim 1, wherein Ar ions are implanted into the front surface of the etched free standing substrate GaN by an ion implantation process.
9. The method according to claim 1, wherein the thickness of the Ni/Al composite metal layer is 50 to 100 nm.
10. The method as claimed in claim 1, wherein before the photoresist etching mask is prepared on the front surface of the self-supporting substrate GaN by adopting a standard photoetching process, the self-supporting substrate GaN is sequentially subjected to ultrasonic cleaning in acetone, absolute ethyl alcohol and deionized water.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110616562.9A CN113380610A (en) | 2021-06-02 | 2021-06-02 | Method for improving electrical performance of strip-shaped groove structure GaN vertical Schottky diode based on self-alignment process |
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