CN113359932B - Constant transconductance biasing circuit - Google Patents

Constant transconductance biasing circuit Download PDF

Info

Publication number
CN113359932B
CN113359932B CN202110685209.6A CN202110685209A CN113359932B CN 113359932 B CN113359932 B CN 113359932B CN 202110685209 A CN202110685209 A CN 202110685209A CN 113359932 B CN113359932 B CN 113359932B
Authority
CN
China
Prior art keywords
circuit
current
transconductance
transistor
constant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202110685209.6A
Other languages
Chinese (zh)
Other versions
CN113359932A (en
Inventor
吴旭
张文俊
李连鸣
冯军
樊祥宁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Southeast University
Original Assignee
Southeast University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Southeast University filed Critical Southeast University
Priority to CN202110685209.6A priority Critical patent/CN113359932B/en
Publication of CN113359932A publication Critical patent/CN113359932A/en
Application granted granted Critical
Publication of CN113359932B publication Critical patent/CN113359932B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/565Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
    • G05F1/567Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Amplifiers (AREA)

Abstract

The invention discloses a constant transconductance biasing circuit, which comprises a PTAT circuit, a constant current source generating circuit, a current mirror circuit, a process angle adjusting circuit and a transconductance amplifier circuit. The constant current source generating circuit is used for providing a stable current for the process angle adjusting circuit. The current mirror circuit is used for copying the current generated by the constant current source circuit into the process angle adjusting circuit. The process angle adjusting circuit is used for adjusting the grid voltage of a linear region MOS tube resistor in the PTAT circuit, so that the resistance value of the linear region MOS tube resistor is changed, the current is changed, and the change of a process factor in a transconductance formula caused by the change of a process angle is counteracted. The transconductance amplifier circuit receives the bias current after process adjustment and temperature compensation, and the transconductance value of the transconductance amplifier can be constant under the combined action of the PTAT current generating circuit and the process corner adjusting circuit.

Description

Constant transconductance biasing circuit
Technical Field
The invention belongs to the field of integrated circuits, and particularly relates to a constant transconductance biasing circuit.
Background
The transconductance of the MOS transistor is a particularly important parameter in analog integrated circuit design, which affects the performance of many circuits, including small signal gain, bandwidth, noise, etc. In designing an amplifier or filter circuit, a constant transconductance biasing circuit is essential. For example, when designing a Gm-C filter, the cut-off frequency of the Gm-C filter is closely related to the transconductance value of the amplifier, and the purpose of stabilizing the bandwidth can be achieved by stabilizing the transconductance value.
The traditional constant transconductance circuit is a bias circuit formed by a beta multiplier, and a transconductance value is expressed by an on-chip resistance value through calculation, so that a constant transconductance can be obtained as long as the resistance is kept constant. The resistance of the resistor is inevitably affected by temperature and process variations, and typically a 20% deviation occurs at different process corners and at different temperatures. Therefore, instead of the on-chip resistance method, various methods have been developed to make the transconductance constant, such as: the off-chip high-precision resistor is used to replace the on-chip resistor to eliminate the influence of the process angle and the temperature, or a MOS tube which is controlled by a precise external signal and is biased in a linear region is used to replace the on-chip resistor.
For a constant transconductance biasing circuit, the use of off-chip components increases the system cost, and the use of external signal control increases the complexity of the circuit.
Disclosure of Invention
The invention aims to provide a constant transconductance biasing circuit to solve the technical problems of high cost, high complexity and high deviation.
The specific technical scheme of the invention is as follows:
a constant transconductance biasing circuit comprises a PTAT circuit, a constant current source generating circuit, a current mirror circuit, a process angle adjusting circuit and a transconductance amplifier circuit;
the PTAT circuit comprises a transistor M2, a transistor M3, an N-type MOS transistor M1 working in a linear region, a pnp triode Q1, a pnp triode Q2 and an operational amplifier; the gates of the transistor M2 and the transistor M3 are connected, the source electrode is connected with power voltage, the drain electrode is respectively connected with the positive input end and the negative input end of the operational amplifier, and the output of the operational amplifier is connected with the gates of M2 and M3; bases and collectors of the pnp triode Q1 and the pnp triode Q2 are connected and grounded, and emitters are respectively connected with positive and negative input ends of the operational amplifier; the source electrode of the linear region MOS tube M1 is connected with the emitter electrode of a pnp triode Q2, the drain electrode is connected with the drain electrode of a transistor M3, and the grid electrode is connected with the output voltage Vg of the process angle adjusting circuit;
the PTAT circuit is used for providing bias current for the transconductance amplifier circuit, and the current with positive temperature coefficient generated by the PTAT circuit can counteract betaeff(=μnCoxW/L) negative temperature characteristic ofnIs the mobility of MOS tube and has negative temperature characteristic, CoxThe gate oxide capacitance per unit area, W/L is the width-to-length ratio of the MOS tube;
the constant current source generating circuit is used for providing a stable current for the process angle adjusting circuit;
the current mirror circuit is used for copying the current generated by the constant current source generating circuit into the process angle adjusting circuit;
the process angle adjusting circuit comprises a first N-type MOS tube M7 and a second N-type MOS tube M8; the grid electrode and the drain electrode of the first N-type MOS tube M7 are connected and are connected with the drain electrode of the M6, the grid electrode and the drain electrode of the second N-type MOS tube M8 are connected and are connected with the source electrode of the M7, and the source electrode of the M8 is grounded;
the process angle adjusting circuit is used for adjusting the grid voltage of an MOS tube M1 working in a linear region in a PTAT circuit, the on-resistances of MOS tubes M7 and M8 in the circuit are related to the change of a process angle, when the process angle is changed, the on-resistance is changed, so that the output voltage of the process angle adjusting circuit is changed, namely the grid voltage of the MOS tube M1 is changed, the resistance value of the MOS tube M1 is changed, the change of current is caused, and the change of the current can offset a process factor beta in a transconductance formulaeff(=μnCoxW/L) is changed due to the change of a process corner, and finally, the transconductance value is not influenced by temperature and process through two modes of process adjustment and temperature compensation;
the transconductance amplifier circuit is used for receiving the bias current subjected to process adjustment and temperature compensation and supplying the bias current to the amplifying tube so as to keep the transconductance value of the amplifying tube constant; the transconductance amplifier circuit comprises a first P-type MOS tube M4, a second P-type MOS tube Ma, a third P-type MOS tube Mb and two resistors R1 and R2; the first P-type MOS tube M4 is used for copying the current of the PTAT circuit; the second P-type MOS transistor Ma and the third P-type MOS transistor Mb are amplifier transistors and are objects for maintaining a constant transconductance value.
Further, the current mirror circuit comprises a first PMOS transistor M5 and a second PMOS transistor M6, a grid electrode of the first PMOS transistor M5 is connected with a grid electrode of the second PMOS transistor M6, a source electrode of the first PMOS transistor M5 and a source electrode of the second PMOS transistor M6 are both connected with a power supply, a drain electrode and a grid electrode of the first PMOS transistor M5 are both connected with an output end of the constant current source generating circuit, and a drain electrode of the second PMOS transistor M6 is connected with a grid electrode and a drain electrode of the first N-type MOS transistor M7 and is connected with a grid electrode of an MOS transistor M1 in the PTAT circuit.
Further, the output of the constant current source generation circuit is connected to the drain of the transistor M5 in the current mirror circuit.
Further, the input current I of the process corner adjusting circuitdAnd on-resistance r of N-type MOS transistors M7 and M8onHave the following relationship between:
Vg=ron·Id
wherein, IdIs a constant current generated by a replica constant current source generating circuitonThe on-resistance of the first N-type MOS transistor M7 and the second N-type MOS transistor M8.
The constant transconductance biasing circuit has the following advantages: the invention uses the process angle adjusting circuit to adjust the resistance value of the MOS tube of the PTAT circuit to adjust the current during the process change, thereby achieving the stability of the transconductance value. The constant transconductance biasing circuit structure can keep the transconductance value of the transconductance amplifier basically constant within a certain temperature range under different process angles under the condition of not needing external elements and external input signals, and the circuit has the advantages of simple structure and small area.
Drawings
FIG. 1 is a schematic diagram of a constant transconductance biasing circuit according to the present invention;
FIG. 2 shows the process factor β of the present invention at different process angles from-40 ℃ to-100 ℃eff(=μnCoxW/L) curve diagram;
FIG. 3 is a graph illustrating the resistance of the MOS transistor resistor M1 in the PTAT circuit with the gate voltage provided by the process corner adjusting circuit at different process corners ranging from-40 deg.C to-100 deg.C;
FIG. 4 is a graph illustrating the bias current of the PTAT circuit after passing through the process corner adjusting circuit under different process corners ranging from-40 deg.C to-100 deg.C;
fig. 5 is a graph of transconductance values of the amplification tube in the transconductance amplifier circuit at different process corners in the range of-40 ℃ to-100 ℃.
The notation in the figure is: 1. a current mirror circuit; 2. a constant current source generating circuit; 3. a process corner adjustment circuit; 4. a PTAT circuit; 5. a transconductance amplifier circuit.
Detailed Description
For a better understanding of the objects, structure and function of the present invention, a constant transconductance biasing circuit according to the present invention will be described in further detail with reference to the accompanying drawings.
As shown in fig. 1, the constant transconductance biasing circuit includes a PTAT circuit 4, a constant current source generating circuit 2, a current mirror circuit 1, a process corner adjusting circuit 3, and a transconductance amplifier circuit 5. The PTAT circuit 4 is used for providing bias current for the transconductance amplifier circuit 5, and the transconductance value and the current I of the MOS tube and the process factor betaeff(=μnCoxW/L) of whichnIs the mobility of MOS tube and has negative temperature characteristic, CoxIs the gate oxide capacitance per unit area, W/L is the width-to-length ratio of MOS transistor, and the current with positive temperature coefficient can counteract betaeff(=μnCoxW/L) of the temperature coefficient. The constant current source generating circuit 2 is used for providing a stable current for the process corner adjusting circuit 3. The current mirror circuit 1 functions to copy the current generated by the constant current source circuit 2 to the process corner adjusting circuit 3. The process angle adjusting circuit 3 is used for adjusting the gate voltage of a linear region MOS transistor M1 in the PTAT circuit 4, specifically, when the process angle changes, the gate voltage of the MOS transistor M1 is changed, so that the resistance value is changed, the current is changed, and the process factor beta in the transconductance formula is counteractedeff(=μnCoxW/L) due to process corner variations. The invention utilizes the combined action of the PTAT circuit 4 and the process corner adjusting circuit 3 to ensure that the transconductance value of the amplifying tube in the transconductance amplifier circuit 5 is not influenced by temperature and process.
The PTAT circuit 4 includes transistors M2, M3, and an N-type MOS transistor M1 operating in the linear region, two pnp transistors Q1, Q2, and an operational amplifier. The gates of the transistors M2 and M3 are connected, the sources are connected with the power voltage, the drains are respectively connected with the positive input end and the negative input end of the operational amplifier, and the output of the operational amplifier is connected with the gates of M2 and M3. Bases and collectors of the two pnp triodes Q1 and Q2 are connected and grounded, and emitters are respectively connected with positive and negative input ends of the operational amplifier. The source of the MOS transistor M1 in linear region is connected to the emitter of Q2, the drain is connected to the drain of M3, and the gate is connected to the output voltage Vg of the process angle adjusting circuit 3And (4) connecting. The PTAT current 4 is mainly used for compensating temperature characteristics, and due to the virtual short and virtual break characteristics of the operational amplifier, the voltage at two ends of the MOS transistor M1 is equal to V of two triodes Q1 and Q2BEThe difference, i.e. Δ VBEIn which V isBEIs the voltage difference between the base and emitter of the transistors Q1, Q2. Because of Δ VBEHas positive temperature characteristic, so that the positive temperature coefficient current generated by the positive temperature characteristic can be used for compensating betaeff(=μnCoxW/L) of the temperature coefficient.
The output terminal of the constant current source generation circuit 2 is connected to the drain of the transistor M5 in the current mirror circuit 1. The constant current source generating circuit 2 generates a stable current and transmits the stable current to the process angle adjusting circuit 3, and the current does not change with the temperature and the process.
The current mirror circuit 1 copies the constant current generated by the constant current source generating circuit 2, and obtains a constant current IdAnd transmitted to a process corner adjusting circuit 3 to adjust the output voltage. The current mirror circuit 1 comprises a first PMOS transistor M5 and a second PMOS transistor M6, the grid electrode of the first PMOS transistor M5 is connected with the grid electrode of the second PMOS transistor M6, the source electrode of the first PMOS transistor M5 and the source electrode of the second PMOS transistor M6 are both connected with a power supply, the drain electrode and the grid electrode of the first PMOS transistor M5 are both connected with the output end of the constant current source generating circuit 2, and the drain electrode of the second PMOS transistor M6 is connected with the process angle adjusting circuit 3 to adjust output voltages under different process angles.
The process corner adjusting circuit 3 is composed of two MOS transistors, and implements process corner adjustment of output voltage, as shown in fig. 1, the gate and the drain of the first N-type MOS transistor M7 are connected and connected with the drain of M6, the gate and the drain of the second N-type MOS transistor M8 are connected and connected with the source of M7, and the source of M8 is grounded.
Wherein, the on-resistance r of two N-type MOS tubes M7 and M8 in the process corner adjusting circuitonWill vary with process variations, ronThe changes at different process angles have the following relationship:
tt ss ff
ron -- increase of Reduce
The gate voltage provided to M1 in the PTAT circuit 4 generated by the process corner adjusting circuit 3 is expressed as:
Vg=ron·Id
wherein, IdIs the current of a constant current source, ronIs the on-resistance of the N-type MOS transistors M7 and M8 because of IdIs a constant value, ronIs a value that varies with the process angle, and thus the gate voltage Vg that is adjusted with the process angle variation can be realized. By connecting the voltage to the gate of M1, the resistance of M1 can be adjusted to adjust the process corner variation.
The working principle is as follows: the transconductance formula can be expressed approximately as
Figure GDA0003354875910000061
Wherein I is the current, betaeff(=μnCoxW/L) is a process factor. By a PTAT circuit4The generated bias current is transmitted to the transconductance amplifier to provide bias current for an amplifying tube Ma in the transconductance amplifier circuit 5, and the current with the positive temperature coefficient can compensate the process factor beta in the transconductance formulaeff(=μnCoxW/L) to achieve temperature compensation; in the transconductance amplifier circuit 5 when the process corner variesThe transconductance value of the amplifier transistor Ma is changed under the influence of process corner variations, and the magnitude of the bias current is changed by changing the resistance value of the transistor M1 operating in the linear region in the PTAT circuit 4, so as to compensate for βeff(=μnCoxW/L) to achieve the purpose of stabilizing the transconductance value. The resistance of the transistor M1 in the PTAT circuit 4 is realized by the process corner adjustment circuit 3, for example, when the process is changed from the tt process corner to the ss process corner, ronWill increase in value of (d), constant current IdFlows through ronWhen Vg generates an increased voltage value, which is the gate of the linear region resistor M1, the resistance of the transistor M1 decreases, resulting in an increase in PTAT current. Because of the fact that
Figure GDA0003354875910000071
At ss process angle, betaeff(=μnCoxW/L) is decreased, g is decreased by increasing PTAT currentmIs constant. R when the process angle changes from tt to ffonWill decrease in value, constant current IdFlows through ronWhile Vg will produce a decreasing voltage value at the gate of linear region resistor M1, the resistance of transistor M1 increases, resulting in a decrease in PTAT current because
Figure GDA0003354875910000072
At an angle ff, βeff(=μnCoxW/L) is increased, g is made by decreasing PTAT currentmIs constant. And at sf and fs process angles, ronIs substantially constant, constant current IdFlows through ronThe value of Vg also remains constant, so that the resistance of transistor M1 does not change much, so the value of PTAT current also does not change much, and because of βeff(=μnCoxW/L) does not vary much between the sf and fs process angles, and therefore gmCan also be kept constant.
From FIG. 2, the process factor β at each process corner can be seeneff(=μnCoxW/L) temperature characteristics similar, ss Process AngleeffMinimum value, ff process angle betaeffMaximum value, beta at sf and fs process angleseffThe values do not vary much compared to the tt process angle. Therefore, in order to make the transconductance value constant, it is necessary to obtain a current having a positive temperature coefficient with the largest current value at ss process corner and the smallest current value at ff process corner. This can be achieved by changing the resistance of the MOS transistor M1 operating in the linear region in the PTAT circuit, i.e. by changing the output voltage Vg of the process angle adjusting circuit, specifically, the resistance of the MOS transistor M1 operating in the linear region can be expressed as R ═ 1/[ mu ]nCoxW/L(Vgs-Vth)]In which μnIs the mobility of MOS transistor, CoxIs the gate oxide capacitance per unit area, W/L is the width-to-length ratio of MOS transistor, VgsIs the gate-source voltage difference, V, of the MOS transistor M1thIs the threshold voltage. The output voltage Vg of the process angle adjusting circuit is increased under the ss process angle, namely the gate voltage of the MOS transistor M1 is increased, which causes VgsIncreasing the resistance R of M1 to decrease; conversely, Vg decreases at ff process corner, i.e. the gate voltage of MOS transistor M1 decreases, causing VgsDecreasing to increase the resistance R of M1; the Vg has little change under the sf process angle and the fs process angle, so the difference between the resistance value of the Vg and the resistance value of the tt process angle is little; resulting in current values above the tt process corner for the ss process corner, below the tt process corner for the ff process corner, and nearly current values at the sf and fs process corners and at the tt process corner. Fig. 3 shows a curve diagram of the resistance of the MOS transistor M1 in the PTAT circuit under different process conditions in the range of-40 ℃ to-100 ℃.
The obtained bias current is shown in fig. 4 after passing through the PTAT circuit 4 and the process angle adjusting circuit 3, and a graph of the bias current changing with temperature under different process angles can be known from fig. 4, and it can be seen that the bias current has a positive temperature coefficient under each process angle, so that the temperature characteristic can be compensated, in addition, the current value of the ss process angle is slightly larger than the tt process angle, the current value of the ff process angle is slightly smaller than the tt process angle, and the current values of the sf process angle and the fs process angle are almost the same as the tt process angle. With reference to FIG. 2 regarding βeff(=μnCoxW/L) curves and formulas
Figure GDA0003354875910000081
Stable transconductance values can be obtained in the temperature range of-40 ℃ to-100 ℃ under various process corners. The transconductance value simulation result of the final transconductance amplifier is shown in fig. 5, and the maximum transconductance value is 1.92mS and the minimum value is 1.78mS in the temperature range of-40 ℃ to-100 ℃ under five process corners, which is far superior to the transconductance fluctuation range of 20% of the conventional constant transconductance biasing circuit.
It is to be understood that the present invention has been described with reference to certain embodiments, and that various changes in the features and embodiments, or equivalent substitutions may be made therein by those skilled in the art without departing from the spirit and scope of the invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from the essential scope thereof. Therefore, it is intended that the invention not be limited to the particular embodiment disclosed, but that the invention will include all embodiments falling within the scope of the appended claims.

Claims (3)

1. A constant transconductance biasing circuit is characterized by comprising a PTAT circuit (4), a constant current source generating circuit (2), a current mirror circuit (1), a process angle adjusting circuit (3) and a transconductance amplifier circuit (5);
the PTAT circuit (4) comprises a transistor M2, a transistor M3, an N-type MOS transistor M1 working in a linear region, a pnp triode Q1, a pnp triode Q2 and an operational amplifier; the gates of the transistor M2 and the transistor M3 are connected, the source electrode is connected with power voltage, the drain electrode is respectively connected with the positive input end and the negative input end of the operational amplifier, and the output of the operational amplifier is connected with the gates of M2 and M3; bases and collectors of the pnp triode Q1 and the pnp triode Q2 are connected and grounded, and emitters are respectively connected with positive and negative input ends of the operational amplifier; the source electrode of the linear region MOS tube M1 is connected with the emitter electrode of a pnp triode Q2, the drain electrode is connected with the drain electrode of a transistor M3, and the grid electrode is connected with the output voltage Vg of the process angle adjusting circuit (3);
the PTAT circuit (4) is used for providing bias current for the transconductance amplifier circuit (5), and the PTAT circuit (4) generates positive temperature coefficientCan cancel the process factor beta in the transconductance formulaeffNegative temperature characteristic of (1), whereineff=μnCoxW/L,μnIs the mobility of MOS tube and has negative temperature characteristic, CoxThe gate oxide capacitance per unit area, W/L is the width-to-length ratio of the MOS tube;
the constant current source generating circuit (2) is used for providing a stable current for the process angle adjusting circuit (3);
the current mirror circuit (1) is used for copying the current generated by the constant current source generating circuit (2) into the process angle adjusting circuit (3);
the process angle adjusting circuit (3) comprises a first N-type MOS tube M7 and a second N-type MOS tube M8; the grid electrode and the drain electrode of the first N-type MOS tube M7 are connected and are connected with the drain electrode of the M6, the grid electrode and the drain electrode of the second N-type MOS tube M8 are connected and are connected with the source electrode of the M7, and the source electrode of the M8 is grounded;
the process angle adjusting circuit (3) is used for adjusting the grid voltage of an MOS tube M1 working in a linear region in a PTAT circuit (4), the on-resistances of the MOS tubes M7 and M8 in the circuit are related to process angle change, when the process angle changes, the on-resistance changes, so that the output voltage of the process angle adjusting circuit (3) is changed, namely the grid voltage of the MOS tube M1 is changed, the resistance value of the MOS tube is changed, the current change is caused, and the process factor beta in a transconductance formula can be counteracted by the change of the currenteffThe transconductance value is not influenced by temperature and process through two modes of process adjustment and temperature compensation finally due to the change caused by the change of the process angle;
the transconductance amplifier circuit (5) is used for receiving the bias current subjected to process adjustment and temperature compensation and supplying the bias current to the amplifying tube so as to keep the transconductance value of the amplifying tube constant; the transconductance amplifier circuit (5) comprises a first P-type MOS tube M4, a second P-type MOS tube Ma, a third P-type MOS tube Mb and two resistors R1 and R2; the first P-type MOS tube M4 is used for copying the current of the PTAT circuit (4); the second P-type MOS transistor Ma and the third P-type MOS transistor Mb are amplifier transistors and are objects for maintaining a constant transconductance value.
2. The constant transconductance biasing circuit according to claim 1, wherein the current mirror circuit (1) comprises a first PMOS transistor M5 and a second PMOS transistor M6, a gate of the first PMOS transistor M5 is connected to a gate of the second PMOS transistor M6, a source of the first PMOS transistor M5 and a source of the second PMOS transistor M6 are both connected to the power supply, a drain and a gate of the first PMOS transistor M5 are both connected to the output terminal of the constant current source generating circuit (2), and a drain of the second PMOS transistor M6 is connected to a gate and a drain of the first N-type MOS transistor M7 and to a gate of the MOS transistor M1 in the PTAT circuit (4).
3. The constant transconductance biasing circuit of claim 2, characterized in that the input current I of the process corner adjusting circuit (3)dAnd on-resistance r of N-type MOS transistors M7 and M8onHave the following relationship between:
Vg=ron·Id
wherein, IdIs a constant current generated by a replica constant current source generating circuit (2), ronThe on-resistance of the first N-type MOS transistor M7 and the second N-type MOS transistor M8.
CN202110685209.6A 2021-06-21 2021-06-21 Constant transconductance biasing circuit Active CN113359932B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110685209.6A CN113359932B (en) 2021-06-21 2021-06-21 Constant transconductance biasing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110685209.6A CN113359932B (en) 2021-06-21 2021-06-21 Constant transconductance biasing circuit

Publications (2)

Publication Number Publication Date
CN113359932A CN113359932A (en) 2021-09-07
CN113359932B true CN113359932B (en) 2021-12-17

Family

ID=77535353

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110685209.6A Active CN113359932B (en) 2021-06-21 2021-06-21 Constant transconductance biasing circuit

Country Status (1)

Country Link
CN (1) CN113359932B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113779916A (en) * 2021-09-16 2021-12-10 西北工业大学 Charge sensitive preamplifier structure and design method
CN114360464B (en) * 2021-12-27 2023-01-20 北京奕斯伟计算技术股份有限公司 Common voltage generating circuit, device thereof and display device
CN114650019B (en) * 2022-05-20 2022-09-20 成都信息工程大学 Amplifier circuit with arbitrary gain temperature coefficient

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150054586A1 (en) * 2013-08-23 2015-02-26 Samsung Display Co., Ltd. Constant gm bias circuit insensitive to supply variations
CN104699159A (en) * 2015-02-11 2015-06-10 中国科学院微电子研究所 Constant trans-conductance bias circuit for C-type inverter
CN105912068A (en) * 2015-02-20 2016-08-31 硅实验室公司 Bias circuit for generating bias outputs
US20190121383A1 (en) * 2017-10-25 2019-04-25 Psemi Corporation Controllable Temperature Coefficient Bias Circuit

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150054586A1 (en) * 2013-08-23 2015-02-26 Samsung Display Co., Ltd. Constant gm bias circuit insensitive to supply variations
CN104699159A (en) * 2015-02-11 2015-06-10 中国科学院微电子研究所 Constant trans-conductance bias circuit for C-type inverter
CN105912068A (en) * 2015-02-20 2016-08-31 硅实验室公司 Bias circuit for generating bias outputs
US20190121383A1 (en) * 2017-10-25 2019-04-25 Psemi Corporation Controllable Temperature Coefficient Bias Circuit

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
A 9-nW on-chip constant subthreshold CMOS transconductance bias with fine-tuning;Uldric A. Antao et al.;《2017 IEEE International Symposium on Circuits and Systems (ISCAS)》;20170531;全文 *
一种可抑制PVT偏差影响的LNA偏置电路研究;王斌;《机电信息》;20140731(第21期);全文 *

Also Published As

Publication number Publication date
CN113359932A (en) 2021-09-07

Similar Documents

Publication Publication Date Title
CN113359932B (en) Constant transconductance biasing circuit
CN106774592B (en) A kind of high-order temperature compensation bandgap reference circuit of no bipolar transistor
CN108351662B (en) Bandgap reference circuit with curvature compensation
CN104007777B (en) A kind of current source generator
CN111176358B (en) Low-power-consumption low-dropout linear voltage regulator
CN113359929B (en) Band-gap reference circuit and low-offset high-power-supply-rejection-ratio band-gap reference source
CN115437442B (en) High-order compensation band gap voltage reference circuit
CN111158421B (en) Band gap reference voltage source circuit with sectional compensation
CN114690831B (en) Current self-biased series CMOS band-gap reference source
CN113934249A (en) Band-gap reference voltage source suitable for low-current gain type NPN triode
CN110262622B (en) Band-gap reference source with quick start and high PSRR (power supply rejection ratio)
CN210270647U (en) Reference current source circuit and chip based on temperature compensation
CN116404991B (en) Voltage-to-current amplifying circuit, analog-to-digital converter and electronic equipment
CN219016862U (en) Exponential temperature compensation band-gap reference circuit without operational amplifier
KR100609683B1 (en) Temperature compensated Complementary Metal Oxide Semiconductor exponential function generator circuit
CN115993867A (en) Low-power-consumption high-voltage linear voltage stabilizer capable of adjusting output voltage and voltage stabilizing method thereof
CN112256078B (en) Positive temperature coefficient current source and zero temperature coefficient current source
CN113721696B (en) High-precision BANDGAP design method
CN115840486A (en) Curvature compensation band gap reference circuit
CN112558672A (en) Reference current source and chip comprising same
CN113867469B (en) Low-temperature drift pseudo-resistor design
CN103901936A (en) High power supply rejection bandgap reference source based on native transistor
CN116225135B (en) Low-dropout linear voltage regulator
CN110568903B (en) High-precision current source comprising self-biased low-voltage current mirror
CN215867617U (en) High-precision band-gap reference circuit

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant