CN113325215A - Design method of optical fiber current transformer output controller based on multistage comb filtering - Google Patents
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Abstract
The invention discloses a design method of an optical fiber current transformer output controller based on multistage comb filtering. Step 1: simulating and determining the level number and the down-sampling rate of the multistage comb filter according to the structural parameters of a closed loop system of the optical fiber current transformer; step 2: designing an FPGA module according to the multistage comb filter determined in the step 1; and step 3: and (3) determining an output controller according to the FPGA module in the step (2). The invention is used for solving the problems that the requirement on the time order is higher when an FIR filter is adopted, floating points with higher precision requirement exist in the filter, and the sampling rate is difficult to convert while the time extraction operation is ensured.
Description
Technical Field
The invention belongs to the field of all-fiber current sensing; in particular to a design method of an optical fiber current transformer output controller based on multistage comb filtering.
Background
The optical fiber current transformer is an optical fiber sensor based on Faraday optical rotation effect, and has the advantages of small volume, good insulating property, large measuring range, high transient response and the like, so that a power grid line section with a fault can be sensed and positioned in time, effective judgment information is provided for the protection action of a relay protection device, the safety and stability of a ship integrated power system are protected, the intelligent design requirement of the ship integrated power system is met, and the optical fiber current transformer is the optimal choice of the ship integrated power system. In practical application, however, because the digital output frequency of the optical fiber current transformer is the same as the modulation frequency, and the requirement of the output frequency of an excessively high current value on the output interface rate is very high, parallel output is generally adopted, but the problems of short transmission distance and poor anti-interference capability are caused.
Therefore, in order to improve the application range of the system in the ship integrated power system, the design of an output control link is required to be considered to reduce the current output frequency of the optical fiber current transformer, reduce the operation amount and the data storage amount, increase the data transmission distance, simultaneously reduce the requirement on a hardware interface and improve the system reliability. The current mainstream scheme is to use a down-sampling filter to reduce the output sampling frequency. Such a controller performs the down-sampling function by designing a low-pass filter and a decimator, wherein the low-pass filter is used to prevent the aliasing of the signal spectrum, and the existing scheme generally uses a finite-length unit impulse response (FIR) filter as the low-pass filter. However, this solution now has the following problems. The optical fiber current transformer has higher sampling order, if an FIR filter is adopted, the order requirement is higher, floating point numbers with higher precision requirement exist in the filter, and the sampling rate is difficult to convert while the time-consuming extraction operation is ensured.
Disclosure of Invention
The invention provides a design method of an optical fiber current transformer output controller based on multistage comb filtering, which is used for solving the problems that the requirement on the number of orders is higher when an FIR filter is adopted, floating points with higher precision requirement exist in the filter, and the sampling rate is difficult to convert while the time extraction operation is ensured.
The invention is realized by the following technical scheme:
a design method of an optical fiber current transformer output controller based on multistage comb filtering specifically comprises the following steps:
step 1: simulating and determining the level number and the down-sampling rate of the multistage comb filter according to the structural parameters of a closed loop system of the optical fiber current transformer;
step 2: designing an FPGA module according to the multistage comb filter determined in the step 1;
and step 3: and (3) determining an output controller according to the FPGA module in the step (2).
Further, the multi-stage comb filter of step 1 is a cascade of a plurality of single-stage comb filters.
Further, the single-stage comb filter is a single-stage CIC filter, and the discrete transfer function h (z) of the single-stage CIC filter is:
wherein z is a frequency-dependent independent variable, and M is a down-sampling order;
let z be ejωThe amplitude-frequency response is obtained as follows:
wherein,is a sampling function; m is a down-sampling order; omega is; j is; and simulating to obtain the frequency spectrum characteristics of the single-stage CIC filter under different down-sampling orders M.
Furthermore, when the down-sampling rate M of the CIC filter is much greater than 1, the stop-band attenuation cannot be increased by increasing M;
the stopband attenuation is increased by cascading a plurality of single-stage CIC filters, and the expression of the cascaded N single-stage CIC filters is as follows:
furthermore, the multi-stage comb filter is firstly extracted or interpolated, then linear filtering is carried out, and the multi-stage comb filter after linear filtering is extracted and interpolated again.
Further, the single-stage comb filter is a Hogenauer down-sampling filter, and the Hogenauer down-sampling filter is used for expanding the bit width of the register data and the bit width of the output data in the integration module;
if the stage number of the comb filter is N and the down-sampling stage number is M, the bit width estimation formula of the register data in the integration module is as follows:
Bmax=Bin+2N·log2(M) (4)
in the formula, BinInputting data bit width for the comb filter; the data bit width of the intermediate data register of the integrating module can be calculated to be 90 bits according to equation (4).
Further, the estimation formula of the Hogenauer down-sampling filter is as follows:
Bo=Bin+N·log2(M) (4)
in the formula, BoFor comb filteringThe output data bit width.
Furthermore, the FPGA of the comb filter is divided into an integrating module, an extracting module and a comb module; the integration module realizes a multi-stage cascade integrator; the extraction module extracts 1 output every M-1 signals; outputting a sync data valid indication signal rdy; when the extracted data valid signal rdy is high, comb module operation is started.
The invention has the beneficial effects that:
the invention not only reduces the current output frequency of the optical fiber current transformer, but also reduces the operation amount and the data storage amount, simultaneously increases the data transmission distance, reduces the requirement on a hardware interface, and further improves the reliability of the optical fiber current transformer system.
Drawings
Fig. 1 is a block diagram of a single stage comb filter of the present invention.
Fig. 2 is a simulation of the frequency response of a single stage comb filter of the present invention.
Fig. 3 is a structural diagram of a modified 5-stage Hogenauer comb filter of the present invention.
FIG. 4 is a top module design of the multi-stage comb filter FPGA of the present invention.
Fig. 5 is a block diagram of a closed loop system of the fiber optic current transformer of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example 1
A design method of an optical fiber current transformer output controller based on multistage comb filtering specifically comprises the following steps:
step 1: simulating and determining the level number and the down-sampling rate of the multistage comb filter according to the structural parameters of a closed loop system of the optical fiber current transformer; the closed-loop system structure of the fiber-optic current transformer is schematically shown in FIG. 5;
step 2: designing an FPGA module according to the multistage comb filter determined in the step 1;
and step 3: and (3) determining an output controller according to the FPGA module in the step (2).
Further, the multi-stage comb filter of step 1 is a cascade of a plurality of single-stage comb filters.
Further, the single-stage comb filter is a single-stage CIC filter,
the CIC filter discrete domain function is:
h(n)=ε(n)-ε(n-M);
epsilon (n) is a finite-length discrete sequence, and a system function obtained by Z transformation is as follows:
the discrete transfer function h (z) of the single stage CIC filter is:
wherein z is a frequency-dependent independent variable, and M is a down-sampling order;
let z be ejωThe amplitude-frequency response is obtained as follows:
wherein,is a sampling function; m is a down-sampling order; omega is; j is; and simulating to obtain the frequency spectrum characteristics of the single-stage CIC filter under different down-sampling orders M.
Furthermore, when the down-sampling rate M of the CIC filter is much greater than 1, the stop-band attenuation cannot be increased by increasing M;
the stopband attenuation is increased by cascading a plurality of single-stage CIC filters, and the expression of the cascaded N single-stage CIC filters is as follows:
furthermore, the multi-stage comb filter is firstly extracted or interpolated, then linear filtering is carried out, and the multi-stage comb filter after linear filtering is extracted and interpolated again.
Further, the single-stage comb filter is a Hogenauer down-sampling filter, and the Hogenauer down-sampling filter is used for expanding the bit width of the register data and the bit width of the output data in the integration module;
if the stage number of the comb filter is N and the down-sampling stage number is M, the bit width estimation formula of the register data in the integration module is as follows:
Bmax=Bin+2N·log2(M) (4)
in the formula, BinInputting data bit width for the comb filter; the input signal of the comb filter is a current demodulation signal of the optical fiber current transformer system, the data bit width of the signal is 32 bits, the maximum extraction factor of the system is set to be 50, and the data bit width of the intermediate data register of the integration module can be calculated to be 90 bits according to the formula (4).
Further, the estimation formula of the Hogenauer down-sampling filter is as follows:
Bo=Bin+N·log2(M) (4)
in the formula, BoThe data bit width is output for the comb filter.
Furthermore, the FPGA of the comb filter is divided into an integrating module, an extracting module and a comb module; the integration module realizes a multi-stage cascade integrator; the extraction module extracts 1 output every M-1 signals and is convenient to be connected with a subsequent comb module; outputting a sync data valid indication signal rdy; the comb module is mainly composed of 5 cascaded 2-order FIR filters, and starts to perform the operation of the comb module when the extracted data valid signal rdy is at a high level.
Example 2
The number of stages and the down-sampling rate of the multi-stage comb filter are determined according to the simulation of the structural parameters of the closed loop system of the optical fiber current transformer, wherein the structure of the single-stage comb filter is shown in figure 1. From fig. 1, the discrete transfer function of a single-stage CIC filter is:
let z be ejωThe amplitude-frequency response can be obtained as follows:
in the formula,is a sampling function. The spectral characteristics of the single-stage CIC filter at different down-sampling orders M obtained by simulation are shown in fig. 2.
It can be seen from the spectrogram that when the down-sampling rate M of the CIC filter is much greater than 1, the amplitude attenuation of the first side-lobe level is fixed to about 13.46dB, i.e. the stop-band attenuation cannot be increased by increasing M. Obviously, such a small stop band attenuation cannot meet the 50dB required by the system design. Therefore, the stop band attenuation can be increased by cascading a plurality of single-stage CIC filters, and the expression after cascading the N single-stage CIC filters is:
because the problem that the in-band tolerance is increased and the in-band flatness is poor due to too large number of stages can be solved, the amplitude attenuation of the first side lobe level is about 67.3dB when the number of stages N is 5 through multiple times of simulation, the amplitude reduction speed is obviously accelerated compared with single-stage filtering, and the problem of actual noise suppression of a system can be solved under the condition that a new problem is not generated.
After the number of stages of the multi-stage comb filter is designed, the FPGA module needs to be designed according to a circuit of an actual system. A 5-stage comb filter can be seen as a cascade of 5 single-stage comb filters. According to Noble equality theorem, for a multi-stage system, extraction or interpolation is performed first, and then linear filtering is performed, which is equivalent to performing linear filtering first, and extraction and interpolation are performed. Therefore, in practical applications, in order to increase the operation speed and reduce the hardware resource occupation, the multi-stage comb filter structure can be converted into a widely-used Hogenauer comb filter, and the structure is shown in fig. 3. As can be seen from the figure, the Hogenauer down-sampling filter mainly comprises an integration module at the front end, a down-sampling decimation module in the middle and a comb module at the rear end. The input demodulation current signal is firstly subjected to integral operation in an integral module, then is output to an extraction module for M times of extraction processing, and finally the extracted data is filtered by a comb module to obtain a final output result.
Before the Verilog is used for realizing the comb filter, the problem of data bit width in the operation process needs to be considered, and the data bit width in the operation process is large, so that the phenomenon of data overflow in the integral module can be caused, the system is unstable, the operation result is inaccurate, and the data bit width of a register in the integral module and the bit width of output data need to be expanded. If the stage number of the comb filter is N and the down-sampling stage number is M, the bit width estimation formula of the register data in the integration module is as follows:
Bmax=Bin+2N·log2(M) (3)
in the formula, BinThe data bit width is input for the comb filter. The input signal of the comb filter in the subject is a current demodulation signal of an optical fiber current transformer system, the data bit width of the current demodulation signal is 32 bits, the maximum extraction factor of the system is set to be 50, and then the data bit width of a middle data register of an integrating module can be calculated to be 90 bits according to the formula (3).
In the operation process of the extraction module and the comb module, the condition that the overflow caused by register accumulation further influences the operation result can not be generated. The number of bits of the integration block output data can be regarded as the number of bits of the final filter output data. Since the Hogenauer decimation filter can be regarded as an FIR filter, the estimation of the number of output data bits can be performed according to the structure of the FIR filter, and the specific estimation formula is as follows:
Bo=Bin+N·log2(M) (4)
in the formula, BoThe data bit width is output for the comb filter. According to the structural parameter setting of the optical fiber current transformer, the bit number of the output data of the filter is easily estimated to be 64 bits.
According to the filter structure shown in fig. 3 and the analysis of the bit width of the operation data, the FPGA of the comb filter can be divided into an integrating module, an extracting module and a comb module. The integration module realizes a 5-stage cascade integrator; the decimation module performs decimation of 1 output every M-1 signals. Meanwhile, a synchronous data valid indication signal rdy is output for facilitating the connection with the subsequent comb module; the comb module is mainly composed of 5 cascaded 2-order FIR filters, and starts to perform the operation of the comb module when the extracted data valid signal rdy is at a high level. The three modules are connected to obtain a top module of a 5-stage comb filter, and the design diagram of the top module of the 5-stage comb filter is shown in fig. 4.
Claims (8)
1. A design method of an optical fiber current transformer output controller based on multistage comb filtering is characterized by specifically comprising the following steps:
step 1: simulating and determining the level number and the down-sampling rate of the multistage comb filter according to the structural parameters of a closed loop system of the optical fiber current transformer;
step 2: designing an FPGA module according to the multistage comb filter determined in the step 1;
and step 3: and (3) determining an output controller according to the FPGA module in the step (2).
2. The design method of the fiber current transformer output controller based on multi-stage comb filtering as claimed in claim 1, wherein the multi-stage comb filter of step 1 is a cascade of a plurality of single-stage comb filters.
3. The design method of the multi-stage comb-filtering-based fiber optic current transformer output controller according to claim 2, wherein the single-stage comb filter is a single-stage CIC filter, and the discrete transfer function h (z) of the single-stage CIC filter is:
wherein z is a frequency-dependent independent variable, and M is a down-sampling order;
let z be ejωThe amplitude-frequency response is obtained as follows:
4. The design method of the fiber current transformer output controller based on multistage comb filtering as claimed in claim 3, wherein when the down-sampling rate M of the CIC filter is much greater than 1, the stop-band attenuation cannot be increased by increasing M;
the stopband attenuation is increased by cascading a plurality of single-stage CIC filters, and the expression of the cascaded N single-stage CIC filters is as follows:
5. the design method of the fiber current transformer output controller based on multistage comb filtering according to claim 1 or 2, characterized in that the multistage comb filter is firstly extracted or interpolated, then linear filtering is performed, and the linear filtered multistage comb filter is extracted and interpolated again.
6. The design method of the fiber current transformer output controller based on the multistage comb filtering as claimed in claim 2, wherein the single-stage comb filter is a Hogenauer down-sampling filter, and the Hogenauer down-sampling filter is used for expanding the bit width of the register data and the bit width of the output data in the integration module;
if the stage number of the comb filter is N and the down-sampling stage number is M, the bit width estimation formula of the register data in the integration module is as follows:
Bmax=Bin+2N·log2(M) (4)
in the formula, BinInputting data bit width for the comb filter; the data bit width of the intermediate data register of the integrating module can be calculated to be 90 bits according to equation (4).
7. The design method of the fiber current transformer output controller based on multistage comb filtering as claimed in claim 6, wherein the estimation formula of the Hogenauer downsampling filter is as follows:
Bo=Bin+N·log2(M) (4)
in the formula, BoThe data bit width is output for the comb filter.
8. The design method of the fiber current transformer output controller based on multistage comb filtering as claimed in claim 7, wherein the FPGA implementation of the comb filter is divided into an integrating module, an extracting module and a comb module; the integration module realizes a multi-stage cascade integrator; the extraction module extracts 1 output every M-1 signals; outputting a sync data valid indication signal rdy; when the extracted data valid signal rdy is high, comb module operation is started.
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