CN113315355A - High-reliability delay isolation driving circuit for spacecraft - Google Patents

High-reliability delay isolation driving circuit for spacecraft Download PDF

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Publication number
CN113315355A
CN113315355A CN202110750470.XA CN202110750470A CN113315355A CN 113315355 A CN113315355 A CN 113315355A CN 202110750470 A CN202110750470 A CN 202110750470A CN 113315355 A CN113315355 A CN 113315355A
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resistor
triode
circuit
pin
drive
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CN113315355B (en
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李恒
马季军
伍素亮
胡文斌
姜月
张文杰
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Shanghai Institute of Space Power Sources
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Shanghai Institute of Space Power Sources
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
    • H02M3/33523—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with galvanic isolation between input and output of both the power stage and the feedback loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/28—Modifications for introducing a time delay before switching
    • H03K17/284—Modifications for introducing a time delay before switching in field effect transistor switches
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Electronic Switches (AREA)
  • Amplifiers (AREA)

Abstract

A high-reliability time delay isolation driving circuit for a spacecraft relates to the field of driving design of a spacecraft high-voltage soft switching power supply system; the synchronous drive circuit comprises a synchronous drive generating circuit, a drive delay circuit, a drive enhancing circuit, a drive isolating module, a rectifying module and a drive expanding circuit; the synchronous drive generating circuit generates four paths of synchronous pulse drive currents; the driving delay circuit delays the two paths of pulse driving currents and outputs the delayed pulse driving currents; the drive enhancing circuit uses a totem-pole circuit to enhance four paths of pulse drive current; the driving isolation module realizes the isolation of the driving circuit and the spacecraft power supply by utilizing an isolation type transformer; the rectification module adjusts the turn-on voltage and the turn-off current of the driving main MOS tube and the auxiliary MOS tube; the drive extension circuit connects the front two pulse drive currents in parallel and then drives the main MOS tube, and connects the rear two pulse drive currents in parallel and then drives the auxiliary MOS tube. The invention solves the problems of drive delay, duty ratio requirement and serious EMC interference among different MOS tubes of the spacecraft active soft switching power supply system, and effectively improves the working reliability of the spacecraft power supply control equipment.

Description

High-reliability delay isolation driving circuit for spacecraft
Technical Field
The invention relates to the field of spacecraft high-voltage soft switching power supply system driving design, in particular to a high-reliability time-delay isolation driving circuit for a spacecraft.
Background
With the development of the aerospace technology, higher requirements are put forward on the volume and the weight of a spacecraft power supply controller, the switching frequency is improved, the weight of a magnetic element of the power supply controller can be reduced, the future development of the space power supply is towards the soft switching technology, the soft switching technology of the spacecraft power supply controller can reduce the switching loss, and the stress of a switching device is reduced. The soft switching converter of the switching power supply in the aerospace field requires that the MOS tube driving circuit has high reliability, and the analog driving circuit has higher reliability compared with a digital driving circuit.
For the active soft switching converter, a certain time difference is required for the auxiliary MOS tube and the main MOS tube to be switched on, namely, the active soft switching converter of the spacecraft power subsystem needs a delay driving circuit, and conditions are created for the phase difference between the switching-on time of the main MOS tube and the switching-on time of the auxiliary MOS tube. However, no suitable delay driving circuit using an analog circuit is available at present.
Disclosure of Invention
The invention aims to provide a high-reliability time delay isolation driving circuit for a spacecraft, aims to solve the problems of driving time delay between different MOS (metal oxide semiconductor) tubes of an active soft switching power supply system of the spacecraft, the requirement of duty ratio between 0% and 98% and serious EMC (electro magnetic compatibility) interference, and effectively improves the working reliability of power supply control equipment of the spacecraft.
In order to achieve the above object, the present invention provides a highly reliable time delay isolation driving circuit for a spacecraft, which comprises a synchronous driving generation circuit, a driving delay circuit, a driving enhancement circuit, a driving isolation module, a rectification module and a driving expansion circuit, which are connected by a circuit;
the synchronous drive generation circuit generates four paths of pulse drive currents, and the front two paths of pulse drive currents and the rear two paths of pulse drive currents are kept synchronous;
the drive delay circuit delays the two latter paths of pulse drive currents output by the synchronous drive generating circuit and then outputs the delayed pulse drive currents;
the drive enhancing circuit enhances four paths of pulse drive currents output by the synchronous drive generating circuit by using a totem-pole circuit;
the drive isolation module realizes the isolation of the drive circuit and the spacecraft power supply by utilizing an isolation type transformer;
the rectification module adjusts the turn-on voltage and the turn-off current of the driving main MOS tube and the auxiliary MOS tube, and reduces EMC interference of control equipment;
the drive expansion circuit connects the front two pulse drive currents in parallel and then drives the main MOS tube, and connects the rear two pulse drive currents in parallel and then drives the auxiliary MOS tube, so that the duty ratio expansion of the MOS tube is realized.
The synchronous drive generating circuit comprises a first PWM chip N1 and a second PWM chip N2, a synchronous port of the first PWM chip N1 is connected with a synchronous port of the second PWM chip N2, a first path of pulse drive current and a second path of pulse drive current generated by the first PWM chip N1 are transmitted to the drive enhancement circuit, and a third path of pulse drive current and a fourth path of pulse drive current generated by the second PWM chip N2 are transmitted to the drive delay circuit.
The duty ratio of the first path of pulse driving current and the second path of pulse driving current generated by the first PWM chip N1 is less than 49%, and the phase difference between the first path of pulse driving current and the second path of pulse driving current is 90 degrees; the duty ratios of the third pulse driving current and the fourth pulse driving current generated by the second PWM chip N2 are both less than 49%, and the phase difference between the third pulse driving current and the fourth pulse driving current is 90 °.
The drive delay circuit includes: the first Schmitt trigger is connected with the third path of pulse driving current output by the second PWM chip N2, and the second Schmitt trigger is connected with the fourth path of pulse driving current output by the second PWM chip N2;
the first Schmitt trigger comprises a first 555 timer N3 and a first RC circuit, the first RC circuit comprises an eleventh resistor R11 and a first capacitor C1, a third path of pulse driving current output by the second PWM chip N2 is transmitted to pins 2 and 6 of the first 555 timer N3 through the eleventh resistor R11, an eleventh resistor R11 and the common end of the first capacitor C1 are connected with the pins 2 and 6 of the first 555 timer, the other end of the first capacitor C1 is connected with the ground GND, pins 4 and 8 of the first 555 timer N3 are connected with a power supply Vc, a pin 1 of the first 555 timer N3 is connected with the GND, a pin 5 of the first 555 timer N3 is connected with the third capacitor C3, the other end of the third capacitor C3 is connected with the GND, and a pin 3 output by a pin 3 of the first 555 timer N3 is transmitted to a driving enhancement circuit through a thirteenth resistor R13;
the second schmitt trigger comprises a second 555 timer N4 and a second RC circuit, the second RC circuit comprises a twelfth resistor R12 and a second capacitor C2, a fourth pulse driving current output by the second PWM chip N2 is transmitted to pins 2 and 6 of the second 555 timer N4 through the twelfth resistor R12, a common end of the twelfth resistor R12 and the second capacitor C2 is connected with pins 2 and 6 of the second 555 timer N4, the other end of the second capacitor C2 is connected with ground GND, pins 4 and 8 of the second 555 timer N4 are connected with a power supply Vc, pin 1 of the second 555 timer N4 is connected with GND, pin 5 of the second 555 timer N4 is connected with the fourth capacitor C4, the other end of the fourth capacitor C4 is connected with GND, and a PWM wave output by pin 3 of the second 555 timer N4 is transmitted to the driving enhancement circuit through the fourteenth resistor R14.
The drive enhancement circuit includes: the first totem-pole circuit is connected with the first path of pulse driving current output by the first PWM chip N1, the second totem-pole circuit is connected with the second path of pulse driving current output by the first PWM chip N1, the third totem-pole circuit is connected with the PWM wave output by the pin 3 of the first 555 timer N3, and the fourth totem-pole circuit is connected with the PWM wave output by the pin 3 of the second 555 timer N4;
the first totem pole circuit comprises a first triode V1 and a second triode V2, a collector of a first triode V1 is connected with a third resistor R3, the other end of the third resistor R3 is connected with a power supply Vc, an emitter of a first triode V1 and an emitter of a second triode V2 are connected with a driving isolation module, a base of the first triode V1 is connected with a first pulse driving current output by the first PWM chip N1 through a first resistor R1, a base of the second triode V2 is connected with a first pulse driving current output by the first PWM chip N1 through a first resistor R1, and a collector of the second triode V2 is grounded GND;
the second totem pole circuit comprises a third triode V3 and a fourth triode V4, a collector of the third triode V3 is connected with a fourth resistor R4, the other end of the fourth resistor R4 is connected with a power supply Vc, an emitter of the third triode V3 and an emitter of the fourth triode V4 are connected with the driving isolation module, a base of the third triode V3 is connected with the second path of pulse driving current output by the first PWM chip N1 through a second resistor R2, a base of the fourth triode V4 is connected with the second path of pulse driving current output by the first PWM chip N1 through a second resistor R2, and a collector of the fourth triode V4 is grounded GND;
the third totem pole circuit comprises a seventh triode V11 and an eighth triode V12, wherein the collector of a seventh triode V11 is connected with a fifteenth resistor R15, the other end of the fifteenth resistor R15 is connected with a power supply Vc, the emitter of a seventh triode V11 and the emitter of an eighth triode V12 are connected with the driving isolation module, the base of the seventh triode V11 is connected with the PWM wave output by the pin 3 of the first 555 timer N3 through a thirteenth resistor R13, the base of the eighth triode V12 is connected with the PWM wave output by the pin 3 of the first 555 timer N3 through a thirteenth resistor R13, and the collector of the eighth triode V12 is grounded GND;
the fourth totem pole circuit comprises a ninth triode V13 and a thirteenth polar tube V14, wherein the collector of the ninth triode V13 is connected with a sixteenth resistor R16, the other end of the sixteenth resistor R16 is connected with a power supply Vc, the emitter of the ninth triode V13 and the emitter of the thirteenth polar tube V14 are respectively connected with the driving isolation module, the base of the ninth triode V13 passes through a fourteenth resistor R14 and the PWM wave output by the pin 3 of the second 555 timer N4, the base of the thirteenth polar tube V14 passes through a fourteenth resistor R14 and the PWM wave output by the pin 3 of the second 555 timer N4, and the collector of the thirteenth polar tube V14 is grounded GND.
The driving isolation module includes a first isolation transformer T1, a second isolation transformer T2, a third isolation transformer T3 and a fourth isolation transformer T4;
a pin 1 on the primary side of the first isolation transformer T1 is respectively connected with an emitter of a first triode V1, an emitter of a second triode V2 and a pin 1 on the primary side of a second isolation transformer T2 in the first totem-pole circuit, a pin 2 on the primary side of the first isolation transformer T1 is respectively connected with an emitter of a third triode V3, an emitter of a fourth triode V4 and a pin 2 on the primary side of the second isolation transformer T2 in the second totem-pole circuit, and a pin 3 and a pin 4 on the secondary side of the first isolation transformer T1 are connected to the rectifying module;
a pin 1 on the primary side of the second isolation transformer T2 is respectively connected with an emitter of a first triode V1, an emitter of a second triode V2 and a pin 1 on the primary side of the first isolation transformer T1 in the first totem-pole circuit, a pin 2 on the primary side of the second isolation transformer T2 is respectively connected with an emitter of a third triode V3, an emitter of a fourth triode V4 and a pin 2 on the primary side of the first isolation transformer T1 in the second totem-pole circuit, and a pin 3 and a pin 4 on the secondary side of the second isolation transformer T2 are connected to the rectifying module;
a pin 1 on the primary side of the third isolation transformer T3 is respectively connected with an emitter of a seventh triode V11, an emitter of an eighth triode V12 and a pin 1 on the primary side of a fourth isolation transformer T4 in a third totem pole circuit, a pin 2 on the primary side of the third isolation transformer T3 is respectively connected with an emitter of a ninth triode V13, an emitter of a thirteenth triode V14 and a pin 2 on the primary side of a fourth isolation transformer T4 in the fourth totem pole circuit, and a pin 3 and a pin 4 on the secondary side of the third isolation transformer T3 are connected to the rectifying module;
a primary side pin 1 of the fourth isolation transformer T4 is connected to an emitter of a seventh triode V11, an emitter of an eighth triode V12, and a primary side pin 1 of the third isolation transformer T3 in the third totem pole circuit, a primary side pin 2 of the fourth isolation transformer T4 is connected to an emitter of a ninth triode V13, an emitter of a thirteenth triode V14, and a primary side pin 2 of the third isolation transformer T3 in the fourth totem pole circuit, and a secondary side pin 3 and a secondary side pin 4 of the fourth isolation transformer T4 are connected to the rectification module.
The rectification module includes: a first rectifying group connected to the secondary side of the first isolation transformer T1, a second rectifying group connected to the secondary side of the second isolation transformer T2, a third rectifying group connected to the secondary side of the third isolation transformer T3, and a fourth rectifying group connected to the secondary side of the fourth isolation transformer T4;
the first rectifying group comprises a first diode V5, a fifth resistor R5, a sixth resistor R6 and a fifth triode V6, wherein the anode of the first diode V5 is respectively connected with one end of a pin 3 on the secondary side of the first isolation transformer T1 and one end of a sixth resistor R6, the cathode of the first diode V5 is connected with one end of the fifth resistor R5, the other end of the fifth resistor R5 is respectively connected with the emitter of the fifth triode V6 and the drive extension circuit, the base of the fifth triode V6 is connected with the other end of the sixth resistor R6, and the collector of the fifth triode V6 is respectively connected with a pin 4 on the secondary side of the first isolation transformer T1 and the drive extension circuit;
the second rectifying group comprises a second diode V7, a seventh resistor R7, an eighth resistor R8 and a sixth triode V8, wherein the anode of the second diode V7 is respectively connected with the pin 4 at the secondary side of the second isolation transformer T2 and one end of the eighth resistor R8, the cathode of the second diode V7 is connected with one end of the seventh resistor R7, the other end of the seventh resistor R7 is respectively connected with the emitter of the sixth triode V8 and the drive expansion circuit, the base of the sixth triode V8 is connected with the other end of the eighth resistor R8, and the collector of the sixth triode V8 is respectively connected with the pin 3 at the secondary side of the second isolation transformer T2 and the drive expansion circuit;
the third rectifying group comprises a third diode V15, a seventeenth resistor R17, an eighteenth resistor R18 and an eleventh triode V16, wherein the anode of the third diode V15 is respectively connected with one end of a pin 3 at the secondary side of the third isolation transformer T3 and one end of an eighteenth resistor R18, the cathode of the third diode V15 is connected with one end of the seventeenth resistor R17, the other end of the seventeenth resistor R17 is respectively connected with the emitter of the eleventh triode V16 and the drive expansion circuit, the base of the eleventh triode V16 is connected with the other end of the eighteenth resistor R18, and the collector of the eleventh triode V16 is respectively connected with a pin 4 at the secondary side of the third isolation transformer T3 and the drive expansion circuit;
the fourth rectifying group comprises a fourth diode V17, a nineteenth resistor R19, a twentieth resistor R20 and a twelfth triode V18, wherein the anode of the fourth diode V17 is connected with one end of a pin 4 on the secondary side of the fourth isolation transformer T4 and one end of a twentieth resistor R20 respectively, the cathode of the fourth diode V17 is connected with one end of the nineteenth resistor R19, the other end of the nineteenth resistor R19 is connected with the emitter of the twelfth triode V18 and the driving expansion circuit respectively, the base of the twelfth triode V18 is connected with the other end of the twentieth resistor R20, and the collector of the twelfth triode V18 is connected with a pin 3 on the secondary side of the fourth isolation transformer T4 and the driving expansion circuit respectively.
The switching speed of the main MOS transistor V21 is adjusted by adjusting the resistance values of the fifth resistor R5 and the seventh resistor R7; the turn-off speed of the main MOS transistor V21 is adjusted by adjusting the resistance values of the sixth resistor R6 and the eighth resistor R8; the switching speed of the auxiliary MOS transistor V22 is adjusted by adjusting the resistance values of a seventeenth resistor R17 and a nineteenth resistor R19; the turn-off speed of the auxiliary MOS transistor V22 is adjusted by adjusting the resistance values of the eighteenth resistor R18 and the twentieth resistor R20.
The drive expansion circuit includes: the first extension circuit is electrically connected with the first rectifying group, the second rectifying group and the main MOS tube V21, and the second extension circuit is electrically connected with the third rectifying group, the fourth rectifying group and the auxiliary MOS tube V22;
the first extension circuit connects the first path of pulse driving current and the second path of pulse driving current with the grid and the source of a main MOS transistor V21, the first extension circuit comprises a fifth diode V9, a ninth resistor R9, a sixth diode V10 and a tenth resistor R10, one end of a ninth resistor R9 is connected with the other end of a fifth resistor R5, the emitter of a fifth triode V6 and the anode of a fifth diode V9, the other end of a ninth resistor R9 is connected with the collector of a fifth triode V6, the other end of a tenth resistor R10, the collector of a sixth triode V8 and the source of a main MOS transistor V21, the cathode of the fifth diode V9 is connected with the grid of the main MOS transistor V21 and the cathode of a sixth diode V10, one end of the tenth resistor R10 is connected with the other end of a seventh resistor R7, the emitter of a sixth triode V8 and the anode of a sixth diode V10;
the second extension circuit connects the third pulse driving current and the fourth pulse driving current with the grid and the source of the auxiliary MOS transistor V22, the second expansion circuit comprises a seventh diode V19, a twenty-first resistor R21, an eighth diode V20 and a twenty-second resistor R22, wherein one end of the twenty-first resistor R21 is connected with the other end of the seventeenth resistor R17, the emitter of the eleventh triode V16 and the anode of the seventh diode V19, the other end of the twenty-first resistor R21 is connected with the collector of the eleventh triode V16, the other end of the twenty-second resistor R22, the collector of the twelfth triode V18 and the source of the auxiliary MOS transistor V22, the cathode of the seventh diode V19 is connected with the gate of the auxiliary MOS transistor V22 and the cathode of the eighth diode V20, and one end of the twenty-second resistor R22 is connected with the other end of the seventeenth resistor R17, the emitter of the twelfth triode V18 and the anode of the eighth diode V20.
The invention can meet the requirement of the active soft switching circuit that the main MOS tube and the auxiliary MOS tube are connected with the driving circuit which keeps a certain phase difference, realizes the delayed connection between different MOS tubes, and can reduce the electrical stress of the MOS tubes after the MOS tubes realize the soft switching, thereby improving the efficiency of the converter, reducing the EMI of the circuit and improving the reliability of the power converter.
Drawings
Fig. 1 is a circuit diagram of a high-reliability delay isolation driving circuit for a spacecraft, provided by the invention.
Fig. 2 is a driving waveform diagram of a high-reliability delay isolation driving circuit for a spacecraft, provided by the invention.
Detailed Description
The preferred embodiment of the present invention will be described in detail below with reference to fig. 1 and 2.
As shown in fig. 1, the invention provides a high-reliability delay isolation driving circuit for a spacecraft, which comprises a synchronous driving generation circuit 1, a driving delay circuit 2, a driving enhancement circuit 3, a driving isolation module 4, a rectification module 5 and a driving expansion circuit 6 which are connected by circuits. The synchronous drive generation circuit 1 generates four paths of pulse drive currents, and the front two paths of pulse drive currents and the rear two paths of pulse drive currents are kept synchronous; the drive delay circuit 2 delays the two latter paths of pulse drive currents output by the synchronous drive generation circuit 1 for a specific time and outputs the delayed pulse drive currents; the drive enhancing circuit 3 uses a totem-pole circuit to enhance the four paths of pulse drive current output by the synchronous drive generating circuit 1 and provides the drive current required by the turn-on of the MOS tube; the driving isolation module 4 utilizes an isolation type transformer to carry out driving isolation, so that the isolation of a driving circuit and a spacecraft power supply is realized; the rectifier module 5 provides a path for driving the MOS tube to switch on voltage and switch off current, and reduces EMC interference of control equipment by adjusting the switching-on and switching-off speeds of the MOS tube; the drive expansion circuit 6 realizes the duty ratio expansion of the MOS tube, realizes the soft switching of the MOS tube, reduces the electrical stress of the MOS tube and improves the reliability of equipment.
Specifically, the synchronous drive generation circuit 1 includes a first PWM chip N1 and a second PWM chip N2, a synchronous port OSC of the first PWM chip N1 is connected to a synchronous port SYNC of the second PWM chip N2, and a first path of pulse drive current generated by the first PWM chip N1 is transmitted to the drive enhancement circuit 3 through a first resistor R1 in the drive enhancement circuit 3; the second path of pulse driving current generated by the first PWM chip N1 is transmitted to the drive enhancement circuit 3 through the second resistor R2 in the drive enhancement circuit 3; the third path of pulse driving current generated by the second PWM chip N2 is transmitted to the driving delay circuit 2 through an eleventh resistor R11 in the driving delay circuit 2; the fourth pulse driving current generated by the second PWM chip N2 is transmitted to the driving delay circuit 2 through the twelfth resistor R12 in the driving delay circuit 2.
The drive delay circuit 2 includes: the first Schmitt trigger is connected with the third path of pulse driving current output by the second PWM chip N2, and the second Schmitt trigger is connected with the fourth path of pulse driving current output by the second PWM chip N2; the first Schmitt trigger comprises a first 555 timer N3 and a first RC circuit, the first RC circuit comprises an eleventh resistor R11 and a first capacitor C1, a third path of pulse driving current output by the second PWM chip N2 is transmitted to a pin 2 and a pin 6 of the first 555 timer N3 through the eleventh resistor R11, an eleventh resistor R11 and a common end of the first capacitor C1 are connected with the pin 2 and the pin 6 of the first 555 timer, the other end of the first capacitor C1 is connected with the ground GND, a pin 4 and a pin 8 of the first 555 timer N3 are connected with a power supply Vc, a pin 1 of the first 555 timer N3 is connected with the GND, a pin 5 of the first 555 timer N3 is connected with the third capacitor C3, the other end of the third capacitor C3 is connected with the GND, and a pin 3 of the first 555 timer N3 outputs PWM waves which are transmitted to a driving circuit enhancement circuit through a thirteenth resistor R13; the second schmitt trigger comprises a second 555 timer N4 and a second RC circuit, the second RC circuit comprises a twelfth resistor R12 and a second capacitor C2, a fourth pulse driving current output by the second PWM chip N2 is transmitted to pins 2 and 6 of the second 555 timer N4 through the twelfth resistor R12, a common end of the twelfth resistor R12 and the second capacitor C2 is connected with pins 2 and 6 of the second 555 timer N4, the other end of the second capacitor C2 is connected with ground GND, pins 4 and 8 of the second 555 timer N4 are connected with a power supply Vc, pin 1 of the second 555 timer N4 is connected with GND, pin 5 of the second 555 timer N4 is connected with the fourth capacitor C4, the other end of the fourth capacitor C4 is connected with GND, and a PWM wave output by pin 3 of the second 555 timer N4 is transmitted to the driving enhancement circuit through the fourteenth resistor R14.
The drive enhancing circuit 3 includes: the first totem-pole circuit is connected with the first path of pulse driving current output by the first PWM chip N1, the second totem-pole circuit is connected with the second path of pulse driving current output by the first PWM chip N1, the third totem-pole circuit is connected with the PWM wave output by the pin 3 of the first 555 timer N3, and the fourth totem-pole circuit is connected with the PWM wave output by the pin 3 of the second 555 timer N4; the first totem pole circuit comprises a first triode V1 and a second triode V2, a collector of a first triode V1 is connected with a third resistor R3, the other end of the third resistor R3 is connected with a power supply Vc, an emitter of a first triode V1 and an emitter of a second triode V2 are connected with the driving isolation module 4, a base of the first triode V1 is connected with a first pulse driving current output by the first PWM chip N1 through a first resistor R1, a base of the second triode V2 is connected with a first pulse driving current output by the first PWM chip N1 through a first resistor R1, and a collector of the second triode V2 is grounded GND; the second totem pole circuit comprises a third triode V3 and a fourth triode V4, a collector of a third triode V3 is connected with a fourth resistor R4, the other end of the fourth resistor R4 is connected with a power supply Vc, an emitter of a third triode V3 and an emitter of a fourth triode V4 are connected with the driving isolation module 4, a base of the third triode V3 is connected with the second path of pulse driving current output by the first PWM chip N1 through a second resistor R2, a base of the fourth triode V4 is connected with the second path of pulse driving current output by the first PWM chip N1 through a second resistor R2, and a collector of the fourth triode V4 is grounded GND; the third totem pole circuit comprises a seventh triode V11 and an eighth triode V12, wherein the collector of a seventh triode V11 is connected with a fifteenth resistor R15, the other end of the fifteenth resistor R15 is connected with a power supply Vc, the emitter of a seventh triode V11 and the emitter of an eighth triode V12 are connected with the driving isolation module 4, the base of the seventh triode V11 is connected with the PWM wave output by the pin 3 of the first 555 timer N3 through a thirteenth resistor R13, the base of the eighth triode V12 is connected with the PWM wave output by the pin 3 of the first 555 timer N3 through a thirteenth resistor R13, and the collector of the eighth triode V12 is grounded GND; the fourth totem pole circuit comprises a ninth triode V13 and a thirteenth polar tube V14, wherein the collector of the ninth triode V13 is connected with a sixteenth resistor R16, the other end of the sixteenth resistor R16 is connected with a power supply Vc, the emitter of the ninth triode V13 and the emitter of the thirteenth polar tube V14 are respectively connected with the driving isolation module 4, the base of the ninth triode V13 passes through a fourteenth resistor R14 and PWM waves output by the pin 3 of the second 555 timer N4, the base of the thirteenth polar tube V14 passes through a fourteenth resistor R14 and PWM waves output by the pin 3 of the second 555 timer N4, and the collector of the thirteenth polar tube V14 is grounded GND.
The driving isolation module 4 includes a first isolation transformer T1, a second isolation transformer T2, a third isolation transformer T3 and a fourth isolation transformer T4; a pin 1 on the primary side of a first isolation transformer T1 is respectively connected with an emitter of a first triode V1, an emitter of a second triode V2 and a pin 1 on the primary side of a second isolation transformer T2 in a first totem-pole circuit, a pin 2 on the primary side of the first isolation transformer T1 is respectively connected with an emitter of a third triode V3, an emitter of a fourth triode V4 and a pin 2 on the primary side of the second isolation transformer T2 in a second totem-pole circuit, and a pin 3 and a pin 4 on the secondary side of the first isolation transformer T1 are connected to a rectifying module 5; a pin 1 on the primary side of a second isolation transformer T2 is respectively connected with an emitter of a first triode V1, an emitter of a second triode V2 and a pin 1 on the primary side of a first isolation transformer T1 in a first totem-pole circuit, a pin 2 on the primary side of the second isolation transformer T2 is respectively connected with an emitter of a third triode V3, an emitter of a fourth triode V4 and a pin 2 on the primary side of the first isolation transformer T1 in a second totem-pole circuit, and a pin 3 and a pin 4 on the secondary side of the second isolation transformer T2 are connected to a rectifying module 5; a pin 1 on the primary side of a third isolation transformer T3 is respectively connected with an emitter of a seventh triode V11, an emitter of an eighth triode V12 and a pin 1 on the primary side of a fourth isolation transformer T4 in a third totem pole circuit, a pin 2 on the primary side of the third isolation transformer T3 is respectively connected with an emitter of a ninth triode V13, an emitter of a thirteenth triode V14 and a pin 2 on the primary side of the fourth isolation transformer T4 in the fourth totem pole circuit, and a pin 3 and a pin 4 on the secondary side of the third isolation transformer T3 are connected to a rectifying module 5; a primary side pin 1 of a fourth isolation transformer T4 is connected to an emitter of a seventh triode V11, an emitter of an eighth triode V12, and a primary side pin 1 of a third isolation transformer T3 in the third totem pole circuit, a primary side pin 2 of the fourth isolation transformer T4 is connected to an emitter of a ninth triode V13, an emitter of a thirteenth triode V14, and a primary side pin 2 of the third isolation transformer T3 in the fourth totem pole circuit, and a secondary side pin 3 and a secondary side pin 4 of the fourth isolation transformer T4 are connected to the rectification module 5.
The rectifying module 5 includes: a first rectifying group connected to the secondary side of the first isolation transformer T1, a second rectifying group connected to the secondary side of the second isolation transformer T2, a third rectifying group connected to the secondary side of the third isolation transformer T3, and a fourth rectifying group connected to the secondary side of the fourth isolation transformer T4; the first rectifying group comprises a first diode V5, a fifth resistor R5, a sixth resistor R6 and a fifth triode V6, wherein the anode of the first diode V5 is respectively connected with the pin 3 at the secondary side of the first isolation transformer T1 and one end of the sixth resistor R6, the cathode of the first diode V5 is connected with one end of the fifth resistor R5, the other end of the fifth resistor R5 is respectively connected with the emitter of the fifth triode V6 and the drive expansion circuit 6, the base of the fifth triode V6 is connected with the other end of the sixth resistor R6, and the collector of the fifth triode V6 is respectively connected with the pin 4 at the secondary side of the first isolation transformer T1 and the drive expansion circuit 6; the second rectifying group comprises a second diode V7, a seventh resistor R7, an eighth resistor R8 and a sixth triode V8, wherein the anode of the second diode V7 is respectively connected with the pin 4 at the secondary side of the second isolation transformer T2 and one end of the eighth resistor R8, the cathode of the second diode V7 is connected with one end of the seventh resistor R7, the other end of the seventh resistor R7 is respectively connected with the emitter of the sixth triode V8 and the drive expansion circuit 6, the base of the sixth triode V8 is connected with the other end of the eighth resistor R8, and the collector of the sixth triode V8 is respectively connected with the pin 3 at the secondary side of the second isolation transformer T2 and the drive expansion circuit 6; the third rectifying group comprises a third diode V15, a seventeenth resistor R17, an eighteenth resistor R18 and an eleventh triode V16, wherein the anode of the third diode V15 is respectively connected with one end of a pin 3 at the secondary side of the third isolation transformer T3 and one end of an eighteenth resistor R18, the cathode of the third diode V15 is connected with one end of the seventeenth resistor R17, the other end of the seventeenth resistor R17 is respectively connected with the emitter of the eleventh triode V16 and the drive expansion circuit 6, the base of the eleventh triode V16 is connected with the other end of the eighteenth resistor R18, and the collector of the eleventh triode V16 is respectively connected with a pin 4 at the secondary side of the third isolation transformer T3 and the drive expansion circuit 6; the fourth rectifying group comprises a fourth diode V17, a nineteenth resistor R19, a twentieth resistor R20 and a twelfth triode V18, wherein the anode of the fourth diode V17 is connected with one end of a pin 4 and one end of a twentieth resistor R20 on the secondary side of the fourth isolation transformer T4 respectively, the cathode of the fourth diode V17 is connected with one end of the nineteenth resistor R19, the other end of the nineteenth resistor R19 is connected with the emitter of the twelfth triode V18 and the drive expansion circuit 6 respectively, the base of the twelfth triode V18 is connected with the other end of the twentieth resistor R20, and the collector of the twelfth triode V18 is connected with a pin 3 and the drive expansion circuit 6 on the secondary side of the fourth isolation transformer T4 respectively.
The drive expansion circuit 6 includes: the first extension circuit is electrically connected with the first rectifying group, the second rectifying group and the main MOS tube V21, and the second extension circuit is electrically connected with the third rectifying group, the fourth rectifying group and the auxiliary MOS tube V22; the first extension circuit comprises a fifth diode V9, a ninth resistor R9, a sixth diode V10 and a tenth resistor R10, wherein one end of the ninth resistor R9 is connected with the other end of the fifth resistor R5, the emitter of a fifth triode V6 and the anode of the fifth diode V9, the other end of the ninth resistor R9 is connected with the collector of a fifth triode V6, the other end of the tenth resistor R10, the collector of a sixth triode V8 and the source of a main MOS tube V21, the cathode of the fifth diode V9 is connected with the gate of the main MOS tube V21 and the cathode of the sixth diode V10, and one end of the tenth resistor R10 is connected with the other end of the seventh resistor R7, the emitter of the sixth triode V8 and the anode of a sixth diode V10; the second expansion circuit comprises a seventh diode V19, a twenty-first resistor R21, an eighth diode V20 and a twenty-second resistor R22, wherein one end of the twenty-first resistor R21 is connected with the other end of the seventeenth resistor R17, the emitter of the eleventh triode V16 and the anode of the seventh diode V19, the other end of the twenty-first resistor R21 is connected with the collector of the eleventh triode V16, the other end of the twenty-second resistor R22, the collector of the twelfth triode V18 and the source of the auxiliary MOS tube V22, the cathode of the seventh diode V19 is connected with the gate of the auxiliary MOS tube V22 and the cathode of the eighth diode V20, and one end of the twenty-second resistor R22 is connected with the other end of the seventeenth resistor R17, the emitter of the twelfth triode V18 and the anode of the eighth diode V20.
The working principle of the invention is as follows: as shown in fig. 2, the duty ratios of the first path of pulse driving current and the second path of pulse driving current generated by the first PWM chip N1 are both less than 49%, and the phase difference between the first path of pulse driving current and the second path of pulse driving current is 90 °; the duty ratios of the third pulse driving current and the fourth pulse driving current generated by the second PWM chip N2 are both less than 49%, and the phase difference between the third pulse driving current and the fourth pulse driving current is 90 degrees; the synchronous ports of the first PWM chip N1 and the second PWM chip N2 are connected, so that the two chips output driving pulses with the same phase.
The third path of pulse driving current and the fourth path of pulse driving current generated by the second PWM chip N2 are subjected to phase delay through the driving delay circuit 2, the driving delay circuit 2 mainly comprises an RC circuit and a schmitt trigger built by an NE555 timer, and the voltage at two ends of a capacitor C in the RC circuit is as follows:
Figure BDA0003146023140000121
in the formula, vC(t) is the voltage across the capacitor C in the RC circuit, VCThe voltage waveform of the capacitor C in the RC circuit is shown in figure 2; the input and output characteristics of the Schmitt trigger built by the NE555 timer are as follows: the input voltage is greater than 2/3VCWhen the voltage is low, the input voltage is less than 1/3VCWhen the pulse is output, a high level is output, the NE555 output pulse is as shown in fig. 2, and the delay time length is:
Δt＝RCln3(2)
in the formula, Δ t is the set delay time, R is the resistor in the RC circuit, and C is the capacitor in the RC circuit, and the delay time can be set by setting the magnitudes of R and C as required. The driving current output by the driving chip is enhanced through the four-way totem-pole circuit, so that the actual driving current required by the on-off of the MOS tube is provided.
In the driving isolation module, a primary side pin 1 of a first isolation transformer T1 and a primary side pin 1 of a second isolation transformer T2 are connected with each other, a primary side pin 2 of a first isolation transformer T1 and a primary side pin 2 of a second isolation transformer T2 are connected with each other, a primary side pin 1 of a third isolation transformer T3 and a primary side pin 1 of a fourth isolation transformer T4 are connected with each other, and a primary side pin 2 of a third isolation transformer T3 and a primary side pin 2 of a fourth isolation transformer T4 are connected with each other, and the operating waveforms of the driving isolation module are shown as waveforms of "primary side 1-2 pins of isolation transformers T1 and T2" and primary side 1-2 pins of isolation transformers T3 and T4 "in fig. 2. The secondary sides of the first isolation transformer T1, the second isolation transformer T2, the third isolation transformer T3 and the fourth isolation transformer T4 respectively go to four paths of the rectifying modules, the homonymous ends of the secondary sides of the isolation transformers are opposite, and driving with the phase difference of 90 degrees is formed through the rectifying modules, so that reliable isolation of a driving circuit and a power circuit is achieved.
The rectifying module is used for driving the main MOS transistor V21 and the auxiliary MOS transistor V22, and adjusting the switching speed of the main MOS transistor V21 by adjusting the resistance values of the fifth resistor R5 and the seventh resistor R7; the turn-off speed of the main MOS transistor V21 is adjusted by adjusting the resistance values of the sixth resistor R6 and the eighth resistor R8; the switching speed of the auxiliary MOS transistor V22 is adjusted by adjusting the resistance values of a seventeenth resistor R17 and a nineteenth resistor R19; the switching-on and switching-off speed of the auxiliary MOS transistor V22 is adjusted by adjusting the resistance values of the eighteenth resistor R18 and the twentieth resistor R20, and the switching-on and switching-off speed can be adjusted according to the EMC characteristics of the environment and the MOS transistor parameters.
In the drive expansion circuit, the positive end of each path of drive pulse current output by the rectifying module is connected with a diode, and the first path of pulse drive current and the second path of pulse drive current are connected with the grid and the source of the main MOS transistor V21; the third path of pulse driving current and the fourth path of pulse driving current are connected with the grid electrode and the source electrode of the auxiliary MOS tube V22, and the drive duty cycle extension is realized. The operating waveforms are shown as "V21 gate source" and "V22 gate source" waveforms in fig. 2.
Compared with the prior art, the invention has the following advantages:
1. the synchronous drive generation circuit synchronizes the phases of the drive pulses generated by the two PWM chips, and delays the drive pulse generated by one PWM chip through the delay circuit, thereby realizing stable and reliable delay drive.
2. According to the invention, the switching-on and switching-off speeds of the MOS tube are adjusted through the rectifier module, so that the EMC interference of the control equipment is reduced.
3. The drive expansion circuit of the invention realizes the duty ratio expansion of the MOS tube by utilizing parallel drive.
It should be noted that, in the embodiments of the present invention, the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate the orientation or positional relationship shown in the drawings, and are only for convenience of describing the embodiments, but do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
While the present invention has been described in detail with reference to the preferred embodiments, it should be understood that the above description should not be taken as limiting the invention. Various modifications and alterations to this invention will become apparent to those skilled in the art upon reading the foregoing description. Accordingly, the scope of the invention should be determined from the following claims.

Claims (9)

1. A high-reliability time delay isolation driving circuit for a spacecraft is characterized by comprising a synchronous driving generation circuit, a driving time delay circuit, a driving enhancement circuit, a driving isolation module, a rectification module and a driving expansion circuit which are connected by circuits;
the synchronous drive generation circuit generates four paths of pulse drive currents, and the front two paths of pulse drive currents and the rear two paths of pulse drive currents are kept synchronous;
the drive delay circuit delays the two latter paths of pulse drive currents output by the synchronous drive generating circuit and then outputs the delayed pulse drive currents;
the drive enhancing circuit enhances four paths of pulse drive currents output by the synchronous drive generating circuit by using a totem-pole circuit;
the drive isolation module realizes the isolation of the drive circuit and the spacecraft power supply by utilizing an isolation type transformer;
the rectification module adjusts the turn-on voltage and the turn-off current of the driving main MOS tube and the auxiliary MOS tube, and reduces EMC interference of control equipment;
the drive expansion circuit connects the front two pulse drive currents in parallel and then drives the main MOS tube, and connects the rear two pulse drive currents in parallel and then drives the auxiliary MOS tube, so that the duty ratio expansion of the MOS tube is realized.
The synchronous drive generating circuit, the drive delay circuit, the drive enhancing circuit, the drive isolating module, the rectifying module and the drive expanding circuit are sequentially communicated.
2. The high-reliability time-delay isolation driving circuit for the spacecraft of claim 1, wherein the synchronous driving generating circuit comprises a first PWM chip N1 and a second PWM chip N2, a synchronous port of the first PWM chip N1 is connected to a synchronous port of the second PWM chip N2, the first pulse driving current and the second pulse driving current generated by the first PWM chip N1 are transmitted to the driving enhancement circuit, and the third pulse driving current and the fourth pulse driving current generated by the second PWM chip N2 are transmitted to the driving delay circuit.
3. The high-reliability time-delay isolation driving circuit for the spacecraft of claim 2, wherein duty ratios of the first path of pulse driving current and the second path of pulse driving current generated by the first PWM chip N1 are both less than 49%, and a phase difference between the first path of pulse driving current and the second path of pulse driving current is 90 °; the duty ratios of the third pulse driving current and the fourth pulse driving current generated by the second PWM chip N2 are both less than 49%, and the phase difference between the third pulse driving current and the fourth pulse driving current is 90 °.
4. The highly reliable delay-isolated driver circuit for a spacecraft of claim 3, wherein said driver delay circuit comprises: the first Schmitt trigger is connected with the third path of pulse driving current output by the second PWM chip N2, and the second Schmitt trigger is connected with the fourth path of pulse driving current output by the second PWM chip N2;
the first Schmitt trigger comprises a first 555 timer N3 and a first RC circuit, the first RC circuit comprises an eleventh resistor R11 and a first capacitor C1, a third path of pulse driving current output by the second PWM chip N2 is transmitted to pins 2 and 6 of the first 555 timer N3 through the eleventh resistor R11, an eleventh resistor R11 and the common end of the first capacitor C1 are connected with the pins 2 and 6 of the first 555 timer, the other end of the first capacitor C1 is connected with the ground GND, pins 4 and 8 of the first 555 timer N3 are connected with a power supply Vc, a pin 1 of the first 555 timer N3 is connected with the GND, a pin 5 of the first 555 timer N3 is connected with the third capacitor C3, the other end of the third capacitor C3 is connected with the GND, and a pin 3 output by a pin 3 of the first 555 timer N3 is transmitted to a driving enhancement circuit through a thirteenth resistor R13;
the second schmitt trigger comprises a second 555 timer N4 and a second RC circuit, the second RC circuit comprises a twelfth resistor R12 and a second capacitor C2, a fourth pulse driving current output by the second PWM chip N2 is transmitted to pins 2 and 6 of the second 555 timer N4 through the twelfth resistor R12, a common end of the twelfth resistor R12 and the second capacitor C2 is connected with pins 2 and 6 of the second 555 timer N4, the other end of the second capacitor C2 is connected with ground GND, pins 4 and 8 of the second 555 timer N4 are connected with a power supply Vc, pin 1 of the second 555 timer N4 is connected with GND, pin 5 of the second 555 timer N4 is connected with the fourth capacitor C4, the other end of the fourth capacitor C4 is connected with GND, and a PWM wave output by pin 3 of the second 555 timer N4 is transmitted to the driving enhancement circuit through the fourteenth resistor R14.
5. The highly reliable time delay isolated driver circuit for a spacecraft of claim 4, wherein said drive enhancement circuit comprises: the first totem-pole circuit is connected with the first path of pulse driving current output by the first PWM chip N1, the second totem-pole circuit is connected with the second path of pulse driving current output by the first PWM chip N1, the third totem-pole circuit is connected with the PWM wave output by the pin 3 of the first 555 timer N3, and the fourth totem-pole circuit is connected with the PWM wave output by the pin 3 of the second 555 timer N4;
the first totem pole circuit comprises a first triode V1 and a second triode V2, a collector of a first triode V1 is connected with a third resistor R3, the other end of the third resistor R3 is connected with a power supply Vc, an emitter of a first triode V1 and an emitter of a second triode V2 are connected with a driving isolation module, a base of the first triode V1 is connected with a first pulse driving current output by the first PWM chip N1 through a first resistor R1, a base of the second triode V2 is connected with a first pulse driving current output by the first PWM chip N1 through a first resistor R1, and a collector of the second triode V2 is grounded GND;
the second totem pole circuit comprises a third triode V3 and a fourth triode V4, a collector of the third triode V3 is connected with a fourth resistor R4, the other end of the fourth resistor R4 is connected with a power supply Vc, an emitter of the third triode V3 and an emitter of the fourth triode V4 are connected with the driving isolation module, a base of the third triode V3 is connected with the second path of pulse driving current output by the first PWM chip N1 through a second resistor R2, a base of the fourth triode V4 is connected with the second path of pulse driving current output by the first PWM chip N1 through a second resistor R2, and a collector of the fourth triode V4 is grounded GND;
the third totem pole circuit comprises a seventh triode V11 and an eighth triode V12, wherein the collector of a seventh triode V11 is connected with a fifteenth resistor R15, the other end of the fifteenth resistor R15 is connected with a power supply Vc, the emitter of a seventh triode V11 and the emitter of an eighth triode V12 are connected with the driving isolation module, the base of the seventh triode V11 is connected with the PWM wave output by the pin 3 of the first 555 timer N3 through a thirteenth resistor R13, the base of the eighth triode V12 is connected with the PWM wave output by the pin 3 of the first 555 timer N3 through a thirteenth resistor R13, and the collector of the eighth triode V12 is grounded GND;
the fourth totem pole circuit comprises a ninth triode V13 and a thirteenth polar tube V14, wherein the collector of the ninth triode V13 is connected with a sixteenth resistor R16, the other end of the sixteenth resistor R16 is connected with a power supply Vc, the emitter of the ninth triode V13 and the emitter of the thirteenth polar tube V14 are respectively connected with the driving isolation module, the base of the ninth triode V13 passes through a fourteenth resistor R14 and the PWM wave output by the pin 3 of the second 555 timer N4, the base of the thirteenth polar tube V14 passes through a fourteenth resistor R14 and the PWM wave output by the pin 3 of the second 555 timer N4, and the collector of the thirteenth polar tube V14 is grounded GND.
6. The high-reliability time-delay isolation driving circuit for the spacecraft of claim 5, wherein the driving isolation module comprises a first isolation transformer T1, a second isolation transformer T2, a third isolation transformer T3 and a fourth isolation transformer T4;
a pin 1 on the primary side of the first isolation transformer T1 is respectively connected with an emitter of a first triode V1, an emitter of a second triode V2 and a pin 1 on the primary side of a second isolation transformer T2 in the first totem-pole circuit, a pin 2 on the primary side of the first isolation transformer T1 is respectively connected with an emitter of a third triode V3, an emitter of a fourth triode V4 and a pin 2 on the primary side of the second isolation transformer T2 in the second totem-pole circuit, and a pin 3 and a pin 4 on the secondary side of the first isolation transformer T1 are connected to the rectifying module;
a pin 1 on the primary side of the second isolation transformer T2 is respectively connected with an emitter of a first triode V1, an emitter of a second triode V2 and a pin 1 on the primary side of the first isolation transformer T1 in the first totem-pole circuit, a pin 2 on the primary side of the second isolation transformer T2 is respectively connected with an emitter of a third triode V3, an emitter of a fourth triode V4 and a pin 2 on the primary side of the first isolation transformer T1 in the second totem-pole circuit, and a pin 3 and a pin 4 on the secondary side of the second isolation transformer T2 are connected to the rectifying module;
a pin 1 on the primary side of the third isolation transformer T3 is respectively connected with an emitter of a seventh triode V11, an emitter of an eighth triode V12 and a pin 1 on the primary side of a fourth isolation transformer T4 in a third totem pole circuit, a pin 2 on the primary side of the third isolation transformer T3 is respectively connected with an emitter of a ninth triode V13, an emitter of a thirteenth triode V14 and a pin 2 on the primary side of a fourth isolation transformer T4 in the fourth totem pole circuit, and a pin 3 and a pin 4 on the secondary side of the third isolation transformer T3 are connected to the rectifying module;
a primary side pin 1 of the fourth isolation transformer T4 is connected to an emitter of a seventh triode V11, an emitter of an eighth triode V12, and a primary side pin 1 of the third isolation transformer T3 in the third totem pole circuit, a primary side pin 2 of the fourth isolation transformer T4 is connected to an emitter of a ninth triode V13, an emitter of a thirteenth triode V14, and a primary side pin 2 of the third isolation transformer T3 in the fourth totem pole circuit, and a secondary side pin 3 and a secondary side pin 4 of the fourth isolation transformer T4 are connected to the rectification module.
7. The highly reliable time delay isolation drive circuit for a spacecraft of claim 6, wherein said rectifier module comprises: a first rectifying group connected to the secondary side of the first isolation transformer T1, a second rectifying group connected to the secondary side of the second isolation transformer T2, a third rectifying group connected to the secondary side of the third isolation transformer T3, and a fourth rectifying group connected to the secondary side of the fourth isolation transformer T4;
the first rectifying group comprises a first diode V5, a fifth resistor R5, a sixth resistor R6 and a fifth triode V6, wherein the anode of the first diode V5 is respectively connected with one end of a pin 3 on the secondary side of the first isolation transformer T1 and one end of a sixth resistor R6, the cathode of the first diode V5 is connected with one end of the fifth resistor R5, the other end of the fifth resistor R5 is respectively connected with the emitter of the fifth triode V6 and the drive extension circuit, the base of the fifth triode V6 is connected with the other end of the sixth resistor R6, and the collector of the fifth triode V6 is respectively connected with a pin 4 on the secondary side of the first isolation transformer T1 and the drive extension circuit;
the second rectifying group comprises a second diode V7, a seventh resistor R7, an eighth resistor R8 and a sixth triode V8, wherein the anode of the second diode V7 is respectively connected with the pin 4 at the secondary side of the second isolation transformer T2 and one end of the eighth resistor R8, the cathode of the second diode V7 is connected with one end of the seventh resistor R7, the other end of the seventh resistor R7 is respectively connected with the emitter of the sixth triode V8 and the drive expansion circuit, the base of the sixth triode V8 is connected with the other end of the eighth resistor R8, and the collector of the sixth triode V8 is respectively connected with the pin 3 at the secondary side of the second isolation transformer T2 and the drive expansion circuit;
the third rectifying group comprises a third diode V15, a seventeenth resistor R17, an eighteenth resistor R18 and an eleventh triode V16, wherein the anode of the third diode V15 is respectively connected with one end of a pin 3 at the secondary side of the third isolation transformer T3 and one end of an eighteenth resistor R18, the cathode of the third diode V15 is connected with one end of the seventeenth resistor R17, the other end of the seventeenth resistor R17 is respectively connected with the emitter of the eleventh triode V16 and the drive expansion circuit, the base of the eleventh triode V16 is connected with the other end of the eighteenth resistor R18, and the collector of the eleventh triode V16 is respectively connected with a pin 4 at the secondary side of the third isolation transformer T3 and the drive expansion circuit;
the fourth rectifying group comprises a fourth diode V17, a nineteenth resistor R19, a twentieth resistor R20 and a twelfth triode V18, wherein the anode of the fourth diode V17 is connected with one end of a pin 4 on the secondary side of the fourth isolation transformer T4 and one end of a twentieth resistor R20 respectively, the cathode of the fourth diode V17 is connected with one end of the nineteenth resistor R19, the other end of the nineteenth resistor R19 is connected with the emitter of the twelfth triode V18 and the driving expansion circuit respectively, the base of the twelfth triode V18 is connected with the other end of the twentieth resistor R20, and the collector of the twelfth triode V18 is connected with a pin 3 on the secondary side of the fourth isolation transformer T4 and the driving expansion circuit respectively.
8. The highly reliable time-delay isolation driving circuit for the spacecraft of claim 7, wherein the switching speed of the main MOS transistor V21 is adjusted by adjusting the resistance values of a fifth resistor R5 and a seventh resistor R7; the turn-off speed of the main MOS transistor V21 is adjusted by adjusting the resistance values of the sixth resistor R6 and the eighth resistor R8; the switching speed of the auxiliary MOS transistor V22 is adjusted by adjusting the resistance values of a seventeenth resistor R17 and a nineteenth resistor R19; the turn-off speed of the auxiliary MOS transistor V22 is adjusted by adjusting the resistance values of the eighteenth resistor R18 and the twentieth resistor R20.
9. The highly reliable time delay isolation drive circuit for a spacecraft of claim 8, wherein said drive extension circuit comprises: the first extension circuit is electrically connected with the first rectifying group, the second rectifying group and the main MOS tube V21, and the second extension circuit is electrically connected with the third rectifying group, the fourth rectifying group and the auxiliary MOS tube V22;
the first extension circuit connects the first path of pulse driving current and the second path of pulse driving current with the grid and the source of a main MOS transistor V21, the first extension circuit comprises a fifth diode V9, a ninth resistor R9, a sixth diode V10 and a tenth resistor R10, one end of a ninth resistor R9 is connected with the other end of a fifth resistor R5, the emitter of a fifth triode V6 and the anode of a fifth diode V9, the other end of a ninth resistor R9 is connected with the collector of a fifth triode V6, the other end of a tenth resistor R10, the collector of a sixth triode V8 and the source of a main MOS transistor V21, the cathode of the fifth diode V9 is connected with the grid of the main MOS transistor V21 and the cathode of a sixth diode V10, one end of the tenth resistor R10 is connected with the other end of a seventh resistor R7, the emitter of a sixth triode V8 and the anode of a sixth diode V10;
the second extension circuit connects the third pulse driving current and the fourth pulse driving current with the grid and the source of the auxiliary MOS transistor V22, the second expansion circuit comprises a seventh diode V19, a twenty-first resistor R21, an eighth diode V20 and a twenty-second resistor R22, wherein one end of the twenty-first resistor R21 is connected with the other end of the seventeenth resistor R17, the emitter of the eleventh triode V16 and the anode of the seventh diode V19, the other end of the twenty-first resistor R21 is connected with the collector of the eleventh triode V16, the other end of the twenty-second resistor R22, the collector of the twelfth triode V18 and the source of the auxiliary MOS transistor V22, the cathode of the seventh diode V19 is connected with the gate of the auxiliary MOS transistor V22 and the cathode of the eighth diode V20, and one end of the twenty-second resistor R22 is connected with the other end of the seventeenth resistor R17, the emitter of the twelfth triode V18 and the anode of the eighth diode V20.
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Citations (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1356575A2 (en) * 2001-02-01 2003-10-29 DI/DT, Inc. Isolated drive circuitry used in switch-mode power converters
CN202713130U (en) * 2012-07-03 2013-01-30 湖南科美达电气股份有限公司 Push-pull type thyristor trigger circuit
CN203119748U (en) * 2012-12-26 2013-08-07 江阴市振江钢结构有限公司 Driving control circuit for direct parallel connection IGBTs
CN106134510B (en) * 2012-06-21 2014-10-22 北京卫星制造厂 A kind of satellite ortho-exciting electric source secondary side synchronous rectification control system
CN203933600U (en) * 2014-06-26 2014-11-05 中国电子科技集团公司第十四研究所 A kind of electromagnetic coupled formula high-power drive circuit
CN106877721A (en) * 2015-12-13 2017-06-20 张凤军 Variable polarity TIG welding power supply secondary inverting controls circuit
CN107453614A (en) * 2017-09-15 2017-12-08 肇庆市锐高电子有限公司 Full-bridge synchronous rectification circuit
CN207200579U (en) * 2017-09-15 2018-04-06 肇庆市锐高电子有限公司 Full-bridge switching power supply
CN108023467A (en) * 2017-12-04 2018-05-11 山东航天电子技术研究所 A kind of two-way magnetization transformer isolation drive circuit
CN108927288A (en) * 2018-06-14 2018-12-04 杭州电子科技大学 A kind of high-pressure dust-cleaning power supply
CN109742725A (en) * 2019-03-13 2019-05-10 湖南大学 Parallel connection type intelligent DC protective switch
CN209151134U (en) * 2018-10-19 2019-07-23 中车株洲电力机车研究所有限公司 A kind of commutating pulse delay circuit
CN110299826A (en) * 2019-07-01 2019-10-01 上海空间电源研究所 A kind of spacecraft highly reliable isolated drive circuit of suitable wide duty ratio
CN111446863A (en) * 2020-04-24 2020-07-24 中国电子科技集团公司第四十三研究所 Synchronous rectification circuit of switching power supply
CN111654272A (en) * 2019-12-25 2020-09-11 联合汽车电子有限公司 Drive control circuit
CN112910269A (en) * 2021-03-18 2021-06-04 西安微电子技术研究所 Secondary side pulse width modulation and synchronous rectification driving circuit and driving method

Patent Citations (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1356575A2 (en) * 2001-02-01 2003-10-29 DI/DT, Inc. Isolated drive circuitry used in switch-mode power converters
CN106134510B (en) * 2012-06-21 2014-10-22 北京卫星制造厂 A kind of satellite ortho-exciting electric source secondary side synchronous rectification control system
CN202713130U (en) * 2012-07-03 2013-01-30 湖南科美达电气股份有限公司 Push-pull type thyristor trigger circuit
CN203119748U (en) * 2012-12-26 2013-08-07 江阴市振江钢结构有限公司 Driving control circuit for direct parallel connection IGBTs
CN203933600U (en) * 2014-06-26 2014-11-05 中国电子科技集团公司第十四研究所 A kind of electromagnetic coupled formula high-power drive circuit
CN106877721A (en) * 2015-12-13 2017-06-20 张凤军 Variable polarity TIG welding power supply secondary inverting controls circuit
CN107453614A (en) * 2017-09-15 2017-12-08 肇庆市锐高电子有限公司 Full-bridge synchronous rectification circuit
CN207200579U (en) * 2017-09-15 2018-04-06 肇庆市锐高电子有限公司 Full-bridge switching power supply
CN108023467A (en) * 2017-12-04 2018-05-11 山东航天电子技术研究所 A kind of two-way magnetization transformer isolation drive circuit
CN108927288A (en) * 2018-06-14 2018-12-04 杭州电子科技大学 A kind of high-pressure dust-cleaning power supply
CN209151134U (en) * 2018-10-19 2019-07-23 中车株洲电力机车研究所有限公司 A kind of commutating pulse delay circuit
CN109742725A (en) * 2019-03-13 2019-05-10 湖南大学 Parallel connection type intelligent DC protective switch
CN110299826A (en) * 2019-07-01 2019-10-01 上海空间电源研究所 A kind of spacecraft highly reliable isolated drive circuit of suitable wide duty ratio
CN111654272A (en) * 2019-12-25 2020-09-11 联合汽车电子有限公司 Drive control circuit
CN111446863A (en) * 2020-04-24 2020-07-24 中国电子科技集团公司第四十三研究所 Synchronous rectification circuit of switching power supply
CN112910269A (en) * 2021-03-18 2021-06-04 西安微电子技术研究所 Secondary side pulse width modulation and synchronous rectification driving circuit and driving method

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