CN113312061B - Program upgrading method and system for data acquisition of power system - Google Patents
Program upgrading method and system for data acquisition of power system Download PDFInfo
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- CN113312061B CN113312061B CN202110497807.0A CN202110497807A CN113312061B CN 113312061 B CN113312061 B CN 113312061B CN 202110497807 A CN202110497807 A CN 202110497807A CN 113312061 B CN113312061 B CN 113312061B
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- G06F8/60—Software deployment
- G06F8/65—Updates
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
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- G06F8/60—Software deployment
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- G—PHYSICS
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Abstract
The invention discloses a program upgrading system for data acquisition of an electric power system, which comprises: a communication interface; the file loading module is used for loading the upgrading program through a USB interface; the system upgrading module is used for updating the firmware and upgrading the program of the electric power data acquisition system through the loaded upgrading program; the synchronous signal module is used for controlling to pull down the synchronous pins of all the single boards when firmware or programs are updated, releasing the synchronous pins of the single board when the updating of one single board is finished, converting the state of the synchronous pins into an input monitoring state, and when the upgrading of all the single boards is finished, keeping the level of the synchronous pins of all the single boards high; the signal acquisition module is used for acquiring a plurality of paths of fixed-range analog signals under the control of the synchronous signals and acquiring switching value signals; the system also includes a configuration module. The invention can ensure the synchronization of all data acquisition, thereby improving the reliability of the whole device.
Description
Technical Field
The invention relates to the field of power equipment, in particular to a program upgrading method and system for data acquisition of a power system.
Background
At present, data acquisition of a plurality of electric power systems is realized by means of FPGA, FPGA program upgrading is completed by means of network loading of a CPU in a main control part, on-line upgrading can not be completed by the FPGA on a board for a daughter board without the CPU, a case needs to be disassembled, the daughter board is taken out and upgraded independently, operation is inconvenient, and workload is large.
Disclosure of Invention
Aiming at the defects existing in the current single board upgrading, the invention provides a program upgrading system which can conveniently and quickly upgrade the single board programs, ensures the synchronization of all single board signals, can be started together after the upgrading of each single board program is finished, avoids the misoperation of devices caused by the asynchronous and chaotic data acquisition of different single boards, and ensures the high reliability of the data acquisition of the power system.
The technical scheme adopted by the invention is as follows:
a program upgrade system for power system data collection is provided, comprising:
the communication interface is connected with the backboard and the single boards, and the single boards are all inserted in the slot positions of the backboard;
the file loading module is used for loading the upgrading program through a USB interface;
the system upgrading module is used for updating the firmware and upgrading the program of the electric power data acquisition system through the loaded upgrading program;
the synchronous signal module is used for controlling to pull down the synchronous pins of all the single boards when firmware or program is updated, releasing the synchronous pins of the single board when one single board is updated, converting the state of the synchronous pins into an input monitoring state, and when the upgrade of all the single boards is finished, keeping the level of the synchronous pins of all the single boards high;
the signal acquisition module is used for acquiring a plurality of paths of fixed-range analog signals under the control of the synchronous signals and acquiring switching value signals;
and the configuration module is used for carrying out single board version configuration, address configuration and master-slave board configuration.
In connection with the above technical solution, the program upgrading system further includes a signal control module, which is used for controlling the power-on timing sequence, the reset timing sequence, and other function control of the board.
According to the technical scheme, the single board version configuration is multi-address expansion; the version configuration is to realize different version management through a multi-bit dial switch; the master slave configuration is the master slave role of the single board through pin pull-up and pull-down configuration.
According to the technical scheme, the communication interface module is communicated with the CPU on the board through the UART and communicated with other daughter boards through the RS-485 or CAN bus through the backboard, and the two communication modes both support a master-slave structure and are differential signal transmission.
According to the technical scheme, the file loading module loads the upgrading program through the HOST USB interface of the single board.
According to the technical scheme, the file interface module is used for loading the configuration file and the program code in the U disk into Flash in the single board management system, reading the configuration file from the Flash to configure the power-on time sequence, the reset time sequence and other module function management and control of the single board, and comprises bus switching, starting mirror image switching of a logic device FPGA, low power consumption enabling of a power supply and optical module power supply enabling, reading the program code of the logic device from the Flash, and upgrading the FPGA logic program on line.
And after all single boards are upgraded, all synchronous signals are controlled to be released, and the signals are high, so that synchronization is completed.
In connection with the above technical solution, the debugging serial port is used for debugging program upgrade, and the program upgrade system further includes a debugging serial port used for panel debugging of the reserved single board.
The invention also provides a program upgrading method for data acquisition of the power system, which is based on the program upgrading system for data acquisition of the power system in the technical scheme, and the program upgrading method comprises the following steps:
starting a program upgrading system and powering on;
the program upgrading system loads the firmware of the program upgrading system and pulls down the synchronous pins of all the single boards;
performing system self-check, judging whether the mainboard is the mainboard, if so, reading a USB interface, and if the USB memory exists and needs to be updated, reading the firmware of each daughter board from the USB memory and issuing the firmware to the daughter board;
the main board and each daughter board load a single board upgrading program, after the loading is finished, the synchronous pin of the single board is released, and the state of the synchronous pin of the single board is converted into an input monitoring state;
and monitoring whether the upgrade program of each single board is loaded, if so, the level of the synchronous pins of all the single boards is high, and the system enters a normal operation stage.
The technical scheme also comprises the following steps:
and judging whether the time for waiting for the high levels of the synchronous pins of all the single boards is overtime, and if so, entering an exception handling flow.
The invention has the following beneficial effects: the signal synchronization module is arranged in the program upgrading system, when firmware or program is updated, the signal synchronization module controls to pull down the synchronization pins of all the single boards, when one single board is updated, the synchronization pins of the single board are released, the state of the synchronization pins is converted into an input monitoring state, when the upgrading of all the single boards is finished, the levels of the synchronization pins of all the single boards are all high, and the system enters a normal operation stage to ensure the synchronization of all data acquisition, so that the reliability of the whole device is improved.
Drawings
The invention will be further described with reference to the accompanying drawings and examples, in which:
FIG. 1 is a schematic structural diagram of a program upgrading system for data acquisition of a power system according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a program upgrading system for data acquisition of an electric power system according to another embodiment of the present invention;
FIG. 3 is a schematic diagram of a program upgrade system applied to power system data acquisition;
fig. 4 is a flowchart of a program upgrading method for data collection of an electric power system according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
As shown in fig. 1, the program upgrading system for collecting data of an electric power system according to the embodiment of the present invention mainly includes: the system comprises a communication interface, a file loading module, a system upgrading module, a synchronous signal module, a signal control module, a signal acquisition module and a configuration module. The program upgrading system can realize power-on and reset time sequence control of the single board, realize USB loading of system programs, ensure that all single board programs work together after upgrading is completed through synchronous signals, avoid data confusion of the acquisition system and ensure high reliability of data acquisition of the power system.
The invention applies the program upgrading system to the electric power system data acquisition device which comprises a plurality of single boards which are all inserted in the board grooves of the back board. One of the single boards is selected as a main board, and the other single boards are selected as sub-boards. And installing a program upgrading system in each single board.
The communication interface is communicated with the CPU on the board through a UART (universal asynchronous receiver/transmitter), and communicated with other daughter boards through a RS-485 or CAN bus through a back board, and the two communication modes both support a master-slave structure and belong to differential signal transmission, so that the anti-interference capability is high, and the transmission distance is long.
The file loading module is realized through an HOST USB interface on the upper panel of the single board, and configuration files and program codes can be loaded by a U disk, so that the operation is convenient and simple. The file interface module is mainly used for loading a configuration file and a program code in the U disk into a Flash in the single board management system, reading the configuration file from the Flash to configure the power-on time sequence, the reset time sequence and other module function control of the single board, including bus switching, switching of a starting mirror image of a logic device FPGA, enabling of low power consumption of a power supply, enabling of a power supply of an optical module and the like, and simultaneously reading the program code of the logic device from the Flash to upgrade the FPGA logic program on line. And the FPGA logic program is upgraded through the program code loaded by the U disk, so that the logic program online upgrade does not depend on a CPU chip.
The program upgrading system is provided with the synchronous signal module, so that the working synchronization of all single boards can be ensured, and the misoperation of the device caused by the asynchronous data and the disordered data among the data acquisition devices of the power system can be avoided.
The program upgrading system can also assist in achieving signal acquisition, such as acquisition of analog quantity signals and switching value signals.
The configuration module of the invention can also configure a master and a slave, and the master and the slave roles are consistent with the positions of the single boards in the whole system, namely consistent with the configuration of the single board management system.
FIG. 2 is a schematic diagram of a specific embodiment of an upgrading system for implementing a routine sequence according to another embodiment of the present invention, in which the core part is an MCU, and a USB interface and a debugging serial port are provided for a panel interface of each single board; the signal of the back plate comprises CAN and RS-485 interfaces, a synchronous signal and a power supply, and the signal of the main control part of the single plate comprises a UART interface, an online upgrade signal, a power-on time sequence, a reset time sequence and other function control signals; the program upgrading system is provided with a storage Flash, an AD acquisition interface, a reserved I/O interface and a configuration module, and the configuration module is mainly used for address configuration, version configuration and master-slave configuration.
The USB interface loads the configuration file and the program code in the U disk to Flash in the single board management system, and then the MCU reads the configuration file from the Flash to configure the power-on time sequence, the reset time sequence and other module function control of the single board, such as bus switching, starting mirror image switching of a logic device FPGA, low power consumption enabling of a power supply, optical module power supply enabling and the like, and meanwhile, the program code of the logic device can also be read from the Flash, and the MCU updates the FPGA program on line.
In this embodiment, the synchronization signal module is signal synchronization SYNC, and an open-drain output pin and an input pin are connected in parallel, after the single board is ready for upgrading, the open-drain output signal corresponding to the SYNC signal is released (the SYNC is pulled down all the time when the upgrade is not completed), and the single board is switched to an input state and a line level state is detected at the same time until all the single boards are upgraded, all the SYNC signals are released, and the SYNC signal is high, thereby completing synchronization. All the daughter boards know that the upgrade is completed mutually, and subsequent programs are started together to ensure that all data acquisition is synchronous.
The debugging serial port is used for debugging program upgrading, and the debugging serial port is reserved to the panel to be convenient for debugging.
The UART interface communicates with the CPU on the board, and the CAN and RS-485 buses communicate with the daughter boards through the backboard, so that the communication of the whole system is connected. The CAN bus and the RS-485 bus both support a master-slave structure and belong to differential signal transmission, and the CAN bus and the RS-485 bus have strong anti-interference capability and long transmission distance.
The MCU is used for signal acquisition, and the MCU is provided with the ADC to realize acquisition of a plurality of paths of fixed-range analog signal inputs (0-10V, 0-20V and 0-30V) (the current acquisition can be converted into voltage acquisition) and acquisition of switching value signals.
The address configuration is pulled up by an I/O pin configured by the MCU, the slot position of the backboard is pulled down (the address is 0) or suspended (the address is 1) according to the address configuration, and when the single board is inserted into the slot position of the backboard, the MCU can identify the slot position of the single board. The number of addresses can be expanded at will, and the corresponding number of address bits is reserved corresponding to the backboard. Usually, the number of single boards of a device does not exceed 20, and 32 slot positions can be realized by using 5-bit address bits.
The version configuration is connected with an I/O pin of the MCU through a multi-bit dial switch, and the version configuration is distinguished according to a dial binary number of the dial switch. Typically, 16 configurations are identifiable by reserving a 4-bit dip switch.
The master-slave configuration is configured through a 1-bit pin and is used for distinguishing whether a single board where the single board management module is located belongs to a main board or a sub-board, and the master-slave configuration is realized through the pull-up and pull-down configuration of an I/O pin of an MCU.
As shown in fig. 3, the program upgrading system for power system data acquisition of the present invention is applied to the whole power system data acquisition device, and CAN serve as a link for communicating with the upper and main control units via UART and communicating with the lower and back boards via CAN/RS-485, so as to link the communications between the single boards in the power system data acquisition device.
As shown in fig. 4, the program upgrading method for using the program upgrading system in the power system includes the following steps:
s401, starting and powering up a program upgrading system;
s402, the program upgrading system loads the firmware of the program upgrading system, reads system configuration data and pulls down the synchronous pins of the synchronous signal modules of the single boards;
s403, performing system self-check;
s404, judging whether the mainboard is used;
s405, if the mainboard exists, reading a USB interface, if the mainboard exists, turning to S411, and if the mainboard does not exist, turning to S406;
s411, if the USB memory exists and needs to be updated, reading the firmware of each daughter board from the USB memory and issuing the firmware to the daughter boards;
s412, waiting for the main board to issue an instruction, and if the instruction is overtime, turning to S414 to enter an exception handling process; if not, then go to S406;
s406, loading a single board upgrading program on the main board and each daughter board;
s407, starting a system monitoring subprocess;
s408, releasing the synchronous pin of the single board after the single board program is loaded, and converting the state of the synchronous pin into an input monitoring state; it should be noted that, the synchronization pins of all the single boards are all connected, when the synchronization pins are pulled down, the synchronization pins are in an output state and a low level, when one or a part of the single boards complete loading, the synchronization pins are released, as long as one single board does not release the synchronization pins, the state of the whole synchronization pins is the low level, until the synchronization pins of all the single boards are released, the synchronization pins are pulled up to the high level, which means that all the single board programs complete loading;
s409, judging whether the synchronous pin is at a high level;
and S410, if the synchronous pin is at a high level, the loading of each single board upgrading program is finished, and the system enters a normal operation stage, namely data acquisition is normally carried out.
The method also comprises the following steps:
s413, if the synchronous pin is not changed into a high level, judging whether the time is overtime;
and S414, if the overtime is not changed into high level, entering an exception handling flow.
It will be understood that modifications and variations can be made by persons skilled in the art in light of the above teachings and all such modifications and variations are intended to be included within the scope of the invention as defined in the appended claims.
Claims (10)
1. A program upgrade system for data collection of an electrical power system, comprising:
the communication interface is connected with the backboard and the single boards, and the single boards are all inserted in the slot positions of the backboard;
the file loading module is used for loading the upgrading program through a USB interface;
the system upgrading module is used for updating the firmware and upgrading the program of the electric power data acquisition system through the loaded upgrading program;
the synchronous signal module is used for controlling to pull down the synchronous pins of all the single boards when firmware or program is updated, releasing the synchronous pins of the single board when one single board is updated, converting the state of the synchronous pins into an input monitoring state, and when the upgrade of all the single boards is finished, keeping the level of the synchronous pins of all the single boards high;
the signal acquisition module is used for acquiring a plurality of paths of fixed-range analog signals under the control of the synchronous signals and acquiring switching value signals;
and the configuration module is used for carrying out single board version configuration, address configuration and master-slave board configuration.
2. The program upgrading system for power system data collection according to claim 1, further comprising a signal control module, configured to control power-on timing, reset timing, and other function management and control of the board.
3. The program upgrade system for power system data acquisition according to claim 1, wherein the single board version configuration is a multiple address extension; the version configuration is to realize different version management through a multi-bit dial switch; the master slave configuration is the master slave role of the single board through pin pull-up and pull-down configuration.
4. The program upgrading system for data collection of an electric power system as claimed in claim 1, wherein the communication interface module is used for communicating with the CPU on the board through UART, and communicating with other daughter boards through RS-485 or CAN bus via the backplane, and both communication modes support a master-slave structure and are differential signal transmission.
5. The program upgrading system for power system data collection according to claim 1, wherein the file loading module loads the upgrading program through a panel HOST USB interface of the single board.
6. The program upgrading system for data collection of an electric power system according to claim 1, wherein the file interface module is configured to load a configuration file and a program code in a usb disk into Flash in the board management system, and then read the configuration file from the Flash to configure a power-on timing sequence, a reset timing sequence, and other module function management and control, including bus switching, switching of a start mirror image of a logic device FPGA, enabling low power consumption of a power supply, enabling a power supply of an optical module, and simultaneously read the program code of the logic device from the Flash to upgrade the FPGA logic program online.
7. The program upgrading system for data collection of an electric power system according to claim 1, wherein the signal synchronization module includes an open-drain output pin and an input pin connected in parallel, and when all the boards are upgraded, all the synchronization signals are controlled to be released, and the signals are high, so that synchronization is completed.
8. The program upgrading system for electric power system data acquisition according to claim 1, wherein the debug serial port is used for debugging program upgrading, the program upgrading system further comprising a debug serial port used for reserving panel debugging of a single board.
9. A program upgrading method for data collection of an electric power system, which is based on the program upgrading system for data collection of an electric power system according to any one of claims 1 to 8, and which comprises the steps of:
starting a program upgrading system and powering on;
the program upgrading system loads the firmware of the program upgrading system and pulls down the synchronous pins of all the single boards;
performing system self-check, judging whether the mainboard is the mainboard, if so, reading a USB interface, and if the USB memory exists and needs to be updated, reading the firmware of each daughter board from the USB memory and issuing the firmware to the daughter board;
the main board and each daughter board load a single board upgrading program, after the loading is finished, the synchronous pin of the single board is released, and the state of the synchronous pin of the single board is converted into an input monitoring state;
and monitoring whether the upgrade program of each single board is loaded, if so, the level of the synchronous pins of all the single boards is high, and the system enters a normal operation stage.
10. The program upgrade method for power system data collection according to claim 9, further comprising the steps of:
and judging whether the time for waiting for the high levels of the synchronous pins of all the single boards is overtime, and if so, entering an exception handling flow.
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| CN116841578B (en) * | 2023-05-19 | 2024-03-26 | 国汽朴津智能科技(安庆)有限公司 | Remote upgrading method and system for mobile robot |
| CN117850565B (en) * | 2024-03-08 | 2024-06-11 | 闪极科技(深圳)有限公司 | Power supply device, firmware upgrade method, and readable storage medium |
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