CN113270505B - Photoelectric detector structure and preparation method thereof - Google Patents
Photoelectric detector structure and preparation method thereof Download PDFInfo
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- CN113270505B CN113270505B CN202110396769.XA CN202110396769A CN113270505B CN 113270505 B CN113270505 B CN 113270505B CN 202110396769 A CN202110396769 A CN 202110396769A CN 113270505 B CN113270505 B CN 113270505B
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- 238000002360 preparation method Methods 0.000 title abstract description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 80
- 239000000758 substrate Substances 0.000 claims abstract description 72
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 36
- 239000004065 semiconductor Substances 0.000 claims abstract description 32
- 229910052732 germanium Inorganic materials 0.000 claims abstract description 29
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims abstract description 29
- 235000012239 silicon dioxide Nutrition 0.000 claims abstract description 20
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 20
- 230000003287 optical effect Effects 0.000 claims abstract description 18
- 238000004519 manufacturing process Methods 0.000 claims abstract description 15
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims abstract description 11
- 230000000694 effects Effects 0.000 claims abstract description 8
- 239000010410 layer Substances 0.000 claims description 133
- 238000000034 method Methods 0.000 claims description 10
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical group CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 claims description 6
- 238000005468 ion implantation Methods 0.000 claims description 4
- 238000005498 polishing Methods 0.000 claims description 4
- 239000002344 surface layer Substances 0.000 claims description 4
- 238000001312 dry etching Methods 0.000 claims description 3
- 238000001039 wet etching Methods 0.000 claims description 3
- 230000002708 enhancing effect Effects 0.000 claims 4
- 239000000126 substance Substances 0.000 claims 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 abstract description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 12
- 229910052710 silicon Inorganic materials 0.000 description 12
- 239000010703 silicon Substances 0.000 description 12
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 4
- 230000007547 defect Effects 0.000 description 4
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 4
- 238000001289 rapid thermal chemical vapour deposition Methods 0.000 description 4
- 238000000038 ultrahigh vacuum chemical vapour deposition Methods 0.000 description 4
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 3
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 3
- 239000000470 constituent Substances 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- -1 etc. Substances 0.000 description 3
- 239000012212 insulator Substances 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000009499 grossing Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000001451 molecular beam epitaxy Methods 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 230000004043 responsiveness Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
- H01L31/105—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PIN type
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
- H01L31/1808—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table including only Ge
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
The invention relates to the field of semiconductor production, in particular to a photoelectric detector structure and a preparation method thereof. A photodetector structure comprising: the silicon oxide layer comprises a substrate, a first silicon oxide layer, a second silicon oxide layer, an aluminum oxide layer and a P-I-N stacked layer, wherein the thickness of the second silicon oxide layer is 10 nm-1 mu m. The preparation method comprises the following steps: forming a germanium buffer layer on a substrate; forming an intrinsic semiconductor layer; forming a P-type semiconductor layer; forming an alumina layer, forming or not forming a second silicon dioxide layer, obtaining a substrate A, wherein the thickness of the second silicon dioxide layer is 10 nm-1 mu m; forming a first silicon oxide layer on another substrate, and if the substrate A does not form a second silicon oxide layer, continuing to form the second silicon oxide layer to obtain a substrate B; bonding the substrate A and the substrate B; removing the substrate and the germanium buffer layer in the substrate A; an N-type semiconductor layer is formed. The thicker double-layer silicon oxide structure is arranged below the PIN stacking structure, so that the optical reflection inside the device is enhanced, an optical resonant cavity is formed inside the device, and the effect of the optical resonant cavity is enhanced.
Description
Technical Field
The invention relates to the field of semiconductor production, in particular to a photoelectric detector structure and a preparation method thereof.
Background
The high-performance photoelectric detector is core equipment for connecting an optical device and an electronic device, the excellent photoelectric performance of the photoelectric detector provides a solid foundation for realizing high-efficiency conversion transmission of photoelectric signals and accurate reading of information, and core equipment guarantee is provided for a photoelectric integrated chip technical scheme.
The conventional PIN detector structure has no optical resonance enhancement effect in most of the interior, and the responsivity is to be improved. There are also a few detectors with resonant cavity structures, but they typically use bragg mirrors with a fine and complex structure and are also complex to manufacture.
For this purpose, the present invention is proposed.
Disclosure of Invention
The invention mainly aims to provide a photoelectric detector structure, which is provided with a thicker double-layer silicon oxide structure below a PIN stacking structure, so that the optical reflection inside a device is enhanced, an optical resonant cavity is formed inside the device, and the effect of the optical resonant cavity is enhanced; under the condition of the same incident light, compared with the traditional detector, the photoelectric detector with the structure has higher responsivity and stronger photoelectric conversion capability.
The invention also aims to provide a preparation method of the photoelectric detector structure, which comprises the steps of manufacturing two substrates separately and bonding, integrating a multi-layer structure into a whole, and has the advantages of few material defects, simple flow and the like.
A photodetector structure comprising, stacked in order from bottom to top:
The substrate is provided with a plurality of holes,
The first silicon oxide layer is formed of a silicon oxide layer,
A second silicon dioxide layer, wherein the thickness of the second silicon dioxide layer is 10 nm-1 mu m,
The layer of aluminum oxide is formed from a layer of aluminum oxide,
P-I-N stack layers.
A method of fabricating a photodetector structure, comprising:
Forming a substrate A:
Forming a germanium buffer layer on a substrate;
forming an intrinsic semiconductor layer;
Forming a P-type semiconductor layer;
An aluminum oxide layer is formed and is formed,
Forming or not forming a second silicon dioxide layer to obtain a substrate A, wherein the thickness of the second silicon dioxide layer is 10 nm-1 mu m;
forming a substrate B: forming a first silicon oxide layer on another substrate, and if the substrate A does not form a second silicon oxide layer, continuing to form the second silicon oxide layer to obtain a substrate B;
Bonding:
Bonding the substrate A and the substrate B;
removing the substrate and the germanium buffer layer in the substrate A;
and forming an N-type semiconductor layer on the surface of the intrinsic semiconductor layer, or performing N-type ion implantation on a shallow surface layer of the intrinsic semiconductor layer to form the N-type semiconductor layer.
Compared with the prior art, the invention achieves the following technical effects:
(1) A thicker double-layer silicon oxide structure is arranged below the PIN stacking structure, so that the optical reflection inside the device is enhanced, an optical resonant cavity is formed inside the device, and the effect of the optical resonant cavity is enhanced; under the condition of the same incident light, compared with the traditional detector, the photoelectric detector with the structure has higher responsivity and stronger photoelectric conversion capability.
(2) The defect problem of the PIN stacking structure can be reduced by utilizing the means of firstly manufacturing the P layer and the I layer, then bonding and finally manufacturing the N layer, and the reliability of the device is improved.
(3) High-quality germanium can be obtained on the basis of the epitaxial germanium buffer layer, and the reliability of the device is improved.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention.
FIG. 1 is a schematic diagram of a photodetector according to the present invention;
Fig. 2 to 6 are schematic views illustrating the structure of fig. 1, which is formed by different steps.
Detailed Description
Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is only exemplary and is not intended to limit the scope of the present disclosure. In addition, in the following description, descriptions of well-known structures and techniques are omitted so as not to unnecessarily obscure the concepts of the present disclosure.
Various structural schematic diagrams according to embodiments of the present disclosure are shown in the drawings. The figures are not drawn to scale, wherein certain details are exaggerated for clarity of presentation and may have been omitted. The shapes of the various regions, layers and relative sizes, positional relationships between them shown in the drawings are merely exemplary, may in practice deviate due to manufacturing tolerances or technical limitations, and one skilled in the art may additionally design regions/layers having different shapes, sizes, relative positions as actually required.
In the context of the present disclosure, when a layer/element is referred to as being "on" another layer/element, it can be directly on the other layer/element or intervening layers/elements may be present therebetween. In addition, if one layer/element is located "on" another layer/element in one orientation, that layer/element may be located "under" the other layer/element when the orientation is turned.
The photodetector structure shown in fig. 1 is provided with a thicker double-layer silicon oxide structure below the PIN stacking structure, so that the optical reflection inside the device is enhanced, an optical resonant cavity is formed inside the device, and the effect of the optical resonant cavity is enhanced.
The detector comprises the following components stacked in sequence from bottom to top:
The substrate 201 is provided with a plurality of spacers,
The first silicon oxide layer 202 is formed of a silicon oxide,
A second silicon dioxide layer 106, wherein the thickness of the second silicon dioxide layer 106 is 10 nm-1 μm,
The layer of aluminum oxide 105 is formed of,
P-I-N stack layers.
The substrate is mainly a silicon-based substrate (but the invention is not limited thereto, and is also applicable to substrates made of other semiconductor materials), but there is no specific requirement on the crystal orientation, the presence or absence of an oxygen-buried layer, etc., and any substrate known to those skilled in the art for carrying the constituent elements of a semiconductor integrated circuit, such as silicon-on-insulator (SOI), bulk silicon (bulk silicon), silicon germanium, etc., may be used.
The thickness of the first silicon oxide layer 202 is preferably 10nm to 1 μm, and the thickness of the aluminum oxide layer 105 is not particularly limited.
The thickness of the second silicon dioxide layer 106 is one of the keys for forming the resonant cavity, and the thickness is required to reach 10 nm-1 μm, so that under the condition of the same incident light, the photoelectric detector shown in fig. 1 has higher responsivity and stronger photoelectric conversion capability compared with the traditional detector.
The P-I-N stack layer mainly refers to a vertical stack structure, and includes a P-type doped semiconductor layer, an intrinsic semiconductor layer, and an N-type doped semiconductor layer, which are germanium, and are shown in fig. 1 as a P-type germanium layer 104, an intrinsic germanium layer 103, and an N-type germanium layer 107, respectively.
The P-I-N stack is also connected to electrodes, typically the P-layer and the N-layer are each connected to an electrode.
The photodetector may be any detector, such as an optoelectronic emitter, photomultiplier, photoconductive device, or the like.
The preparation method of the photoelectric detector is critical to the quality of the photoelectric detector, and devices with high quality, few defects and high responsiveness can be obtained by adopting the following method, wherein the method comprises the steps of manufacturing a sacrificial substrate, a supporting substrate and bonding.
Substrate a (i.e., sacrificial substrate) as shown in fig. 2 was fabricated:
In a first step, a germanium buffer layer 102 is formed on a substrate 101. The substrate used in this step is mainly a silicon-based substrate (but the invention is not particularly limited and is also applicable to substrates of other semiconductor materials), but there is no particular requirement on the crystal orientation, the presence or absence of an oxygen-buried layer, etc., and any substrate known to those skilled in the art for carrying the constituent elements of a semiconductor integrated circuit, such as silicon-on-insulator (SOI), bulk silicon (bulk silicon), silicon germanium, etc.
In the second step, the intrinsic semiconductor layer 103 is formed by using germanium as an example, and the formation means is arbitrary, for example, typical APCVD, UHVCVD, LPCVD, RTCVD, PECVD, MBE or epitaxial growth, etc., and RPCVD is preferable.
In the third step, the P-type germanium layer 104 is formed by any means, such as typical APCVD, UHVCVD, LPCVD, RTCVD, PECVD, MBE or epitaxial growth, and RPCVD is preferred. The ions of the P type doping can be boron, gallium and the like.
Fourth, the aluminum oxide layer 105 is formed, and aluminum oxide can reduce interface defects and enhance adhesion.
Fifth, forming a second silicon dioxide layer 106, wherein the thickness of the second silicon dioxide layer is 10nm-1 mu m; means of deposition include, but are not limited to APCVD, UHVCVD, LPCVD, RTCVD, PECVD and the like (oxide layers formed other than the thermal oxidation form, including silicon oxide with a silicon source of tetraethyl orthosilicate (TEOS)).
Substrate B (i.e., support substrate) as shown in fig. 3 was fabricated:
The first silicon oxide layer 202 is formed on another substrate 201, and the first silicon oxide layer 202 is a thermal oxide layer, and the substrate is mainly a silicon-based substrate (but the invention is not limited thereto, and is also applicable to substrates made of other semiconductor materials), but there is no specific requirement on the crystal orientation, presence or absence of an oxygen buried layer, and the like, and any substrate for carrying the constituent elements of a semiconductor integrated circuit, such as silicon-on-insulator (SOI), bulk silicon (bulk silicon), silicon germanium, and the like, which are well known to those skilled in the art.
Bonding:
first, bonding the substrate a shown in fig. 2 and the substrate B shown in fig. 3, where the first silicon oxide layer 202 and the second silicon oxide layer 106 are in contact, to obtain the structure shown in fig. 4; the surface of the silicon oxide layer is subjected to a surface smoothing treatment, such as CMP, prior to bonding.
Step two, removing the substrate 101 and the germanium buffer layer 102 to obtain a structure shown in fig. 5; the means of removal is not limited, and one or more means such as polishing, wet etching, dry etching, CMP are combined for removal.
In the third step, an N-type germanium layer 107 is formed on the surface of the intrinsic layer, as shown in fig. 1, or an N-type ion implantation is performed on a shallow surface layer of the intrinsic layer to form an N-type germanium layer, where the N-type ion may be phosphorus, arsenic, or the like.
Finally, an electrode and a detector structure are formed, as shown in fig. 6.
Alternatively, the invention may form a second silicon dioxide layer on the substrate B, by the following method:
Manufacturing a substrate A:
In a first step, a germanium buffer layer is formed on a substrate.
And secondly, forming an intrinsic germanium layer.
And thirdly, forming a P-type germanium layer.
Fourth, an alumina layer is formed.
Manufacturing a substrate B (namely a supporting substrate):
first, a first silicon oxide layer is formed on another substrate, the first silicon oxide layer being a thermal oxide layer.
And secondly, continuing to form a second silicon dioxide layer, wherein the thickness of the second silicon dioxide layer is 10 nm-1 mu m, the forming method adopts other methods besides a thermal oxidation method, and the depositing method comprises, but is not limited to APCVD, UHVCVD, LPCVD, RTCVD, PECVD and the like (the oxide layer formed except for a thermal oxidation form comprises silicon oxide with a silicon source of Tetraethoxysilane (TEOS)).
Bonding:
first, bonding a substrate A and a substrate B; a surface smoothing treatment, such as CMP, is performed prior to bonding.
Step two, removing the silicon substrate and the germanium buffer layer of the substrate A; the means of removal is not limited, and one or more means such as polishing, wet etching, dry etching, CMP are combined for removal.
And thirdly, forming an N-type germanium layer on the surface of the intrinsic layer, or carrying out N-type ion implantation on a shallow surface layer of the intrinsic layer to form the N-type germanium layer, wherein N-type ions can be phosphorus, arsenic and the like.
Finally, an electrode and detector structure is formed, as also shown in fig. 6.
The embodiments of the present disclosure are described above. These examples are for illustrative purposes only and are not intended to limit the scope of the present disclosure. The scope of the disclosure is defined by the appended claims and equivalents thereof. Various alternatives and modifications can be made by those skilled in the art without departing from the scope of the disclosure, and such alternatives and modifications are intended to fall within the scope of the disclosure.
Claims (8)
1. A photodetector structure comprising, stacked in order from bottom to top:
The substrate is provided with a plurality of holes,
A first silicon oxide layer, the first silicon oxide layer being a thermal oxide layer;
the thickness of the second silicon dioxide layer is 10 nm-1 mu m, and the second silicon dioxide layer is a TEOS silicon oxide layer; the first silicon oxide layer and the second silicon oxide layer which are adjacently stacked are used for enhancing the internal optical reflection of the photoelectric detector and enhancing the optical resonant cavity effect;
The layer of aluminum oxide is formed from a layer of aluminum oxide,
P-I-N stack layers.
2. The photodetector structure of claim 1 wherein the P-I-N stack layer comprises, stacked from bottom to top: a P-type doped germanium layer, a germanium intrinsic layer, and an N-type doped germanium layer.
3. The photodetector structure of claim 1 or 2 wherein the P-I-N stack is connected to an electrode.
4. A method of fabricating a photodetector structure, comprising:
Forming a substrate A:
Forming a germanium buffer layer on a substrate;
forming an intrinsic semiconductor layer;
Forming a P-type semiconductor layer;
An aluminum oxide layer is formed and is formed,
Forming or not forming a second silicon dioxide layer to obtain a substrate A, wherein the thickness of the second silicon dioxide layer is 10 nm-1 mu m;
Forming a substrate B: forming a first silicon oxide layer on another substrate, and if the substrate A does not form the second silicon oxide layer, continuing to form the second silicon oxide layer to obtain a substrate B; the first silicon oxide layer is a thermal oxide layer; the second silicon dioxide layer is a TEOS silicon dioxide layer;
Bonding:
Bonding the substrate A and the substrate B; the first silicon oxide layer and the second silicon oxide layer which are adjacently stacked are used for enhancing the internal optical reflection of the photoelectric detector and enhancing the optical resonant cavity effect;
removing the substrate and the germanium buffer layer in the substrate A;
and forming an N-type semiconductor layer on the surface of the intrinsic semiconductor layer, or performing N-type ion implantation on a shallow surface layer of the intrinsic semiconductor layer to form the N-type semiconductor layer.
5. The method of manufacturing according to claim 4, further comprising, after forming the N-type semiconductor layer: and manufacturing an electrode.
6. The method of claim 4, wherein the semiconductor used for the P-type semiconductor layer, the intrinsic semiconductor layer, and the N-type semiconductor layer is germanium.
7. The method of manufacturing according to claim 4, wherein the substrate and the germanium buffer layer in the substrate a are removed by at least one of polishing, wet etching, dry etching, and chemical mechanical polishing.
8. The method according to claim 4, wherein the substrate having a silicon oxide surface is further subjected to a CMP treatment before the bonding.
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| "Resonant-cavity-enhanced responsivity in germanium-on-insulator photodetectors";SOUMAVA GHOSH 等;《Optics Express》;20200727;第28卷(第16期);摘要，正文第23739页第1段-第23746页第2段，附图1-6 * |
| SOUMAVA GHOSH 等."Resonant-cavity-enhanced responsivity in germanium-on-insulator photodetectors".《Optics Express》.2020,第28卷(第16期), * |
| YIDING LIN 等."High-efficiency normal-incidence vertical p-i-n photodetectors on a germanium-on-insulator platform".《Photonics Research》.2017,第5卷(第6期), * |
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