CN113258802A - Submodule topological structure with direct current fault clearing and self-voltage-sharing capabilities - Google Patents
Submodule topological structure with direct current fault clearing and self-voltage-sharing capabilities Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
- H02J3/36—Arrangements for transfer of electric power between ac networks via a high-tension dc link
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
- H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
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- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
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Abstract
The invention relates to a submodule topological structure with direct current fault clearing and self-voltage-equalizing capabilities, and belongs to the technical field of high-voltage flexible direct current transmission. The modular multilevel converter comprises an MMC sub-module, wherein the MMC sub-module topology comprises two ports of voltage positive input and voltage negative output and a sub-module topology structure connected with the two ports, and the MMC sub-module topology structure also comprises two half-bridge sub-modules SM with the same structure1And SM2A bidirectional switch, a fault-loop thyristor S6And a voltage-sharing diode D7Two half-bridge sub-modules SM1And SM2Connected in a cascade mode, the bidirectional switch is serially arranged in a half-bridge submodule SM2On the negative output loop, the fault loop thyristor S6Voltage cathode output port and half-bridge submodule SM of MMC submodule topology are established in series2Capacitor C in2Anode port of (2), voltage-sharing diode D7Is arranged in series at SM2Capacitor C in2Positive port and SM1Capacitor C in1Between the positive ports.
Description
Technical Field
The invention relates to a submodule topological structure with direct current fault clearing and self-voltage-equalizing capabilities, and belongs to the technical field of high-voltage flexible direct current transmission.
Background
With the rapid development of renewable clean energy sources such as wind energy, solar energy and the like, a power transmission technology based on a Modular Multilevel Converter (MMC) becomes an effective scheme for accessing large-scale clean energy sources into a power grid. The modularized multi-level voltage source type converter has the advantages of being capable of flexibly controlling active power and reactive power, direct current voltage and current, free of commutation failure and small in output voltage and current harmonic, and is widely concerned in various research institutions and engineering technical fields.
In the field of rapidly developed ultrahigh-voltage high-capacity direct-current transmission, the problem of safety and stability such as high-power transmission interruption caused by simultaneous commutation failure of multiple direct-current lines in multi-direct-current feed-in areas such as Zhujiang delta and Yangtze river delta can be solved by using a flexible direct-current transmission technology at present. The thyristor used in the traditional direct current transmission is a semi-controlled device, can only control conduction, cannot control turn-off, adopts a PWM (pulse-width modulation) method, has high harmonic content and needs a large amount of reactive power compensation devices. The MMC flexible direct-current transmission adopts a full-control power device, a recent level approximation modulation technology is used, the harmonic content of output voltage and current is low, the control target is realized by controlling the switching of sub-module capacitors, and the transmission of electric energy is realized. Under the condition of faults, the inrush current capability and the voltage-resistant horizontal capability of a fully-controlled power electronic device are inferior to those of a thyristor, and a half-bridge submodule does not have the direct-current fault blocking capability, so that the development of a flexible direct-current technology is restricted. When the MMC direct current side has a fault and the sub-modules are locked, fault current can form a loop through the anti-parallel diodes of the sub-modules, the fault current is large and does not have the fault current self-blocking capability, and a device can be damaged and a converter station can be shut down under severe conditions.
When the MMC has a fault, the direct current after the submodule is locked can continuously charge the submodule to cause serious overvoltage, so that the balance control problem of the capacitor voltage under the fault condition is one of key technologies researched at present. At present, an MMC usually adopts a mode of putting a negative level to eliminate fault current under the condition of direct current fault, and capacitors in a sub-module are in a parallel connection state by adding a fault loop, so that the voltage balance of each capacitor is kept. Therefore, a sub-module structure is expected to be provided, the self-clearing of fault current can be realized, the capacitor voltage equalizing characteristic is realized, and the technical problem that the fault circuit cannot be cut off through a breaker due to large fault current in the conventional flexible direct-current power transmission is solved.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a submodule topological structure with direct current fault clearing and self-voltage-equalizing capabilities so as to solve the problems of self-clearing of fault current and balancing of capacitor voltage in a submodule under the condition of direct current fault.
The technical scheme of the invention is as follows: the utility model provides a submodule piece topological structure that possesses direct current fault clearance and from voltage-sharing ability which characterized in that: including MMC (modular Multilevel converter) submodule piece, MMC submodule piece topology includes two ports of voltage positive input and voltage negative output and the submodule piece topological structure of being connected with two ports, MMC submodule piece topological structure still includes two half-bridge submodule piece SM that the structure is the same1And SM2A bidirectional switch, a fault-loop thyristor S6And a voltage-sharing diode D7Two half-bridge sub-modules SM1And SM2Connected in a cascade mode, the bidirectional switch is serially arranged in a half-bridge submodule SM2On the negative output loop, the fault loop thyristor S6Voltage cathode output port and half-bridge submodule SM of MMC submodule topology are established in series2Capacitor C in2Anode port of (2), voltage-sharing diode D7Is arranged in series at SM2Capacitor C in2Positive port and SM1Capacitor C in1Between the positive ports.
MMC submodule topology normal operation keepingBidirectional switch conducting, half-bridge submodule SM1And SM2The transistor controls two capacitors according to a nearest level approximation modulation strategy to respectively output 2Uc,UcAnd 0, the voltage-sharing diode can keep the voltage balance among the capacitors under the condition of outputting each level. When short-circuit fault occurs on DC side, the thyristor S in fault loop6And triggering and conducting, and outputting a negative level by the sub-module port to realize quick self-clearing of fault current and keep the voltage balance of capacitors in the sub-module.
The half-bridge sub-module SM1Comprising an insulated gate bipolar transistor T1And T2Diode D1And D2A capacitor C1(ii) a Insulated gate bipolar transistor T1And diode D1Antiparallel, T1Emitter and D1Anode is connected to T1Collector and D1Cathode-connected, insulated gate bipolar transistor T2And diode D2Antiparallel, T2Emitter and D2Anode is connected to T2Collector and D2Cathode connected to capacitor C1The positive electrode and the negative electrode are respectively connected to T1Collector and D2Anode, insulated gate bipolar transistor T1Emitter and insulated gate bipolar transistor T2And the collector is connected to a voltage positive input port of the MMC sub-module topology.
The half-bridge sub-module SM2Comprising an insulated gate bipolar transistor T3And T4Diode D3And D4A capacitor C2(ii) a Insulated gate bipolar transistor T3And diode D3Antiparallel, T3Emitter and D3Anode is connected to T3Collector and D3Cathode-connected, insulated gate bipolar transistor T4And diode D4Antiparallel, T4Emitter and D4Anode is connected to T4Collector and D4Cathode connected to capacitor C2The positive electrode and the negative electrode are respectively connected to T3Collector and D4Anode, insulated gate bipolar transistor T3Emitter and insulated gate bipolar transistor T4Collector connected to half-bridge submodule SM1Capacitor C in1Cathode and diode D2Anode, half-bridge submodule SM2Capacitor C of2Cathode and diode D4Diode D with anode connected in bidirectional switch52Anode and diode D54And a cathode.
Insulated gate bipolar transistor T in bidirectional switch5And diode D51、D53And D52、D54Parallel connection, T5Emitter and D53、D54Anode is connected to T5Collector and D51、D52Cathode connected, diode D51Anode and D53The cathode is connected to the voltage cathode output port of the MMC sub-module topology, and the diode D52Anode and D54Cathode connected to half-bridge submodule SM2T in (1)4Emitter and capacitor C2And a negative electrode.
The fault loop thyristor S6The anode is connected to the voltage negative output port of the MMC submodule and the fault loop thyristor S6Negative electrode is connected to half-bridge submodule SM2Capacitor C in2Positive electrode, SM2Diode D in3Cathode and voltage equalizing diode D7And an anode.
The voltage-sharing diode D7Anode connected to half-bridge submodule SM2T in (1)3Collector, fault circuit thyristor S6Cathode and SM2Capacitor C in2Anode, voltage-sharing diode D7Cathode connected to half-bridge submodule SM1D in (1)1Cathode and capacitor C1And (4) a positive electrode.
T that MMC submodule includes1~T5Five insulated gate bipolar transistors by controlling T1、T4And T5Is triggered so that C1Inputting a capacitor; by controlling T2、T3And T5Is triggered so that C2And the capacitor input meets the sub-module capacitor quantity required by the recent level approaching modulation strategy.
If the control of the insulated gate bipolar type is adoptedTransistor T1、T3And T5Is triggered to be conducted, the other insulated gate bipolar transistors are switched off, and the output level is Uc1+Uc2. If the current ismInjected from the voltage positive input port of the MMC sub-module, ism>0, the current flow path is: d1→C1→D3→C2→D52→T5→D53(ii) a If the current ismInjected from the voltage negative output port of the MMC sub-module, ism<At 0, the current flow path is: d51→T5→D54→C2→T3→C1→T1。
If the insulated gate bipolar transistor T is controlled1、T4And T5Is triggered to be conducted, the other insulated gate bipolar transistors are switched off, and the output level is Uc1. If ism>At 0, the current flow path is: d1→C1→T4→D52→T5→D53If i issm<At 0, the current flow path is: d51→T5→D54→D4→C1→T1(ii) a Controlling an insulated gate bipolar transistor T2、T3And T5Is triggered to be conducted, the other insulated gate bipolar transistors are switched off, and the output level is Uc2If i issm>At 0, the current flow path is: t is2→D3→C2→D52→T5→D53If i issm<At 0, the current flow path is: d51→T5→D54→C2→T3→D2。
If the insulated gate bipolar transistor T is controlled2、T4And T5The rest of the insulated gate bipolar transistors are turned off, and the output level is 0. If ism>At 0, the current flow path is: t is2→T4→D52→T5→D53If i issm<At 0, the current flow path is: d51→T5→D54→D4→D2。
If control the failed loop thyristor S6Is triggered to be conducted, the other insulated gate bipolar transistors are switched off, and the output level is-Uc1∥Uc2The current circulation path is as follows: s6→D7→C1→D2And S6→C2→D4→D2Two parallel circuits.
If short-circuit fault occurs on the direct current side, the insulated gate bipolar transistor T is locked1~T5Triggering and conducting the failed loop thyristor S6Half bridge submodule SM1Capacitor C in1And half-bridge sub-module SM2Capacitor C in2Charging a parallel access circuit, wherein the output level of a voltage anode input port in the MMC submodule topology is-Uc1∥Uc2Half bridge submodule SM during fault1C in1And half-bridge sub-module SM2C in2The parallel connection is realized, the voltage is kept unchanged, and the voltage-sharing characteristic is good; and a MMC neutron module capacitor is connected in parallel with a negative input to be charged to absorb the current energy of the fault loop, so that the fault current is eliminated.
When putting into half-bridge sub-module SM according to the nearest level approximation modulation strategy1Capacitor C in1And half-bridge sub-module SM2Capacitor C in2Or only half-bridge sub-modules SM2Capacitor C in2When, C2Capacitor voltage greater than C1Capacitor voltage (U)c2>Uc1) Voltage equalizing diode D7Forward conduction, capacitor Uc2To Uc1Charging to the capacitor C1And C2Voltage-equalizing diode D with equal voltage7And the balance of capacitance voltage in the MMC sub-module topology is kept by switching off.
Preferably, the IGBT T is in steady state operation1~T4Triggering the on-off according to the latest level approximation modulation strategy, and switching on and off the insulated gate bipolar transistor T in the bidirectional switch5Bidirectional path and fault loop thyristor S for keeping conduction to realize charging and discharging of submodule6Is off. Submodule transportOutput voltage usmThe relationship with the sub-module capacitance voltage is as follows:
usm=P1P5Uc1+P1P3P5Uc2
in the formula, P1、P3、P5Are respectively T1、T3、T5The trigger signals of the insulated gate bipolar transistor take values of 1 (conducting) and 0 (turning off), and the input and output characteristics and the control difficulty of the insulated gate bipolar transistor are similar to those of a half-bridge submodule in the aspect of output voltage of a submodule port.
In normal operation, the sub-module topology structure can realize different level outputs by controlling the on-off of the transistor, and specifically has the following four modes.
Mode 1: the output level of the submodule is two capacitor voltages, capacitor C1And C2Are all put into operation, the output voltage of the sub-module is Uc1+Uc2。
Mode 2: the output level of the sub-module is a capacitor voltage, and the capacitor C1Input, submodule output voltage is Uc1。
Mode 3: the output level of the sub-module is a capacitor voltage, and the capacitor C2Input, submodule output voltage is Uc2。
Mode 4: capacitance C in sub-module1、C2Bypassed and the sub-module output voltage is 0.
Preferably, the fault loop thyristor S is controlled6And voltage-sharing diode D7When the module is conducted, negative electromotive force is formed at the positive voltage input port of the MMC sub-module, which is helpful for clearing fault current due to the thyristor S of the fault loop6And voltage-sharing diode D7While the other IGBT is switched on, the other IGBT is locked, and the capacitor C1And C2And the capacitor is connected in parallel, so that the balance between capacitor voltages during a fault is ensured. Therefore, the MMC sub-module structure provided by the scheme can redistribute the loop to the fault current, realize the quick self-clearing of the fault current and the balance of the capacitance and the voltage in the sub-module, and can improve the internal electricity of the traditional half-bridge sub-moduleThe balance of the capacitance voltage is poor.
When the direct current side has a fault, all IGBTs enter a blocking mode, and a fault loop thyristor S6Triggering and conducting, and enabling the sub-module to work in the following working mode.
Mode 5: failed loop thyristor S6Conducting, insulated gate bipolar transistor T1~T5The current flows into the submodule from the negative electrode port and the capacitor C1、C2Is connected in inverse parallel at the port of the sub-module, and the output voltage of the sub-module is-Uc1∥Uc2。
The invention has the beneficial effects that: compared with the traditional half-bridge submodule, the self-cleaning fault self-balancing half-bridge submodule has the self-balancing fault self-cleaning capacity, and is suitable for the field of overhead flexible direct current transmission. The invention can realize the self-clearing of the direct current fault current and the voltage balance between the capacitors in the sub-modules.
Drawings
FIG. 1 is a block diagram of a sub-module topology of the present invention;
FIG. 2 is a block diagram of an MMC topology of the present converter;
FIG. 3 is a simulation structure diagram of a double-ended flexible DC system to which the present invention is applicable;
FIG. 4 is a schematic diagram of the current paths of 4 operating modes under normal operation of the sub-module topology of the present invention;
FIG. 5 is a schematic view of the current path of 1 operation mode under fault lockout of sub-module topology of the present invention;
FIG. 6 is a schematic diagram of a valve side current clearing simulation waveform when a short-circuit fault occurs at a DC outlet according to the present invention;
FIG. 7 is a schematic diagram showing the simulation of the equalizing effect of the capacitor voltage in the sub-module when the DC outlet has a short-circuit fault according to the present invention;
fig. 8 is a schematic diagram showing the simulation of the capacitor voltage balancing effect of the upper bridge arm submodule when the direct current outlet has a short-circuit fault.
Detailed Description
The invention is further described with reference to the following drawings and detailed description.
Example 1: as shown in fig. 1, a sub-module topology structure with dc fault clearing and self-voltage-balancing capabilities is characterized in that: including MMC (modular Multilevel converter) submodule piece, MMC submodule piece topology includes two ports of voltage positive input and voltage negative output and the submodule piece topological structure of being connected with two ports, MMC submodule piece topological structure still includes two half-bridge submodule piece SM that the structure is the same1And SM2A bidirectional switch, a fault-loop thyristor S6And a voltage-sharing diode D7Two half-bridge sub-modules SM1And SM2Connected in a cascade mode, the bidirectional switch is serially arranged in a half-bridge submodule SM2On the negative output loop, the fault loop thyristor S6Voltage cathode output port and half-bridge submodule SM of MMC submodule topology are established in series2Capacitor C in2Anode port of (2), voltage-sharing diode D7Is arranged in series at SM2Capacitor C in2Positive port and SM1Capacitor C in1Between the positive ports. SM1D of (A)1Anode and D2Cathode connected to positive input port of sub-module voltage, SM2D of (A)3Anode and D4The cathode is connected to the capacitor C1Negative electrode and D2Anode, bidirectional switch D51、D53Connected to the voltage negative output port of the submodule, D52、D54And sub-module SM2D of (A)4Anode and capacitor C2The negative electrodes are connected. Voltage-sharing diode D7Anode is connected to D3Cathode and capacitor C2The anode and the cathode are connected to D1Cathode and capacitor C1And (4) a positive electrode. Failed loop thyristor S6The anode is connected to the voltage negative output port of the submodule, and the cathode is connected to the voltage-sharing diode D7Anode and capacitor C2And (4) a positive electrode.
The half-bridge sub-module SM1Comprising an insulated gate bipolar transistor T1And T2Diode D1And D2A capacitor C1(ii) a Insulated gate bipolar transistor T1And diode D1Is inverse andcouplet, T1Emitter and D1Anode is connected to T1Collector and D1Cathode-connected, insulated gate bipolar transistor T2And diode D2Antiparallel, T2Emitter and D2Anode is connected to T2Collector and D2Cathode connected to capacitor C1The positive electrode and the negative electrode are respectively connected to T1Collector and D2Anode, insulated gate bipolar transistor T1Emitter and insulated gate bipolar transistor T2And the collector is connected to a voltage positive input port of the MMC sub-module topology.
The half-bridge sub-module SM2Comprising an insulated gate bipolar transistor T3And T4Diode D3And D4A capacitor C2(ii) a Insulated gate bipolar transistor T3And diode D3Antiparallel, T3Emitter and D3Anode is connected to T3Collector and D3Cathode-connected, insulated gate bipolar transistor T4And diode D4Antiparallel, T4Emitter and D4Anode is connected to T4Collector and D4Cathode connected to capacitor C2The positive electrode and the negative electrode are respectively connected to T3Collector and D4Anode, insulated gate bipolar transistor T3Emitter and insulated gate bipolar transistor T4Collector connected to half-bridge submodule SM1Capacitor C in1Cathode and diode D2Anode, half-bridge submodule SM2Capacitor C of2Cathode and diode D4Diode D with anode connected in bidirectional switch52Anode and diode D54And a cathode.
Insulated gate bipolar transistor T in bidirectional switch5And diode D51、D53And D52、D54Parallel connection, T5Emitter and D53、D54Anode is connected to T5Collector and D51、D52Cathode connected, diode D51Anode and D53The cathode is connected to the voltage cathode output port of the MMC sub-module topology, and the diode D52Anode and D54Cathode connected to half-bridge submodule SM2T in (1)4Emitter and capacitor C2And a negative electrode.
The fault loop thyristor S6The anode is connected to the voltage negative output port of the MMC submodule and the fault loop thyristor S6Negative electrode is connected to half-bridge submodule SM2Capacitor C in2Positive electrode, SM2Diode D in3Cathode and voltage equalizing diode D7And an anode.
The voltage-sharing diode D7Anode connected to half-bridge submodule SM2T in (1)3Collector, fault circuit thyristor S6Cathode and SM2Capacitor C in2Anode, voltage-sharing diode D7Cathode connected to half-bridge submodule SM1D in (1)1Cathode and capacitor C1And (4) a positive electrode.
As shown in fig. 2, fig. 2 is an overall topology structure of a submodule MMC inverter with dc fault clearing and self-voltage-equalizing capabilities, the topology includes an a, B, C three-phase loop composed of submodules of the present invention, each phase includes an upper bridge arm and a lower bridge arm, each bridge arm is composed of N submodules, which include 4N IGBTs, 5N diodes, N bidirectional switches, N thyristors, 2N capacitors, and an upper bridge arm inductor and a lower bridge arm inductor are serially connected between three phase units a, B, C. According to the rule that the upper output end of the 1 st submodule of the A-phase upper bridge arm is connected with the positive direct current bus, the lower output end of the 1 st submodule of the A-phase upper bridge arm is connected with the upper output end of the 2 nd submodule, and the lower output end of the 2 nd letter is connected with the upper output end of the 3 rd submodule, the upper output end of the ith submodule is connected with the lower output end of the (i-1) th submodule, and the lower output end of the (i + 1) th submodule is connected with the upper output end of the (i + 1) th submodule. The upper output end of the Nth sub-module of the upper bridge arm is connected with the lower output end of the (N-1) th sub-module, and the lower output end is connected with a bridge arm reactor L0The upper bridge arm reactor is connected with the lower bridge arm reactor in series, and an A-phase alternating current power supply is connected to the connection point of the upper bridge arm reactor and the lower bridge arm reactor. The upper output end of the 1 st sub-module of the A-phase lower bridge arm is connected with the lower bridge arm reactor, the lower output end is connected with the upper output end of the 2 nd sub-module of the lower bridge arm, and according to the rule, the upper output end of the I th sub-module of the lower bridge arm is connected with the upper output end of the reactor of the lower bridge armThe output end of the i-1 th sub-module of the lower bridge arm is connected with the upper output end of the i +1 th sub-module, the upper output end of the Nth sub-module is connected with the lower output end of the N-1 th sub-module, and the lower output end of the. B. The connection mode of the two phases C is the same as that of the phase A.
As shown in FIG. 4, during normal operation, the bidirectional switch remains on and the transistor T is turned on1And T2,T3And T4,T5And S6The switch states are opposite, and the capacitor C is controlled according to the modulation strategy1And C2Can output 2Uc,U c0 three levels, the specific mode is as follows:
mode 1: switch tube T1,T3,T5Conduction, T2,T4,S6And (3) turning off, enabling current to flow into the submodule from the voltage anode port, and enabling a current path to be as follows: d1→C1→D3→C2→D52→T5→D53(ii) a The current flows into the submodule from the voltage negative electrode port, and the current path is as follows: d51→T5→D54→C2→T3→C1→T1Capacitor C1And C2Input, submodule output voltage is Uc1+Uc2。
Mode 2: switch tube T1,T4,T5Conduction, T2,T3,S6And (3) turning off, enabling current to flow into the submodule from the voltage anode port, and enabling a current path to be as follows: d1→C1→T4→D52→T5→D53The current flows into the submodule from the voltage cathode port, and the current path is as follows: d51→T5→D54→D4→C1→T1Capacitor C1Input, submodule output voltage is Uc1。
Mode 3: switch tube T2,T3,T5Conduction, T1,T4,S6And (3) turning off, enabling current to flow into the submodule from the voltage anode port, and enabling a current path to be as follows: t is2→D3→C2→D52→T5→D53(ii) a The current flows into the submodule from the voltage negative electrode port, and the current path is as follows: d51→T5→D54→C2→T3→D2Capacitor C2Input, submodule output voltage is Uc2。
Mode 4: switch tube T2,T4,T5Conduction, T1,T3,S6And (3) turning off, enabling current to flow into the submodule from the voltage anode port, and enabling a current path to be as follows: t is2→T4→D52→T5→D53(ii) a The current flows into the submodule from the voltage negative electrode port, and the current path is as follows: d51→T5→D54→D4→D2Capacitor C1、C2Bypassed and the sub-module output voltage is 0.
As shown in fig. 5, in the event of a fault, the failed loop thyristor remains on, the bi-directional switch turns off, and the transistor T1~T5Off, capacitance C1And C2Negative level-U with anti-parallel access and balanced outputc1∥Uc2The concrete mode is as follows:
mode 5: switch tube S6Conduction, T1~T5And (3) turning off, wherein current can actually flow into the submodule from the negative electrode port, and the current S path is as follows: s6→D7→C1→D2And S6→C2→D4→D2Capacitor C1、C2Is connected in inverse parallel at the port of the sub-module, and the output voltage of the sub-module is-Uc1∥Uc2。
In summary, the operation modes of a sub-module topology with dc fault clearing and self-voltage-balancing capabilities can be divided into 4 normal input modes and a fault handling mode.
Table 1: switch on state and current flow path in each mode
As shown in fig. 6, when a short-circuit fault occurs at the outlet 2.5s on the dc side, the short-circuit fault current on the valve side can be cleared in a short time, and the loss of the commutation equipment is reduced.
As shown in fig. 7, when a short-circuit fault occurs at the dc side outlet 2.5s, two capacitor voltage simulation waveforms in the sub-module show that the capacitor voltage balance is better when the fault is not detected, and the capacitor voltage remains unchanged during the fault, thereby reducing the damage to the converter valve.
As shown in fig. 8, when a short-circuit fault occurs at the outlet 2.5s on the dc side, and the simulation waveform of the capacitor voltage of the upper bridge arm submodule, it can be seen that the capacitor voltage balance is better when the fault is not detected, and the capacitor voltage remains unchanged during the fault, thereby reducing the damage to the converter valve.
The solid bold lines in the figure indicate the flow of current.
In order to verify the capacity of clearing fault current and balancing capacitance and voltage in a submodule under the condition of direct current fault, a +/-100 kV double-end MMC-HVDC simulation model shown in figure 3 and built in an MATLAB/Simulink simulation platform simulates double-pole short circuit at the outlet of a direct current side, valve side alternating current and balancing of submodule and bridge arm capacitance and voltage as shown in figures 7 and 8.
While the present invention has been described in detail with reference to the embodiments shown in the drawings, the present invention is not limited to the embodiments, and various changes can be made without departing from the spirit and scope of the present invention.
Claims (6)
1. The utility model provides a submodule piece topological structure that possesses direct current fault clearance and from voltage-sharing ability which characterized in that: including the MMC submodule piece, MMC submodule piece topology includes two ports of voltage positive input and voltage negative output and the submodule piece topological structure of being connected with two ports, MMC submodule piece topological structure still includes two half-bridge submodule piece SM that the structure is the same1And SM2A bidirectional switch, a fault loopThyristor S6And a voltage-sharing diode D7Two half-bridge sub-modules SM1And SM2Connected in a cascade mode, the bidirectional switch is serially arranged in a half-bridge submodule SM2On the negative output loop, the fault loop thyristor S6Voltage cathode output port and half-bridge submodule SM of MMC submodule topology are established in series2Capacitor C in2Anode port of (2), voltage-sharing diode D7Is arranged in series at SM2Capacitor C in2Positive port and SM1Capacitor C in1Between the positive ports.
2. The submodule topology structure with dc fault clearing and self-voltage-equalizing capability according to claim 1, wherein: the half-bridge sub-module SM1Comprising an insulated gate bipolar transistor T1And T2Diode D1And D2A capacitor C1(ii) a Insulated gate bipolar transistor T1And diode D1Antiparallel, T1Emitter and D1Anode is connected to T1Collector and D1Cathode-connected, insulated gate bipolar transistor T2And diode D2Antiparallel, T2Emitter and D2Anode is connected to T2Collector and D2Cathode connected to capacitor C1The positive electrode and the negative electrode are respectively connected to T1Collector and D2Anode, insulated gate bipolar transistor T1Emitter and insulated gate bipolar transistor T2And the collector is connected to a voltage positive input port of the MMC sub-module topology.
3. The submodule topology structure with dc fault clearing and self-voltage-equalizing capability according to claim 1, wherein: the half-bridge sub-module SM2Comprising an insulated gate bipolar transistor T3And T4Diode D3And D4A capacitor C2(ii) a Insulated gate bipolar transistor T3And diode D3Antiparallel, T3Emitter and D3Anode is connected to T3Collector electrode andD3cathode-connected, insulated gate bipolar transistor T4And diode D4Antiparallel, T4Emitter and D4Anode is connected to T4Collector and D4Cathode connected to capacitor C2The positive electrode and the negative electrode are respectively connected to T3Collector and D4Anode, insulated gate bipolar transistor T3Emitter and insulated gate bipolar transistor T4Collector connected to half-bridge submodule SM1Capacitor C in1Cathode and diode D2Anode, half-bridge submodule SM2Capacitor C of2Cathode and diode D4Diode D with anode connected in bidirectional switch52Anode and diode D54And a cathode.
4. The submodule topology structure with dc fault clearing and self-voltage-equalizing capability according to claim 1, wherein: insulated gate bipolar transistor T in bidirectional switch5And diode D51、D53And D52、D54Parallel connection, T5Emitter and D53、D54Anode is connected to T5Collector and D51、D52Cathode connected, diode D51Anode and D53The cathode is connected to the voltage cathode output port of the MMC sub-module topology, and the diode D52Anode and D54Cathode connected to half-bridge submodule SM2T in (1)4Emitter and capacitor C2And a negative electrode.
5. The submodule topology structure with dc fault clearing and self-voltage-equalizing capability according to claim 1, wherein: the fault loop thyristor S6The anode is connected to the voltage negative output port of the MMC submodule and the fault loop thyristor S6Negative electrode is connected to half-bridge submodule SM2Capacitor C in2Positive electrode, SM2Diode D in3Cathode and voltage equalizing diode D7And an anode.
6. According to the claims1, the submodule topological structure with the direct current fault clearing and self-voltage-sharing capabilities is characterized in that: the voltage-sharing diode D7Anode connected to half-bridge submodule SM2T in (1)3Collector, fault circuit thyristor S6Cathode and SM2Capacitor C in2Anode, voltage-sharing diode D7Cathode connected to half-bridge submodule SM1D in (1)1Cathode and capacitor C1And (4) a positive electrode.
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