CN113223583B - Method for re-reading data in NAND FLASH bad blocks, electronic equipment and storage medium - Google Patents
Method for re-reading data in NAND FLASH bad blocks, electronic equipment and storage medium Download PDFInfo
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- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
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- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
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Abstract
The application relates to the technical field of data processing, in particular to a method for rereading data in NAND FLASH bad blocks, electronic equipment and a storage medium, wherein the method comprises the following steps: when detecting that bad blocks appear, adding the bad blocks into a bad block queue; when the real-time state of the main control chip is in an idle state, acquiring all re-reading threshold voltages, and sequentially re-reading bad blocks in a bad block queue by adopting the re-reading threshold voltages; and when the data in the bad block is successfully read or the real-time state of the main control chip is changed into a non-idle state, ending the re-reading of the current bad block. The application has the effect of reducing NAND FLASH bad block data damage loss.
Description
Technical Field
The present application relates to the field of data processing technologies, and in particular, to a method for rereading data in NAND FLASH bad blocks, an electronic device, and a storage medium.
Background
The basic memory cell of Flash is a floating gate transistor. With the development of NAND FLASH technology, SLC/MLC/TLC NADN FLASH appears, for Cell storage, MLC/TLC NAND FLASH cells can store more Bit data (SLC stores one Bit per Cell, MLC stores two bits per Cell, TLC stores three bits per Cell), the more bits stored in a Cell, the more the overall storage capacity is doubled, but at the same time, due to more states needed to be represented in the Cell, bit jump is more likely to occur under the influence of different environments.
NAND FLASH the read operation is to apply a read voltage to the Cell, and the different states of memory are indicated by different on-states of the threshold voltage, so that different states of data in the Cell are indicated, and the threshold voltage is shifted leftwards or rightwards as a whole due to the influence of the operating temperature environment.
In order to solve the problem that the error Bit number of read data is increased due to threshold voltage deviation, so that data cannot be corrected, a NAND factory generally provides READ RETRY parameters under tens of different use scenes to form a retry parameter set for adjusting threshold deviation to reread so as to ensure data correctness, but because NAND FLASH different batches have different quality and can have out-of-standard high and low temperature use scenes, the retry parameter set provided by the factory cannot completely meet the requirement of ensuring data correctness for the high and low temperature use scenes.
The existing use technology adds a small amount of special retry parameter groups for high and low temperature use scenes, and is used for enhancing the correct readability of NAND FLASH under various high and low temperature use scenes.
As the number of retry parameter sets increases, the number of READ RETRY increases, which causes the Read response time to become longer and the Read performance to become slower, because the Host end of the intelligent terminal platform has clear requirements on Read timeout time, the number of READ RETRY parameters to be increased is limited, the number of READ RETRY parameters is limited, the requirements on correct readability of data in various scenes of NAND FLASH cannot be met, and data blocks with retry failure are set as bad blocks, so that the data is damaged and lost, and the problem is to be solved.
Disclosure of Invention
In order to reduce the damage loss of NAND FLASH bad block data, the application provides a NAND FLASH bad block data rereading method, electronic equipment and storage medium.
In a first aspect, the method for rereading NAND FLASH bad blocks provided by the present application adopts the following technical scheme:
NAND FLASH method for re-reading data in bad blocks, comprising the following steps:
When detecting that bad blocks appear, adding the bad blocks into a bad block queue;
When the real-time state of the main control chip is in an idle state, acquiring all re-reading threshold voltages, and sequentially re-reading bad blocks in a bad block queue by adopting the re-reading threshold voltages;
and when the data in the bad block is successfully read or the real-time state of the main control chip is changed into a non-idle state, ending the re-reading of the current bad block.
By adopting the technical scheme, under the idle state, the bad blocks are subjected to READ RETRY by adopting all re-reading threshold voltages, the response time of normal use of Flash is not occupied, the damage and loss of data are reduced, and the reliability is improved.
Preferably, the step of adding the bad block to the bad block queue after detecting the occurrence of the bad block includes: when a flash memory block which can not read data normally is detected, READ RETRY is carried out on the flash memory block which can not read data based on a preset retry parameter set;
If the flash block READ RETRY fails, the flash block is marked as a bad block and the bad block is added to a bad block queue.
By adopting the technical scheme, after the unreadable flash memory block is detected, READ RETRY is carried out on the bad block based on the preset retry parameter set, if the bad block is failed, the bad block is added into the bad block queue, and the bad block which can be reread in the allowed response time is marked as unreadable, so that the reliability of data is improved, and the workload when reread is carried out in an idle state is reduced.
Preferably, all re-read threshold voltages are obtained by: and taking the experience value selected from the rereading threshold voltage as a center, shifting the experience value to the periphery, and traversing to obtain the rereading threshold voltage.
By adopting the technical scheme, the experience value is preset, and when the rereading threshold voltage is read in a traversing way, the experience value is taken as the initial rereading threshold voltage, so that the time for traversing to the correct rereading threshold voltage can be reduced, and the response time can be shortened.
Preferably, the empirical value is selected in the following manner: re-reading the flash memory block which cannot read data based on a preset retry parameter set, and recording a set of retry parameters with the minimum error data Bit after the flash memory block which cannot read data is subjected to READ RETRY based on the preset retry parameter set as an experience value.
By adopting the technical scheme, the parameter with the least error is obtained by traversing and rereading the parameters in the original retry parameter set, and the method has the effect of improving the accuracy of rereading threshold voltage acquisition.
Preferably, the obtaining the rereading threshold voltage by taking the empirical value selected from the rereading threshold voltages as a center and shifting the empirical value to the periphery includes: and traversing the initial rereading threshold voltage by taking the empirical value as the initial rereading threshold voltage in a manner of enumerating offset left and right in the rereading threshold voltage parameter set to obtain the rereading threshold voltage.
By adopting the technical scheme, the method of enumeration left and right is adopted, the rereading threshold voltage close to the experience value is gradually expanded outwards, the possibility of obtaining the correct rereading threshold voltage is high, and the time can be effectively shortened.
Preferably, if the data reading is successful when the current bad block is reread, the acquired data is moved to other good flash memory blocks, and the current bad block is removed from the bad block queue.
By adopting the technical scheme, the data in the bad block is moved after the bad block is successfully read, so that the data can be correctly taken out when the data is read next time, and the reliability is improved.
In a second aspect, the present application provides an electronic device, which adopts the following technical scheme:
an electronic device comprising a memory and a processor, the memory having stored thereon a computer program capable of being loaded by the processor and performing a method as in any of the preceding.
In a third aspect, the present application provides a computer readable storage medium, which adopts the following technical scheme:
a computer readable storage medium storing a computer program capable of being loaded by a processor and executing a method as any one of the preceding.
Drawings
FIG. 1 is a block flow diagram of a method for re-reading data within NAND FLASH bad blocks disclosed in one embodiment of the present application;
FIG. 2 is an image as a function of temperature;
FIG. 3 is a graph following temperature variation;
FIG. 4 is a flow chart of a method for re-reading NAND FLASH bad blocks disclosed in another embodiment of the present application;
FIG. 5 is a threshold voltage distribution diagram of MLC-LP Retry;
fig. 6 is a threshold voltage distribution diagram of MLC-UP Retry.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings 1 to 6 and examples. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.
The embodiment of the application discloses a method for re-reading data in NAND FLASH bad blocks, NAND FLASH is used for obtaining the data state in a Cell according to the conduction conditions of different threshold voltages by adding read voltage to the Cell when the read operation is carried out. In the case of different operating temperatures, the threshold voltage of the Cell shifts, and errors in the read data increase.
Referring to fig. 1, the method of re-reading data in a bad block includes the steps of:
S1: and when the occurrence of the bad block is detected, adding the bad block into a bad block queue.
S2: when the real-time state of the main control chip is in an idle state, acquiring all re-reading threshold voltages, and sequentially re-reading bad blocks in a bad block queue by adopting the re-reading threshold voltages.
S3: and when the data in the bad block is successfully read or the real-time state of the main control chip is changed into a non-idle state, ending the re-reading of the current bad block.
The set and read rereading threshold voltages are based on the principle described below, and referring to fig. 2, at normal temperature (t=27°), the threshold voltages are relatively large READ MARGINS.
At high temperature (t=90°), the Cell threshold distribution is shifted left overall (voltage becomes low), and at the same threshold voltage READ MARGINS becomes small, the threshold voltage at high temperature shifts, resulting in an increase in the probability of data errors.
At low temperature (T-40 °), the Cell threshold distribution is biased to the right (the voltage becomes high) as a whole, and READ MARGINS of the same threshold voltage becomes smaller, so that the probability of data error increases.
In order to solve the problem that the data errors are increased due to the fact that READ MARGINS is smaller due to the rereading threshold voltage distribution deviation at high and low temperatures, READ MARGINS is increased by adjusting the rereading threshold voltage at different temperatures, so that the data errors are less, and error correction can be performed.
Referring to fig. 3, the read rereading threshold voltage needs to be shifted to the left at high temperature and to the right at low temperature, and sample analysis is performed on NAND FLASH to increase the sets of dedicated READ RETRY parameter sets when the rereading threshold voltage is set.
The detection of the occurrence of bad blocks includes, but is not limited to, the following: 1. when the data is read and written normally, the data is read, and if the fact that the data cannot be read normally is detected, the flash memory block can be marked as a bad block; 2. when testing the reliability of NAND FLASH, quickly reading and writing data to the flash memory block, and if the data of the flash memory block cannot be read normally, marking the flash memory block as a bad block; 3. and marking the flash memory block as a bad block according to the detection result when the factory is detected at NAND FLASH. The term "unable to read normally" as used herein means that the flash memory block generates an error code or the error rate exceeds the ECC check range when reading data.
If a bad block is detected when NAND FLASH reads data, the bad block is added to the bad block queue. When NAND FLASH is in the idle state, all the re-reading threshold voltages are adopted, and the re-reading threshold voltages are adopted to sequentially re-read bad pages in the bad blocks. The bad blocks are added into a bad block queue in advance, the bad blocks are read by traversing the re-reading threshold voltage after waiting for the idle state, so that the data in the bad blocks are read, the response time of NAND FLASH in the non-idle state is shortened, and the damage and the loss of the data can be reduced.
And when the real-time state of the main control chip NAND FLASH is converted into a non-idle state or the data in the bad block is successfully reread, the reread of the current bad block is ended. If the real-time state of the main control chip of NAND FLASH is changed into a non-idle state, ending the rereading of the current bad block, and if the real-time state of the main control chip is changed into an idle state, continuing to reread the current bad block; if the data in the bad block is read again successfully, the bad block is deleted from the bad block queue, and the next bad block is read again continuously.
Referring to fig. 4, alternatively, as another embodiment, step S1 includes the sub-steps of:
S11: and when detecting that the flash memory block which can not read the data normally exists, carrying out READ RETRY on the bad block of the flash memory block which can not read the data based on the preset retry parameter group.
S12: if the flash block READ RETRY fails, the flash block is marked as a bad block and the bad block is added to a bad block queue.
In practical use, when data is read, a flash memory block which cannot be read normally is detected, and a preset retry parameter set for READ RETRY is used for rereading, wherein the number of parameters of the retry parameter set is smaller than that of parameters of a preset rereading threshold voltage parameter set. If the data in the flash memory blocks which cannot be read normally at the threshold voltage in the retry parameter set are the data, marking the flash memory blocks as bad blocks, adding the bad blocks into a bad block queue, and reducing the addition of the flash memory blocks which can be read again by the retry parameter set into the bad block queue, so that the readable data are misjudged as nonreactive; but in other embodiments the response time may be reduced by detecting a bad block, i.e., adding the bad block to the bad block queue.
Alternatively, as another embodiment, all re-read threshold voltages are obtained by:
and taking the experience value selected from the rereading threshold voltage as a center, shifting the experience value to the periphery, and traversing to obtain the rereading threshold voltage.
Specifically, the empirical value may be an optimal threshold voltage at the current operating temperature, but may also be other set values or values obtained through simple operation, and by setting the empirical value, when traversing the rereading threshold voltage, the possibility of obtaining the correct rereading threshold voltage is increased, and the traversing time is shortened.
The rereading threshold voltage is obtained in a traversing mode, so that the problem that the threshold voltage which cannot be covered by the retry parameter with fixed group number is offset can be solved, and the data which cannot be corrected originally can be corrected correctly.
Alternatively, as another embodiment, the empirical value is selected by: re-reading the flash memory block which cannot read data based on a preset retry parameter set, and recording a set of retry parameters with the minimum error data Bit after the flash memory block which cannot read data is subjected to READ RETRY based on the preset retry parameter set as an experience value.
When the real-time state of the main control chip is in an idle state, acquiring bad blocks in a bad block queue for traversing and reading, firstly, reading the cells in the bad blocks all at one time based on parameters in a preset retry parameter group, recording a group of retry parameters with the least error data Bit as experience values, and traversing the experience values from the traverse center to the periphery, so that the time of the bad blocks retry can be effectively shortened.
Alternatively, the time point of empirical value acquisition may be: 1. when data is read and written, detecting that a flash memory block cannot read the data normally, carrying out READ RETRY on the flash memory block based on a preset retry parameter set, and if the flash memory block cannot be read normally, recording an experience value while marking the flash memory block which cannot read the data normally as a bad block based on the parameter with the minimum error bit number in the retry parameter set in the reading as the experience value; 2. and under the condition that the main control chip is in an idle state, firstly re-reading the bad block based on the threshold voltage in the retry parameter set, and taking the parameter with the minimum error bit number in the retry parameter set in the reading as an empirical value.
Alternatively, as another embodiment, taking the empirical value selected from the rereading threshold voltages as a center, shifting the empirical value around to obtain the rereading threshold voltages includes: and traversing the initial rereading threshold voltage by taking the empirical value as the initial rereading threshold voltage in a manner of enumerating offset left and right in the rereading threshold voltage parameter set to obtain the rereading threshold voltage.
The initial re-read threshold voltage is the first threshold voltage to begin re-reading bad blocks in the idle state.
In specific implementation, MLC particles are taken as an example: one MLC WL consists of two pages LP and UP, R1, R2 and R3 represent three different read voltage register values (namely threshold voltages) of one Cell of MLC Flash, wherein the LP read voltage threshold offset is related to R2, the UP read voltage threshold offset is related to R1 and R3, and each threshold voltage adjustable range is [ -128,127].
Referring to fig. 5, for MLC LP, if the optimal threshold voltage offset R2 is-52 (data cannot be corrected, but the number of erroneous bits is the smallest under all R2 threshold voltage values), then, about this point, traversing 40 voltages to the left and right respectively, in such a way that R2-1, r2+1, R2-2, r2+ … R2-20, r2+20 are first traversed alternately, until RETRY PASS, data movement and rewriting are immediately enabled, ensuring that the data can be read correctly and correctly afterwards.
Referring to fig. 6, for MLC UP, assuming that the optimal threshold offset is (R1, R3) = (-23, -16), R1, R3 are respectively combined by ±20 based on the optimal threshold offset point, and full-combination alternate traversal is performed on (R1 [ -43, -3], R3[ -36,4 ]), traversing is performed until RETRY PASS, immediately enabling data movement and overwriting, and ensuring that data can be correctly read in the following steps.
Referring to fig. 4, optionally, as another embodiment, the method further includes the steps of:
S4: if the data reading is successful when the current bad block is reread, the acquired data is moved to other good flash memory blocks, and the current bad block is removed from the bad block queue.
When the current bad block is re-read, the data in the bad block is moved to other good flash memory blocks after the re-read is successful, so that the re-read data is prevented from being lost secondarily, the bad block is deleted by a storage queue, the reliability of NAND FLASH is improved, and the situation that the data in the bad block cannot be read again is reduced.
If the data cannot be read after traversing all the re-read threshold voltages, marking the bad block as non-error-correctable, and performing enumeration traversal error correction processing on the bad block later.
The embodiment also discloses an electronic device comprising a memory and a processor, the memory storing a computer program that can be loaded by the processor and that performs the method as described above.
The present embodiment also discloses a computer-readable storage medium storing a computer program capable of being loaded by a processor and executing the method as described above.
The above embodiments are not intended to limit the scope of the present application, so: all equivalent changes according to the method and principle of the present application should be covered by the protection scope of the present application.
Claims (4)
1. A method for re-reading data in a NAND FLASH bad block, comprising the steps of:
When detecting that bad blocks appear, adding the bad blocks into a bad block queue;
When the real-time state of the main control chip is in an idle state, acquiring all re-reading threshold voltages, and sequentially re-reading bad blocks in a bad block queue by adopting the re-reading threshold voltages;
when the data in the bad block is successfully read or the real-time state of the main control chip is changed into a non-idle state, ending the re-reading of the current bad block;
the step adds the bad blocks to a bad block queue after detecting the bad blocks, comprising:
when a flash memory block which can not read data normally is detected, READ RETRY is carried out on the flash memory block which can not read data based on a preset retry parameter set;
if the flash block READ RETRY fails, marking the flash block as a bad block, and adding the bad block into a bad block queue;
All re-read threshold voltages are obtained by:
Taking the experience value selected from the rereading threshold voltage as a center, shifting the experience value to the periphery for traversing to obtain the rereading threshold voltage;
The empirical values are selected in the following ways: re-reading a flash memory block which cannot read data based on a preset retry parameter set, and recording a set of retry parameters with minimum error data Bit after the flash memory block which cannot read data is subjected to READ RETRY based on the preset retry parameter set as an experience value;
The step of obtaining the re-reading threshold voltage by taking the experience value selected from the re-reading threshold voltage as a center and shifting the experience value to the periphery of the experience value comprises the following steps: taking the experience value as an initial re-reading threshold voltage, and traversing in a manner of enumerating offset left and right in a re-reading threshold voltage parameter set to obtain the re-reading threshold voltage;
the initial re-reading threshold voltage is that the first threshold voltage of the bad block starts to be re-read in an idle state;
taking MLC particles as an example: an MLC WL is composed of two pages of LP and UP, R1, R2 and R3 represent three different read voltage register values of one Cell of MLC Flash, LP read voltage threshold shift is related to R2, UP read voltage threshold shift is related to R1 and R3, and each threshold voltage adjustable range is [ -128,127];
for MLC LP, if the optimal threshold voltage offset R2 is-52, traversing left and right for-72 to-32 for 40 voltages respectively with the point as the center, wherein the traversing mode is that R2-1, R2+1, R2-2, R2+2 … R2-20 and R2+20 are alternately traversed and retried until RETRY PASS is reached, and data moving and rewriting are immediately started to ensure that the data is correctly read;
For MLC UP, assuming that the optimal threshold deviation is (R1, R3) = (-23, -16), based on the optimal threshold deviation point, respectively combining R1 and R3 by + -20, performing full-combination alternate traversal on (R1 < -43 > -3 >, R3 < -36,4 >) until RETRY PASS, immediately starting data movement and rewriting, and ensuring that the data can be correctly read afterwards.
2. The method of re-reading NAND FLASH intra-bad block data of claim 1, further comprising the steps of:
If the data reading is successful when the current bad block is reread, the acquired data is moved to other good flash memory blocks, and the current bad block is removed from the bad block queue.
3. An electronic device comprising a memory and a processor, the memory having stored thereon a computer program capable of being loaded by the processor and performing the method according to any of claims 1 to 2.
4. A computer readable storage medium, characterized in that a computer program is stored which can be loaded by a processor and which performs the method according to any of claims 1 to 2.
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| CN113672178B (en) * | 2021-10-25 | 2022-03-18 | 珠海妙存科技有限公司 | nand flash rereading positioning method |
| CN114296645B (en) * | 2021-12-17 | 2024-01-02 | 合肥大唐存储科技有限公司 | Rereading method in Nand flash memory and solid state disk |
| CN117789808B (en) * | 2024-02-26 | 2024-05-24 | 合肥康芯威存储技术有限公司 | Memory and bad block error correction method thereof |
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