CN113205785A - Frame display signal synchronization method, display device, electronic apparatus, and storage medium - Google Patents
Frame display signal synchronization method, display device, electronic apparatus, and storage medium Download PDFInfo
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- CN113205785A CN113205785A CN202110473848.6A CN202110473848A CN113205785A CN 113205785 A CN113205785 A CN 113205785A CN 202110473848 A CN202110473848 A CN 202110473848A CN 113205785 A CN113205785 A CN 113205785A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The invention relates to a frame display signal synchronization method, a display device, an electronic device and a storage medium, which are used for enabling a plurality of cascaded display driving chips to drive a display panel to form a picture by at least one sub-picture, wherein the frame display signal synchronization method comprises the following steps: transmitting the display data of the at least one sub-picture from a first display driving chip in the display driving chips to the back in a cascade mode, wherein a serial number is added to the display data of each sub-picture, the display driving chips are matched with the at least one serial number, and the display data of one sub-picture is read by the at least one corresponding display driving chip and the serial number matched with the display driving chip; and delaying the corresponding time by the at least one corresponding display driving chip and the matched number thereof, so that the at least one corresponding display driving chip synchronously drives the display panel to synchronously display the at least one sub-picture.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a frame display signal synchronization method applied to a display device including a plurality of display driver chips, a display device, an electronic device, and a storage medium.
Background
Light-emitting diodes (LEDs) have many advantages such as small size, Light weight, long service life, and high Light-emitting efficiency, and are widely used in lighting devices and display devices. The LED display device is a self-luminous flat display device, which has the advantages of bright color, wide dynamic range, high brightness, long service life, high reliability, etc., and the current large-sized screen LED display device has been widely used in large squares, commercial advertisements, stadiums, information dissemination, news distribution, and stock trading places, as a public display medium.
Fig. 1 shows an architecture diagram of a known large-size screen LED display device. As shown in fig. 1, a known LED display device 1a includes: an LED display panel 11a, a row driving unit 12a, a column driving unit 13a, and a display control unit 14a, wherein the display control unit 14a is used for controlling the row driving unit 12a and the column driving unit 13 a. As the design and manufacture of a conventional LED display is familiar to electronic engineers, the row driving unit 13a usually includes a plurality of display driving chips (i.e., row driving chips) 131a, and since each display driving chip 131a has a fixed number of driving channels, the panel area that each display driving chip 131 can drive is limited.
When the large-screen LED display device 1a is used to display images, the display control unit 14a controls all the display driving chips 131a to simultaneously illuminate the entire display area of the LED display panel 11a or only controls a part of the display driving chips 131a to illuminate at least one display area of the LED display panel 11a according to different image display requirements. Therefore, in order to meet different display driving requirements, as shown in fig. 1, in the prior art, a plurality of display driving chips 131a are first cascaded, and each display driving chip 131a is sequentially numbered and each display driving chip 131a is controlled to perform display driving work by packing a number data and a display data into a display data signal.
As shown in fig. 1, the display control unit 14a transmits a display data signal SDI (1) and a clock signal CLK to the display driving chips 131a with the number (1) by using the two-wire transmission protocol, wherein the display data signal SDI (1) contains the number data and the display data belonging to each display driving chip 131 a. After receiving the display data signal SDI (1), the display driving chip 131a with the number (1) identifies the number of the display data signal SDI (1), receives the display data of the display chip, stores the display data in an internal shift register, and configures driving parameters, such as a PWM signal, according to the current display data stored in the display data register.
Then, the display driving chip 131a with the number (1) renumbers the display data signal SDI (1) (for example, adds 1 to the original number) to generate a new display data signal SDI (2), and then sends the new display data signal SDI (2) and the clock signal CLK to the display driving chip 131a with the number (2). Subsequently, the display driving chip 131a with the number (2) also performs number identification on the new display data signal SDI (2), and then receives display data belonging to itself, thereby completing display data storage and driving parameter configuration. And so on until each display driver chip 131a receives its own display data and completes the configuration of the driving parameters.
Fig. 2 is a timing diagram illustrating operation of a plurality of frame display signals corresponding to a plurality of display driving chips included in the LED display device shown in fig. 1. Note that after the driving parameter configuration is completed, the display driving chip 131a of number (1) generates a frame of display signals. Similarly, the display driving chip 131a of number (2) also generates a frame of display signals after completing the driving parameter configuration. Therefore, as shown in fig. 2, there is a delay time T between the pulse edge (rising edge or falling edge) of the start bit of the frame display signal generated by the display driver chip 131a numbered (1) and the pulse edge of the start bit of the frame display signal generated by the display driver chip 131a numbered (2). By analogy, there are (N-1) × T delay times between the pulse edge (rising edge or falling edge) of the start bit of the frame display signal generated by the display driver chip 131a numbered (1) and the pulse edge of the start bit of the frame display signal generated by the display driver chip 131a numbered (N).
In summary, the conventional technology utilizes the combination of the serial number data of the display driver chips 131a and the display data in a display data signal SDI to control the display driving of the LED display panel 11a by each display driver chip 131a, so as to meet the display requirements of various scenes. However, such a method may cause the frame display signals generated by the display driving chips 131a to be unsynchronized. Therefore, there is a need in the art for a new method for synchronizing frame display signals.
Disclosure of Invention
The present invention is directed to a frame display signal synchronization method, which is applied to a display device including a display panel and L display driver chips cascaded with each other, so that N display driver chips can synchronously generate N frame display signals when N of the L display driver chips are selected to perform display driving of the display panel.
To achieve the above object, an embodiment of the frame display signal synchronization method provided by the present invention is implemented by a display control unit and L display driver chips for driving a display panel, where L is a positive integer, a first one of the display driver chips is coupled to the display control unit, and the L display driver chips are cascaded with each other; the frame display signal synchronization method includes the steps of:
under the condition that N display driving chips are selected to execute the display driving of the display panel, the display driving chips receive display data signals transmitted from the display control unit or a previous stage display driving chip cascaded with the display control unit;
wherein N is a positive integer and is not more than L;
the display driving chip carries out number identification on the display data signals and then receives display data belonging to the display driving chip from the display data signals;
the display driving chip carries out renumbering processing on the display data signals to generate new display data signals, and then transmits the new display data signals to a next-stage display driving chip which is cascaded with the new display data signals;
after receiving the display data, each display driving chip waits for (N-k) delay times to generate a frame of display signals;
wherein k is the sequential number of each display driving chip, is a positive integer and is more than or equal to 1.
In a possible embodiment, the frame display signal synchronization method of the present invention further includes the following steps: when L is 1 and N is 1, the display driving chip receives the display data and then generates a frame of display signals; the renumbering process represents adding 1 to the sequence number to generate a new sequence number corresponding to the next-stage display driving chip.
To achieve the above object, the present invention further provides a frame display signal synchronization method for driving a display panel by a plurality of cascaded display driver chips to display a frame composed of at least one sub-frame, comprising the steps of:
transmitting the display data of the at least one sub-picture from a first display driving chip in display driving chips to the back in a cascading manner, wherein a serial number is attached to the display data of each sub-picture, at least one serial number in the display driving chips is matched with at least one corresponding display driving chip, and the display data of the sub-picture is read by the driving chip and the matched serial number; and the at least one corresponding display driving chip delays the corresponding time with the corresponding serial number so that the at least one corresponding display driving chip synchronously drives the display panel to synchronously display the at least one sub-picture.
The invention also provides a display device, which comprises a display panel, a row of driving units and a display control unit, wherein the row of driving units comprises L display driving chips, the first display driving chip is coupled with the display control unit, and the L display driving chips are mutually cascaded; the frame display signal synchronization method is realized by the display control unit and the L display driving chips, and comprises the following steps:
under the condition that N display driving chips are selected to execute the display driving of the display panel, the display driving chips receive display data signals transmitted from the display control unit or a previous stage display driving chip cascaded with the display control unit;
wherein N is a positive integer and is not more than L;
the display driving chip carries out number identification on the display data signals and then receives display data contained in the display data signals;
the display driving chip carries out numbering processing on the display data signals again to generate new display data signals, and then the new display data signals are transmitted to a next-stage display driving chip which is cascaded with the new display data signals;
after receiving the display data, each display driving chip waits for (N-k) delay times to generate a frame of display signals;
and k is the sequence number of the selected display driving chip, is a positive integer and is more than or equal to 1.
In an embodiment of the display device of the present invention, the frame display signal synchronization method further includes the following steps: in the case where L is 1 and N is 1, the display driving chip generates a frame of display signals after receiving the display data.
In a possible embodiment, the renumbering process is to add 1 to the sequence number to generate a new sequence number corresponding to the next-stage display driving chip.
In one possible embodiment, the display panel may be a flat display panel selected from the group consisting of a liquid crystal display panel, a light emitting diode display panel, a quantum dot light emitting diode display panel, a micro light emitting diode display panel, a sub-millimeter light emitting diode display panel, an organic light emitting diode display device, and a Perovskite-based LED (PVSK LED) display panel.
In one embodiment, the display panel has X × Y sub-pixels, the display driving chip has Y/L driving channels, and X and Y are positive integers.
To achieve the above object, the present invention further provides a display device, which has a display panel and a plurality of cascaded display driver chips for driving the display panel, wherein the plurality of cascaded display driver chips are used for executing a frame display signal synchronization method to drive the display panel to display a frame composed of at least one sub-frame, and the method includes the following steps:
transmitting the display data of the at least one sub-picture from a first display driving chip in the display driving chips to the back in a cascading manner, wherein a serial number is attached to the display data of each sub-picture, at least one serial number in the display driving chips is matched with at least one corresponding display driving chip, and the display data of the sub-picture is read by the driving chip and the matched serial number; and the at least one corresponding display driving chip delays the corresponding time with the corresponding serial number so that the at least one corresponding display driving chip synchronously drives the display panel to synchronously display the at least one sub-picture.
The invention also provides an electronic device comprising the display device of the invention.
The invention also provides a computer-readable storage medium containing the electronic device of the invention as described above. In a possible embodiment, the computer-readable storage medium is an electronic device selected from the group consisting of a video wall, a smart tv, a smart phone, a tablet computer, a laptop computer, a all-in-one computer, a desktop computer, and an industrial computer.
The above completely and clearly illustrates a frame display signal synchronization method, a display device, an electronic device and a storage medium according to the present invention, and the following advantages can be provided by the present invention:
1. the invention discloses a frame display signal synchronization method, which is applied to a display device comprising a display panel and L display driving chips which are mutually cascaded, so that N display driving chips can synchronously generate N frame display signals under the condition that N of the L display driving chips are selected to execute the display driving of the display panel. According to the design of the invention, under the condition that N is more than or equal to 2, after each display driving chip receives the display data belonging to the display driving chip, a frame of display signals are generated after (N-k) delay time; wherein k is the sequential number of each display driving chip, is a positive integer and is more than or equal to 1.
2. The invention also provides a display device, which comprises a display panel, a row of driving units and a display control unit, wherein the row of driving units comprises L display driving chips; the frame display signal synchronization method is characterized in that the display control unit and the L display driving chips realize the frame display signal synchronization method.
3. The invention also provides an electronic device comprising the display device. A computer-readable storage medium includes the electronic device of the present invention, wherein the computer-readable storage medium is an electronic device in a group consisting of a video wall, a smart tv, a smart phone, a tablet computer, a notebook computer, an all-in-one computer, a desktop computer, and an industrial computer.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate exemplary embodiments, features, and aspects of the invention and, together with the description, serve to explain the principles of the invention.
FIG. 1 is a schematic diagram of a known large-screen LED display device;
FIG. 2 is a timing diagram illustrating a plurality of frame display signals corresponding to a plurality of display driver chips included in the LED display apparatus of FIG. 1;
fig. 3 is an architecture diagram of a display device to which the frame display signal synchronization method according to the present invention is applied;
FIG. 4 is a flow chart of a frame display signal synchronization method according to the present invention;
fig. 5 is a block diagram of L display driver chips and a display panel to which the frame display signal synchronization method of the present invention is applied.
Description of the figures
1 a: an LED display device; 11 a: an LED display panel; 12 a: a column driving unit; 13a row driving unit; 131 a: a display driving chip; 14 a: a display control unit;
1: a display device; 11: a display panel; 12: a column driving unit; 13: a row driving unit; 131: a display driving chip; 14: a display control unit;
Detailed Description
Various exemplary embodiments, features and aspects of the present invention will be described in detail below with reference to the accompanying drawings. In the drawings, like reference numbers can indicate functionally identical or similar elements. While the various aspects of the embodiments are presented in drawings, the drawings are not necessarily drawn to scale unless specifically indicated. Furthermore, in the following detailed description, numerous specific details are set forth in order to provide a better understanding of the present invention. It will be understood by those skilled in the art that the present invention may be practiced without some of these specific details. In some instances, methods, procedures, components, and circuits that are well known to those skilled in the art have not been described in detail so as not to obscure the present invention.
The invention mainly provides a frame display signal synchronization method, which is applied to a display device comprising a display panel, a display controller and L display driving chips which are mutually cascaded, wherein the display controller can adopt a two-wire transmission protocol (SDI + CLK) to control N (N is less than or equal to L) of the L display chips to synchronously generate N frame display signals, so that the whole display area of the display panel is lightened simultaneously or at least one display area of the display panel is lightened simultaneously according to different image display requirements, and the display device provides high-quality image display.
Fig. 3 is an architecture diagram of a display device to which the frame display signal synchronization method according to the present invention is applied. As shown in fig. 3, the apparatus 1 includes: a display panel 11, a row driving unit 12, a column driving unit 13, and a display control unit 14, wherein the display panel comprises X × Y sub-pixels, the column driving unit 13 comprises L display driving chips 131, and the X, Y, L are positive integers. In more detail, each of the row driving chips 131 has J driving channels, and J is Y/L.
Fig. 4 shows a flow chart of the frame display signal synchronization method according to the present invention. In the case of applying the frame display signal synchronization method, each of the display driver chips 131 in fig. 3 performs the following operations:
s1: in the case that N display driver chips 131 are selected to perform the display driving of the display panel 11, the display driver chips 131 receive the display data signal transmitted from the display control unit 14 or the previous display driver chip 131 cascaded thereto;
s2: the display driving chip 131 performs number identification on the display data signal, and then receives one of the display data signals; wherein N is an integer and is not more than L;
s3: the display driving chip 131 performs renumbering processing on the display data signals to generate new display data signals, and then transmits the new display data signals to the next-stage display driving chip 131 cascaded with the new display data signals;
s4: after each display driving chip 131 finishes receiving the display data, waiting for (N-k) delay times and generating a frame of display signals; wherein k is the serial number of each display driving chip 131, and k is a positive integer and k is greater than or equal to 1.
In brief, L display driver chips 131 shown in fig. 3 basically perform four operations of (a) number identification, (B) data reception, (C) renumbering processing, and (D) display driving. In steps S1 and S2, each of the display driver chips 131 performs the operations of number recognition and data reception. In step S3, each display driver chip 131 performs renumbering processing on the display data signal to generate a new display data signal, and then transmits the new display data signal to the next display driver chip 131 cascaded thereto.
For example, according to the image display requirement, all the display areas of the display panel 11 are simultaneously lit up, and the display control unit 14 selects N or L display driving chips 131 to perform the display driving operation of the display panel 11. In this case, after receiving the display data signal SDI (1) transmitted from the display control unit 14, the first display driving chip 131 identifies the serial number of the display data signal SDI (1), receives the display data of the first display driving chip, stores the display data in an internal shift register, and configures driving parameters, such as a PWM signal, according to the current display data stored in the display data register. It is understood that in this application case, the order of the mth display driving chip 131 is numbered 1 (i.e., k is 1).
Thereafter, the display driving chip 131 of the first one (i.e., number 1) renumbers the display data signal SDI (1) to generate a new display data signal SDI (2), and then sends the new display data signal SDI (2) and the clock signal CLK to the display driving chip 131 of number (2). For example, if the sequence number of the first display driver chip 131 is 1, the renumbering process performed by the second display driver chip 131 is to add 1 to the sequence number. It is understood that after the second display driving chip 131 identifies the number of the new display data signal SDI (2), its sequential number is identified (i.e., k is 2). Next, the first display driving chip 131 (i.e., number 2) receives the display data from the new display data signal SDI (2), and then completes the configuration of the display data and the driving parameters. And so on, until each display driver chip 131 receives its own display data and completes the configuration of the driving parameters.
When step S4 is executed (i.e., executing display driving), each display driver chip 131 waits (N-k) delay times to generate a frame of display signal after receiving the display data, where k is the sequential number of each display driver chip, is a positive integer, and k is greater than or equal to 1. For example, if the display driving unit 13 only includes two display driving chips 131 (i.e., N is 2) that are cascaded with each other, in order to simultaneously light up all display areas of the display panel 11, the first display driving chip 131 and the second display driving chip 131 are assigned sequence numbers 1 and 2, respectively. Further, after completing the driving parameter configuration according to the current display data stored in the display data register, the display driving chip 131 of number 1 waits for 1 delay time of N-k-2-1 to generate a frame of display signals. After the completion of the driving parameter configuration, the display driving chip 131 of number 2 waits for 0 delay time from N-k to 2-2 to generate a frame of display signals. That is, the display driver chip 131 of number 2 immediately pulls up the frame display signal after completing the driving parameter configuration.
In another exemplary embodiment, assuming that the display driving unit 13 includes three display driving chips 131 (i.e., L ═ 3) cascaded with each other, in order to simultaneously light up all the display areas of the display panel 11, the first to third display driving chips 131 are assigned sequential numbers 1, 2, and 3, respectively. The display driver chip 131 with the number 1 completes the configuration of the driving parameters according to the current display data stored in the display data register, and then waits for 2 delay times, i.e., 3-1-N, to generate a frame of display signals; and the display driving chip 131 numbered 2 generates a frame of display signals after waiting for N-k 3-2 1 delay times; the display driver chip 131 of the number 3 generates a frame of display signals after waiting for N-k 3-3 0 delay times. That is, the display driver chip 131 of number 3 immediately pulls up the frame display signal after completing the driving parameter configuration.
In another exemplary embodiment, assuming that the driving unit 13 only includes one display driving chip 131 (i.e., L ═ 1), in order to simultaneously light up all the display regions of the display panel 11, the sequence number of the display driving chip 131 is naturally 1. Then, the display driver chip 131 numbered 1 completes the driving data configuration according to the current display data stored in the display data register, and then waits for N-k-1-0 delay times to generate a frame of display signals.
Therefore, in the case of applying the frame display signal synchronization method according to the present invention, the display control unit 14 can use a two-wire transmission protocol (SDI + CLK) to control the L display driving chips 131 to synchronously generate L frame display signals, so as to light up the entire display area of the display panel 11 according to different image display requirements, thereby enabling the display device 1 to provide high-quality image display.
Fig. 5 is a block diagram of L display driver chips 131 and a display panel to which the frame display signal synchronization method of the present invention is applied. In the case of applying the frame display signal synchronization method of the present invention, the display control unit 14 can control N of the L display driving chips 131 by using a two-wire transmission protocol (SDI + CLK) to generate N frame display signals, so as to light up at least one display region of the display panel 11 according to the image display requirement. For example, the mth, M +1 th and M +2 th display driving chips 131 are controlled to synchronously generate three frame display signals (i.e., N is 3), so as to perform display driving on the display panel 11 to light up at least one display region.
As shown in fig. 5, since the 1 st to M-1 st display driver chips 131 are not selected for performing the display driving operation, the display driver chips 131 do not perform the four operations of number identification, display data reception, renumbering processing, and display driving.
According to the above description, the mth display driving chip 131 receives the display data signal SDI (1) from the M-1 th display driving chip 131. After the display data signal SDI (1) is encoded and identified, the mth display driver chip 131 receives its own display data, stores the display data in an internal shift register, and configures driving parameters, such as a PWM signal, according to the current display data stored in the display data register. It should be understood that, in the above application case, the sequence number of the mth display driving chip 131 is 1.
Thereafter, the mth (i.e., number 1) display driving chip 131 renumbers the display signal SDI (1) to generate a new display data signal SDI (2), and then sends the new display data signal SDI (2) and the clock signal CLK to the M +1 th display driving chip 131. That is, the mth display driving chip 131 is sequentially numbered 1, and the M +1 th display driving chip 131 is sequentially numbered 2. Then, after the M +1 th (i.e., number 2) display driving chip 131 identifies the number of the new display data signal SDI (2), the serial number thereof is identified, and then the new display data signal SDI (2) receives the display data belonging to itself, and finally the display data storage and the driving parameter configuration are completed. And so on, until the M, M +1 and M +2 display driver chips 131 all receive their own display data and complete the configuration of the driving parameters.
Then, the display driver chip 131 of the number 1 (i.e., mth) completes the driving parameter configuration according to the current display data stored in the display data register, and generates a frame of display signals after waiting for the elapse of 2 delay times, i.e., N-k-3-1. The display driving chip 131 of the number 2 (i.e., the M +1 th) generates a one-frame display signal after waiting for the elapse of the delay time of N-k-3-2-1. Further, the display driving chip 131 of the number 3 (i.e., the M + 2) generates a one-frame display signal after waiting for the elapse of the delay time of N-k-3-0. In other words, the M +2 th display driver chip 131 immediately pulls up the frame display signal after completing the driving parameter configuration.
According to the above, the frame display signal synchronization method of the present invention can enable a plurality of cascaded display driver chips to drive a display panel to display a picture formed by at least one sub-picture, and the method includes: transmitting the display data of the at least one sub-picture from a first display driving chip in the display driving chips to the back in a cascading manner, wherein a serial number is attached to the display data of each sub-picture, and at least one corresponding display driving chip matched with the serial number in the display driving chips reads the display data of one sub-picture for the serial number matched with the display driving chip; and the at least one corresponding display driving chip delays the corresponding time with the corresponding serial number so that the at least one corresponding display driving chip synchronously drives the display panel to synchronously display the at least one sub-picture.
Thus, the frame display signal synchronization method, the display device, the electronic device and the storage medium of the present invention have been fully and clearly described above. And the foregoing description is exemplary rather than exhaustive and is not limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen in order to best explain the principles of the embodiments, the practical application, or improvements made to the technology in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
Claims (12)
1. A frame display signal synchronization method is characterized in that the frame display signal synchronization method is realized by a display control unit and L display driving chips for driving a display panel, wherein L is a positive integer, the first display driving chip is coupled with the display control unit, and the L display driving chips are mutually cascaded;
the frame display signal synchronization method includes the steps of:
under the condition that N display driving chips are selected to execute the display driving of the display panel, the display driving chips receive display data signals transmitted from the display control unit or a previous stage display driving chip cascaded with the display control unit;
wherein N is a positive integer and is not more than L;
the display driving chip carries out number identification on the display data signals and then receives display data contained in the display data signals from the display driving chip;
the display driving chip carries out renumbering processing on the display data signals to generate new display data signals, and then transmits the new display data signals to a next-stage display driving chip which is cascaded with the new display data signals;
after receiving the display data, each display driving chip waits for (N-k) delay times to generate a frame of display signals;
and k is the sequence number of the selected display driving chip, is a positive integer and is more than or equal to 1.
2. A frame display signal synchronization method according to claim 1, wherein the frame display signal synchronization method comprises the steps of: in the case where L is 1 and N is 1, the display driving chip generates a frame of display signals after completing the reception of the display data.
3. The method as claimed in claim 2, wherein the renumbering process is to add 1 to the sequence number to generate a new sequence number corresponding to the next display driver chip.
4. A frame display signal synchronization method is used for driving a display panel by a plurality of cascaded display driving chips to display a picture consisting of at least one sub-picture, and comprises the following steps:
transmitting the display data of the at least one sub-picture from a first display driving chip in the display driving chips to the back in a cascading manner, wherein a serial number is attached to the display data of each sub-picture, at least one serial number in the display driving chips is matched with at least one corresponding display driving chip, and the display data of the sub-picture is read by the driving chip and the matched serial number;
and the at least one corresponding display driving chip delays the corresponding time with the corresponding serial number so that the at least one corresponding display driving chip synchronously drives the display panel to synchronously display the at least one sub-picture.
5. A display device is characterized by comprising a display panel, a row driving unit, a line driving unit and a display control unit, wherein the row driving unit comprises L display driving chips, L is an integer, the first display driving chip is coupled with the display control unit, and the L display driving chips are mutually cascaded; the frame display signal synchronization method is realized by the display control unit and the L display driving chips, and comprises the following steps:
under the condition that N display driving chips are selected to execute the display driving of the display panel, the display driving chips receive display data signals transmitted from the display control unit or a previous stage display driving chip cascaded with the display control unit;
wherein N is a positive integer and is not more than L;
the display driving chip carries out number identification on the display data signals and then receives display data contained in the display data signals from the display driving chip;
the display driving chip carries out renumbering processing on the display data signals to generate new display data signals, and then transmits the new display data signals to a next-stage display driving chip which is cascaded with the new display data signals;
after receiving the display data, each display driving chip waits for (N-k) delay times to generate a frame of display signals;
and k is the sequence number of the selected display driving chip, is a positive integer and is more than or equal to 1.
6. The display device according to claim 5, wherein the display device performs a frame display signal synchronization method comprising the steps of:
in the case where L is 1 and N is 1, the display driving chip generates a frame of display signals after completing the reception of the display data.
7. The display device according to claim 5, wherein the renumbering process is an operation of adding 1 to the sequential number to generate a new sequential number corresponding to the subsequent display driver chip.
8. The display device of claim 6, wherein the display panel is a flat display panel selected from the group consisting of a liquid crystal display panel, a light emitting diode display panel, a quantum dot light emitting diode display panel, a micro light emitting diode display panel, a sub-millimeter light emitting diode display panel, an organic light emitting diode display device, and a Perovskite-based LED (PVSK LED) display panel.
9. The display device according to claim 6, wherein the display panel has X by Y sub-pixels, the display driving chip has Y/L driving channels, and X and Y are positive integers.
10. A display device is characterized in that the display device is provided with a display panel and a plurality of display driving chips which are cascaded and used for driving the display panel, the plurality of cascaded display driving chips are used for executing a frame display signal synchronization method to drive the display panel to display a picture which is composed of at least one sub-picture, and the display device comprises the following steps:
transmitting the display data of the at least one sub-picture from a first display driving chip in the display driving chips to the back in a cascading manner, wherein a serial number is attached to the display data of each sub-picture, at least one serial number in the display driving chips is matched with at least one corresponding display driving chip, and the display data of the sub-picture is read by the driving chip and the matched serial number;
and the at least one corresponding display driving chip delays the corresponding time with the corresponding serial number so that the at least one corresponding display driving chip synchronously drives the display panel to synchronously display the at least one sub-picture.
11. An electronic apparatus characterized by having the display device of any one of claims 5 to 10.
12. A computer-readable storage medium having the electronic apparatus of claim 11, wherein the computer-readable storage medium is an electronic device selected from the group consisting of a video wall, a smart tv, a smart phone, a tablet computer, a notebook computer, a laptop computer, a desktop computer, and an industrial computer.
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