CN113204277A - Overcurrent protection method, device and equipment for multi-power CPU and readable medium - Google Patents
Overcurrent protection method, device and equipment for multi-power CPU and readable medium Download PDFInfo
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Abstract
The invention discloses an overcurrent protection method of a multi-power CPU, which comprises the following steps: acquiring specification information of the CPU, and judging a power section corresponding to the CPU based on the specification information; setting an overcurrent equivalent resistor according to the corresponding power section, and determining an overcurrent protection current value according to the overcurrent equivalent resistor; monitoring the working current of a power supply link in real time, and judging whether the working current reaches an overcurrent protection current value or not; and in response to the working current not reaching the overcurrent protection current value, controlling the load to switch to start the circuit to supply power; and controlling the load to switch to close the circuit to supply power in response to the working current reaching the overcurrent protection current value. The invention also discloses an overcurrent protection device of the multi-power CPU, computer equipment and a readable storage medium. The invention can support the power supply of the CPU with high specification and low specification by identifying the CPU type and adjusting the overcurrent protection current value according to the CPU type, thereby enhancing the cost performance of the product, adaptively adjusting the protection point of the electronic fuse circuit and enhancing the overcurrent protection capability.
Description
Technical Field
The invention relates to the technical field of overcurrent protection, in particular to an overcurrent protection method, device and equipment of a multi-power CPU and a readable medium.
Background
With the continuous rise of cloud computing technology, the internet traffic is continuously increased, and higher requirements are put forward on the data processing capacity and the storage capacity of a computer room server. As a unit-cabinet system in a traditional computer room, the data processing capacity of server computing nodes deployed in cabinets is required to be stronger and higher, and the deployment density is required to be higher and higher.
With the increase of internet user service, the network data throughput is larger and larger, and the server is used as a basic data processing unit of a data center, so that the workload is larger and larger. Especially, the work load current of the CPU chip inside the server is getting larger and larger, and the current can reach 100 to 400A.
The current Power Supply structure of the server adopts a 12V direct motherboard of a PSU (Power Supply Unit), and supplies Power to components such as a CPU (Central Processing Unit) and a memory by transferring Power from a P12V EFUSE (Electronic Fuse). Along with the increase of the load current of the component, the current carried by the electronic fuse is also increased, the number of MOS (metal oxide semiconductor) tubes for constructing a route of the electronic fuse is also increased correspondingly, and the arrangement of the overcurrent protection pad is also increased. The increase of the number of the MOS tubes brings the increase of the design cost of the product and challenges to the space layout of the main board PCB. The number of MOS tubes used by the P12V electronic fuse corresponding to 2 CPUs supporting 95W is 2 generally; the number of MOS tubes used by the P12V electronic fuse corresponding to the 2 CPUs of 270W is 6. Meanwhile, the overcurrent protection point is set too high, the protection effect of the electronic fuse can be reduced, and the electronic fuse can not cut off a power supply path when the load end is subjected to overcurrent ignition possibly, so that the reliability of mainboard power supply is reduced.
However, the power specification of the actual server product, which is configured with the CPU, is high or low, and some nominal powers are 95W, 240W, and 270W, and the corresponding instantaneous current is as high as 700W during the over-frequency operation.
Fig. 1 is a schematic diagram illustrating a power supply structure of a motherboard CPU in the prior art, which includes: 1+1 redundant powered PUS0 and PUS1, BMC, P12V _ EFUSE, CPU VR. The PUS0 and the PUS1 form 1+1 redundant power output P12V _ PSU which is directly transmitted to the mainboard, passes through P12V _ EFUSE and is converted by the CPU VR to supply power to the CPU. The BMC is communicated with the PSU through the PMBUS, the power consumption of the whole server system can be monitored, meanwhile, the PSU power monitoring unit can achieve a system power limitation adjusting strategy through setting a power consumption threshold, and when the system power consumption exceeds the power threshold when the CPU is in overclocking, the PSU power consumption monitoring module can send out an ALERT signal to trigger the CPU to reduce the frequency. The PMBUS is a BMC and PSU communication interaction bus, and monitoring and management of the PSU including working states such as voltage, current, power consumption and temperature are achieved; and the alarm signal sent by the PSU during the ALERT signal is used for realizing that the PSU limits the power to control the CPU to reduce the frequency.
The disadvantages of the prior art include: when a mainboard is matched with a high-specification CPU, in an over-frequency working state, due to the fact that a period of time is required from the detection of power consumption by the BMC through the PMBUS to the start of frequency reduction action, the risk of instant trigger of P12V _ EFUSE overcurrent protection power failure exists; meanwhile, in order to support a high-specification CPU and guarantee the over-frequency performance, the number of MOS used in the P12V _ EFUSE line is increased, the OCP protection point is raised, which results in the over-design of the P12V _ EFUSE line when the motherboard is matched with a low-specification CPU, increases the design cost, and weakens the P12V _ EFUSE over-current protection function.
Disclosure of Invention
In view of this, an object of the embodiments of the present invention is to provide an overcurrent protection method, an apparatus, a device, and a readable medium for a multi-power CPU, which both support a small amount of high-specification CPU power supply by identifying a CPU type and adjusting an overcurrent protection current value according to the CPU type, reduce the number of MOS transistors in an electronic fuse line while satisfying the over-frequency performance, enhance the performance/cost ratio of a product, support mainstream low-scale CPU power supply, adaptively adjust a protection point of the electronic fuse line, and enhance the overcurrent protection capability.
Based on the above object, an aspect of the embodiments of the present invention provides an overcurrent protection method for a multi-power CPU, including the following steps: acquiring specification information of the CPU, and judging a power section corresponding to the CPU based on the specification information; setting an overcurrent equivalent resistor according to the corresponding power section, and determining an overcurrent protection current value according to the overcurrent equivalent resistor; monitoring the working current of a power supply link in real time, and judging whether the working current reaches an overcurrent protection current value or not; and in response to the working current not reaching the overcurrent protection current value, controlling the load to switch to start the circuit to supply power; and controlling the load to switch to close the circuit to supply power in response to the working current reaching the overcurrent protection current value.
In some embodiments, obtaining the specification information of the CPU, and determining the power segment corresponding to the CPU based on the specification information includes: the BMC identifies the specification information of the CPU and transmits the specification information to the CPLD; judging a power section corresponding to the CPU by the CPLD according to the specification information; the overcurrent equivalent resistance is set according to the corresponding power section, and the overcurrent protection current value is determined according to the overcurrent equivalent resistance, and the overcurrent protection current value comprises the following steps: generating a corresponding control signal by the CPLD based on the power section and sending the control signal to the over-current protection circuit; and the overcurrent protection circuit sets an overcurrent equivalent resistor according to the control signal and determines the overcurrent protection current value according to the overcurrent equivalent resistor.
In some embodiments, identifying, by the BMC, the specification information of the CPU and communicating the specification information to the CPLD comprises: accessing storage unit data in a product information storage inside the CPU by the BMC through an I2C bus to acquire power data of the CPU; the power data is fed back to the CPLD by the BMC over the I2C bus.
In some embodiments, setting the overcurrent equivalent resistance according to the corresponding power segment includes: the overcurrent regulating unit is provided with an overcurrent equivalent resistor according to a corresponding power section and is composed of a resistor network structure, wherein each parallel branch comprises a resistor and at most one MOS (metal oxide semiconductor) tube.
In some embodiments, monitoring the operating current of the power supply link in real time, and determining whether the operating current reaches the over-current protection current value includes: the current monitoring unit monitors the working current of the power supply link in real time and sends differential signals at two ends of the current monitoring unit to the EFUSE chip; and obtaining the working current through the EFUSE chip through the differential signal, and judging whether the working current reaches an overcurrent protection current value.
In some embodiments, the current monitoring unit is composed of a precision resistor or a plurality of precision resistors connected in parallel.
In some embodiments, in response to the operating current not reaching the over-current protection current value, controlling the load switching to turn on the circuit power supply includes: responding to the situation that the working current does not reach the overcurrent protection current value, sending a GATE high level signal by the EFUSE chip, and controlling load switching to open the MOS tube for power supply; in response to the operating current reaching the over-current protection current value, controlling the load switching to shut down the circuit power supply comprises: and responding to the working current reaching the overcurrent protection current value, sending a GATE low level signal by the EFUSE chip, and controlling load switching to cut off the power supply of the MOS tube.
In another aspect of the embodiments of the present invention, an overcurrent protection apparatus for a multi-power CPU is further provided, including: the first module is configured to acquire the specification information of the CPU and judge a power section corresponding to the CPU based on the specification information; the second module is configured to set an overcurrent equivalent resistor according to the corresponding power section and determine an overcurrent protection current value according to the overcurrent equivalent resistor; the third module is configured to monitor the working current of the power supply link in real time and judge whether the working current reaches an overcurrent protection current value; the fourth module is configured to respond to the fact that the working current does not reach the overcurrent protection current value, and control load switching to start a circuit to supply power; and the fifth module is configured to control load switching to close the circuit power supply in response to the working current reaching the overcurrent protection current value.
In another aspect of the embodiments of the present invention, there is also provided a computer device, including: at least one processor; and a memory storing computer instructions executable on the processor, the instructions when executed by the processor implementing the steps of: acquiring specification information of the CPU, and judging a power section corresponding to the CPU based on the specification information; setting an overcurrent equivalent resistor according to the corresponding power section, and determining an overcurrent protection current value according to the overcurrent equivalent resistor; monitoring the working current of a power supply link in real time, and judging whether the working current reaches an overcurrent protection current value or not; and in response to the working current not reaching the overcurrent protection current value, controlling the load to switch to start the circuit to supply power; and controlling the load to switch to close the circuit to supply power in response to the working current reaching the overcurrent protection current value.
In some embodiments, obtaining the specification information of the CPU, and determining the power segment corresponding to the CPU based on the specification information includes: the BMC identifies the specification information of the CPU and transmits the specification information to the CPLD; judging a power section corresponding to the CPU by the CPLD according to the specification information; the overcurrent equivalent resistance is set according to the corresponding power section, and the overcurrent protection current value is determined according to the overcurrent equivalent resistance, and the overcurrent protection current value comprises the following steps: generating a corresponding control signal by the CPLD based on the power section and sending the control signal to the over-current protection circuit; and the overcurrent protection circuit sets an overcurrent equivalent resistor according to the control signal and determines the overcurrent protection current value according to the overcurrent equivalent resistor.
In some embodiments, identifying, by the BMC, the specification information of the CPU and communicating the specification information to the CPLD comprises: accessing storage unit data in a product information storage inside the CPU by the BMC through an I2C bus to acquire power data of the CPU; the power data is fed back to the CPLD by the BMC over the I2C bus.
In some embodiments, setting the overcurrent equivalent resistance according to the corresponding power segment includes: the overcurrent regulating unit is provided with an overcurrent equivalent resistor according to a corresponding power section and is composed of a resistor network structure, wherein each parallel branch comprises a resistor and at most one MOS (metal oxide semiconductor) tube.
In some embodiments, monitoring the operating current of the power supply link in real time, and determining whether the operating current reaches the over-current protection current value includes: the current monitoring unit monitors the working current of the power supply link in real time and sends differential signals at two ends of the current monitoring unit to the EFUSE chip; and obtaining the working current through the EFUSE chip through the differential signal, and judging whether the working current reaches an overcurrent protection current value.
In some embodiments, the current monitoring unit is composed of a precision resistor or a plurality of precision resistors connected in parallel.
In some embodiments, in response to the operating current not reaching the over-current protection current value, controlling the load switching to turn on the circuit power supply includes: responding to the situation that the working current does not reach the overcurrent protection current value, sending a GATE high level signal by the EFUSE chip, and controlling load switching to open the MOS tube for power supply; in response to the operating current reaching the over-current protection current value, controlling the load switching to shut down the circuit power supply comprises: and responding to the working current reaching the overcurrent protection current value, sending a GATE low level signal by the EFUSE chip, and controlling load switching to cut off the power supply of the MOS tube.
In a further aspect of the embodiments of the present invention, a computer-readable storage medium is also provided, in which a computer program for implementing the above method steps is stored when the computer program is executed by a processor.
The invention has the following beneficial technical effects: the CPU type is identified, the overcurrent protection current value is adjusted according to the CPU type, a small amount of high-specification CPU power supply is supported, the number of MOS (metal oxide semiconductor) tubes of an electronic fuse circuit is reduced while the overclocking performance is met, the product cost performance is enhanced, the mainstream lower-scale CPU power supply is supported, the protection point of the electronic fuse circuit is adaptively adjusted, and the overcurrent protection capability is enhanced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained by using the drawings without creative efforts.
FIG. 1 is a schematic diagram of a power supply structure of a motherboard CPU in the prior art;
FIG. 2 is a schematic diagram of an embodiment of an over-current protection method for a multi-power CPU according to the present invention;
FIG. 3 is a schematic diagram of a motherboard CPU power supply structure provided by the present invention;
FIG. 4 is a schematic circuit diagram of an embodiment of an over-current protection method for a multi-power CPU according to the present invention;
FIG. 5 is a schematic diagram of an embodiment of an over-current protection apparatus for a multi-power CPU provided in the present invention;
FIG. 6 is a schematic diagram of an embodiment of a computer device provided by the present invention;
FIG. 7 is a schematic diagram of an embodiment of a computer-readable storage medium provided by the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.
It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two entities with the same name but different names or different parameters, and it should be noted that "first" and "second" are merely for convenience of description and should not be construed as limitations of the embodiments of the present invention, and they are not described in any more detail in the following embodiments.
In view of the above, the first aspect of the embodiments of the present invention provides an embodiment of an overcurrent protection method for a multi-power CPU. Fig. 2 is a schematic diagram illustrating an embodiment of an overcurrent protection method for a multi-power CPU provided in the present invention. As shown in fig. 2, the embodiment of the present invention includes the following steps:
s01, acquiring the specification information of the CPU, and judging the power section corresponding to the CPU based on the specification information;
s02, setting an overcurrent equivalent resistor according to the corresponding power section, and determining an overcurrent protection current value according to the overcurrent equivalent resistor;
s03, monitoring the working current of the power supply link in real time, and judging whether the working current reaches an overcurrent protection current value; and
s04, responding to the fact that the working current does not reach the overcurrent protection current value, controlling load switching to start a circuit to supply power;
and S05, responding to the working current reaching the overcurrent protection current value, controlling the load to switch to turn off the power supply of the circuit.
In the embodiment, a cost-effective overcurrent protection method compatible with a multi-power CPU is provided. Fig. 3 is a schematic diagram of a motherboard CPU power supply structure provided by the present invention, including: 1+1 PSU0 and PSU1, P12V _ EFUSE, CPLD, BMC, CPU VR, CPU and PIROM redundantly powered. Wherein PSU (Power Supply Unit) is a power Supply, EFUSE (electronic fuse) is an electronic fuse, BMC (baseboard Management controller) is a substrate Management controller, CPU (Central Processing Unit) is a central Processing unit, VR (Voltage regulator) is a voltage regulator, and PIROM (processor Information ROM) is a product Information memory.
The main stream CPU specification is lower, Pmax is small, when the main board is matched with the main stream CPU, M external MOS tubes are needed for the P12V _ EFUSE circuit; the high specification Pmax is large, when the mainboard is matched with a high specification CPU, M + N external MOS tubes (N is more than or equal to 1) are needed for the P12V _ EFUSE circuit. Since Pmax is the instantaneous power consumption, the duration is short. Therefore, the M MOS tubes can guarantee the continuous power supply Current capability of the high-specification CPU, and an OCP (Over Current Protection) self-adaptive regulation mechanism is introduced into a P12V _ EFUSE line formed by the M external MOS tubes.
In some embodiments of the present invention, obtaining the specification information of the CPU, and determining the power segment corresponding to the CPU based on the specification information includes: the BMC identifies the specification information of the CPU and transmits the specification information to the CPLD; judging a power section corresponding to the CPU by the CPLD according to the specification information; the overcurrent equivalent resistance is set according to the corresponding power section, and the overcurrent protection current value is determined according to the overcurrent equivalent resistance, and the overcurrent protection current value comprises the following steps: generating a corresponding control signal by the CPLD based on the power section and sending the control signal to the over-current protection circuit; and the overcurrent protection circuit sets an overcurrent equivalent resistor according to the control signal and determines the overcurrent protection current value according to the overcurrent equivalent resistor.
In the present embodiment, referring to fig. 3, after the specification information of the CPU is identified by the BMC and transmitted to the CPLD, the CPLD makes a judgment and automatically generates a control signal to adjust the OCP protection point of P12V _ EFUSE. When the BMC identifies the low-power-consumption CPU, the BMC informs the CPLD to decide, and the OCP protection point of the P12V _ EFUSE is adjusted to be low; when the BMC recognizes the high-power-consumption CPU, the CPLD is informed to make a decision to turn the OCP protection point of P12V _ EFUSE high.
In some embodiments of the present invention, identifying, by the BMC, the specification information of the CPU and passing the specification information to the CPLD comprises: accessing storage unit data in a product information storage inside the CPU by the BMC through an I2C bus to acquire power data of the CPU; the power data is fed back to the CPLD by the BMC over the I2C bus.
In some embodiments of the present invention, setting the overcurrent equivalent resistance according to the corresponding power segment includes: the overcurrent regulating unit is provided with an overcurrent equivalent resistor according to a corresponding power section and is composed of a resistor network structure, wherein each parallel branch comprises a resistor and at most one MOS (metal oxide semiconductor) tube.
In this embodiment, fig. 4 is a schematic circuit structure diagram of an embodiment of an overcurrent protection method for a multi-power CPU provided in the present invention. As shown in fig. 4, includes: an EFUSE control unit 100, a current detection unit 200, an OCP adjusting unit 300, and a load switching unit 400. The OCP adjusting unit 300 is formed by a resistor network structure, and a series branch formed by Ri and qi (i is 1,2, …, n) of the signal MOS is connected in parallel with a resistor R0 to form a resistor network, and then connected in series with the resistor R. The equivalent resistance Re of the resistor network is adjusted by controlling the MOS to be switched on or off. The OCP protection point I _ trip due to P12V _ EFUSE is proportional to Re. Therefore, the adjustment of the EFUSE overcurrent protection can be realized by controlling the on or off of the MOS.
In some embodiments of the present invention, monitoring the working current of the power supply link in real time, and determining whether the working current reaches the overcurrent protection current value includes: the current monitoring unit monitors the working current of the power supply link in real time and sends differential signals at two ends of the current monitoring unit to the EFUSE chip; and obtaining the working current through the EFUSE chip through the differential signal, and judging whether the working current reaches an overcurrent protection current value.
In some embodiments of the present invention, the current monitoring unit is formed by connecting a precision resistor or a plurality of precision resistors in parallel.
In the present embodiment, with reference to fig. 4, the current detecting unit 200 is formed by connecting a precision resistor or a plurality of precision resistors in parallel. Differential signals are pulled out from the two PADs of the precision resistor and fed back to the EFUSE chip, and therefore real-time detection of the working current of the power supply link can be achieved.
In some embodiments of the present invention, in response to the operating current not reaching the overcurrent protection current value, controlling the load to switch to turn on the circuit to supply power comprises: responding to the situation that the working current does not reach the overcurrent protection current value, sending a GATE high level signal by the EFUSE chip, and controlling load switching to open the MOS tube for power supply; in response to the operating current reaching the over-current protection current value, controlling the load switching to shut down the circuit power supply comprises: and responding to the working current reaching the overcurrent protection current value, sending a GATE low level signal by the EFUSE chip, and controlling load switching to cut off the power supply of the MOS tube.
In this embodiment, with continued reference to fig. 4, the load switching unit 400 is formed by connecting multiple MOS (Qi, i ═ 1,2, …, M) in parallel, and the EFUSE chip outputs a GATE signal to control the MOS to turn on and off.
In some embodiments of the present invention, referring to fig. 3 and fig. 4 together, N-2 is taken as an example.
Firstly, the BMC accesses PIROM memory cell data in the CPU through an I2C bus, thereby obtaining the model and power data P _ CPU of the CPU.
Then, the BMC feeds back the power data P _ CPU of the CPU to the CPLD through the I2C bus.
Then, the CPLD makes a decision according to the arbitration policy:
if 0< P _ CPU is less than or equal to P _ L, the CPLD sends out a control signal: 11. at this time, the equivalent resistance Re of OC is set to: r + R0// R1// R2;
if P _ L < P _ CPU is not more than P _ M, CPLD sends out control signal: 10. at this time, the equivalent resistance Re of OC is set to: r + R0// R2;
if P _ M < P _ CPU is not more than P _ H, CPLD sends out control signal: 01. at this time, the equivalent resistance Re of OC is set to: r + R0// R1;
if P _ H < P _ CPU, CPLD sends out control signal: 00. at this time, the equivalent resistance Re of OC is set to: r + R0.
Next, the current detecting unit feeds back the current information I _ load to the EFUSE chip.
Finally, the EFUSE chip determines the OCP protection point Itrip based on the OC equivalent resistance Re, and compares I _ load with Itrip:
if Iload < Itrip, the EFUSE chip sends out a GATE high level signal to control the load switching unit and turn on the MOS power supply;
if Iload is larger than or equal to Itrip, the EFUSE chip sends out a GATE low level signal to control the load switching unit and cut off the MOS power supply.
It should be noted that, the steps in the embodiments of the over-current protection method for multi-power CPU can be mutually intersected, replaced, added, and deleted, so that the over-current protection method for multi-power CPU, which is transformed by reasonable permutation and combination, shall also belong to the protection scope of the present invention, and shall not limit the protection scope of the present invention to the embodiments.
In view of the above, a second aspect of the embodiments of the present invention provides an overcurrent protection apparatus for a multi-power CPU. Fig. 5 is a schematic diagram of an embodiment of an overcurrent protection apparatus for a multi-power CPU provided in the present invention. As shown in fig. 5, the embodiment of the present invention includes the following modules: a first module S11 configured to obtain specification information of the CPU and determine a power segment corresponding to the CPU based on the specification information; a second module S12 configured to set an overcurrent equivalent resistance according to the corresponding power segment, and determine an overcurrent protection current value according to the overcurrent equivalent resistance; a third module S13 configured to monitor the working current of the power supply link in real time, and determine whether the working current reaches an overcurrent protection current value; and a fourth module S14 configured to control the load switching to turn on the circuit to supply power in response to the operating current not reaching the overcurrent protection current value; a fifth module S15 configured to control the load switching to turn off the circuit power supply in response to the operating current reaching the over-current protection current value.
In some embodiments of the invention, the invention may also be used in server, storage, etc. product power applications with full-specification CPU configurations.
In view of the above object, a third aspect of the embodiments of the present invention provides a computer device. Fig. 6 is a schematic diagram of an embodiment of a computer device provided by the present invention. As shown in fig. 6, the embodiment of the present invention includes the following means: at least one processor S21; and a memory S22, the memory S22 storing computer instructions S23 executable on the processor, the instructions when executed by the processor implementing the steps of the above method.
The invention also provides a computer readable storage medium. FIG. 7 is a schematic diagram illustrating an embodiment of a computer-readable storage medium provided by the present invention. As shown in fig. 7, the computer readable storage medium stores S31 a computer program that, when executed by a processor, performs the method as described above S32.
Finally, it should be noted that, as one of ordinary skill in the art can appreciate that all or part of the processes of the methods of the above embodiments can be implemented by a computer program to instruct related hardware, and the program of the overcurrent protection method for a multi-power CPU can be stored in a computer readable storage medium, and when executed, the program can include the processes of the embodiments of the methods described above. The storage medium of the program may be a magnetic disk, an optical disk, a Read Only Memory (ROM), a Random Access Memory (RAM), or the like. The embodiments of the computer program may achieve the same or similar effects as any of the above-described method embodiments.
Furthermore, the methods disclosed according to embodiments of the present invention may also be implemented as a computer program executed by a processor, which may be stored in a computer-readable storage medium. Which when executed by a processor performs the above-described functions defined in the methods disclosed in embodiments of the invention.
Further, the above method steps and system elements may also be implemented using a controller and a computer readable storage medium for storing a computer program for causing the controller to implement the functions of the above steps or elements.
Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as software or hardware depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosed embodiments of the present invention.
In one or more exemplary designs, the functions may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, Digital Subscriber Line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used herein, includes Compact Disc (CD), laser disc, optical disc, Digital Versatile Disc (DVD), floppy disk, blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.
The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments.
It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing relevant hardware, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of the embodiments of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.
Claims (10)
1. An overcurrent protection method of a multi-power CPU is characterized by comprising the following steps:
acquiring specification information of a CPU (Central processing Unit), and judging a power section corresponding to the CPU based on the specification information;
setting an overcurrent equivalent resistor according to the corresponding power section, and determining an overcurrent protection current value according to the overcurrent equivalent resistor;
monitoring the working current of a power supply link in real time, and judging whether the working current reaches the overcurrent protection current value or not; and
responding to the working current not reaching the overcurrent protection current value, controlling load switching to start a circuit to supply power;
and controlling load switching to close the circuit to supply power in response to the working current reaching the overcurrent protection current value.
2. The over-current protection method of a multi-power CPU according to claim 1, wherein obtaining specification information of the CPU and determining the power segment corresponding to the CPU based on the specification information comprises: identifying the specification information of the CPU by the BMC, and transmitting the specification information to the CPLD; judging a power section corresponding to the CPU by the CPLD according to the specification information;
setting an overcurrent equivalent resistor according to the corresponding power section, and determining an overcurrent protection current value according to the overcurrent equivalent resistor comprises the following steps: generating a corresponding control signal by the CPLD based on the power section and sending the control signal to an overcurrent protection circuit; and the overcurrent protection circuit sets an overcurrent equivalent resistor according to the control signal and determines an overcurrent protection current value according to the overcurrent equivalent resistor.
3. The method of claim 2, wherein identifying, by the BMC, specification information of the CPU and passing the specification information to the CPLD comprises:
accessing, by a BMC through an I2C bus, memory cell data in a product information memory inside a CPU to obtain power data of the CPU;
the power data is fed back to the CPLD by the BMC over the I2C bus.
4. The over-current protection method of a multi-power CPU according to claim 1, wherein setting an over-current equivalent resistance according to the corresponding power segment comprises:
and the overcurrent regulating unit is used for setting an overcurrent equivalent resistor according to the corresponding power section and is composed of a resistor network structure, wherein each parallel branch comprises a resistor and at most one MOS (metal oxide semiconductor) tube.
5. The over-current protection method of a multi-power CPU of claim 1, wherein monitoring a working current of a power supply link in real time, and determining whether the working current reaches the over-current protection current value comprises:
monitoring the working current of a power supply link in real time by a current monitoring unit, and sending differential signals at two ends of the current monitoring unit to an EFUSE chip;
and acquiring the working current by the EFUSE chip through the differential signal, and judging whether the working current reaches the overcurrent protection current value.
6. The over-current protection method for multi-power CPU according to claim 5, wherein said current monitoring unit is formed by connecting a precision resistor or a plurality of precision resistors in parallel.
7. The method of claim 1, wherein controlling load switching to turn on circuit power in response to the operating current not reaching the over-current protection current value comprises: responding to the working current not reaching the overcurrent protection current value, sending a GATE high level signal by an EFUSE chip, and controlling load switching to open an MOS tube for power supply;
in response to the operating current reaching the over-current protection current value, controlling load switching to shut down circuit power comprises: and responding to the working current reaching the overcurrent protection current value, sending a GATE low level signal by the EFUSE chip, and controlling load switching to cut off the power supply of the MOS tube.
8. An overcurrent protection device for a multi-power CPU, comprising:
the first module is configured to acquire the specification information of the CPU and judge the power section corresponding to the CPU based on the specification information;
the second module is configured to set an overcurrent equivalent resistor according to the corresponding power section and determine an overcurrent protection current value according to the overcurrent equivalent resistor;
the third module is configured to monitor the working current of a power supply link in real time and judge whether the working current reaches the overcurrent protection current value; and
the fourth module is configured to respond to the situation that the working current does not reach the overcurrent protection current value, and control load switching to start a circuit to supply power;
and the fifth module is configured to respond to the working current reaching the overcurrent protection current value and control load switching to close the circuit to supply power.
9. A computer device, comprising:
at least one processor; and
a memory storing computer instructions executable on the processor, the instructions when executed by the processor implementing the steps of the method of any one of claims 1 to 7.
10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 7.
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| CN202110475284.XA CN113204277A (en) | 2021-04-29 | 2021-04-29 | Overcurrent protection method, device and equipment for multi-power CPU and readable medium |
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| CN202110475284.XA CN113204277A (en) | 2021-04-29 | 2021-04-29 | Overcurrent protection method, device and equipment for multi-power CPU and readable medium |
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