CN113198329B - Preparation method for synthesizing micro-nano material on high-flux film - Google Patents

Preparation method for synthesizing micro-nano material on high-flux film Download PDF

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CN113198329B
CN113198329B CN202110384364.4A CN202110384364A CN113198329B CN 113198329 B CN113198329 B CN 113198329B CN 202110384364 A CN202110384364 A CN 202110384364A CN 113198329 B CN113198329 B CN 113198329B
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micropores
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CN113198329A (en
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施雪涛
杨夕冉
李笑宇
赖琛
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South China University of Technology SCUT
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01D—SEPARATION
    • B01D67/00—Processes specially adapted for manufacturing semi-permeable membranes for separation processes or apparatus
    • B01D67/0081—After-treatment of organic or inorganic membranes
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01J—CHEMICAL OR PHYSICAL PROCESSES, e.g. CATALYSIS OR COLLOID CHEMISTRY; THEIR RELEVANT APPARATUS
    • B01J19/00—Chemical, physical or physico-chemical processes in general; Their relevant apparatus
    • B01J19/0006—Controlling or regulating processes
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01J—CHEMICAL OR PHYSICAL PROCESSES, e.g. CATALYSIS OR COLLOID CHEMISTRY; THEIR RELEVANT APPARATUS
    • B01J19/00—Chemical, physical or physico-chemical processes in general; Their relevant apparatus
    • B01J19/0046—Sequential or parallel reactions, e.g. for the synthesis of polypeptides or polynucleotides; Apparatus and devices for combinatorial chemistry or for making molecular arrays
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01J—CHEMICAL OR PHYSICAL PROCESSES, e.g. CATALYSIS OR COLLOID CHEMISTRY; THEIR RELEVANT APPARATUS
    • B01J19/00—Chemical, physical or physico-chemical processes in general; Their relevant apparatus
    • B01J19/0093—Microreactors, e.g. miniaturised or microfabricated reactors
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00—Manufacture or treatment of nanostructures

Abstract

The invention discloses a preparation method for synthesizing a micro-nano material on a high-flux membrane, which utilizes a PDMS array chip with flexibly controllable micropore volume to construct a stable and accurate reagent concentration gradient and utilizes a designed auxiliary device to fix a reaction chip, wherein a metal net effectively prevents the phenomenon of easy leakage and seepage of the synthesized micro-nano material on the membrane on the premise of not influencing the reaction, thereby realizing the synthesis of the micro-nano material on the micro-fluidic high-flux membrane. The synthesized micro-nano material shows obvious property gradient change, and the experimental result is accurate and reliable. The method innovatively breaks through the conventional sequential iteration method, can efficiently and parallelly execute batch experiments in a short time, quickly synthesizes and screens samples on the membrane, and enriches the material database to a great extent.

Description

Preparation method for synthesizing micro-nano material on high-flux film
Technical Field
The invention relates to the technical field of microfluidic high-flux synthesis of micro-nano materials, in particular to a preparation method for synthesizing micro-nano materials on a high-flux membrane.
Background
The development of new materials is closely related to the progress of human civilization, however, the current material research method relying on the traditional trial-and-error method usually needs a longer research and development period and a large amount of manpower and material resources, and cannot meet the increasing demand of the current society for the new materials. Therefore, a new technology is urgently needed to be developed to shorten the research and development period of materials, improve the test efficiency, reduce the research and development cost and accelerate the discovery of new materials. High throughput experimentation is certainly the best choice and is defined as a method that can perform between ten and one hundred thousand tests per day. The core of the method is to change the original sequential iteration method into an efficient parallel experiment method, realize the batch preparation of samples, and rapidly characterize and screen the obtained samples, thereby developing a new material with optimized performance. The microfluidic chip technology has become a very potential choice in high-throughput experiments by virtue of the advantages of integration miniaturization, high reaction efficiency, accurate and controllable experimental conditions and the like. It is a scientific technology for manipulating fluid with volume from nanoliter to picoliter in micrometer scale space, and can shrink the basic functions of biological, chemical and other laboratories onto a chip with several square centimeters, so it is also called lab-on-a-chip. Polydimethylsiloxane (PDMS) is the most common one of the materials used for manufacturing microfluidic chips, and has the advantages of low cost, durability, good elasticity and flexibility, certain chemical inertness and electrical insulation, good light transmittance and air permeability, easy bonding, low toxicity, good biocompatibility and the like.
The membrane material is used as a substrate for microfluidic high-flux reaction, not only can be used as a deposition template of the micro-nano material, but also can guide the growth, size, morphology, distribution and the like of the micro-nano material, and has important significance for researching the influence of the membrane substrate on the micro-nano material.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides a preparation method for synthesizing a micro-nano material on a high-flux membrane, which has the advantages of small volume, high efficiency, wide screening range, simple and convenient operation, low cost and relatively independent experimental environment.
In order to achieve the purpose, the technical scheme provided by the invention is as follows: a preparation method for synthesizing a micro-nano material on a high-flux membrane comprises the following steps:
1) injecting a reagent A solution for synthesizing a micro-nano material into micropores of the equal-height pore-depth semi-perforated chip, and injecting a mixed solution of A and B into micropores of the gradient pore-depth semi-perforated chip, wherein B is an additive for synthesizing the micro-nano material;
2) aligning the equal-height pore depth semi-perforated chip with the micropores of the gradient pore depth semi-perforated chip, standing until the solution is fully mixed, and removing the gradient pore depth semi-perforated chip to obtain the equal-height pore depth semi-perforated chip with the mixed solution of A and gradient concentration B in the micropores;
3) adhering the chip with the same height and the hole depth and completely perforating to the surface of the silicon chip with the film, and injecting a reagent C solution for synthesizing the micro-nano material into the micropores of the chip with the same height and the hole depth and completely perforating;
4) and aligning the micro-pores of the chip with the same height, the full perforation and the semi-perforation with the same height, mixing and reacting the solutions, and finally depositing on the surface of the membrane to obtain the required micro-nano material.
In the step 1), the chip material with the equal-height pore depth is Polydimethylsiloxane (PDMS) and comprises a plurality of cylindrical micropore arrays, the diameter of each micropore is 0.5-2 mm, the depth of each micropore is 0.5-2.5 mm, the depth of each micropore is the same, the thickness of the chip is larger than the depth of each micropore, the number of the micropore arrays is 36-121, and the distance is 3-6 mm.
In the step 1), the gradient-hole-depth semi-perforated chip material is Polydimethylsiloxane (PDMS) and comprises a plurality of cylindrical micropore arrays, the diameters of micropores are 0.5 mm-2 mm, the depths of the micropores are 0.1-3.3 mm, the depth difference of adjacent micropore arrays is 0.2-0.4 mm, the depths of the micropores in the same row are the same, the thickness of the chip is larger than the maximum micropore depth, the number of the micropore arrays is 36-121, and the distance is 3 mm-6 mm.
In the step 3), the chip material with the equal-height pore depth and complete perforation is Polydimethylsiloxane (PDMS) and comprises a plurality of cylindrical micropore arrays, the diameter of each micropore is 0.5-2 mm, the depth of each micropore is 0.5-2.5 mm, the depth of each micropore is the same, the thickness of the chip is equal to the depth of each micropore, the number of the micropore arrays is 36-121, and the distance is 3-6 mm.
In the step 4), the auxiliary device consists of a base, an inner frame, a metal net and an outer frame; the middle of the base is provided with a boss, a silicon wafer adhered with a chip with the same height, hole depth and complete perforation is placed on the boss, and 4-12 screw holes are distributed around the boss; the inner frame is arranged on the base, the height of the inner frame is less than the sum of the height of the boss, the thickness of the silicon wafer, the thickness of the film and the thickness of the chip which is completely punched by the equal-height hole depth, the hollow part of the inner frame is consistent with the shape and the size of the boss of the base, 4-12 screw holes are distributed on four sides of the inner frame, and the positions of the screw holes correspond to the positions of the screw holes of the base; the metal net is arranged on the inner frame, the thickness of the metal net is 0.1-0.2 mm, the metal net comprises a plurality of square through micropore arrays, the side length of each square micropore is 0.6-2.1 mm, the number of the micropore arrays is 36-121, the distance is 3-6 mm, 4-12 screw holes are distributed on the four sides of the metal net, and the positions of the screw holes correspond to the positions of the base and the screw holes of the inner frame; the base, the inner frame and the metal net are combined and fixed by 4 to 12 screws; the outer frame is arranged on the metal net, the height of the outer frame is larger than the sum of the height of the inner frame, the thickness of the metal net and the thickness of the chip with the equal-height hole depth and half-through hole, the hollow part of the outer frame is consistent with the shape and the size of the boss of the base, the inner frame can be accommodated by hollowing the lower side of the outer frame, 4-12 cylindrical holes are distributed on the four sides of the outer frame to accommodate nuts, and the positions of the cylindrical holes correspond to the positions of the screw holes of the metal net.
Compared with the prior art, the invention has the following advantages and beneficial effects:
1. the metal net can effectively prevent the easy-to-occur leakage and seepage phenomena of the synthesis on the membrane on the premise of not influencing the reaction.
2. The stable and accurate concentration gradient can be constructed by controlling the volume of the reagent, the efficiency is high, the consumption is low, and no external factor interference exists.
3. The micro-nano material is synthesized on the membrane at high flux through the PDMS array chip for the first time, and the obtained result is accurate and reliable.
Drawings
Fig. 1 is a 3D side view of the aid of the invention.
Fig. 2 is a 3D cross-sectional view of the auxiliary device of the present invention.
Fig. 3 is an exploded view of the auxiliary device according to the present invention (base, inner frame, metal net and outer frame in sequence from left to right).
Fig. 4 is a physical diagram of the isopipe deep half-perforated chip, the gradient deep half-perforated chip and the isopipe deep full-perforated chip used in example 1.
FIG. 5 is a schematic diagram of an auxiliary device used in example 1.
FIG. 6 is a set of 3 scanning electron microscope results of the synthesis of calcium phosphate with the concentration gradient of Arg as set forth in example 1.
FIG. 7 is the X-ray diffraction pattern of the sample under the control of 0.049mol/L Arg in example 1.
Fig. 8 is a schematic diagram of a chip with equal-height hole depth and half-through hole, a chip with gradient hole depth and half-through hole, and a chip with equal-height hole depth and full-through hole, which are used in example 2.
FIG. 9 is a schematic diagram of an auxiliary device used in example 2.
Fig. 10 is a scanning electron microscope result graph and scanning electron microscope collection location points of the synthesized calcium phosphate with Gly concentration gradient established in example 2.
Detailed Description
The present invention will be described in further detail with reference to examples and drawings, but the present invention is not limited thereto.
Example 1
1) 0.036mol/L (NH) is prepared4)2HPO4Solution and 0.06mol/L Ca (NO)3)250mL of each solution was added (NH) with sodium hydroxide standard solution4)2HPO4The pH value of the solution is adjusted to 9.5, and 0.06mol/L Ca (NO) is prepared3)2And 0.085mol/L arginine (Arg) mixed solution, 0.06mol/L Ca (NO)3)20.4mol/L Arg mixed solution, 0.06mol/L Ca (NO)3)2And 10mL of each of the 1.2mol/L Arg mixed solutions;
2) subjecting 3 gradient hole deep semi-perforated chips and 3 high-hole deep semi-perforated chips to plasma treatment for 3min, and mixing Ca (NO) prepared in step 1) with 1mL injector3)2Injecting the mixed solution and Arg into the micropores of 3 gradient-pore deep semi-perforated chips respectively, and adding Ca (NO) prepared in the step 1)3)2Injecting the solution into the micropores of 3-piece chip with equal height, deep semi-perforated chip, and discharging small bubbles in the micropores with injector. Aligning the micropores of the gradient hole deep semi-perforated chip and the equal-pore deep semi-perforated chip, standing for 1h, and removing the gradient hole deep semi-perforated chip to obtain 3 pieces of Ca (NO) contained in the chips3)2And a half-perforated chip with equal-height holes and depth of the mixed solution with the gradient concentration of Arg;
3) adhering 3 chips with equal-height holes and complete perforation to the surface of a silicon wafer coated with a collagen film in a spinning mode, treating plasma for 3min, and using a 1mL injector to inject (NH) prepared in the step 1)4)2HPO4Injecting the solution into the micropores of the chip with the same pore depth and complete perforation, and discharging the small bubbles in the micropores with a syringe to obtain 3 pieces of (NH)4)2HPO4The chip is completely perforated by the equal-height holes of the solution;
4) adhering (NH) to the step 3)4)2HPO4Placing the chip with the same height and complete perforation into the inner frame of the auxiliary device, installing the metal mesh and the outer frame, and then loading Ca (NO) in the step 2)3)2And pushing the chip with the gradient concentration Arg mixed solution and the same height hole and the deep half-perforated hole along the outer frame to make the chip closely contact with the metal net. Wrapping the auxiliary device with the preservative film, placing a 500g stainless steel weight in the outer frame, ensuring that the two chips are in close contact, placing the stainless steel weight in a constant-temperature culture oscillator, taking out the stainless steel weight after reacting for 24 hours, removing the weight and the preservative film, placing the stainless steel weight in a vacuum drying oven for drying for 2 hours, then soaking the stainless steel weight in deionized water for 48 hours, and changing water every 12 hours. And removing the outer frame, transferring the residual system to a vacuum drying oven for drying for 2.5h, and removing the chip with the same height and hole depth and completely perforating to obtain a product deposited on the surface of the silicon wafer film in an array manner.
As shown in fig. 1 to 3, the auxiliary device is composed of a base, an inner frame, a metal net and an outer frame; the middle of the base is provided with a boss, a silicon wafer adhered with a chip with the same height, hole depth and complete perforation is placed on the boss, and 4-12 screw holes are distributed around the boss; the inner frame is arranged on the base, the height of the inner frame is less than the sum of the height of the boss, the thickness of the silicon wafer, the thickness of the film and the thickness of the chip which is completely punched by the equal-height hole depth, the hollow part of the inner frame is consistent with the shape and the size of the boss of the base, 4-12 screw holes are distributed on four sides of the inner frame, and the positions of the screw holes correspond to the positions of the screw holes of the base; the metal net is arranged on the inner frame, the thickness of the metal net is 0.1-0.2 mm, the metal net comprises a plurality of square through micropore arrays, the side length of each square micropore is 0.6-2.1 mm, the number of the micropore arrays is 36-121, the distance is 3-6 mm, 4-12 screw holes are distributed on the four sides of the metal net, and the positions of the screw holes correspond to the positions of the base and the screw holes of the inner frame; the base, the inner frame and the metal net are combined and fixed by 4 to 12 screws; the outer frame is arranged on the metal net, the height of the outer frame is larger than the sum of the height of the inner frame, the thickness of the metal net and the thickness of the chip with the equal-height hole depth and half-through hole, the hollow part of the outer frame is consistent with the shape and the size of the boss of the base, the inner frame can be accommodated by hollowing the lower side of the outer frame, 4-12 cylindrical holes are distributed on the four sides of the outer frame to accommodate nuts, and the positions of the cylindrical holes correspond to the positions of the screw holes of the metal net.
FIG. 4 is a schematic diagram of a chip with equal height hole depth and half through hole, a chip with gradient hole depth and half through hole, and a chip with equal height hole depth and full through hole. The diameter of each micropore of the chip with the equal pore depth and the half-perforated hole is 1mm, the depth of each micropore is 1.5mm, the number of micropore arrays is 36, and the distance between every two micropore arrays is 6 mm. The diameter of each micropore of the gradient-hole-depth semi-perforated chip is 1mm, the depths of the micropores are 0.5mm, 0.9mm, 1.3mm, 1.7mm, 2.1mm and 2.5mm from left to right, the depth difference of adjacent micropore arrays is 0.4mm, the number of the micropore arrays is 36, and the distance between the micropore arrays is 6 mm. The diameter of the micropores of the chip with the same pore depth and complete perforation is 1mm, the depth of the micropores is 1.5mm, the number of the micropore arrays is 36, and the distance is 6 mm.
Fig. 5 is a diagram of an auxiliary device used in the present embodiment. The thickness of the metal net is 0.2mm, the side length of the square micropores is 1.1mm, the number of the micropore arrays is 36, and the distance is 6 mm.
FIG. 6 is a scanning electron microscope result chart of 3 groups for establishing Arg concentration gradient to synthesize calcium phosphate. With the increase of the concentration of Arg, the morphology of calcium phosphate is obviously changed in a gradient manner, and the spherical structure assembled by the irregular nanosheets is gradually changed into a nanorod structure.
FIG. 7 is an X-ray diffraction pattern of the sample under the control of 0.049mol/L Arg. The phase of the obtained product is hydroxyapatite.
Example 2
1) 0.036mol/L (NH) is prepared4)2HPO4Solution and 0.06mol/L Ca (NO)3)250mL of each solution was added (NH) with sodium hydroxide standard solution4)2HPO4The pH value of the solution is adjusted to 9.5, and 0.06mol/L Ca (NO) is prepared3)2And 10mL of 0.4mol/L glycine (Gly) mixed solution;
2) subjecting gradient hole depth semi-perforated chip and equal-height hole depth semi-perforated chip to plasma treatment for 3min, and mixing Ca (NO) prepared in step 1) with 1mL injector3)2And Gly mixed solution is injected into the micropores of the gradient pore deep semi-perforated chip, and Ca (NO) prepared in the step 1) is added3)2Injecting the solution into the micropores of the chip with the same height, depth and half-through hole, and discharging the small bubbles in the micropores by using an injector. Aligning the micropores of the gradient hole deep semi-perforated chip and the equal-pore deep semi-perforated chip, standing for 1h, and removing the gradient hole deep semi-perforated chip to obtain the product containing Ca (NO)3)2And a half-perforated chip with equal height and depth of holes and a Gly mixed solution with gradient concentration;
3) adhering a chip with a uniform hole depth and a complete perforation to the surface of a silicon wafer coated with a collagen film in a spinning mode, treating the plasma for 3min, and using a 1mL injector to inject (NH) prepared in the step 1)4)2HPO4Injecting the solution into the micropores of the chip with the same pore depth and complete perforation, and discharging the small bubbles in the micropores with a syringe to obtain the product (NH)4)2HPO4The chip is completely perforated by the equal-height holes of the solution;
4) adhering (NH) to the step 3)4)2HPO4Placing the chip with the same height and complete perforation into the inner frame of the auxiliary device, installing the metal mesh and the outer frame, and then loading Ca (NO) in the step 2)3)2And pushing the chip with the gradient-concentration Gly mixed solution and the same height hole and depth semi-perforated hole along the outer frame to make the chip tightly contact with the metal net. Wrapping the auxiliary device with the preservative film, placing a 500g stainless steel weight in the outer frame, ensuring that the two chips are in close contact, placing the stainless steel weight in a constant-temperature culture oscillator, taking out the stainless steel weight after reacting for 24 hours, removing the weight and the preservative film, placing the stainless steel weight in a vacuum drying oven for drying for 2 hours, then soaking the stainless steel weight in deionized water for 48 hours, and changing water every 12 hours. And removing the outer frame, transferring the residual system to a vacuum drying oven for drying for 2.5h, and removing the chip with the same height and hole depth and completely perforating to obtain a product deposited on the surface of the silicon wafer film in an array manner.
FIG. 8 is a schematic diagram of a chip with equal height hole depth and half through hole, a chip with gradient hole depth and half through hole, and a chip with equal height hole depth and full through hole. The diameter of each micropore of the chip with the equal pore depth and the half-perforated hole is 1mm, the depth of each micropore is 1.5mm, the number of micropore arrays is 121, and the distance between every two micropores is 3 mm. The diameter of each micropore of the gradient-hole-depth half-perforated chip is 1mm, the depths of the micropores are 0.5mm, 0.7mm, 0.9mm, 1.1mm, 1.3mm, 1.5mm, 1.7mm, 1.9mm, 2.1mm, 2.3mm and 2.5mm from left to right, the depth difference of adjacent micropore arrays is 0.2mm, the number of the micropore arrays is 121, and the distance is 3 mm. The diameter of the micropores of the chip with the equal-height hole depth and completely perforated is 1mm, the depth of the micropores is 1.5mm, the number of the micropore arrays is 121, and the distance is 3 mm.
Fig. 9 is a diagram of an auxiliary device used in the present embodiment. The thickness of the metal net is 0.2mm, the side length of the square micropores is 1.1mm, the number of the micropore arrays is 121, and the distance is 3 mm.
FIG. 10 is the scanning electron microscope result chart and the scanning electron microscope collection position point for establishing Gly concentration gradient synthesized calcium phosphate. With the increase of the concentration of Gly, the morphology of the calcium phosphate is obviously changed in a gradient manner, and the three-dimensional cluster structure is gradually changed into a strip-shaped structure for two-dimensional stacking.
The above embodiments are preferred embodiments of the present invention, but the present invention is not limited to the above embodiments, and any other changes, modifications, substitutions, combinations, and simplifications which do not depart from the spirit and principle of the present invention should be construed as equivalents thereof, and all such changes, modifications, substitutions, combinations, and simplifications are intended to be included in the scope of the present invention.

Claims (5)

1. A preparation method for synthesizing a micro-nano material on a high-flux membrane is characterized by comprising the following steps:
1) injecting a reagent A solution for synthesizing a micro-nano material into micropores of the equal-height pore-depth semi-perforated chip, and injecting a mixed solution of A and B into micropores of the gradient pore-depth semi-perforated chip, wherein B is an additive for synthesizing the micro-nano material;
2) aligning the equal-height pore depth semi-perforated chip with the micropores of the gradient pore depth semi-perforated chip, standing until the solution is fully mixed, and removing the gradient pore depth semi-perforated chip to obtain the equal-height pore depth semi-perforated chip with the mixed solution of A and gradient concentration B in the micropores;
3) adhering the chip with the same height and the hole depth and completely perforating to the surface of the silicon chip with the film, and injecting a reagent C solution for synthesizing the micro-nano material into the micropores of the chip with the same height and the hole depth and completely perforating;
4) and aligning the micro-pores of the chip with the same height, the full perforation and the semi-perforation with the same height, mixing and reacting the solutions, and finally depositing on the surface of the membrane to obtain the required micro-nano material.
2. The preparation method of the high-throughput membrane-based synthesis micro-nano material according to claim 1, characterized in that: in the step 1), the semi-perforated chip material with the same pore depth is polydimethylsiloxane and comprises a plurality of cylindrical micropore arrays, the diameters of the micropores are 0.5-2 mm, the depths of the micropores are 0.5-2.5 mm, the depths of the micropores are the same, the thickness of the chip is larger than the depth of the micropores, the number of the micropore arrays is 36-121, and the distance is 3-6 mm.
3. The preparation method of the high-throughput membrane-based synthesis micro-nano material according to claim 1, characterized in that: in the step 1), the gradient-hole-depth semi-perforated chip material is polydimethylsiloxane and comprises a plurality of cylindrical micropore arrays, the diameters of micropores are 0.5-2 mm, the depths of the micropores are 0.1-3.3 mm, the depth difference of adjacent micropore arrays is 0.2-0.4 mm, the depths of the micropores in the same row are the same, the thickness of the chip is larger than the maximum micropore depth, the number of the micropore arrays is 36-121, and the distance is 3-6 mm.
4. The preparation method of the high-throughput membrane-based synthesis micro-nano material according to claim 1, characterized in that: in the step 3), the chip material with the equal-pore-depth complete perforation is polydimethylsiloxane and comprises a plurality of cylindrical micropore arrays, the diameters of the micropores are 0.5-2 mm, the depths of the micropores are 0.5-2.5 mm, the depths of the micropores are the same, the thickness of the chip is equal to the depths of the micropores, the number of the micropore arrays is 36-121, and the distance is 3-6 mm.
5. The preparation method of the high-throughput membrane-based synthesis micro-nano material according to claim 1, characterized in that: in the step 4), the auxiliary device consists of a base, an inner frame, a metal net and an outer frame; the middle of the base is provided with a boss, a silicon wafer adhered with a chip with the same height, hole depth and complete perforation is placed on the boss, and 4-12 screw holes are distributed around the boss; the inner frame is arranged on the base, the height of the inner frame is less than the sum of the height of the boss, the thickness of the silicon wafer, the thickness of the film and the thickness of the chip which is completely punched by the equal-height hole depth, the hollow part of the inner frame is consistent with the shape and the size of the boss of the base, 4-12 screw holes are distributed on four sides of the inner frame, and the positions of the screw holes correspond to the positions of the screw holes of the base; the metal net is arranged on the inner frame, the thickness of the metal net is 0.1-0.2 mm, the metal net comprises a plurality of square through micropore arrays, the side length of each square micropore is 0.6-2.1 mm, the number of the micropore arrays is 36-121, the distance is 3-6 mm, 4-12 screw holes are distributed on the four sides of the metal net, and the positions of the screw holes correspond to the positions of the base and the screw holes of the inner frame; the base, the inner frame and the metal net are combined and fixed by 4 to 12 screws; the outer frame is arranged on the metal net, the height of the outer frame is larger than the sum of the height of the inner frame, the thickness of the metal net and the thickness of the chip with the equal-height hole depth and half-through hole, the hollow part of the outer frame is consistent with the shape and the size of the boss of the base, the inner frame can be accommodated by hollowing the lower side of the outer frame, 4-12 cylindrical holes are distributed on the four sides of the outer frame to accommodate nuts, and the positions of the cylindrical holes correspond to the positions of the screw holes of the metal net.
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