CN113193626A

CN113193626A - Intelligent charger starter

Info

Publication number: CN113193626A
Application number: CN202110561514.4A
Authority: CN
Inventors: 张洪川
Original assignee: Individual
Current assignee: Individual
Priority date: 2021-05-22
Filing date: 2021-05-22
Publication date: 2021-07-30

Abstract

The invention discloses an intelligent charger starter which comprises a PNP transistor Q1, an NMOS tube Q2, an NMOS tube Q3, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a voltage stabilizing tube Z1, a voltage stabilizing tube Z2, a diode D1, a diode D2, a diode D3, a capacitor C1 and a capacitor C2; the circuit of the invention has simple structure, low cost, low power consumption and strong universality, is suitable for all BMSs in the market because of not depending on the MCU, has small volume and strong compatibility, is only used for starting the intelligent charger, has no influence on external equipment and has strong expansibility.

Description

Intelligent charger starter

Technical Field

The invention relates to the technical field of starters, in particular to an intelligent charger starter.

Background

In the BMS industry, the embarrassment problem of not being able to charge a battery pack when a charger used by an end user is an intelligent charger is addressed. A separate circuit module for activating the smart charger is usually added to the BMS to allow the smart charger to output current to charge the battery pack. The control process of the intelligent charger adopts a certain circuit structure (MCU is contained in the circuit structure), when the intelligent charger is connected, the circuit structure detects the output voltage of the intelligent charger, and then the circuit structure outputs high level to the G pin of the discharging MOS tube to open the discharging MOS tube. The battery voltage is detected by the smart charger, thereby activating the smart charger. That is to say, the working principle of the circuit is that the external voltage access is detected to judge that the charger is accessed, and then the circuit opens the discharging MOS tube to activate the intelligent charger. This type of approach to smart charger activation circuits has the following disadvantages:

(1) the circuit structure is complex, (2) the circuit is controlled by an MCU, (3) the universality is poor, (4) the cost is high, and (5) the power consumption is high, and because the circuit module needs to provide stable voltage for the MCU, a voltage reduction circuit or an LDO (low dropout regulator) is usually needed, the power consumption of the power module is high.

Therefore, there is a need to develop a solution to the above problems.

Disclosure of Invention

In view of the above, the present invention is directed to the defects in the prior art, and a primary object of the present invention is to provide an intelligent charger starter, which can effectively solve the problems of complex circuit, high cost and high power consumption of the conventional starter.

In order to achieve the purpose, the invention adopts the following technical scheme:

an intelligent charger starter comprises a PNP transistor Q1, an NMOS transistor Q2, an NMOS transistor Q3, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a voltage stabilizing tube Z1, a voltage stabilizing tube Z2, a diode D1, a diode D2, a diode D3, a capacitor C1 and a capacitor C2;

the emitter of the PNP transistor Q1 and one end of the resistor R1 are both connected to the output end of the diode D1, the input end of the diode D1 is connected to the B + end, the base of the PNP transistor Q1 is connected to one end of the resistor R8, the collector of the PNP transistor Q1 is connected to one end of the resistor R11, the G pole of the NMOS transistor Q2 is connected to one end of the capacitor C1, one end of the resistor R3, the output end of the zener diode Z1, one end of the resistor R4, the output end of the diode D4, one end of the resistor R4 and one end of the resistor R4, the D pole of the NMOS transistor Q4 is connected to one end of the resistor R4, the other end of the resistor R4 is connected to one end of the resistor R4, the S pole of the NMOS transistor Q4, the other end of the capacitor C4, the input end of the zener diode Z4, one end of the resistor R4 and the input end of the diode D4 are both connected to the C4, the other end of the resistor R4, the other end of the resistor R1 is connected with one end of a resistor R2, the other end of the resistor R2 is connected with the other end of a resistor R3, the D pole of the NMOS tube Q3 is connected with the other end of the resistor R6 and the other end of the resistor R7, the G pole of the NMOS tube Q3 is connected with one end of a capacitor C2, the output end of a voltage regulator tube Z2, one end of the resistor R14 and the output end of a diode D3, the S pole of the NMOS tube Q3, the other end of the capacitor C2, the input end of the voltage regulator tube Z2 and one end of the resistor R15 are all connected with a BAT-terminal, the other end of the resistor R15 is connected with the other end of the resistor R14, the input end of the diode D3 is connected with one end of a resistor R13, the other end of the resistor R13 is connected with one end of a resistor R12, and the other end of the resistor R12 is connected with the other end of the resistor R11.

An intelligent charger starter comprises a PNP transistor Q1, an NMOS tube Q2, an NMOS tube Q3, an NMOS tube Q4, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a resistor R20, a regulator Z1, a regulator Z2, a regulator Z3, a diode D1, a diode D2, a diode D3, a diode D4, a capacitor C1, a capacitor C2 and a capacitor C3;

the emitter of the PNP transistor Q1, one end of the resistor R1 and one end of the resistor R16 are all connected to the output end of the diode D1, the input end of the diode D1 is connected to the B + end, the base of the PNP transistor Q1 is connected to one end of the resistor R8, the collector of the PNP transistor Q1 is connected to one end of the resistor R11, the G pole of the NMOS transistor Q2 is connected to one end of the capacitor C2, one end of the resistor R2, the output end of the regulator Z2, one end of the resistor R2 and the input end of the diode D2, the D pole of the NMOS transistor Q2 is connected to one end of the resistor R2, the other end of the resistor R2 is connected to one end of the resistor R2, the S pole of the NMOS transistor Q2, the other end of the capacitor C2, the input end of the regulator Z2, one end of the resistor R2 and the other end of the resistor R2 are all connected to the C-2, one end of the resistor R2 is connected to one end of the resistor R2, the other end of the resistor R2, the other end of the resistor R2 is connected with the other end of the resistor R3, the D pole of the NMOS transistor Q3 is connected with one end of the resistor R6 and one end of the resistor R7, the G pole of the NMOS transistor Q3 is connected with one end of the capacitor C2, the output end of the voltage regulator Z2, one end of the resistor R2 and the output end of the diode D2, the S pole of the NMOS transistor Q2, the other end of the capacitor C2, the input end of the voltage regulator Z2 and one end of the resistor R2 are all connected with the BAT-terminal, the other end of the resistor R2 is connected with the other end of the resistor R2, the D pole of the NMOS transistor Q2 is connected with the output end of the diode D2, the S pole of the NMOS transistor Q2 is connected with one end of the diode D2, the other end of the resistor R2, the D pole of the NMOS transistor Q2 is connected with the output end of the diode D2, the resistor R2 and the input end of the capacitor C2 and the voltage regulator Z2. The G pole of the NMOS transistor Q4 is connected with one end of a resistor R18, one end of a resistor R19, the other end of a capacitor C3 and the output end of a voltage regulator Z3, the other end of the resistor R18 is connected with one end of a resistor R17, the other end of the resistor R17 is connected with the other end of the resistor R16, and the other end of the resistor R19 is connected with the other end of the resistor R20.

An intelligent charger starter comprises a PMOS tube Q1, an NMOS tube Q2, an NMOS tube Q3, an NMOS tube Q4, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a resistor R20, a resistor R21, a resistor R22, a voltage regulator Z22, a diode D22, a capacitor C22, and a capacitor C22;

the S pole of the PMOS tube Q1, the output end of the voltage regulator tube Z4, one end of the resistor R21, one end of the resistor R1 and one end of the resistor R1 are all connected with the output end of the diode D1, the input end of the diode D1 is connected with the B + end, the G pole of the PMOS tube Q1 is connected with the input end of the voltage regulator tube Z1, one end of the resistor R1 and one end of the resistor R1, the other end of the resistor R1 is connected with the other end of the resistor R1, the D pole of the NMOS tube Q1 is connected with one end of the resistor R1, the G pole of the NMOS tube Q1 is connected with one end of the capacitor C1, one end of the resistor R1, the output end of the voltage regulator tube Z1, one end of the resistor R1 and the input end of the diode D1, the D pole of the NMOS tube Q1 is connected with one end of the resistor R1, the other end of the resistor R1 is connected with one end of the voltage regulator tube R1, the input end of the capacitor S1 and the input end of the diode R1, the other end of the resistor R5 is connected with the other end of the resistor R4, the other end of the resistor R1 is connected with one end of the resistor R2, the other end of the resistor R2 is connected with the other end of the resistor R3, the D pole of the NMOS transistor Q3 is connected with one end of the resistor R6 and one end of the resistor R7, the G pole of the NMOS transistor Q3 is connected with one end of the capacitor C3, the output end of the regulator Z3, one end of the resistor R3 and the output end of the diode D3, the S pole of the NMOS transistor Q3, the other end of the capacitor C3, the input end of the regulator Z3 and one end of the resistor R3 are connected with the BAT-end, the other end of the resistor R3 is connected with the other end of the resistor R3, the D pole of the diode D3 is connected with one end of the resistor R3, the other end of the output end of the NMOS transistor D3 is connected with the output end of the diode R3, and the output end of the NMOS transistor D3 is connected with the output end of the diode D3, The other end of the resistor R6, the other end of the resistor R7, one end of the resistor R20, one end of the capacitor C3 and the input end of the voltage regulator tube Z3, the G pole of the NMOS tube Q4 is connected with one end of the resistor R18, one end of the resistor R19, the other end of the capacitor C3 and the output end of the voltage regulator tube Z3, the other end of the resistor R18 is connected with one end of the resistor R17, the other end of the resistor R17 is connected with the other end of the resistor R16, and the other end of the resistor R19 is connected with the other end of the resistor R20.

An intelligent charger starter comprises a PNP transistor Q1, an NPN transistor Q2, an NMOS transistor Q3, an NMOS transistor Q4, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a resistor R20, a voltage regulator Z2, a voltage regulator Z3, a diode D1, a diode D2, a diode D3, a diode D4, a capacitor C2 and a capacitor C3;

the emitter of the PNP transistor Q1, one end of the resistor R1, and one end of the resistor R16 are all connected to the output terminal of the diode D1, the input terminal of the diode D1 is connected to the B + terminal, the base of the PNP transistor Q1 is connected to one end of the resistor R8, the collector of the PNP transistor Q1 is connected to one end of the resistor R11, the base of the NPN transistor Q2 is connected to one end of the resistor R3, one end of the resistor R4, and the input terminal of the diode D4, the collector of the NPN transistor Q4 is connected to one end of the resistor R4, the other end of the resistor R4 is connected to one end of the resistor R4, the emitter of the NPN transistor Q4, the other end of the resistor R4, and the input terminal of the diode D4 are all connected to the C-terminal, the other end of the resistor R4 is connected to one end of the resistor R4, the other end of the NMOS transistor Q4, and one end of the resistor R4 are connected to one end of the NMOS 4. The G pole of the NMOS tube Q3 is connected with one end of a capacitor C2, the output end of a voltage regulator tube Z2, one end of a resistor R14 and the output end of a diode D3, the S pole of the NMOS tube Q3, the other end of the capacitor C2, the input end of the voltage regulator tube Z2 and one end of the resistor R2 are connected with the BAT-end, the other end of the resistor R2 is connected with the other end of the resistor R2, the input end of the diode D2 is connected with one end of the resistor R2, the other end of the resistor R2 is connected with one end of the resistor R2, the D pole of the NMOS tube Q2 is connected with the output end of the diode D2, the S pole of the NMOS tube Q2 is connected with the output end of the diode D2, the other end of the resistor R2, one end of the G pole of the resistor R2 and the output end of the voltage regulator tube D2 are connected with the output end of the resistor R2 and the voltage regulator tube Z2, the other end of the resistor R18 is connected to one end of a resistor R17, the other end of the resistor R17 is connected to the other end of a resistor R16, and the other end of the resistor R19 is connected to the other end of a resistor R20.

An intelligent charger starter comprises a PMOS tube Q1, an NPN transistor Q2, an NMOS tube Q3, an NMOS tube Q4, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a resistor R20, a resistor R21, a resistor R22, a voltage regulator Z2, a voltage regulator Z3, a voltage regulator Z4, a diode D1, a diode D2, a diode D3, a diode D4, a capacitor C2 and a capacitor C3;

the S pole of the PMOS tube Q1, the output end of the voltage regulator tube Z4, one end of a resistor R21, one end of a resistor R1 and one end of a resistor R16 are all connected with the output end of a diode D1, the input end of the diode D1 is connected with the B + end, the G pole of the PMOS tube Q1 is connected with the input end of the voltage regulator tube Z4, one end of the resistor R22 and one end of the resistor R22, the other end of the resistor R22 is connected with the other end of the resistor R22, the D pole of the PMOS tube Q22 is connected with one end of the resistor R22, the base of the NPN transistor Q22 is connected with one end of the resistor R22, one end of the resistor R22 and the input end of the diode D22, the collector of the NPN transistor Q22 is connected with one end of the resistor R22, the other end of the resistor R22 is connected with the other end of the NPN transistor Q22, the emitter of the resistor Q22, the other end of the resistor R22 and the input end of the resistor D22 are connected with the input end of the NPN 22, and the resistor R22, the other end of the resistor R22 is connected with the input end of the resistor R22 and the resistor R22. The other end of the resistor R2 is connected with the other end of the resistor R3, the D pole of the NMOS transistor Q3 is connected with one end of the resistor R6 and one end of the resistor R7, the G pole of the NMOS transistor Q3 is connected with one end of the capacitor C2, the output end of the voltage regulator Z2, one end of the resistor R2 and the output end of the diode D2, the S pole of the NMOS transistor Q2, the other end of the capacitor C2, the input end of the voltage regulator Z2 and one end of the resistor R2 are all connected with the BAT-terminal, the other end of the resistor R2 is connected with the other end of the resistor R2, the D pole of the NMOS transistor Q2 is connected with the output end of the diode D2, the S pole of the NMOS transistor Q2 is connected with one end of the diode D2, the other end of the resistor R2, the D pole of the NMOS transistor Q2 is connected with the output end of the diode D2, the resistor R2 and the input end of the capacitor C2 and the voltage regulator Z2. The G pole of the NMOS transistor Q4 is connected with one end of a resistor R18, one end of a resistor R19, the other end of a capacitor C3 and the output end of a voltage regulator Z3, the other end of the resistor R18 is connected with one end of a resistor R17, the other end of the resistor R17 is connected with the other end of the resistor R16, and the other end of the resistor R19 is connected with the other end of the resistor R20.

Compared with the prior art, the invention has obvious advantages and beneficial effects, and specifically, the technical scheme includes that:

the circuit of the invention has simple structure, low cost, low power consumption and strong universality, is suitable for all BMSs in the market because of not depending on MCU, has small volume and strong compatibility, is only used for starting an intelligent charger, has no influence on external equipment, has strong expansibility, and is suitable for the selection and parameter configuration of components in the current circuit and is suitable for three-element lithium batteries of 3-45 strings, lithium iron phosphate batteries of 4-52 strings and lithium titanate batteries of 5-70 strings. If necessary to accommodate a greater number of strings of battery packs. Under the condition that the circuit structure is not changed, the requirements can be met only by adjusting the parameters and the types of partial elements.

To more clearly illustrate the structural features and effects of the present invention, the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments:

drawings

FIG. 1 is a circuit diagram illustrating a first preferred embodiment of the present invention;

FIG. 2 is a diagram illustrating a starter accessing a battery system according to a first preferred embodiment of the present invention;

FIG. 3 is a schematic diagram illustrating the current flow in the first phase according to the first preferred embodiment of the present invention;

FIG. 4 is a schematic diagram of the current path in the second phase of the first preferred embodiment of the present invention;

FIG. 5 is a schematic diagram illustrating the current flow in the second phase of the first preferred embodiment of the present invention;

FIG. 6 is a schematic diagram of a low impedance path between the C-terminal and the BAT-terminal according to the first preferred embodiment of the present invention;

FIG. 7 is a circuit diagram illustrating a second preferred embodiment of the present invention;

FIG. 8 is a circuit diagram illustrating a third preferred embodiment of the present invention;

FIG. 9 is a circuit diagram illustrating a fourth preferred embodiment of the present invention;

FIG. 10 is a schematic circuit diagram of a fifth preferred embodiment of the present invention.

Detailed Description

Referring to fig. 1 to 6, a detailed structure of the first preferred embodiment of the invention is shown, which includes a PNP transistor Q1, an NMOS transistor Q2, an NMOS transistor Q3, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a regulator Z1, a regulator Z2, a diode D1, a diode D2, a diode D3, a capacitor C1, and a capacitor C2.

(1) Network node specification:

and a B + end: the total positive pole of the battery pack is also the positive pole of the output end of the battery pack system and is used for connecting with the positive pole of a charger or a load.

C-terminal: the negative electrode of the output end of the battery pack system is used for being connected with a charger or the negative electrode of a load, and in a battery pack object, the C-end is an output line on the BMS. Within the BMS industry, C-is also referred to as P-for a same mouth product.

BAT-terminal: the overall negative pole of the battery, also referred to as the B-terminal. In the battery pack entity, the B-terminal of the BMS is directly connected to the B-terminal of the battery pack.

Therefore, three access points, namely a B + end, a P-end and a B-end, are marked on the real object of the starter circuit board and are used for corresponding to the B + end, the P-end and the B-end in the battery pack system.

(2) The working characteristics of the intelligent charger are as follows:

the smart charger will have an output voltage that is lower than the nominal output voltage before normal start-up. For example, a three-element 13-string intelligent charger normally outputs 54.6V. Before the intelligent charger is started normally, the voltage of the output end of the intelligent charger is about 20V. It is this output voltage of the smart charger that is used by the starter to activate the smart charger.

(3) Principle of starter activation intelligent charger:

the starter activates the intelligent charger in three stages:

the first stage is as follows:

when the intelligent charger is connected, the intelligent charger outputs a certain voltage, and the voltage enables the NMOS tube Q2 to be turned on. The voltage division ratio of 3/2 is composed of the resistor R1, the resistor R2, the resistor R3, the resistor R4 and the resistor R5, and the turn-on voltage of the NMOS tube Q2 is 2.5V, so that the voltage division ratio enables the NMOS tube Q2 to be completely turned on when the input voltage is more than 7V. For example, the output voltage of the intelligent charger is 20V, and as a result of the voltage division, the G voltage of the NMOS transistor Q2 is about 8V (neglecting the conduction voltage drop of the diode D1 during estimation). The current returns to the negative electrode of the charger from the positive electrode of the charger through the diode D1, the resistor R1, the resistor R2, the resistor R3, the resistor R4 and the resistor R5, and the current in the first stage goes as shown in fig. 3.

And a second stage:

because the NMOS tube Q2 is turned on, the emitter of the PNP transistor Q1 is turned on, the PNP transistor Q1 is turned on, and the output of the charger is added with a current loop which returns to the negative electrode of the charger from the positive electrode of the charger through the emitter and the base of the PNP transistor Q1, the resistor R8, the resistor R9, the resistor R10, and the D electrode and the S electrode of the NMOS tube Q2. The current path of the second stage charger is shown in fig. 4.

Meanwhile, due to the conduction of the PNP transistor Q1, the battery current reaches the BAT-end through the emitter and the collector of the PNP transistor Q1, the resistor R11, the resistor R12, the resistor R13, the diode D3, the resistor R14 and the resistor R15. The voltage division ratio formed by the resistor R11, the resistor R12, the resistor R13, the resistor R14, and the resistor R15 is also 3/2. Therefore, as long as the battery voltage is greater than 7V, the NMOS transistor Q3 can be guaranteed to be fully turned on. When 13 strings of ternary lithium batteries are used for over-discharge protection, the total residual voltage of the batteries is 40V, and the sum of the voltage division of the resistor R14 and the voltage division of the resistor R15 is 16V as a result of serial voltage division of the resistor R11, the resistor R12, the resistor R13, the resistor R14 and the resistor R15. Due to the voltage regulator tube Z2, the G voltage of the NMOS tube Q3 is regulated at 12V. Since the NMOS transistor Q3 is turned on, the battery current also passes through the diode D1, the resistor R1, the resistor R2, the resistor R3, the resistor R6, the resistor R7, and the NMOS transistor Q3 to the BAT-terminal.

The current profile of the second stage cell is shown in fig. 5:

and a third stage:

due to the turn-on of the NMOS transistor Q3, the C-terminal forms a low impedance path to the BAT-terminal through the diode D2, the resistor R6, the resistor R7 and the NMOS transistor Q3. The impedance between the C-terminal and the BAT-terminal changes from infinity to about 1.5K. The smart charger can detect the battery voltage and start up accordingly. For simplicity, the current drain in the circuit is not marked at this stage, only the impedance path and the G-voltage of the MOS are marked. The low impedance path between the C-terminal and the BAT-terminal is shown in FIG. 6.

The process of activating the intelligent charger by the starter can be briefly described as follows: the NMOS transistor Q2 is turned on by the output voltage of the charger. After the NMOS transistor Q2 is turned on, the PNP transistor Q1 is turned on by the charger voltage. When the PNP transistor Q1 is turned on, the NMOS transistor Q3 is turned on by the battery voltage. After the NMOS tube Q3 is turned on, the impedance between the C-terminal and the BAT-terminal changes from infinite to low, thereby activating the intelligent charger.

Since the NMOS Q3 is turned on, the NMOS Q2 is turned off, the PNP transistor Q1 is also turned off after the NMOS Q2 is turned off, and the NMOS Q3 is also turned off slowly due to the turning off of the PNP transistor Q1. The response time is different due to different intelligent chargers in order to increase the versatility of the starter circuit. Therefore, in the circuit, a delay module is added. Therefore, after the NMOS transistor Q3 is turned on, a time delay is required to turn off the NMOS transistor Q2 by the NMOS transistor Q3, and before that, the smart charger has enough response time to start. The circuit after adding the delay module is shown in fig. 7, which shows a specific structure of a second preferred embodiment of the present invention, and includes a PNP transistor Q, an NMOS transistor Q, a resistor R, a voltage regulator Z, a diode D, a capacitor C, and a capacitor C.

And when the battery pack system is in different working states, the working condition of the starter is controlled.

The core of the starter is not only that the intelligent charger can be started after the intelligent charger is connected. Otherwise the problem with the start-up of a smart charger is not a problem for the BMS industry.

The starter is connected with three points of a B + terminal, a BAT-terminal and a C-terminal in a battery pack system. Therefore, the other core to be considered when designing the starter is low power consumption. Namely, the battery pack is in any working condition, the starter needs to keep low power consumption, and other equipment is not affected. Such as battery charging, discharging, battery idling, battery over-discharge protection, short circuit protection, etc.

Especially when the battery pack is loaded and the BMS over-discharge protects. If the residual voltage of the battery pack is 80V when the BMS is in over-discharge protection, the C-terminal voltage is 80V due to the fact that a load is hung, and if the starter is kept in an open state all the time, the BAT-terminal is only 1.5K in impedance, the power consumption current is about 53.3 mA. The continuous loss of 53.3mA is catastrophic for the over-discharge protected battery, and the battery can be used up and scrapped without needing long time.

The parameter configuration and the structure of starter circuit make the starter can both keep low-power consumption under all operating modes of group battery:

(1) the BMS works normally, and the output end of the battery pack is not loaded or is connected with a load. (2) BMS overdischarge protection, the load is not connected or connected to the output end of the battery pack. (3) BMS short circuit protection. (4) The battery system is normally discharged. (5) The battery system is normally charged. (6) BMS overcharge protection, the load is not connected or is connected to the battery pack output end.

Referring to fig. 8, a specific structure of a third preferred embodiment of the invention is shown, which includes a PMOS transistor Q1, an NMOS transistor Q2, an NMOS transistor Q3, an NMOS transistor Q4, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a resistor R20, a resistor R21, a resistor R22, a voltage regulator Z22, a diode D22, a capacitor C22, and a capacitor C22.

The operation principle of this embodiment is basically the same as that of the first preferred embodiment, and the operation principle of this embodiment will not be described in detail here.

Referring to fig. 9, a detailed structure of a fourth preferred embodiment of the invention is shown, which includes a PNP transistor Q1, an NPN transistor Q2, an NMOS transistor Q3, an NMOS transistor Q4, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a resistor R20, a regulator Z2, a regulator Z3, a diode D1, a diode D2, a diode D3, a diode D4, a capacitor C2, and a capacitor C3.

Referring to fig. 10, a specific structure of a fifth preferred embodiment of the invention is shown, which includes a PMOS transistor Q, an NPN transistor Q, an NMOS transistor Q, a resistor R, a resistor Z, a regulator Z, a diode D, a capacitor C, and a capacitor C.

The design key points of the invention are as follows: the circuit of the invention has simple structure, low cost, low power consumption and strong universality, is suitable for all BMSs in the market because of not depending on MCU, has small volume and strong compatibility, is only used for starting an intelligent charger, has no influence on external equipment, has strong expansibility, and is suitable for the selection and parameter configuration of components in the current circuit and is suitable for three-element lithium batteries of 3-45 strings, lithium iron phosphate batteries of 4-52 strings and lithium titanate batteries of 5-70 strings. If necessary to accommodate a greater number of strings of battery packs. Under the condition that the circuit structure is not changed, the requirements can be met only by adjusting the parameters and the types of partial elements.

The technical principle of the present invention is described above in connection with specific embodiments. The description is made for the purpose of illustrating the principles of the invention and should not be construed in any way as limiting the scope of the invention. Based on the explanations herein, those skilled in the art will be able to conceive of other embodiments of the present invention without inventive effort, which would fall within the scope of the present invention.

Claims

1. An intelligent charger starter, its characterized in that: the PNP type transistor Q1, an NMOS tube Q2, an NMOS tube Q3, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a voltage regulator tube Z1, a voltage regulator tube Z2, a diode D1, a diode D2, a diode D3, a capacitor C1 and a capacitor C2;

2. An intelligent charger starter, its characterized in that: the PNP transistor Q1, an NMOS tube Q2, an NMOS tube Q3, an NMOS tube Q4, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a resistor R20, a stabilivolt Z1, a stabilivolt Z2, a stabilivolt Z3, a diode D1, a diode D2, a diode D3, a diode D4, a capacitor C1, a capacitor C2 and a capacitor C3;

3. An intelligent charger starter, its characterized in that: the voltage regulator comprises a PMOS tube Q1, an NMOS tube Q2, an NMOS tube Q3, an NMOS tube Q4, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a resistor R20, a resistor R21, a resistor R22, a voltage regulator Z22, a diode D22, a capacitor C22 and a capacitor C22;

4. An intelligent charger starter, its characterized in that: the PNP type transistor Q1, the NPN type transistor Q2, the NMOS transistor Q3, the NMOS transistor Q4, the resistor R1, the resistor R2, the resistor R3, the resistor R4, the resistor R6, the resistor R7, the resistor R8, the resistor R9, the resistor R10, the resistor R11, the resistor R12, the resistor R13, the resistor R14, the resistor R15, the resistor R16, the resistor R17, the resistor R18, the resistor R19, the resistor R20, the stabilivolt Z2, the stabilivolt Z3, the diode D1, the diode D2, the diode D3, the diode D4, the capacitor C2 and the capacitor C3;

5. An intelligent charger starter, its characterized in that: the high-power-consumption IGBT comprises a PMOS tube Q1, an NPN transistor Q2, an NMOS tube Q3, an NMOS tube Q4, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a resistor R20, a resistor R21, a resistor R22, a regulator Z2, a regulator Z3, a regulator Z4, a diode D1, a diode D2, a diode D3, a diode D4, a capacitor C2 and a capacitor C3;