CN113189807B - Array substrate, display device and driving method of array substrate - Google Patents
Array substrate, display device and driving method of array substrate Download PDFInfo
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- CN113189807B CN113189807B CN202110531299.3A CN202110531299A CN113189807B CN 113189807 B CN113189807 B CN 113189807B CN 202110531299 A CN202110531299 A CN 202110531299A CN 113189807 B CN113189807 B CN 113189807B
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- 239000000758 substrate Substances 0.000 title claims abstract description 62
- 238000000034 method Methods 0.000 title claims abstract description 27
- 239000004973 liquid crystal related substance Substances 0.000 claims abstract description 30
- 239000010409 thin film Substances 0.000 claims description 49
- 238000010586 diagram Methods 0.000 description 8
- 230000000694 effects Effects 0.000 description 6
- 239000010408 film Substances 0.000 description 2
- 238000009877 rendering Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
- G02F2201/40—Arrangements for improving the aperture ratio
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- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
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- Optics & Photonics (AREA)
- Mathematical Physics (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal (AREA)
Abstract
The invention discloses an array substrate, display equipment and a driving method of the array substrate, and belongs to the technical field of liquid crystal display. The array substrate comprises a plurality of data lines and a plurality of scanning lines which are arranged in an intersecting mode, a plurality of sub-pixels are arranged in an array mode, each row of sub-pixels are provided with the data lines and the scanning lines correspondingly, each sub-pixel comprises a main sub-pixel and a sub-pixel, the control end of a first active switch is connected with the corresponding scanning line of the main sub-pixel, the data signal writing end of the first active switch is connected with the corresponding data line of the main sub-pixel, the control end of a second active switch is connected with the corresponding scanning line of the sub-pixel, and the data signal writing end of the second active switch is connected with the data output end of the first active switch, so that output signals of the array substrate are reduced, simple wiring of a pixel driving structure is achieved, and the aperture opening ratio of the pixels is improved.
Description
Technical Field
The invention relates to the technical field of liquid crystal display, in particular to an array substrate, display equipment and a driving method of the array substrate.
Background
Most of the current high-end liquid crystal application panels are negative Vertical Alignment (VA) liquid crystal panels, and in the VA mode, each sub-pixel includes a plurality of domains (usually 8 domains, which refer to liquid crystal regions of different orientations) in order to extend the viewing angle characteristics. At present, in an array substrate of a VA eight-domain display panel, each sub-pixel includes three Thin Film Transistors (TFTs), and a common electrode is used to implement an eight-domain wide viewing angle, but 3 TFTs exist for controlling the same pixel, which may affect the wiring of a pixel driving structure, thereby affecting the aperture ratio of the pixel, the pixel driving structure needs a common electrode to divide voltage, and a Chip-on-Flex (COF) has one more output signal, which may lead to a more complex Chip-on-Flex, and may lead to a higher cost of the Chip-on-Flex.
The above is only for the purpose of assisting understanding of the technical aspects of the present invention, and does not represent an admission that the above is prior art.
Disclosure of Invention
The invention mainly aims to provide an array substrate, a display device and a driving method of the array substrate, and aims to solve the technical problem that in the prior art, the aperture ratio of a pixel is low due to more output signals of a common VA array substrate.
In order to achieve the above object, the present invention provides an array substrate, including a plurality of data lines and a plurality of scan lines, where the data lines and the scan lines are arranged in a cross manner, and the data lines and the scan lines are arranged in an array of a plurality of sub-pixels, and each row of the sub-pixels is correspondingly provided with the data lines and the scan lines, the array substrate includes:
the sub-pixels comprise a main sub-pixel and a sub-pixel;
the main sub-pixels are connected with the corresponding first active switches, the control ends of the first active switches are connected with the scanning lines corresponding to the main sub-pixels, and the data signal writing ends of the first active switches are connected with the data lines corresponding to the main sub-pixels; and
a plurality of second active switches, the sub-pixels are connected with the corresponding first active switches and the second active switches, and the control ends of the second active switches are connected with the scanning lines corresponding to the sub-pixels
And the data signal writing end of the second active switch is connected with the data output end of the first active switch.
Optionally, the primary sub-pixel and the secondary sub-pixel are arranged side by side.
Optionally, the first active switch and the second active switch are respectively thin film transistors with preset sizes, and the sizes of the first active switch and the second active switch are different.
Optionally, a data output end of the first active switch is connected to a main sub-pixel electrode and configured to provide a data driving signal for the main sub-pixel electrode, and a data output end of the second active switch is connected to a sub-pixel electrode and configured to provide a data driving signal for the sub-pixel electrode.
Optionally, the first active switch outputs a first driving liquid crystal voltage to the main sub-pixel electrode, the second active switch outputs a second driving liquid crystal voltage to the sub-pixel electrode, and the first driving liquid crystal voltage and the second driving liquid crystal voltage are voltages with different voltage values, respectively.
Optionally, the first active switch is disposed below the scan line corresponding to the main sub-pixel, and the second active switch is disposed below the scan line corresponding to the sub-pixel.
Optionally, the first active switch and the second active switch are connected in series, and a control end of the first active switch and a control end of the second active switch are connected to a same scan line.
Optionally, adjacent data lines use drive signals of opposite polarity.
In addition, to achieve the above object, the present invention also provides a display device including the array substrate as described above.
In addition, to achieve the above object, the present invention further provides a driving method of an array substrate, the driving method of an array substrate being applied to the display device as described above, the display device including a main sub-pixel, a sub-pixel, a data line, and a scan line scanned line by line, the driving method of an array substrate including:
and when the main sub-pixel and the sub-pixel receive the driving signal of the scanning line, the main sub-pixel and the sub-pixel are charged through the data line.
The array substrate comprises a first substrate and a second substrate which are oppositely arranged, and a display medium between the first substrate and the second substrate; the first substrate comprises a plurality of data lines and a plurality of scanning lines, and the data lines and the scanning lines are arranged in a crossed manner; the array-arranged display device comprises a plurality of sub-pixels, a data line and a scanning line are correspondingly arranged on each row of sub-pixels, and each sub-pixel comprises a main sub-pixel and a sub-pixel; the main sub-pixels are connected with the corresponding first active switches, the control ends of the first active switches are connected with the scanning lines corresponding to the main sub-pixels, and the data signal writing ends of the first active switches are connected with the data lines corresponding to the main sub-pixels; and the sub-pixels are connected with the corresponding first active switches and the second active switches, the control ends of the second active switches are connected with the scanning lines corresponding to the sub-pixels, and the data signal writing ends of the second active switches are connected with the data output ends of the first active switches, so that the output signals of the array substrate are reduced, the simple wiring of a pixel driving structure is realized, and the aperture opening ratio of the pixels is improved.
Drawings
Fig. 1 is a circuit diagram of a pixel structure in an embodiment of an array substrate according to the invention;
FIG. 2 is a partial circuit diagram of a pixel structure in another embodiment of an array substrate according to the invention;
FIG. 3 is a schematic partial structure diagram of a pixel structure in an embodiment of an array substrate according to the invention;
FIG. 4 is a schematic structural diagram of a display device according to an embodiment of the present invention;
fig. 5 is a flowchart illustrating a driving method of an array substrate according to an embodiment of the invention.
The reference numbers illustrate:
| reference numerals | Name (R) | Reference numerals | Name (R) | |
| 10 | Data line | M | |
|
| 20 | Scanning line | | Sub-pixel electrode | |
| 30 | Sub-pixel | 100 | Eight- |
|
| 40 | |
200 | |
|
| 50 | |
210 | |
|
| 60 | First |
220 | |
|
| 70 | Second active switch |
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without inventive step based on the embodiments of the present invention, are within the scope of protection of the present invention.
It should be noted that all the directional indicators (such as up, down, left, right, front, and rear … …) in the embodiment of the present invention are only used to explain the relative position relationship between the components, the movement situation, etc. in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indicator is changed accordingly.
In addition, the descriptions related to "first", "second", etc. in the present invention are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present invention.
The invention provides an array substrate.
Referring to fig. 1, fig. 1 is a schematic circuit diagram of a pixel structure in an embodiment of an array substrate according to the present invention, in the embodiment of the present invention, a plurality of data lines 10 and a plurality of scan lines 20 are provided, the plurality of data lines 10 and the plurality of scan lines 20 are arranged in a cross manner, a plurality of sub-pixels 30 are arranged in an array, each row of the sub-pixels 30 is provided with the data lines 10 and the scan lines 20 correspondingly, and the array substrate includes: the sub-pixels 30 include a main sub-pixel 40 and a sub-pixel 50; a plurality of first active switches 60, wherein the main sub-pixels 40 are connected to the corresponding first active switches 60, control terminals of the first active switches 60 are connected to the scan lines 20 corresponding to the main sub-pixels 40, and data signal write terminals of the first active switches 60 are connected to the data lines 10 corresponding to the main sub-pixels 40; and a plurality of second active switches 70, wherein the sub-pixels 50 are connected to the corresponding first active switches 60 and the second active switches 70, a control terminal of the second active switch 70 is connected to the corresponding scan line 20 of the sub-pixel 50, and a data signal write terminal of the second active switch 70 is connected to a data output terminal of the first active switch 60.
It should be noted that, in the same row of sub-pixels 30, the main sub-pixels 40 and the sub-pixels 50 are alternately arranged; in the same column of sub-pixels 30, the main sub-pixels 40 and the sub-pixels 50 are alternately arranged; the sub-pixel 50 is respectively connected with a first active switch 60 and a second active switch 70, and the main sub-pixel 40 is connected with the first active switch 60; the first active switches 60 are correspondingly distributed in the main sub-pixels 40, and the second active switches 70 are correspondingly distributed in the sub-pixels 50.
It should be noted that the same sub-pixel 30 includes a main sub-pixel 40 and a sub-pixel 50, and different voltages are applied to the main sub-pixel 40 and the sub-pixel 50 of the same sub-pixel 30, so that the driving liquid crystal voltages of the four display domains of the main display region (the display region corresponding to the main sub-pixel 40) and the four display domains of the sub-display region (the display region corresponding to the sub-pixel 50) in the same sub-pixel 30 are different, thereby implementing an eight-domain wide viewing angle. The first active switch 60 and the second active switch 70 may be thin film transistors, and may also be other circuits capable of achieving the same or similar functions.
The liquid crystal display device comprises a data line 10 and scanning lines 20 scanned line by line, wherein the scanning lines 20 comprise a first scanning line 20 and a second scanning line 20, and the driving time of the first scanning line 20 is earlier than that of the second scanning line 20.
In this embodiment, the first scan line 20 is VGn, and the second scan line 20 is VGn + 1. That is, the sequential scan driving signals are VGn, VGn +1 and VGn +2 … from top to bottom.
The adjacent data lines 10 adopt driving signals with opposite polarities, and the data lines 10 include adjacent first data lines 10 and second data lines 10, wherein the first data lines 10 and the second data lines 10 adopt driving signals with opposite polarities.
It is understood that the first data line 10 is Vdn-m +1 and the second data line 10 is Vdn-m +2, that is, Vdn-m +1 and Vdn-m +2 … are sequentially turned on to write data to the sub-pixel 30.
The first active switch 60 is respectively connected to the scan line 20 and the data line 10;
the second active switch 70 is respectively connected to the scan line 20 and the data output terminal of the first active switch 60, so that the voltages of the main sub-pixel 40 and the sub-pixel 50 are inconsistent, and an eight-domain wide viewing angle effect is achieved.
It can be understood that the common electrode is not disposed between the main sub-pixel 40 and the sub-pixel 50, so that an electrode voltage trace and an active switch are reduced, the electrode voltage trace is reduced, the stitch output of the chip on film can be reduced, the cost of the chip on film is reduced, the number of the active switches and the electrode voltage trace are reduced, the purpose of reducing the output signal of the array substrate is achieved, the simple wiring of the pixel driving structure is realized, and the aperture opening ratio is improved.
The control end of the first active switch 60 is connected to the scan line 20 corresponding to the main sub-pixel 40, the data signal write end of the first active switch 60 is connected to the data line 10 corresponding to the main sub-pixel 40, the control end of the second active switch 70 is connected to the scan line 20 corresponding to the sub-pixel 50, and the data signal write end of the second active switch 70 is connected to the data output end of the first active switch 60.
In this embodiment, the first active switch 60 and the second active switch 70 may be configured as thin film transistors, the first active switch 60 corresponds to a first thin film transistor, the second active switch 70 corresponds to a second thin film transistor, a gate of the first thin film transistor is connected to the scan line 20, a source of the first thin film transistor is connected to the data line 10, a drain of the first thin film transistor is connected to the main subpixel electrode M, a gate of the second thin film transistor is connected to the scan line 20, a source of the second thin film transistor is connected to the drain of the first thin film transistor, and a drain of the first thin film transistor is connected to the sub-subpixel electrode P.
It can be understood that the first active switch 60 and the second active switch 70 are charged through the data line 10, the first active switch 60 is charged first, and the first active switch 60 outputs a voltage to the second active switch 70, so that the main subpixel electrode M and the sub subpixel electrode P obtain different driving liquid crystal voltages.
In this embodiment, each row of sub-pixels 30 in the array substrate is correspondingly provided with a data line 10 and a scan line 20, each sub-pixel 30 includes a main sub-pixel 40 and a sub-pixel 50, the main sub-pixel 40 is connected to a corresponding first active switch 60, a control terminal of the first active switch 60 is connected to the scan line 20 corresponding to the main sub-pixel 40, a data signal write terminal of the first active switch 60 is connected to the data line 10 corresponding to the main sub-pixel 40, the sub-pixel 50 is connected to the corresponding first active switch 60 and second active switch 70, a control terminal of the second active switch 70 is connected to the scan line 20 corresponding to the sub-pixel 50, and a data signal write terminal of the second active switch 70 is connected to a data output terminal of the first active switch 60, so that output signals of the array substrate are reduced, simple wiring of a pixel driving structure is realized, and an aperture ratio of the pixels is increased.
As shown in fig. 2, fig. 2 is a schematic partial circuit diagram of a pixel structure in another embodiment of the array substrate of the invention, which specifically includes: the main sub-pixel 40 and the sub-pixel 50 are arranged side by side.
It can be understood that each sub-pixel 30 includes a main sub-pixel 40 and a sub-pixel 50, the main sub-pixel 40 and the sub-pixel 50 are arranged side by side, the main sub-pixel 40 is in front of the sub-pixel 50, and the sub-pixel 50 is behind the main sub-pixel 40, so that the sub-pixel electrode P corresponding to the main sub-pixel 40 and the sub-pixel electrode M corresponding to the sub-pixel 50 obtain different driving liquid crystal voltages, thereby achieving the effect of eight-domain wide viewing angle.
The first active switch 60 and the second active switch 70 are thin film transistors with preset sizes, respectively, and the sizes of the first active switch 60 and the second active switch 70 are different.
It should be noted that the first active switch 60 and the second active switch 70 can be configured as thin film transistors with different sizes, and the preset size can be set according to actual requirements, which is not limited in this embodiment. Due to the different sizes, the first thin film transistor corresponding to the first active switch 60 and the second thin film transistor corresponding to the second active switch 70 have different voltage driving capabilities, so that the first active switch 60 and the second active switch 70 obtain different driving liquid crystal voltages, and an eight-domain wide viewing angle effect is achieved.
The data output end of the first active switch 60 is connected to the main subpixel electrode M for providing a data driving signal to the main subpixel electrode M, and the data output end of the second active switch 70 is connected to the sub subpixel electrode P for providing a data driving signal to the sub subpixel electrode P;
the first active switch 60 outputs a first driving liquid crystal voltage to the main subpixel electrode M, and the second active switch 70 outputs a second driving liquid crystal voltage to the sub subpixel electrode P, where the first driving liquid crystal voltage and the second driving liquid crystal voltage are voltages having different voltage values, respectively.
It is understood that the first active switch 60 and the second active switch 70 may be configured as thin film transistors, the first active switch 60 corresponds to a first thin film transistor, the second active switch 70 corresponds to a second thin film transistor, a gate of the first thin film transistor is connected to the scan line 20, a source of the first thin film transistor is connected to the data line 10, a drain of the first thin film transistor is connected to the main subpixel electrode M, a gate of the second thin film transistor is connected to the scan line 20, a source of the second thin film transistor is connected to the drain of the first thin film transistor, and a drain of the first thin film transistor is connected to the sub-subpixel electrode P. The first thin film transistor provides a data driving signal to the main sub-pixel electrode M, and the second thin film transistor provides a data driving signal to the sub-pixel electrode P, so that the main sub-pixel electrode M and the sub-pixel electrode P obtain different driving liquid crystal voltages.
As shown in fig. 3, in an embodiment of a partial structure diagram of a pixel structure in an embodiment of an array substrate, in the embodiment, a first conductive channel formed between a source and a drain of a first thin film transistor corresponding to a first active switch 60 is U-shaped, and a second conductive channel formed between a source and a drain of a second thin film transistor corresponding to a second active switch 70 is U-shaped. In a specific design, the source electrode of the first thin film transistor and the source electrode of the second thin film transistor can be designed into a U shape, so that the U shape design of the thin film transistors is realized, the lengths of the source electrodes and the drain electrodes of the first thin film transistor and the second thin film transistor in the extending direction of the scanning line 20 are reduced, that is, the distance of the width of the conductive channel in the extending direction of the scanning line 20 is reduced, so that the space required by wiring is reduced, and the narrow frame design of the display panel is realized. The embodiment may further enable a ratio of a width to a length of the first conductive channel of the first thin film transistor to be larger than a ratio of a width to a length of the second conductive channel of the second thin film transistor. Because the characteristics of the tft are related to the ratio of the width to the length of the conductive channel, and the larger the ratio of the width to the length of the conductive channel is, the better the performance of the tft is, therefore, the ratio of the width to the length of the first conductive channel of the first tft and the ratio of the width to the length of the second conductive channel of the second tft can be further designed by the first active switch 60 and the second active switch 70 without designing tfts with different sizes, so as to distinguish the brightness of the region corresponding to the sub-pixel electrode P from the brightness of the region corresponding to the main sub-pixel electrode M, and further improve the wide-viewing-angle color rendering effect of the lcd.
The first active switch 60 is disposed below the scanning line 20 corresponding to the main sub-pixel 40, and the second active switch 70 is disposed below the scanning line 20 corresponding to the sub-pixel 50;
the first active switch 60 is connected in series with the second active switch 70, and the control end of the first active switch 60 and the control end of the second active switch 70 are connected to the same scan line 20.
It is easy to understand that the first thin film transistor corresponding to the first active switch 60 and the second thin film transistor corresponding to the second active switch 70 are disposed on the same side of the scan line 20 corresponding to the same sub-pixel 30 and below the scan line 20, the first thin film transistor corresponding to the first active switch 60 and the second thin film transistor corresponding to the second active switch 70 are connected in series, the source of the second thin film transistor is connected to the drain of the first thin film transistor, and meanwhile, the gate of the first thin film transistor and the gate of the second thin film transistor are connected to the same scan line 20.
The adjacent data lines 10 adopt driving signals with opposite polarities.
It can be understood that the data line 10 includes a first data line 10 and a second data line 10 which are adjacent to each other, wherein the first data line 10 and the second data line 10 use driving signals with opposite polarities. The first data line 10 is Vdn-m, the second data line 10 is Vdn-m + 1, that is, Vdn-m + 1 and Vdn-m + 2 … are sequentially turned on to perform data writing on the high voltage region Vpla, and the adjacent first sub-pixel 30 and second sub-pixel 30 are arranged with opposite polarities.
In this embodiment, the main sub-pixel 40 and the sub-pixel 50 in the array substrate are arranged side by side, the first active switch 60 and the second active switch 70 are arranged as thin film transistors with different sizes, the first active switch 60 is arranged below the scan line 20 corresponding to the main sub-pixel 40, the second active switch 70 is arranged below the scan line 20 corresponding to the sub-pixel 50, and the first active switch 60 and the second active switch 70 are connected in series, a control end of the first active switch 60 and a control end of the first active switch 60 are connected to the same scan line 20, a data output end of the first active switch 60 is connected to the main sub-pixel electrode M for providing a data driving signal to the main sub-pixel electrode M, a data output end of the second active switch 70 is connected to the sub-pixel electrode P for providing a data driving signal to the sub-pixel electrode P, the first active switch 60 outputs a first driving liquid crystal voltage to the main sub-pixel electrode M, the second active switch 70 outputs a second driving liquid crystal voltage to the sub-pixel electrode P, the first driving liquid crystal voltage and the second driving liquid crystal voltage are respectively voltages with different voltage values, the adjacent data lines 10 adopt driving signals with opposite polarities, the main sub-pixel electrode M and the sub-pixel electrode P obtain different driving liquid crystal voltages, the driving structure adopts thin film transistors with different sizes, the output signals of the array substrate are reduced, simple wiring of the pixel driving structure is realized, and accordingly the aperture ratio of pixels and the color rendering effect of the display are improved.
In order to achieve the above object, the present invention further provides a display device, as shown in fig. 4, which is a schematic structural diagram of an embodiment of the display device, the display device includes an eight-domain display panel 100 and a driving module 200, the eight-domain display panel 100 includes the array substrate as described above, the driving module 200 may include a scanning circuit 210 and a driving circuit 220, the scanning circuit 210 is configured to output a scanning signal, and generally scans the sub-pixels 30 row by row, and the driving circuit 220 outputs a driving signal, so that the sub-pixels 30 receive driving data when being scanned, and display the data.
The driving module 200 can refer to the above embodiment, and through this process, the main sub-pixel 40 and the sub-pixel 50 in the sub-pixel 30 can obtain different driving liquid crystal voltages, so as to realize an eight-domain wide viewing angle, and improve the aperture opening ratio of the pixel by reducing the output signal of the array substrate.
The specific structure of the display panel refers to the above embodiments, and since the device adopts all technical solutions of all the above embodiments, at least all the beneficial effects brought by the technical solutions of the above embodiments are achieved, and no further description is given here.
In order to achieve the above object, the present invention further provides a driving method of an array substrate, as shown in fig. 5, which is a schematic flow chart of an embodiment of the driving method of the array substrate, the driving method of the array substrate is applied to the display device as described above, the display device includes a main sub-pixel 40, a sub-pixel 50, a data line 10, and a scan line 20 scanned line by line, and the driving method of the array substrate includes:
step S10: the main sub-pixel 40 and the sub-pixel 50 are charged through the data line 10 when receiving the driving signal of the scan line 20.
According to the technical scheme provided by the embodiment, when the main sub-pixel 40 and the sub-pixel 50 receive the driving signal of the scanning line 20, the data line 10 is used for charging, the main sub-pixel 40 is connected with the data line 10, the main sub-pixel 40 is firstly charged, and the main sub-pixel 40 outputs voltage to the sub-pixel 50, so that the sub-pixel electrode P corresponding to the main sub-pixel 40 and the sub-pixel electrode M corresponding to the sub-pixel 50 obtain different driving liquid crystal voltages, and thus the effect of eight-domain wide viewing angle is achieved, the output signal of the array substrate is reduced, and the aperture ratio of the pixel is improved.
It should be understood that the above is only an example, and the technical solution of the present invention is not limited in any way, and in a specific application, a person skilled in the art may set the technical solution as needed, and the present invention is not limited thereto.
It should be noted that the above-described work flows are only exemplary, and do not limit the scope of the present invention, and in practical applications, a person skilled in the art may select some or all of them to achieve the purpose of the solution of the embodiment according to actual needs, and the present invention is not limited herein.
In addition, technical details that are not described in detail in this embodiment may be referred to the array substrate, the display device, and the driving method of the array substrate provided in any embodiment of the present invention, and are not described herein again.
Furthermore, it should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
Through the description of the foregoing embodiments, it is clear to those skilled in the art that the method of the foregoing embodiments may be implemented by software plus a necessary general hardware platform, and certainly may also be implemented by hardware, but in many cases, the former is a better implementation. Based on such understanding, the technical solution of the present invention or portions thereof that contribute to the prior art may be embodied in the form of a software product, where the computer software product is stored in a storage medium (e.g. Read Only Memory (ROM)/RAM, magnetic disk, optical disk), and includes several instructions for enabling a terminal device (e.g. a mobile phone, a computer, a server, or a network device) to execute the method according to the embodiments of the present invention.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (9)
1. The utility model provides an array substrate, many data lines and many scanning lines are the crossing setting, a plurality of sub-pixels of array arrangement, every line sub-pixel corresponds the setting data line and scanning line, its characterized in that, array substrate includes:
the sub-pixels comprise a main sub-pixel and a sub-pixel;
the main sub-pixels are connected with the corresponding first active switches, the control ends of the first active switches are connected with the scanning lines corresponding to the main sub-pixels, and the data signal writing ends of the first active switches are connected with the data lines corresponding to the main sub-pixels; and
a plurality of second active switches, wherein the sub-pixels are connected with the corresponding first active switches and the second active switches, and the control ends of the second active switches are connected with the corresponding scanning lines of the sub-pixels
The data signal write-in end of the second active switch is connected with the data output end of the first active switch;
the first active switch is connected with the second active switch in series, and the control end of the first active switch and the control end of the second active switch are connected with the same scanning line.
2. The array substrate of claim 1, wherein the primary sub-pixels and the secondary sub-pixels are arranged side by side.
3. The array substrate of claim 1, wherein the first active switch and the second active switch are thin film transistors with predetermined sizes, and the sizes of the first active switch and the second active switch are different.
4. The array substrate of claim 1, wherein the data output terminal of the first active switch is connected to a main sub-pixel electrode for providing a data driving signal to the main sub-pixel electrode, and the data output terminal of the second active switch is connected to a sub-pixel electrode for providing a data driving signal to the sub-pixel electrode.
5. The array substrate of claim 4, wherein the first active switch outputs a first driving liquid crystal voltage to the main sub-pixel electrode, the second active switch outputs a second driving liquid crystal voltage to the sub-pixel electrode, and the first driving liquid crystal voltage and the second driving liquid crystal voltage are voltages with different voltage values.
6. The array substrate of claim 1, wherein the first active switch is disposed under the scan line corresponding to the main sub-pixel, and the second active switch is disposed under the scan line corresponding to the sub-pixel.
7. The array substrate of any one of claims 1 to 6, wherein adjacent data lines use drive signals of opposite polarity.
8. A display device comprising the array substrate according to any one of claims 1 to 7.
9. A driving method of an array substrate, wherein the driving method of an array substrate is applied to the display device according to claim 8, the display device includes main sub-pixels, sub-pixels, data lines, and scan lines scanned line by line, the driving method of an array substrate includes:
and when the main sub-pixel and the sub-pixel receive the driving signal of the scanning line, the main sub-pixel and the sub-pixel are charged through the data line.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102393589A (en) * | 2011-11-29 | 2012-03-28 | 南京中电熊猫液晶显示科技有限公司 | Multi-domain vertically aligned liquid crystal display panel and sub-pixel structure thereof |
| CN101644842B (en) * | 2008-09-04 | 2012-10-03 | 友达光电股份有限公司 | Multi switch pixel design using column inversion data driving |
| CN103323990A (en) * | 2013-06-28 | 2013-09-25 | 深圳市华星光电技术有限公司 | Liquid crystal display panel and liquid crystal display device |
| CN104536224A (en) * | 2014-12-31 | 2015-04-22 | 深圳市华星光电技术有限公司 | Thin film transistor array substrate and display panel |
| CN106950768A (en) * | 2017-03-03 | 2017-07-14 | 深圳市华星光电技术有限公司 | Pixel cell and its driving method |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI390275B (en) * | 2007-11-29 | 2013-03-21 | Au Optronics Corp | Liquid crystal display and method for manufacturing same |
| JP5699456B2 (en) * | 2010-06-10 | 2015-04-08 | カシオ計算機株式会社 | Display device |
| TWI407222B (en) * | 2010-07-20 | 2013-09-01 | Au Optronics Corp | Pixel array, polymer stablized alignment liquid crystal display panel, and pixel array driving method |
-
2021
- 2021-05-14 CN CN202110531299.3A patent/CN113189807B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101644842B (en) * | 2008-09-04 | 2012-10-03 | 友达光电股份有限公司 | Multi switch pixel design using column inversion data driving |
| CN102393589A (en) * | 2011-11-29 | 2012-03-28 | 南京中电熊猫液晶显示科技有限公司 | Multi-domain vertically aligned liquid crystal display panel and sub-pixel structure thereof |
| CN103323990A (en) * | 2013-06-28 | 2013-09-25 | 深圳市华星光电技术有限公司 | Liquid crystal display panel and liquid crystal display device |
| CN104536224A (en) * | 2014-12-31 | 2015-04-22 | 深圳市华星光电技术有限公司 | Thin film transistor array substrate and display panel |
| CN106950768A (en) * | 2017-03-03 | 2017-07-14 | 深圳市华星光电技术有限公司 | Pixel cell and its driving method |
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