CN113179091B

CN113179091B - Fixed slope triangular wave signal generating and sampling circuit

Info

Publication number: CN113179091B
Application number: CN202110397187.3A
Authority: CN
Inventors: 陈志杰; 王川恺; 万培元; 马鹏宇
Original assignee: Beijing University of Technology
Current assignee: Beijing University of Technology
Priority date: 2021-04-13
Filing date: 2021-04-13
Publication date: 2022-07-12
Anticipated expiration: 2041-04-13
Also published as: CN113179091A

Abstract

The invention relates to a fixed slope triangular wave signal generating and sampling circuit which can be used for any sampling circuit, such as an over/under sampling phase-locked loop circuit and a digital-to-analog converter circuit. The triangular wave generated by the circuit can replace a sine signal to be used for the sampling circuit, the constant slope in the period ensures the consistency of the gain, ensures the linearity of the sampling voltage, and provides convenience for the design of a post-stage circuit. And in the phase-locked loop circuit, the linear circuit has better noise performance than the nonlinear circuit. The invention improves a common current type triangular wave generating circuit and provides a voltage type triangular wave generating circuit. Compared with a current type, a voltage type converts a current cut-off switch into a voltage cut-off switch, and non-ideal factors such as current overshoot and the like caused by switching are eliminated. The corresponding double-switch sampling circuit converts the sampling alternating current signal into the sampling direct current signal, thereby effectively reducing the negative influence caused by alternating current signal coupling and ensuring the correct result of a post-stage circuit.

Description

Fixed slope triangular wave signal generating and sampling circuit

Technical Field

The invention relates to a fixed slope triangular wave signal generating and sampling circuit which is mainly applied to a sampling holding circuit, such as an oversampling phase-locked loop, a digital-to-analog converter and the like.

Background

In a sampling circuit, the slope of the sampled signal, i.e., the gain of the signal, has a significant impact on the performance and design complexity of the circuit. In terms of performance, such as in an oversampling pll circuit, it is necessary to sample the input signal with a feedback signal and perform a corresponding operation on the frequency and phase based on the sampled information. In the circuit, an input signal is generally a sinusoidal signal, and the largest disadvantage of the sinusoidal signal is that a gain varies with time, the non-linearity of the gain causes a sampling deviation and further affects the noise performance of a loop, and in order to compensate for the variation of the gain, a corresponding quadrature gain needs to be additionally generated, which causes the need of using an additional circuit and consuming additional power consumption, and even a structure using a current mirror partially contributes to a large amount of noise; in terms of design complexity, a larger signal gain can provide a larger design space for subsequent circuits. In the phase-locked loop circuit mentioned above, under certain design requirements, the gain of the phase detector affected by the slope of the input signal is increased, so that a larger adjustment space can be reserved for the resistance of the filter and the gain of the voltage-controlled oscillator, and the area of the resistance is reduced or the design complexity of the voltage-controlled oscillator is reduced. Therefore, an input signal having good linearity is particularly important.

The triangular wave signal provides a relatively fixed slope and therefore overcomes the above disadvantages. The traditional triangular wave generating circuit can be realized by an integrator taking an operational amplifier as a core, but the operational amplifier is complex in design and high in power consumption, a resistor and a capacitor are required to be used, and the area of a chip is large, so that the circuit has great limitation in low-power consumption application, and the stability of the system can be influenced in some feedback systems due to the existence of the large resistor and capacitor. Compared with the traditional circuit, the triangular wave generation circuit provided by the invention can greatly reduce the power consumption of the circuit, and has no influence on the stability of a loop, so that the triangular wave generation circuit has wide application prospect.

In a sample-and-hold circuit, a signal is usually sampled by using a single switch, and during the conduction period of the sampling switch, the voltage change of the sampled signal is ac-coupled to a subsequent stage circuit through a parasitic capacitor, so that a fixed voltage difference is generated in some differential applications, and the output result is influenced. The double-switch sampling structure provided by the invention can solve the problems, the two sampling switches work discontinuously, the influence caused by signal alternating current coupling is avoided, and the correct output result of a rear-stage circuit can be ensured.

Disclosure of Invention

The MOS tube and the capacitor are used for replacing the traditional triangular wave generator based on the operational amplifier, and the operational amplifier is removed, so that the number of components is reduced, the simplification of a circuit, the optimization of the area and the reduction of the power consumption are realized. Meanwhile, on the basis of traditional single-tube sampling, a second group of sampling switches and sampling capacitors are added, and output abnormity caused by alternating current coupling of sampling signals is avoided.

A fixed slope triangular wave signal generating and sampling circuit comprises a current mirror circuit made of PMOS tubes MP1 and MP 2; a switch reset circuit is made of a PMOS tube MP3 and an NMOS tube MN 1; a capacitor C for integrating the charge; a switch SW1 and a sampling capacitor C1 for realizing the first-stage sampling; a switch SW2 and a sampling capacitor C2 for realizing the second-stage sampling; the sources of MP1 and MP2 are connected to VDD, the drain of MP1 is shorted to the gate, and is connected to input Vtr and the source of MP 3; the gate of the MP2 is connected with the drain of the MP3, the drain of the MP2, the upper plate of the capacitor C, one end of the switch SW1 and the drain of the switch tube MN1 are connected together; the lower plate of the capacitor C, the source of the MN1, and the lower plates of the capacitors C1 and C2 are all connected to the ground; the switch SW1, the upper plate of the capacitor C1 and one end of the switch SW2 are connected together; the upper plates of the switch SW2 and the capacitor C2 are connected together to serve as an output port of the circuit.

The control signal CTR is a square wave signal, when the CTR is at a high level, the switch tube MN1 is switched on, the MP3 is switched off, the voltage of the upper polar plate of the capacitor C is reduced to 0, and the reset operation is completed; when the CTR is at a low level, the switching tube MP3 is turned on, the MN1 is turned off, the gate of MP2 and the gate of MP1 are turned on to form a current mirror structure, the MP2 mirrors the current of MP1 to continuously charge the capacitor C, and since the charging current is fixed, a triangular wave with a fixed slope is generated; meanwhile, the switch tubes SW1 and SW2 are alternately conducted; when the SW1 is switched on and the SW2 is switched off, the capacitor C1 samples the triangular wave; when the SW1 is turned off and the SW2 is turned on, the C2 samples the direct current signal on the C1 to realize the isolation of the alternating current signal.

The invention uses voltage cut-off type connection method to replace current cut-off type connection method, and realizes more range of fixed slope. The invention comprises a first stage sampling circuit composed of a sampling switch SW1 and a sampling capacitor C1; a second-stage sampling circuit consisting of a sampling switch SW2 and a sampling capacitor C2; the alternating current signal is converted into direct current through the first-stage sampling, and then the direct current signal is sampled through the second-stage sampling, so that the connection between the alternating current signal and a rear-stage circuit is cut off, and the influence of alternating current coupling is avoided.

Drawings

FIG. 1 is a schematic diagram of different gains at different positions of a sinusoidal signal

FIG. 2 is a graph illustrating the sensitivity of different gain of sinusoidal signals to phase variations of sampled signals

FIG. 3 is a schematic diagram of a triangular wave generation circuit and a corresponding dual switch sampling circuit

Detailed Description

The basic principle of the work of the invention is as follows: in one period, when CTR is low, the switching tube MP3 is turned on, MN1 is turned off, the gates of MP1 and MP2 are turned on through MP3, MP2 mirrors the current in the saturation region of MP1, and the current charges the upper plate of the capacitor C through the drain of MP2, so that the voltage on the capacitor continuously rises, corresponding to the slope portion of the triangular wave. When the CTR changes to the high level, the switch MN1 is turned on, and the switch MP3 is turned off, so that the voltage on the upper plate of the capacitor C is discharged to 0, corresponding to the reset portion of the triangular wave. It should be noted that, in order to keep the charging current constant, i.e. to make the triangular wave have a constant slope, it is necessary to ensure that MP2 always operates in the saturation region, and when the voltage of the upper plate of the capacitor rises to a certain value, MP2 operates in the linear region, and the slope of the triangular wave is no longer constant. The above problem can be solved by adjusting Vtri to adjust the charging current so that the voltage on the capacitor is low enough before CTR goes high, i.e. before the triangle wave is reset, to ensure that MP2 always operates in the saturation region. During the generation of the triangular wave signal, sampling switch SW1 and sampling switch SW2 are alternately turned on. When the sampling switch SW1 is turned on and the sampling switch SW2 is turned off, the voltage on the sampling capacitor C1 will gradually rise along with the triangular wave signal until SW1 is turned off. During the time that SW1 is turned off and SW2 is not yet turned on, the voltage on C1 gradually stabilizes to a DC voltage. At this time, the sampling switch SW2 is turned on, so that the sampling capacitor C2 samples the dc voltage on the capacitor C1, and the influence of ac coupling on the subsequent circuit can be avoided by sampling the dc signal.

It is to be understood that the above description is not intended to limit the present invention, and the present invention is not limited to the above examples, and those skilled in the art may make modifications, alterations, additions or substitutions within the spirit and scope of the present invention.

Claims

1. A fixed slope triangular wave signal generating and sampling circuit is characterized in that: comprises a current mirror circuit made of PMOS tubes MP1 and MP 2; a switch reset circuit is made of a PMOS tube MP3 and an NMOS tube MN 1; a capacitor C for integrating the charge; a switch SW1 and a sampling capacitor C1 for realizing the first-stage sampling; a switch SW2 and a sampling capacitor C2 for realizing the second-stage sampling; the sources of the PMOS tubes MP1 and MP2 are connected to the power supply VDD; the drain electrode of the PMOS transistor MP1 is in short circuit with the grid electrode and is connected to the input Vtr and the source electrode of the PMOS transistor P3; the grid electrode of the PMOS tube MP2 is connected with the drain electrode of the PMOS tube MP 3; the drain electrode of the PMOS tube MP2, the upper polar plate of the capacitor C, one end of the switch SW1 and the drain electrode of the NMOS tube MN1 are connected together; the lower polar plate of the capacitor C, the source electrode of the NMOS transistor MN1, the lower polar plate of the capacitor C1 and the lower polar plate of the capacitor C2 are all connected to the ground; the other end of the switch SW1, the upper plate of the capacitor C1 and one end of the switch SW2 are connected together; the other end of the switch SW2 and the upper pole plate of the capacitor C2 are connected together to serve as an output port of the circuit; the control signal CTR is connected to the gate of the NMOS transistor MN 1.

2. The fixed-slope triangular wave signal generating and sampling circuit of claim 1, wherein: the control signal CTR is a square wave signal, when the CTR is in a high level, the NMOS tube MN1 is conducted, the PMOS tube MP3 is disconnected, the voltage of an upper polar plate of the capacitor C is reduced to 0, and the reset operation is completed; when the CTR is low level, the PMOS tube MP3 is conducted, the NMOS tube MN1 is disconnected, the grid electrode of the PMOS tube MP2 is connected with the grid electrode of the PMOS tube MP1 to form a current mirror structure, the PMOS tube MP2 mirrors the current of the PMOS tube MP1 to continuously charge the capacitor C, and the charging current is fixed, so that a triangular wave with a fixed slope is generated; at the same time, the switches SW1 and SW2 are alternately turned on; when the SW1 is switched on and the SW2 is switched off, the capacitor C1 samples the triangular wave; when the SW1 is turned off and the SW2 is turned on, the capacitor C2 samples the direct current signal on the capacitor C1, and the isolation of the alternating current signal is realized.