CN113131732B - Fault-tolerant control method of double three-level inverter topology based on vector clamp modulation strategy - Google Patents
Fault-tolerant control method of double three-level inverter topology based on vector clamp modulation strategy Download PDFInfo
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Abstract
The invention discloses a vector clamp modulation strategy-based fault-tolerant control method for a double three-level inverter topology, which is suitable for a motor driving system. The fault-tolerant circuit comprises six bidirectional thyristors TR1-TR6 which are respectively connected with the middle point of the double three-level inverter system. When the double three-level inverter system has no fault, the TR1-TR6 are in a disconnected state, and when the double three-level inverter system has a switching tube fault, the fault-tolerant control is realized by opening the bidirectional thyristor of the phase where the fault switching tube is positioned. Meanwhile, in a PWM period, one inverter is in a clamping state, the other inverter carries out vector synthesis, and the two inverters alternately operate in the clamping state and the vector synthesis state, so that fault-tolerant control is realized, and the switching loss of a system is reduced. In particular, the neutral point potential balance problem needs to be considered in the three-level inverter topology, and the method can realize neutral point potential balance. The fault-tolerant method is simple in structure, convenient to use and wide in practicability.
Description
Technical Field
The invention relates to a fault-tolerant control method, in particular to a fault-tolerant control method of a double three-level inverter topology based on a vector clamping modulation strategy, which is suitable for a motor driving system.
Background
The motor driving system mainly comprises a controller, a driver, an inverter and a motor, wherein the inverter and the driving system are most prone to failure. If such a failure is not discovered in time, the failure is amplified. The reliable operation of the motor drive is directly related to personal and property safety, so the research on the fault-tolerant control of the inverter system has important significance for improving the reliability of the motor drive system.
The open winding structure has fault-tolerant performance, two ends of the open winding structure are respectively powered by a group of inverters to form a double-inverter open winding motor structure, output voltage and current are closer to sine waves, and switching stress is smaller than that of a single three-level inverter system, so that the structure is widely applied to the fields with higher safety requirements such as ship driving and mine production.
At present, a large amount of research is carried out by scholars at home and abroad aiming at the faults of the double-inverter system. One of the most direct methods is to directly remove the inverter where the fault point is located when a certain inverter fails, and to perform fault-tolerant control by using another set of inverter systems that have not failed. The method is the simplest, does not require complex algorithms, but does not utilize power sharing. Some documents propose to realize fault-tolerant control by adding a redundant bridge arm, that is, adding an additional bridge arm. When the system has no fault, the bridge arm is independent of the system, and when one bridge arm of the system has fault, the redundant bridge arm is connected into the system. The method can only realize fault-tolerant control of one bridge arm fault. The method is improved in the literature, namely, an additional bridge arm is divided into two half bridge arms, so that fault tolerance of two bridge arms can be realized simultaneously. However, the method increases the cost of the system due to the addition of a bridge arm, and is not beneficial to practical application. The other document proposes that when one bridge arm or the switching tube of the bridge arm fails, the phase is directly cut off, and the remaining two phases are used for fault-tolerant control. However, the phase-loss operation results in poor output voltage and current waveforms, and thus, the method cannot be applied practically.
On the other hand, the literature focuses on studying fault-tolerant control of a dual two-level inverter system, the fault-tolerant control technology of the dual three-level inverter system is rarely studied, and the fault-tolerant control of the dual three-level inverter system needs to pay attention to the problem of midpoint potential balance of the three-level inverter system.
Disclosure of Invention
The technical problem is as follows: the invention provides a fault-tolerant control method of a double-three-level inverter topology based on a vector clamping modulation strategy on the basis of analyzing the fault-tolerant control method of the conventional double-three-level inverter system. The method can reduce the switching loss on the basis of realizing fault tolerance of the switching tube, and can give consideration to the special midpoint potential balance problem of the three-level inverter system and ensure the midpoint potential balance during fault tolerance.
The technical scheme is as follows: in order to solve the technical problem, the invention relates to a fault-tolerant control method of a double three-level inverter topology based on a vector clamping modulation strategy, wherein a related double three-level inverter system comprises an inverter I and an inverter II, wherein the inverter I comprises a bridge arm A1, a bridge arm B1 and a bridge arm C1; the inverter II comprises a bridge arm A2, a bridge arm B2 and a bridge arm C2, the bridge arm A1 is connected with the system midpoint through a bidirectional thyristor TR1, the bridge arm B1 is connected with the system midpoint through a bidirectional thyristor TR2, the bridge arm C1 is connected with the system midpoint through a bidirectional thyristor TR3, the bridge arm A2 is connected with the system midpoint through a bidirectional thyristor TR4, the bridge arm B2 is connected with the system midpoint through a bidirectional thyristor TR5, and the bridge arm C2 is connected with the system midpoint through a bidirectional thyristor TR 6;
step 1) when the inverter I and the inverter II have no fault, all the bidirectional thyristors are in a disconnected state, and when the inverter I and the inverter II have switching tube faults, the bidirectional thyristors of the phase where the fault switching tubes are located are started to realize fault-tolerant control;
step 2) clamping the fault phase vector at 0 level, performing vector synthesis by using the residual vector of which the fault phase vector is at 0 level, and determining the residual vector after topology reconstruction;
step 3) predicting the reference voltage vector UrefDecomposing into an alpha-beta coordinate system;
step 4) dividing sectors of the residual vectors after topology reconstruction, dividing a voltage space vector diagram formed by partial residual vectors into 12 large sectors and numbering, wherein each large sector is divided into 2 regions Z1 and Z2 through boundary lines;
step 5) selecting available vectors of the inverter I and the inverter II from the residual voltage space vector diagram to reduce the switching loss of the system; the principle of selecting available vectors is as follows: when referring to the vector UrefVector U of inverter i when located in large sector 1, 3, 5, 7, 9, 11ref1Is in clamping stateState, vector U of inverter IIref2Carrying out vector synthesis; when referring to the vector UrefVector U of inverter II when located in large sector 2, 4, 6, 8, 10, 12ref2Vector U of inverter I in clamped stateref1Carrying out vector synthesis;
step 6) taking the area Z1 of the 1 st large sector as an example, the inverter I clamp is in an on state, the inverter II carries out vector synthesis, and the time of a plurality of basic vectors of the inverter II is calculated, so that the vector U of the inverter II is synthesizedref2Inverter II vector Uref2The output sequence of each vector is the implementation process of the fault-tolerant control method, thereby reducing the switching loss and realizing the potential control of the midpoint of the system; zone Z2 for the 1 st large sector, and zones Z1 and Z2 for the other respective large sectors, and so on, are identical.
In the step 2), when the inverter I and the inverter II have faults, topology reconstruction is carried out by starting the corresponding bidirectional thyristors:
when the switching tubes on the bridge arm A1 or the bridge arm A2 break down, the pulse signals of all the switching tubes on the bridge arm A1 and the bridge arm A2 are blocked, and the bidirectional thyristors TR1 and TR4 are switched on, so that topology reconstruction is realized; when the switching tubes on the bridge arm B1 or the bridge arm B2 break down, the pulse signals of all the switching tubes on the bridge arm B1 and the bridge arm B2 are blocked, and the bidirectional thyristors TR2 and TR5 are switched on, so that topology reconstruction is realized; when the switching tubes on the bridge arm C1 or the bridge arm C2 have faults, pulse signals of all the switching tubes on the bridge arm C1 and the bridge arm C2 are blocked, and the bidirectional thyristors TR3 and TR6 are switched on, so that topology reconstruction is realized.
Clamping the fault phase vector at 0 level, and performing vector synthesis by using a residual vector of which the fault phase vector is at 0 level; in order to facilitate the sector division and the symmetry principle, only part of the residual vectors are selected for vector synthesis.
Reference vector U is determined using the following equationrefDecomposition to α - β coordinate system:
in the formula: theta is the reference vector UrefThe angle to the alpha axis. u. ofαIs a reference vector UrefProjection on the alpha axis, uβIs a reference vector UrefProjection on the beta axis.
The space voltage vector diagram formed by the residual vectors is divided into 12 large sectors, and the boundary line dividing each large sector into two regions of Z1 and Z2 is obtained by the following formula:
in the formula: u shapedcAnd/2 is the DC side voltage.
In order to reduce the system switching loss while realizing fault-tolerant control, a reference vector U is added in a PWM periodrefVector U of inverter i when located in large sector 1, 3, 5, 7, 9, 11ref1Vector U of inverter II in clamped stateref2Carrying out vector synthesis; when referring to the vector UrefVector U of inverter II when located in large sector 2, 4, 6, 8, 10, 12ref2Vector U of inverter I in clamped stateref1And carrying out vector synthesis. In the sector 1, the inverter I clamp is in an on state, and the inverter II carries out vector synthesis; table 1 shows the vectors of inverter i and inverter ii in each large sector:
table 1 vector for each sector using the present invention
| Large sector | Inverter I | Inverter II | Large sector | Inverter I | Inverter II |
| 1 | Uonn | Uonn-Uref | 7 | Uopp | Uopp-Uref |
| 2 | Uref+Uoop | Uoop | 8 | Uref+Uoon | Uoon |
| 3 | Uoon | Uoon-Uref | 9 | Uoop | Uoop-Uref |
| 4 | Uref+Uono | Uono | 10 | Uref+Uopo | Uopo |
| 5 | opo | Uopo-Uref | 11 | Uono | Uono-Uref |
| 6 | Uref+Uonn | Uonn | 12 | Uref+Uopp | Uopp |
When the inverter I in the large sector 1 is in a clamping state, the inverter II carries out vector synthesis, and in the area Z1 of the large sector 1, the vector U of the inverter II is synthesizedref2The action time of each vector of (a) is:
wherein t isopp、toop、toooRespectively representing base vectors Uopp、Uoop、UoooM is the modulation degree,
TSrepresenting one PWM period, theta1Is Uref2Included angle with the alpha axis;
specifically, the neutral point potential balance is considered in the three-level inverter topology, and the neutral point potential balance can be realized by selecting the vectors in the table 1; with as reference to vector UrefFor example, in the large sector 1 region Z1, the inverterThe I clamp is in the on state, the midpoint current generated is ia, when the reference vector UrefWhen the inverter I rotates 180 degrees and is positioned in a sector 7 area 1, the inverter I is clamped at opp, and the generated midpoint current is ia; since the spatial phases of the vector onn and the vector opp are 180 ° different from each other, the phases of the corresponding load currents are also 180 ° different from each other, so as to obtain the corresponding midpoint current relationship:
therefore, when the clamp vector of the inverter I in one PWM period is vector onn and vector opp, the relation of the injected charges to the midpoint is as follows:
according to the formula, when the inverter is located in the sector 1 area 1, the clamping vector of the inverter I has no influence on the neutral point potential, and neutral point potential balance can be realized;
with reference vector UrefVector U of inverter II in sector 1 region Z1, for exampleref2When the voltage vector U' is referred to, the action time of each vector of (2) is shown in formula (3)refSynthesizing vector U' of inverter II when rotated 180 DEG to be located in sector 7 region Z1ref2Each vector having an action time of
Wherein, theta2Is Uref2The included angle between the alpha axis and the predicted alpha axis;
in the formulae (3) and (6), θ1＝θ2+ π, band (6) gives:
the midpoint currents generated by vector opp and vector onn are ia, and the midpoint currents generated by vector oop and vector oon are-ic. The phases of opp and the vector onn are 180 degrees different from each other, and the phases of the vector oop and the vector oon are 180 degrees different from each other, so that the phases of corresponding midpoint currents are also 180 degrees different from each other; equation (4) obtains the midpoint currents of the vector opp and the vector onn and the correlation thereof, equation (5) obtains the charges of the injected midpoint of the vector opp and the vector onn in one PWM period and the correlation thereof, and analogy between the two equations obtains the relationship between the midpoint currents of the vector oop and the vector oon and the relationship between the charges of the injected midpoint as follows:
therefore, when the vector U is referred torefIn the sector 1 region Z1, neither inverter i nor inverter ii has an effect on the midpoint potential, i.e., the method described herein can achieve midpoint potential balancing in a fault tolerant process.
Has the advantages that:
1. the fault tolerance of the switching tube of the double three-level inverter system is realized by combining a modulation algorithm and hardware equipment, the algorithm is simple, the fault tolerance circuit is only 6 bidirectional thyristors, and the hardware is simple;
2. by combining a vector clamping method, the inverter I and the inverter II alternately carry out clamping and vector synthesis, and the switching loss of the system can be reduced when the double three-level inverter system has fault tolerance, so that the aim of reducing the switching loss is fulfilled;
3. aiming at the problem of the midpoint potential of the three-level inverter system, the invention can ensure the midpoint potential balance of the system in the fault-tolerant process by selecting a proper vector.
Aiming at the problems in the existing literature, the invention provides a fault-tolerant control method of a double three-level inverter topology based on a vector clamp modulation strategy. The method reconstructs a space vector diagram through topology reconstruction, and then selects residual vectors capable of realizing vector clamping to perform fault-tolerant control. Therefore, the switching loss of the system is reduced on the basis of fault-tolerant control. Meanwhile, aiming at the problem of the midpoint potential of a three-level inverter system, the invention can realize midpoint potential balance in the fault-tolerant process.
Drawings
FIG. 1 is a circuit diagram of a dual three-level inverter topology used in the present invention;
FIG. 2 is a fault tolerant circuit diagram employing the present invention;
FIG. 3 is a residual vector diagram after topology reconstruction by using the fault-tolerant control method of the dual three-level inverter topology based on the vector clamp modulation strategy of the present invention;
FIG. 4 is a vector diagram selected by the fault-tolerant control method for a dual three-level inverter topology based on a vector clamp modulation strategy according to the present invention;
FIG. 5 is a three-phase current, torque and rotation speed simulation diagram of switching from a normal mode to a fault-tolerant mode after a switching tube of a bridge arm A1 fails;
FIG. 6 is a torque dynamic response simulation diagram of a fault tolerant control method employing a dual three-level inverter topology based on a vector clamp modulation strategy of the present invention;
FIG. 7 shows a voltage U of a fault-tolerant control method of a dual three-level inverter topology based on a vector clamp modulation strategy according to the present inventionB10And UB2OA simulated oscillogram;
fig. 8 is a midpoint potential simulation waveform diagram of the fault-tolerant control method of the double three-level inverter topology based on the vector clamp modulation strategy.
The specific implementation mode is as follows:
the invention is further described below with reference to the accompanying drawings:
the invention relates to a fault-tolerant control method of a double three-level inverter topology based on a vector clamping modulation strategy, wherein a related double three-level inverter system comprises an inverter I and an inverter II, wherein the inverter I comprises a bridge arm A1, a bridge arm B1 and a bridge arm C1; the inverter II comprises a bridge arm A2, a bridge arm B2 and a bridge arm C2, the bridge arm A1 is connected with the system midpoint through a bidirectional thyristor TR1, the bridge arm B1 is connected with the system midpoint through a bidirectional thyristor TR2, the bridge arm C1 is connected with the system midpoint through a bidirectional thyristor TR3, the bridge arm A2 is connected with the system midpoint through a bidirectional thyristor TR4, the bridge arm B2 is connected with the system midpoint through a bidirectional thyristor TR5, and the bridge arm C2 is connected with the system midpoint through a bidirectional thyristor TR 6;
step 1) when the inverter I and the inverter II have no fault, all the bidirectional thyristors are in a disconnected state, and when the inverter I and the inverter II have switching tube faults, the bidirectional thyristors of the phase where the fault switching tubes are located are started to realize fault-tolerant control;
step 2) clamping the fault phase vector at 0 level, performing vector synthesis by using the residual vector of which the fault phase vector is at 0 level, and determining the residual vector after topology reconstruction;
step 3) predicting the reference voltage vector UrefDecomposing into an alpha-beta coordinate system;
step 4) dividing sectors of the residual vectors after topology reconstruction, dividing a voltage space vector diagram formed by partial residual vectors into 12 large sectors and numbering, wherein each large sector is divided into 2 regions Z1 and Z2 through boundary lines;
step 5) selecting available vectors of the inverter I and the inverter II from the residual voltage space vector diagram to reduce the switching loss of the system; the principle of selecting available vectors is as follows: when referring to the vector UrefVector U of inverter i when located in large sector 1, 3, 5, 7, 9, 11ref1Vector U of inverter II in clamped stateref2Carrying out vector synthesis; when referring to the vector UrefVector U of inverter II when located in large sector 2, 4, 6, 8, 10, 12ref2Vector U of inverter I in clamped stateref1Carrying out vector synthesis;
step 6) taking the area Z1 of the 1 st large sector as an example, the inverter I clamp is in an on state, the inverter II carries out vector synthesis, and the time of a plurality of basic vectors of the inverter II is calculated, so that the vector U of the inverter II is synthesizedref2Inverter II vector Uref2The output sequence of each vector is the implementation process of the fault-tolerant control method, and the number of switches is reducedLoss and potential control of the midpoint of the system are realized; zone Z2 for the 1 st large sector, and zones Z1 and Z2 for the other respective large sectors, and so on, are identical.
In particular, the present invention relates to a method for producing,
and (3) performing topology reconstruction after the fault in the step 1) occurs. Fig. 1 is a circuit diagram of a dual three-level inverter topology, including an inverter i and an inverter ii. The inverter I comprises a bridge arm A1, a bridge arm B1 and a bridge arm C1; inverter ii includes leg a2, leg B2, and leg C2.
Fig. 2 is a circuit diagram of a fault-tolerant control method for a dual three-level inverter topology based on a vector clamp modulation strategy, which is provided by the invention, and is characterized in that: the bridge arm A1 is connected with the midpoint of the system through a bidirectional thyristor TR 1; the bridge arm B1 is connected with the midpoint of the system through a bidirectional thyristor TR 2; the bridge arm C1 is connected with the midpoint of the system through a bidirectional thyristor TR 3; the bridge arm A2 is connected with the midpoint of the system through a bidirectional thyristor TR 4; the bridge arm B2 is connected with the midpoint of the system through a bidirectional thyristor TR 5; the bridge arm C2 is connected with the system midpoint through a bidirectional thyristor TR 6.
When the inverter I and the inverter II have no fault, all the bidirectional thyristors are in a disconnected state, and when the inverter I and the inverter II have faults, the corresponding bidirectional thyristors are started to realize fault-tolerant work. The method comprises the following steps: when the bridge arm A1 or the bridge arm A2 or the switching tubes on the bridge arm A1 or the bridge arm A2 have faults, the pulse signals of all the switching tubes on the bridge arm A1 and the bridge arm A2 are blocked, and the bidirectional thyristors TR1 and TR4 are switched on, so that topology reconstruction is realized; when the bridge arm B1 or the bridge arm B2 or the switching tubes on the bridge arm B1 or the bridge arm B2 have faults, the pulse signals of all the switching tubes on the bridge arm B1 and the bridge arm B2 are blocked, and the bidirectional thyristors TR2 and TR5 are switched on to realize topology reconstruction; when the bridge arm C1 or the bridge arm C2 or the switching tubes on the bridge arm C1 or the bridge arm C2 have faults, pulse signals of all the switching tubes on the bridge arm C1 and the bridge arm C2 are blocked, and the bidirectional thyristors TR3 and TR6 are switched on, so that topology reconstruction is realized.
Clamping the fault phase vector at 0 level in the step 2), and performing vector synthesis by using a residual vector of which the fault phase vector is at 0 level, wherein fig. 3 is a residual vector diagram. To facilitate the sector division and the symmetry principle, only a part of the remaining vectors in fig. 3 is selected for vector synthesis, as shown in fig. 4 (a).
Reference vector U in step 3)refDecomposed into an alpha-beta coordinate system.
Where θ is the reference vector UrefThe angle to the alpha axis. u. ofαIs a reference vector UrefProjection on the alpha axis, uβIs a reference vector UrefProjection on the beta axis.
In step 4), (a) of fig. 4 is that the space voltage vector diagram formed by using partial residual vectors is divided into 12 large sectors, and each large sector is divided into 2 regions. The boundary line of 2 regions in the large sector 1 is
In step 5), in order to realize fault-tolerant control and reduce the switching loss of the system, a reference vector U is used as a reference vector in a PWM periodrefVector U of inverter i when located in large sector 1, 3, 5, 7, 9, 11ref1Vector U of inverter II in clamped stateref2Carrying out vector synthesis; when referring to the vector UrefVector U of inverter II when located in large sector 2, 4, 6, 8, 10, 12ref2Vector U of inverter I in clamped stateref1And carrying out vector synthesis. In the large sector 1, the inverter I clamp is in an on state, and the inverter II carries out vector synthesis. Table 1 shows the vectors for each large sector using the present invention.
Table 1 vector for each large sector using the present invention
| Large sector | Inverter I | Inverter II | Large sector | Inverter I | Inverter II |
| 1 | Uonn | Uonn-Uref | 7 | Uopp | Uopp-Uref |
| 2 | Uref+Uoop | Uoop | 8 | Uref+Uoon | Uoon |
| 3 | Uoon | Uoon-Uref | 9 | Uoop | Uoop-Uref |
| 4 | Uref+Uono | Uono | 10 | Uref+Uopo | Uopo |
| 5 | opo | Uopo-Uref | 11 | Uono | Uono-Uref |
| 6 | Uref+Uonn | Uonn | 12 | Uref+Uopp | Uopp |
And 6) the inverter in the large sector 1 is in a clamping state, and the inverter II carries out vector synthesis. In large sector 1 region 1, vector U of inverter II is synthesizedref2Each vector having an action time of
Wherein t isopp、toop、toooRespectively representing base vectors Uopp、Uoop、UoooThe action time of (1). m is a modulation degree,
TSis one PWM period, theta1Is Uref2Included angle with the alpha axis.
Particularly, the three-level inverter topology needs to consider the problem of midpoint potential balance, and the method can realize midpoint potential balance by selecting a proper vector. As shown in fig. 4 (b), when reference vector UrefIn large sector 1 region 1, the inverter i clamp is in the on state, producing a midpoint current of ia, when referenced to vector U ″refWhen the inverter I rotates 180 degrees and is located in a Z1 area of a large sector 7, the inverter I is clamped at opp, and the generated midpoint current is ia. Since the space phases of the vector onn and the vector opp are 180 degrees different from each other, the phases of the corresponding load currents are also 180 degrees different from each other, so that the corresponding midpoint current relationship is obtained as
So that the relation of the charges injected into the midpoints when the clamping vectors of the inverter I are vector on and vector opp in one PWM period is
Therefore, when the inverter is located in large sector 1 region Z1, inverter i has no effect on the center potential.
When referring to the vector UrefIn large sector 1 region Z1, vector U of inverter II is synthesizedref2The action time of each vector of (2) is shown in the formula (3). When reference voltage vector UrefSynthesizing vector U' of inverter II when rotated 180 DEG and located in large sector 7 region Z1ref2Each vector having an action time of
Wherein, theta2Is Uref2Included angle with the alpha axis.
In the formulae (3) and (6), θ1＝θ2+ π, into formula (6) to obtain
As shown in fig. 4 (c), the midpoint currents generated by the vector opp and the vector onn are ia, and the midpoint currents generated by the vector oop and the vector oon are ic. opp and vector onn are 180 ° out of phase with each other, and vector oop and vector oon are 180 ° out of phase with each other, so their corresponding midpoint currents are also 180 ° out of phase with each other. Equation (4) obtains the midpoint currents of the vector opp and the vector onn and the correlation thereof, equation (5) obtains the charge relation between the vector opp and the vector onn injection midpoint in one PWM period, and analogy is carried out on the two equations to obtain the relation between the vector oop and the vector oon midpoint currents and the relation between the charges of the injection midpoint
Therefore, when the inverter is located in large sector 1 region Z1, inverter ii has no effect on the center potential.
Therefore, when the vector U is referred torefIn the large sector 1 area Z1, neither inverter i nor inverter ii has an influence on the midpoint potential, i.e., the method described herein can achieve midpoint potential balancing in the fault tolerance process.
The method of the invention is subjected to simulation verification in Matlab/Simulink. FIGS. 5 (a), (b) and (c) are simulation graphs of three-phase current, torque and rotation speed switching from normal mode to fault-tolerant mode when the bridge arm A1 has a fault by using the method; when t is equal to 0s, the given rotation speed n is equal to 700r/min, and the motor rotation speed reaches the given value within 0.23 s. When t is 0.4s, the torque is set to 10 n.m. When t is 0.60s, the arm a1 fails. At the moment, the three-phase current has large pulsation, the fluctuation of the rotating speed is about 15r/min, the pulsation from-8 N.m to 66N.m also appears in the motor torque, and the motor cannot work normally. And when t is 0.65s, switching to the fault-tolerant operation mode. At the moment, the three-phase current is gradually recovered to be normal without fluctuation, the rotating speed of the motor is recovered to 700r/min along with the setting, and the torque of the motor is kept at 10 N.m. Indicating that the method has good steady-state performance.
FIGS. 6 (a), (b) and (c) are graphs of torque dynamic response simulations when the present method is employed; when t is 1.1s, the torque increases from 10n.m to 20n.m, and when t is 1.3s, the torque decreases from 20n.m to 10 n.m. As can be seen from FIG. 6, when the torque suddenly increases or suddenly decreases, the three-phase current can keep better sine degree, and the rotating speed fluctuates within 3r/min, which shows that the method of the invention has good torque dynamic performance.
FIG. 7 shows the voltage U when the method is adoptedB10And UB2OA simulation waveform diagram, as can be seen from fig. 7, when the inverter i is in a vector clamping state, the inverter ii is in a vector synthesis state; when the inverter I is in a vector synthesis state, the inverter II is in a vector clamping state, and the inverter I and the inverter II alternately perform vector clamping and vector synthesis, so that the aim of reducing switching loss is fulfilled.
FIG. 8 is a waveform diagram of midpoint potential simulation when the method is adopted, and it can be seen from FIG. 8 that the midpoint potential fluctuates within + -4V, which shows that the method of the present invention has midpoint potential balancing capability.
Claims (7)
1. A fault-tolerant control method of a double three-level inverter topology based on a vector clamping modulation strategy relates to a double three-level inverter system, which comprises an inverter I and an inverter II, wherein the inverter I comprises a bridge arm A1, a bridge arm B1 and a bridge arm C1; inverter II includes bridge arm A2, bridge arm B2 and bridge arm C2, its characterized in that: the bridge arm A1 is connected with the system midpoint through a bidirectional thyristor TR1, the bridge arm B1 is connected with the system midpoint through a bidirectional thyristor TR2, the bridge arm C1 is connected with the system midpoint through a bidirectional thyristor TR3, the bridge arm A2 is connected with the system midpoint through a bidirectional thyristor TR4, the bridge arm B2 is connected with the system midpoint through a bidirectional thyristor TR5, and the bridge arm C2 is connected with the system midpoint through a bidirectional thyristor TR 6;
step 1) when the inverter I and the inverter II have no fault, all the bidirectional thyristors are in a disconnected state, and when the inverter I and the inverter II have switching tube faults, the bidirectional thyristors of the phase where the fault switching tubes are located are started to realize fault-tolerant control;
step 2) clamping the fault phase vector at 0 level, performing vector synthesis by using the residual vector of which the fault phase vector is at 0 level, and determining the residual vector after topology reconstruction;
step 3) predicting the reference voltage vector UrefDecomposing into an alpha-beta coordinate system;
step 4) dividing sectors of the residual vectors after topology reconstruction, dividing a voltage space vector diagram formed by partial residual vectors into 12 large sectors and numbering, wherein each large sector is divided into 2 regions Z1 and Z2 through boundary lines;
step 5) selecting available vectors of the inverter I and the inverter II from the residual voltage space vector diagram to reduce the switching loss of the system; the principle of selecting available vectors is as follows: when referring to the vector UrefVector U of inverter i when located in large sector 1, 3, 5, 7, 9, 11ref1Vector U of inverter II in clamped stateref2Carrying out vector synthesis; when referring to the vector UrefVector U of inverter II when located in large sector 2, 4, 6, 8, 10, 12ref2Vector U of inverter I in clamped stateref1Carrying out vector synthesis;
step 6) taking the area Z1 of the 1 st large sector as an example, the inverter I clamp is in an on state, the inverter II carries out vector synthesis, and the time of a plurality of basic vectors of the inverter II is calculated, so that the vector U of the inverter II is synthesizedref2Inverter II vector Uref2The output sequence of each vector is the implementation process of the fault-tolerant control method, thereby reducing the switching loss and realizing the potential control of the midpoint of the system; zone Z2 for the 1 st large sector, and zones Z1 and Z2 for the other respective large sectors, and so on, are identical.
2. The fault-tolerant control method of the double three-level inverter topology based on the vector clamping modulation strategy as claimed in claim 1, wherein in step 2), when the inverter I and the inverter II have faults, topology reconstruction is performed by turning on corresponding bidirectional thyristors:
when the switching tubes on the bridge arm A1 or the bridge arm A2 break down, the pulse signals of all the switching tubes on the bridge arm A1 and the bridge arm A2 are blocked, and the bidirectional thyristors TR1 and TR4 are switched on, so that topology reconstruction is realized; when the switching tubes on the bridge arm B1 or the bridge arm B2 break down, the pulse signals of all the switching tubes on the bridge arm B1 and the bridge arm B2 are blocked, and the bidirectional thyristors TR2 and TR5 are switched on, so that topology reconstruction is realized; when the switching tubes on the bridge arm C1 or the bridge arm C2 have faults, pulse signals of all the switching tubes on the bridge arm C1 and the bridge arm C2 are blocked, and the bidirectional thyristors TR3 and TR6 are switched on, so that topology reconstruction is realized.
3. The method of claim 2 for fault-tolerant control of a dual three-level inverter topology based on a vector clamped modulation strategy, characterized in that: clamping the fault phase vector at 0 level, and performing vector synthesis by using a residual vector of which the fault phase vector is at 0 level; in order to facilitate the sector division and the symmetry principle, only part of the residual vectors are selected for vector synthesis.
4. The method of claim 1 for fault-tolerant control of a dual three-level inverter topology based on a vector clamped modulation strategy, characterized in that: reference vector U is determined using the following equationrefDecomposition to α - β coordinate system:
in the formula: theta is the reference vector UrefAngle with respect to the alpha axis, uαIs a reference vector UrefProjection on the alpha axis, uβIs a reference vector UrefProjection on the beta axis.
5. The method of claim 4, wherein the space voltage vector diagram formed by the residual vectors is divided into 12 large sectors, and the boundary line dividing each large sector into two zones of Z1 and Z2 is obtained by using the following formula:
in the formula: u shapedcAnd/2 is the DC side voltage.
6. The method of claim 5 for fault-tolerant control of a dual three-level inverter topology based on a vector clamped modulation strategy, characterized in that: in order to reduce the system switching loss while realizing fault-tolerant control, a reference vector U is added in a PWM periodrefVector U of inverter i when located in large sector 1, 3, 5, 7, 9, 11ref1Vector U of inverter II in clamped stateref2Carrying out vector synthesis; when referring to the vector UrefVector U of inverter II when located in large sector 2, 4, 6, 8, 10, 12ref2Vector U of inverter I in clamped stateref1Carrying out vector synthesis; in the sector 1, the inverter I clamp is in an on state, and the inverter II carries out vector synthesis; table 1 shows the vectors of inverter i and inverter ii in each large sector:
table 1 vector for each sector using the present invention
。
7. The method of claim 1 for fault-tolerant control of a dual three-level inverter topology based on a vector clamped modulation strategy, characterized in that: when the inverter I in the large sector 1 is in a clamping state, the inverter II carries out vector synthesis, and in the area Z1 of the large sector 1, the vector U of the inverter II is synthesizedref2The action time of each vector of (a) is:
wherein t isopp、toop、toooRespectively representing base vectors Uopp、Uoop、UoooM is the modulation degree,
TSrepresenting one PWM period, theta1Is Uref2Included angle with the alpha axis;
specifically, the neutral point potential balance is considered in the three-level inverter topology, and the neutral point potential balance can be realized by selecting the vectors in the table 1; with as reference to vector UrefIn the large sector 1 region Z1 for example, inverter i is clamped in the on state and produces a midpoint current of ia, when referenced to vector UrefWhen the inverter I rotates 180 degrees and is positioned in a sector 7 area 1, the inverter I is clamped at opp, and the generated midpoint current is ia; since the spatial phases of the vector onn and the vector opp are 180 ° different from each other, the phases of the corresponding load currents are also 180 ° different from each other, so as to obtain the corresponding midpoint current relationship:
therefore, when the clamp vector of the inverter I in one PWM period is vector onn and vector opp, the relation of the injected charges to the midpoint is as follows:
according to the formula, when the inverter is located in the sector 1 area 1, the clamping vector of the inverter I has no influence on the neutral point potential, and neutral point potential balance can be realized;
with reference vector UrefVector U of inverter II in sector 1 region Z1, for exampleref2When the voltage vector U' is referred to, the action time of each vector of (2) is shown in formula (3)refSynthesizing vector U' of inverter II when rotated 180 DEG to be located in sector 7 region Z1ref2Each vector having an action time of
Wherein, theta2Is Uref2With the predicted alpha axisThe included angle of (A);
in the formulae (3) and (6), θ1＝θ2+ π, band (6) gives:
the midpoint currents generated by the vector opp and the vector onn are ia, and the midpoint currents generated by the vector oop and the vector oon are-ic; the phases of opp and the vector onn are 180 degrees different from each other, and the phases of the vector oop and the vector oon are 180 degrees different from each other, so that the phases of corresponding midpoint currents are also 180 degrees different from each other; equation (4) obtains the midpoint currents of the vector opp and the vector onn and the correlation thereof, equation (5) obtains the charges of the injected midpoint of the vector opp and the vector onn in one PWM period and the correlation thereof, and analogy between the two equations obtains the relationship between the midpoint currents of the vector oop and the vector oon and the relationship between the charges of the injected midpoint as follows:
therefore, when the vector U is referred torefIn the sector 1 region Z1, neither inverter i nor inverter ii has an effect on the midpoint potential, i.e., the method described herein can achieve midpoint potential balancing in a fault tolerant process.
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