CN113113400A - Semiconductor circuit and method for manufacturing semiconductor circuit - Google Patents
Semiconductor circuit and method for manufacturing semiconductor circuit Download PDFInfo
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- CN113113400A CN113113400A CN202110460114.4A CN202110460114A CN113113400A CN 113113400 A CN113113400 A CN 113113400A CN 202110460114 A CN202110460114 A CN 202110460114A CN 113113400 A CN113113400 A CN 113113400A
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3736—Metallic materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The invention relates to a semiconductor circuit and a manufacturing method of the semiconductor circuit, which comprises a heat dissipation substrate, a circuit wiring layer, a plurality of electronic elements, a plurality of pins and a sealing layer, wherein mounting grooves penetrating through the thickness of the mounting grooves are formed in two ends adjacent to the side edges of the mounting pins of the sealing layer, the heat dissipation substrate is made of metal, one surface of the heat dissipation substrate, opposite to the electronic elements, is exposed out of the sealing layer, and notches consistent with end face openings of the mounting grooves are formed in the positions, opposite to the mounting grooves, of the heat dissipation substrate. Therefore, when the fixing piece penetrates through the mounting groove and the notch like a screw, the nut of the fixing piece is abutted to the radiating surface of the radiating substrate, the sealing layer is protected, the risk of edge breakage caused by the fact that the nut presses the sealing layer in the prior art is prevented, and the safety and the reliability of the semiconductor circuit are improved.
Description
Technical Field
The invention relates to a semiconductor circuit and a manufacturing method of the semiconductor circuit, and belongs to the technical field of semiconductor circuit application.
Background
A semiconductor circuit is a power-driven type product that combines power electronics and integrated circuit technology. The outer surface of a semiconductor circuit is generally encapsulated with a resin material formed by injection molding to form a sealing layer, and the circuit board and the electronic components inside are sealed, and the leads protrude from one side or both sides of the sealing layer. As shown in fig. 1, the two sides of the sealing layer 200 are provided with mounting grooves 201, so that when the semiconductor circuit is mounted on a circuit board in the application process of the semiconductor circuit, a fixing member such as a screw penetrates through the mounting groove 201 for fixing, and in the screw fixing process, when a screw cap abuts against the surface of the sealing layer at the mounting groove 201, if the force for screwing the screw is too large, the surface of the sealing layer at the mounting groove 201 is prone to edge collapse, thereby damaging the sealing layer, even exposing a heat dissipation substrate inside the sealing layer, and causing the semiconductor circuit to be damaged and unable to work normally.
Disclosure of Invention
The invention aims to solve the technical problem that the sealing layer at the mounting groove is easy to break to cause damage of a semiconductor circuit when the surface of the injection molding sealing layer is fixed in the mounting groove through a fixing piece in the application process of the existing semiconductor circuit.
Specifically, the present invention discloses a semiconductor circuit comprising:
the heat dissipation substrate comprises a mounting surface and a heat dissipation surface;
a circuit wiring layer provided on the mounting surface of the heat dissipation substrate, the circuit wiring layer being provided with a plurality of connection pads;
a plurality of electronic elements disposed on the bonding pads of the circuit wiring layer, the plurality of electronic elements including power devices and driving chips;
the pins are arranged on at least one side of the heat dissipation substrate;
the sealing layer wraps one surface of the radiating substrate provided with the electronic element, one end of each pin is exposed out of the sealing layer, and mounting grooves penetrating through the thickness of the sealing layer are formed in two sides, adjacent to the side edges where the pins are mounted, of the sealing layer;
the heat dissipation substrate is made of metal, one surface of the heat dissipation substrate, opposite to the electronic element, is exposed out of the sealing layer, and a notch consistent with the opening of the end face of the mounting groove is formed in the position, opposite to the mounting groove, of the heat dissipation substrate.
Optionally, a connecting neck perpendicular to the heat dissipation substrate is further disposed at a position of the periphery of the notch relative to the mounting groove, an outer wall surface of the connecting neck is closely attached to an inner wall surface of the mounting groove, and an outer flange is further disposed at an end of the connecting neck and closely attached to the sealing layer.
Optionally, the flange is raised above the surface of the sealing layer.
Optionally, the semiconductor circuit further comprises a plurality of bonding wires connected between the plurality of electronic components, the circuit wiring layer, and the plurality of pins.
Optionally, the circuit wiring layer and the insulating layer are provided with openings penetrating through the thickness thereof, the surface of the heat dissipation substrate is exposed from the openings, and the openings of the heat dissipation substrate are connected with the ground wire of the circuit wiring layer through bonding wires.
Optionally, the surface of the circuit wiring layer is further provided with a green oil layer for protection.
Alternatively, the insulating layer is made of a resin material, and the inside of the resin material is filled with a filler of alumina and aluminum carbide.
Optionally, the filler is angular, spherical, or a mixture of angular and spherical.
The invention also discloses a manufacturing method of the semiconductor circuit, which comprises the following steps:
the heat dissipation base plate is configured with a metal material, wherein two ends of the heat dissipation base plate are provided with notches, the periphery of each notch is also provided with a connecting neck perpendicular to the protection body, and the end part of each connecting neck is also provided with an outward flange;
sequentially arranging an insulating layer and a circuit wiring layer on the surface of the heat dissipation substrate;
disposing an electronic component on the circuit wiring layer;
configuring pins;
electrically connecting the electronic element, the circuit wiring layer and the pins through bonding wires;
the method comprises the steps that injection molding is carried out on a heat dissipation substrate provided with an electronic element and pins through a packaging mold to form a sealing layer, wherein the sealing layer covers one surface, where the electronic element is installed, of the heat dissipation substrate, mounting grooves are formed in two ends of the sealing layer, connecting necks are tightly attached to the inner wall surfaces of the mounting grooves, and one surface, opposite to the electronic element, of the heat dissipation substrate is exposed out of the sealing layer;
and cutting and molding the pins to form a semiconductor circuit, and testing the molded semiconductor circuit.
The semiconductor circuit comprises a heat dissipation substrate, a circuit wiring layer, a plurality of electronic elements, a plurality of pins and a sealing layer, wherein mounting grooves penetrating through the thickness of the mounting grooves are formed in two ends adjacent to the side edges of the mounting pins of the sealing layer, the heat dissipation substrate is made of metal, one surface of the heat dissipation substrate, opposite to the electronic elements, is exposed out of the sealing layer, and notches consistent with end face openings of the mounting grooves are formed in the positions, opposite to the mounting grooves, of the heat dissipation substrate. Therefore, when the fixing piece penetrates through the mounting groove and the notch like a screw, the nut of the fixing piece is abutted to the radiating surface of the radiating substrate, the sealing layer is protected, the risk of edge breakage caused by the fact that the nut presses the sealing layer in the prior art is prevented, and the safety and the reliability of the semiconductor circuit are improved.
Drawings
FIG. 1 is a perspective view of a prior art semiconductor circuit;
fig. 2 is a perspective view of the heat dissipation substrate with its mounting surface facing upward and the heat dissipation substrate mounted with electronic components according to the embodiment of the present invention;
fig. 3 is a perspective view of the heat-dissipating substrate shown in fig. 2 with the heat-dissipating surface facing upward;
FIG. 4 is a perspective view of a semiconductor circuit according to an embodiment of the present invention;
FIG. 5 is a perspective view of the semiconductor circuit shown in FIG. 4 in another orientation;
FIG. 6 is a cross-sectional view of the semiconductor circuit shown in FIG. 4 at a side of the mounting groove;
fig. 7 is a schematic structural view of the lead before being mounted according to the present invention.
Reference numerals:
the heat dissipation substrate 100, the flanging 102, the connecting neck 103, the sealing layer 200, the mounting groove 201, the pins 301, the reinforcing ribs 302, the freewheeling diode 303, the bonding wires 304, the circuit wiring layer 305, the IGBT306, the driving chip 307 and the insulating layer 308.
Detailed Description
It is to be noted that the embodiments and features of the embodiments may be combined with each other without conflict in structure or function. The present invention will be described in detail below with reference to examples.
The semiconductor circuit provided by the invention is a circuit module which integrates a power switch device, a high-voltage driving circuit and the like together and is sealed and packaged on the outer surface, and is widely applied to the field of power electronics, such as the fields of frequency converters of driving motors, various inversion voltages, variable frequency speed regulation, metallurgical machinery, electric traction, variable frequency household appliances and the like. The semiconductor circuit herein may be referred to by various other names, such as Modular Intelligent Power System (MIPS), Intelligent Power Module (IPM), or hybrid integrated circuit, Power semiconductor Module, Power Module, etc. In the following embodiments of the present invention, collectively referred to as a Modular Intelligent Power System (MIPS).
As shown in fig. 2 to 6, the MIPS includes a heat dissipation substrate 308, a circuit wiring layer 305, a plurality of electronic components, a plurality of pins 301, and a sealing layer 200.
The heat dissipation substrate 100 is made of a metal material, and includes an upper mounting surface and a lower heat dissipation surface, which may be a rectangular plate made of aluminum such as 1100, 5052, and the like.
An insulating layer 308 is provided on the heat dissipation substrate 100 to provide the circuit wiring layer 305 on the insulating layer 308, achieving electrical isolation between the circuit wiring layer 305 and the heat dissipation substrate 100. The insulating layer 308 is formed to cover at least one surface of the heat dissipating substrate 100, and is made of a resin material such as epoxy resin, and a filler such as alumina and aluminum carbide is filled inside the resin material to improve thermal conductivity. In order to increase the thermal conductivity, the shape of these fillers may be angular, and in order to avoid the risk of the fillers damaging the contact surfaces of the electronic components arranged on the surface thereof, the fillers may be spherical, angular, or a mixture of angular and spherical. The circuit wiring layer 305 may be formed by etching a copper foil or by printing a paste-like conductive medium, which may be a conductive material such as graphene, solder paste, or silver paste. A wiring of a circuit is formed on the circuit wiring layer 305, and a plurality of connection pads (not shown in the figure) for connecting the wiring are provided for mounting the electronic components and the pins 301. The pins 301 are fixedly and electrically connected to the connection pads near the edge of the heat dissipation substrate 100, and have the function of inputting and outputting signals with an external circuit connected to the MIPS. The lead 301 is generally made of a metal such as copper, a nickel-tin alloy layer is formed on the surface of the copper by chemical plating and electroplating, the thickness of the alloy layer is generally 5 μm, and the copper can be protected from corrosion and oxidation by the plating layer and the solderability can be improved.
Further, a thin layer of green oil (not shown) may be disposed on the surface of the circuit wiring layer 305, which serves to prevent damage caused by short circuit between the traces of the circuit wiring layer 305 and also serves to prevent oxidation and contamination of the surface of the circuit wiring layer 305, thereby playing a role in protection.
Electronic components are disposed on the connection pads of the circuit wiring layer 305, and the electronic components include a power device and a driving chip 307, wherein the power device includes a switching tube such as an IGBT306(Insulated Gate Bipolar Transistor) or a MOS (metal oxide semiconductor) and a freewheeling diode 303, and the power consumed by the operation thereof is large and the heat generation amount is large, so that the temperature during the operation of the MIPS is high relative to the room temperature.
The sealing layer 200 may be formed of resin, molded using a thermosetting resin by a transfer molding method, or molded using a thermoplastic resin by an injection molding method. The sealing layer 200 has two packaging structures, one is that the sealing layer 200 covers the upper and lower surfaces of the heat dissipation substrate 100 and covers the electronic elements arranged on the heat dissipation substrate 100, and also covers the pins 301 arranged at one end of the heat dissipation substrate 100, which is a full-covering mode of the sealing layer 200; in another packaging method, the sealing layer 200 covers the upper surface of the heat dissipating substrate 100, i.e., covers the heat dissipating substrate 100, the electronic component and the leads 301 disposed at one end of the heat dissipating substrate 100, and the lower surface of the heat dissipating substrate 100, i.e., the heat dissipating surface, is exposed out of the sealing layer 200, thereby forming a half-packaging method of the sealing layer 200. Fig. 6 shows a half-coating manner of the sealing layer 200.
As shown in fig. 1, mounting grooves 201 penetrating the thickness of the sealing layer 200 are further formed at both ends adjacent to the sides of the mounting pins 301, and the cross section of the mounting grooves 201 is generally U-shaped, so that the screw portions of fixing members such as screws can pass through the mounting grooves 201 to fix the MIPS on the circuit board. When the screw fixes the MIPS, the nut of the screw abuts against the surface of the sealing layer 200 at the position of the mounting groove 201 to realize fixation. If too much force is applied during screwing, the nut presses the sealing layer 200 at the position where the surface of the sealing layer 200 is pressed to be cracked, the heat dissipation substrate 100 is seriously exposed, and the electronic elements and the circuit wiring layer 305 on the heat dissipation substrate 100 are damaged, so that the MIPS cannot normally work.
To solve this problem, as shown in fig. 2 to 6, the heat dissipation substrate 308 is thickened so that the heat dissipation surface of the heat dissipation substrate 100 is exposed from the sealing layer 200, and a notch corresponding to the opening of the end surface of the mounting groove is formed in the position of the heat dissipation substrate 100 opposite to the mounting groove. Therefore, when the fixing piece such as a screw penetrates through the mounting groove 201 and the notch, the nut of the fixing piece is abutted against the heat dissipation surface of the heat dissipation substrate 308 instead of the surface of the sealing layer 200, so that the sealing layer 200 is protected, the problem that the MIPS cannot be used due to edge breakage of the sealing layer caused by the fact that the nut presses the sealing layer when the screw is used in the prior art is solved, and the use safety and reliability of the MIPS are improved.
The heat dissipating substrate 100 is closely bonded to the sealing layer 200, and specifically the sealing layer 200 is formed by placing the heat dissipating substrate 100 having electronic components therein in a mold during molding, such as molding with a thermoplastic resin, and then injecting the thermoplastic resin on the mounting surface of the heat dissipating substrate 100, after cooling, the side surface of the heat dissipating substrate 100, and the circuit wiring layer 305 closely connected to the mounting surface and the electronic components are integrated with the sealing layer 200, and only the heat dissipating surface of the sealing layer 200 is exposed from the sealing layer 200. Thus, the heat dissipation substrate 100 is tightly bonded to the sealing layer 200, and the heat dissipation substrate and the sealing layer are not separated in the later use process, thereby ensuring the use stability.
In some embodiments of the present invention, as shown in fig. 2 to 6, a connection neck 103 perpendicular to the heat dissipation substrate 100 is further disposed at a position of a notch periphery of the heat dissipation substrate 100 opposite to the mounting groove 201, an outer wall surface of the connection neck 103 is tightly connected to an inner wall surface of the mounting groove 201, an end of the connection neck 103 is further provided with a flange 102, and the flange 102 is tightly connected to the sealing layer 200. On the basis of the solution that the heat dissipating substrate 100 in the previous embodiment is mainly a flat plate, in this embodiment, a connecting neck 103 vertically connected to the periphery of the notch of the heat dissipating substrate 100 and a flange 102 parallel to the heat dissipating substrate 100 and disposed on the connecting neck 103 are further added to the heat dissipating substrate 100. The flange 102 is tightly connected to the seal layer 200. The connection between the connecting neck 103 and the heat dissipating substrate 100 may be formed by welding, or the like, or may be formed by punching the heat dissipating substrate 100 after slotting, and the outward flange 102 may be formed by punching the connecting neck 103. The connecting neck 103 and the flange 102 form a snap-fit structure for the heat dissipating substrate 100, so that the heat dissipating substrate 100 is more tightly fixed to the sealing layer 200. When the heat dissipating substrate 100, the connecting neck 103, and the flange 102 are connected to the sealing layer 200, in the above embodiment, in the process of forming the sealing layer 200 by injection molding, an assembly of the heat dissipating substrate 100, the connecting neck 103, and the flange 102 is placed in a mold cavity, a resin material such as a thermoplastic resin is injected onto the mounting surface of the heat dissipating substrate 100, and the thickness of the injected resin material is close to the distance between the flange 102 and the heat dissipating substrate 100, so that the connecting neck 103 and the flange 102 are tightly bonded to each other by the thermoplastic resin. After the connecting neck 103 and the flanging 102 are added to the heat dissipation substrate 100, the heat dissipation substrate 100 is more firmly combined with the sealing layer 200 in the installation process, and the risk that the heat dissipation substrate 100 and the sealing layer 200 are separated due to the impact of installation fixing parts such as screw caps on the heat dissipation substrate 100 is avoided.
Further, in some embodiments of the present invention, as shown in FIG. 6, the flange 102 is raised above the surface of the seal layer 200. In fig. 6, the flange 102 protrudes slightly beyond the surface of the seal layer 200, e.g., by one of 0.2mm to 2 mm. In the application process of the MIPS, the surface of the sealing layer is generally installed on the surface of an electric control board such as a PCB, and the pins 301 are inserted into the pad through holes of the PCB and welded, so that when the sealing layer is fixed by a fixing member such as a screw, the outward flange 102 abuts against the surface of the PCB, the sealing layer 200 does not contact with the surface of the PCB, and a small gap exists between the outward flange 102 and the sealing layer, thereby further protecting the sealing layer 200 from the abutting compression force of the PCB, the force applied by the screw fixation completely exists between the heat dissipation substrate 100 and the outward flange 102, and the middle of the outward flange and the heat dissipation substrate is supported by the connecting neck 103, thereby further avoiding the compression effect.
In some embodiments of the present invention, as shown in fig. 2 and 6, the MIPS further includes a plurality of bonding wires 304, and the bonding wires 304 are connected between the plurality of electronic components, the circuit wiring layer 305, and the plurality of pins 301. Such as keys and wires, may connect electronic components to electronic components, may also connect electronic components to circuit wiring layer 305, may also connect electronic components to pin 301, and may also connect circuit wiring layer 305 to pin 304. The electronic components are the IGBT306, the driver chip 307, the freewheeling diode 303, and others such as resistors, capacitors, etc. mentioned in the above embodiments. The bond wires 304 are typically gold wires, copper wires, hybrid gold and copper wires, 38um or thin aluminum wires below 38um, or thick aluminum wires above 100um or 100 um.
In some embodiments of the present invention, the circuit wiring layer 305 and the insulating layer 308 are opened through the thickness thereof, the surface of the heat dissipating substrate 100 is exposed from the opening, and the opening of the heat dissipating substrate 100 is connected to the ground line of the circuit wiring layer 305 through the bonding wire 304. Since the heat dissipation surface of the heat dissipation substrate 100 is exposed on the surface of the MIPS, the heat dissipation substrate 100 needs to be electrically connected to the ground line of the circuit wiring layer 305 in order to prevent the leakage. For example, holes may be formed in the circuit wiring layer 305 and the insulating layer 308 by a via-transfer process, so that a surface of the heat dissipation substrate 100 in contact with the insulating layer 308 is exposed, and then the metal surface of the heat dissipation substrate 100 is connected to the ground of the circuit wiring layer 305 through the bonding wire 304, thereby achieving grounding of the heat dissipation substrate 100 and ensuring safety during MIPS operation.
The invention also provides a manufacturing method of the MIPS mentioned in the above embodiment, the manufacturing method includes the following steps:
step S100, configuring a heat dissipation substrate 100, wherein notches are formed in two ends of the heat dissipation substrate 100, a connecting neck 103 perpendicular to the heat dissipation substrate 100 is further arranged on the periphery of each notch, and a flanging 102 is further arranged at the end of each connecting neck 103;
step S200 of sequentially disposing the insulating layer 308 and the circuit wiring layer 305 on the surface of the heat dissipating substrate 100;
step S300 of disposing an electronic component in the circuit wiring layer 305;
step S400, configuring a pin 301;
step S500, electrically connecting the electronic element, the circuit wiring layer and the pin 301 through a bonding wire 304;
step S600, performing injection molding on the heat dissipation substrate 100 provided with the electronic element and the pins 301 through a packaging mold to form a sealing layer 200, wherein the sealing layer 200 covers one surface of the heat dissipation substrate 100, on which the electronic element is mounted, mounting grooves 201 are formed in two ends of the sealing layer 200, the connecting neck 103 is tightly attached to the inner wall surface of the mounting groove 201, and one surface of the heat dissipation substrate 100, opposite to the surface on which the electronic element is mounted, is exposed from the sealing layer 200;
step S700, cutting and molding the pin 301 to form the MIPS, and testing the molded MIPS.
In step S100, a step of manufacturing the heat dissipating substrate 100 is performed. The heat dissipation substrate 100 with a suitable size can be designed according to a required circuit layout, for example, for a general MIPS, one size can be selected to be 64mm × 30 mm. Taking an aluminum substrate with a heat dissipation substrate 100 as an example, the aluminum substrate is formed by directly performing routing processing on 1m × 1m aluminum, the routing uses high-speed steel as a material, a motor rotates at 5000 rpm, and the routing and the aluminum plane form a right-angle lower cutter; or may be formed by stamping. Then, both sides of the heat dissipation substrate 100 can be subjected to anti-corrosion treatment, and for the MIPS of the half-encapsulated structure, one side of the heat dissipation substrate 100, on which no electronic component is disposed, is exposed from the sealing layer 200, so that the anti-corrosion property in the use process is enhanced by the anti-corrosion treatment, and the heat dissipation substrate is not easily oxidized. For the MIPS with the full encapsulation structure, in order to save cost, the etching prevention treatment may not be performed. The heat dissipating substrate 100 is further processed to form the notch, the connecting neck 103 and the flange 102, and the specific manufacturing process may be as follows: notches of two small grooves are symmetrically punched at two ends of the heat dissipation substrate 100, then the two small grooves are enlarged to form stretching edges to form a connecting neck portion 103, the two small grooves are further enlarged to form a size for connecting a fixing piece such as a screw to pass through, the two enlarged small grooves are final notch openings, and finally the free end of the connecting neck portion 103 is punched to form an outward flanging 102.
In step S200, an insulating layer 308 is disposed on the surface of the heat dissipating substrate 100, and the insulating layer 308 may be formed on the surface of the aluminum substrate by hot pressing. The insulating layer 308 may be made of a resin material such as epoxy resin, and a filler such as alumina and aluminum carbide is filled in the resin material to improve thermal conductivity. In order to increase the thermal conductivity, the shape of these fillers may be angular, and in order to avoid the risk of the fillers damaging the contact surfaces of the electronic components arranged on the surface thereof, the fillers may be spherical, angular, or a mixture of angular and spherical. In order to improve the withstand voltage characteristic, the thickness of the insulating layer 308 can be designed to be 110 um.
Then, a copper foil is laminated on the surface of the insulating layer 308, and then the copper foil is etched to partially remove the copper foil to form a circuit wiring layer 305, wherein the circuit wiring layer 305 includes a circuit line including a trace for forming a circuit and a plurality of connection pads (not shown) for connecting the trace. To improve the current capacity, the thickness of the circuit wiring layer 305 may be designed to be 0.07 mm.
Further, a thin layer of green oil (not shown) may be disposed on the surface of the circuit wiring layer 305, which serves to prevent damage caused by short circuit between the traces of the circuit wiring layer 305 and also serves to prevent oxidation and contamination of the surface of the circuit wiring layer 305, thereby playing a role in protection.
In step S300, the electronic component may be fixed to the connection pad of the circuit wiring layer 305 by soldering. For example, the power device and the resistance-capacitance element can be soldered to the connection pad, and the driver chip 307 can be fixed to the connection pad by an epoxy adhesive.
In step S400, this step includes a process of manufacturing the pin 301 and a process of connecting the pin 301 to the connection pad. The manufacturing process of the lead 301 is as follows: all the pins 301 are made of a metal base material such as a copper base material, for example, the pins are made into a strip shape with the length of 25mm, the width of 1.5mm and the thickness of 1mm, and a certain radian can be pressed and shaped at one end of the pins for the convenience of assembly; then, a nickel layer is formed on the surface of the pin 301 by an electroless plating method: the nickel layer is formed on the surface of the copper material with a special shape by the mixed solution of nickel salt and sodium hypophosphite and adding a proper complexing agent, the metal nickel has strong passivation capability, a layer of extremely thin passivation film can be rapidly generated, and the corrosion of atmosphere, alkali and certain acid can be resisted. The nickel plating crystal is extremely fine, and the thickness of the nickel layer is generally 0.1 mu m; then, by an acid sulfate process, the copper material with the formed shape and the nickel layer is soaked in a plating solution with positive tin ions for electrifying at room temperature, a nickel-tin alloy layer is formed on the surface of the nickel layer, the thickness of the nickel layer is generally controlled to be 5 mu m, and the protection and the weldability are greatly improved by the formation of the nickel layer.
Further, in order to prevent the electronic components from being damaged by static electricity in the subsequent processing steps, specific positions of the leads 301 are connected by the reinforcing ribs 302, as shown in fig. 7. This also facilitates securing of the pins 301 during subsequent connection to the connection pads.
The process of attaching the connection pins 301 to the connection pads is as follows: one end of the pin 301 is placed on the connecting pad, the other end of the pin 301 needs to be fixed by a carrier, the carrier is made of materials such as synthetic stone and stainless steel, and due to the connecting effect of the pin 301 reinforcing ribs 302, the pin 301 is conveniently fixed at the position of the pad. Then, the circuit board traces placed on the carrier traces are soldered and fixed on the connection pads by reflow soldering, and curing of solder paste or silver paste.
In step S500, the step is to connect the bonding wires 304 for routing. As shown in fig. 2 and fig. 6, one of the driving bonding pad traces of the driving chip 307 may be directly connected to the gate bonding region (not shown) of the IGBT306 trace tube through the bonding wire 304 traces such as gold wire, copper wire, gold-copper hybrid wire, 38um or thin aluminum wire below 38um, and the other driving bonding pad traces of the driving chip 307 may be directly connected to the lead 301 trace or the connection pad (not shown) of the circuit wiring layer 305 through the bonding wire 304 traces such as gold wire, copper wire, gold-copper hybrid wire, 38um or thin aluminum wire below 38 um. The emitter bonding region of the wiring pipe of the IGBT306 is directly connected to the connection of the heat dissipation substrate 100 through a thick aluminum wire of 100um or more than 100 um.
In step S600, this step is a step of realizing the sealing layer 200. Firstly, the heat dissipation substrate 100 with the electronic components and the pins 301 installed in the above steps can be baked in an oxygen-free environment, the baking time is not less than 2 hours, and the baking temperature is selected to be 125 ℃. The baked heat dissipation substrate 100 is then transferred to a packaging mold, wherein the packaging mold includes an upper film and a lower film disposed above and below the upper film. The pins fixedly connected to the heat dissipation substrate 100 are in contact with the fixing device located on the lower mold to position the heat dissipation substrate 100, so that the heat dissipation surface of the heat dissipation substrate 100 is attached to the inner surface of the lower mold. At least two ejector pins are arranged on the upper die, the free ends of the ejector pins can be abutted to the circuit wiring layer 305, and the heat dissipation substrate 100 is attached to the inner surface of the lower die through the two ejector pins. Then, the package mold on which the heat dissipation substrate 100 is placed is closed, and a sealing resin is injected from the gate. The sealing method may employ transfer mold molding using thermosetting resin or injection mold molding using thermosetting resin. Further, the gas corresponding to the inside of the sealing resin cavity injected from the gate is discharged to the outside through the exhaust port. Finally, demolding is carried out, after demolding, sealing resin forms the sealing layer 200, mounting grooves 201 formed by a packaging mold are formed in two ends of the sealing layer 200, free ends of the pins 301 are exposed out of the sealing layer 200, and the side edge of the heat dissipation substrate 100, the connecting neck 103 and the flanging 102 are tightly attached to the sealing layer 200.
In step S700, the step is a step of cutting and shaping the pin 301 trace of the MIPS of the semi-finished product forming the sealing layer 200, and the shaping of the pin 301 trace and the cutting of the length of the pin 301 can be performed according to the length and shape requirements of use, and the reinforcing ribs 302 are cut off; and further testing the MIPS, wherein if conventional electrical parameter tests are carried out, the test items generally comprise insulation voltage resistance, static power consumption, delay time and the like, and appearance AOI tests generally comprise test items such as assembly hole size, pin 301 routing offset and the like, and the qualified product is the finished product. Thereby completing the entire MIPS manufacturing process.
The manufacturing method of the MIPS of the invention, through disposing the heat-dissipating substrate 100, wherein both ends of the heat-dissipating substrate 100 are provided with notches, the periphery of the notch is further provided with a connecting neck 103 perpendicular to the heat-dissipating substrate 100, the end of the connecting neck 103 is further provided with a flanging 102, and the surface of the heat-dissipating substrate 100 is sequentially provided with an insulating layer 308 and a circuit wiring layer 305, and an electronic element and a configuration pin 301 are disposed on the circuit wiring layer 305, then the electronic element, the circuit wiring layer and the pin 301 are electrically connected through a bonding wire 304, then the heat-dissipating substrate 100 provided with the electronic element and the pin 301 is injected through a packaging mold to form a sealing layer 200, wherein the sealing layer 200 covers one surface of the heat-dissipating substrate 100 where the electronic element is installed, the two ends of the sealing layer 200 are provided with mounting grooves 201, the connecting neck 103 is tightly attached to the inner wall surfaces of the, finally, the pins 301 are cut and molded to form the MIPS, and the molded MIPS is tested. The notches with the same shapes as the end face openings of the mounting grooves 201 of the sealing layer 200 are formed in the two ends of the heat dissipation substrate 100, and the connecting neck and the flanging 102 perpendicular to the notches are further formed, so that the flanging 102, the connecting neck 103 and the sealing layer 200 are tightly connected, and the heat dissipation surface of the heat dissipation substrate 100 is exposed out of the sealing layer, therefore, when the MIPS is fixed through a fixing piece such as a screw in the subsequent application process, a nut of the MIPS is abutted against the heat dissipation surface of the heat dissipation substrate 100, the sealing layer 200 is protected, the risk that the nut presses the sealing layer 200 to cause edge breakage in the prior art is avoided, and safety and reliability of the MIPS are improved. And the heat dissipation substrate is combined with the sealing layer 200 in the process of forming the sealing layer 200, and the heat dissipation substrate and the sealing layer 200 are tightly connected, so that the problem that the MIPS is damaged due to separation of the heat dissipation substrate and the sealing layer 200 in the later application process is solved.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
In the description of the present invention, it is to be understood that the terms "central," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the invention and to simplify the description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be considered limiting of the invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
In the present invention, unless otherwise expressly stated or limited, the first feature "on" or "under" the second feature may be directly contacting the first and second features or indirectly contacting the first and second features through an intermediate. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.
Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.
Claims (10)
1. A semiconductor circuit, comprising:
the heat dissipation substrate comprises a mounting surface and a heat dissipation surface;
a circuit wiring layer provided on the mounting surface of the heat dissipation substrate, the circuit wiring layer being provided with a plurality of connection pads;
a plurality of electronic elements disposed on the pads of the circuit wiring layer, the plurality of electronic elements including power devices and driving chips;
a plurality of pins disposed on at least one side of the heat-dissipating substrate;
the sealing layer wraps one surface of the heat dissipation substrate provided with the electronic element, one end of each pin is exposed out of the sealing layer, and mounting grooves penetrating the thickness of the sealing layer are formed in two sides, adjacent to the side edges where the pins are mounted, of the sealing layer;
the heat dissipation substrate is made of metal, one surface of the heat dissipation substrate, opposite to the electronic element, is exposed out of the sealing layer, and a notch consistent with an end face opening of the installation groove is formed in the position, opposite to the installation groove, of the heat dissipation substrate.
2. The semiconductor circuit according to claim 1, wherein a connection neck perpendicular to the heat dissipation substrate is further disposed at a position where a periphery of the notch is opposite to the mounting groove, an outer wall surface of the connection neck is in close contact with an inner wall surface of the mounting groove, and an end portion of the connection neck is further provided with a flange which is in close contact with the sealing layer.
3. The semiconductor circuit of claim 2, wherein the flange is raised above a surface of the sealing layer.
4. The semiconductor circuit of claim 1, further comprising a plurality of bond wires connected between the plurality of electronic components, the circuit wiring layer, and the plurality of pins.
5. The semiconductor circuit according to claim 1, wherein the heat dissipating substrate is electrically connected to a ground line of the circuit wiring layer.
6. The semiconductor circuit according to claim 5, wherein the circuit wiring layer and the insulating layer are opened with an opening extending through a thickness thereof, a surface of the heat dissipating substrate is exposed from the opening, and a ground line of the circuit wiring layer is connected to the opening of the heat dissipating substrate via a bonding wire.
7. The semiconductor circuit according to claim 1, wherein a surface of the circuit wiring layer is further provided with a green oil layer for protection.
8. The semiconductor circuit according to claim 1, wherein the insulating layer is made of a resin material filled with a filler of alumina and aluminum carbide.
9. The semiconductor circuit of claim 8, wherein the filler is angular, spherical, or a mixture of angular and spherical.
10. A method for manufacturing a semiconductor circuit according to any one of claims 1 to 9, characterized in that the method comprises the steps of:
the heat dissipation device comprises a heat dissipation substrate made of metal, wherein notches are formed in two ends of the heat dissipation substrate, a connecting neck perpendicular to a protection body is further arranged on the periphery of each notch, and a flanging is further arranged at the end part of each connecting neck;
sequentially configuring an insulating layer and a circuit wiring layer on the surface of the heat dissipation substrate;
disposing an electronic component on the circuit wiring layer;
configuring pins;
electrically connecting the electronic element, the circuit wiring layer and the pins through bonding wires;
performing injection molding on the heat dissipation substrate provided with the electronic element and the pins through a packaging mold to form a sealing layer, wherein the sealing layer coats one surface of the heat dissipation substrate, on which the electronic element is mounted, mounting grooves are formed at two ends of the sealing layer, the connecting neck is tightly attached to the inner wall surface of each mounting groove, and one surface of the heat dissipation substrate, on which the electronic element is mounted, is exposed from the sealing layer;
and cutting and molding the pins to form the semiconductor circuit, and testing the molded semiconductor circuit.
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| CN202110460114.4A CN113113400A (en) | 2021-04-27 | 2021-04-27 | Semiconductor circuit and method for manufacturing semiconductor circuit |
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| CN202110460114.4A CN113113400A (en) | 2021-04-27 | 2021-04-27 | Semiconductor circuit and method for manufacturing semiconductor circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114083905A (en) * | 2021-12-06 | 2022-02-25 | 湖南凯通电子有限公司 | Thermal circuit for thermal printing hair |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114083905A (en) * | 2021-12-06 | 2022-02-25 | 湖南凯通电子有限公司 | Thermal circuit for thermal printing hair |
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