CN113096603A - Light emitting circuit, display panel and electronic device - Google Patents
Light emitting circuit, display panel and electronic device Download PDFInfo
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- CN113096603A CN113096603A CN201911351515.5A CN201911351515A CN113096603A CN 113096603 A CN113096603 A CN 113096603A CN 201911351515 A CN201911351515 A CN 201911351515A CN 113096603 A CN113096603 A CN 113096603A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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Abstract
The application provides a light-emitting circuit, a display panel and an electronic device. The light-emitting circuit comprises a drive circuit and a light-emitting unit, the drive circuit is used for driving the light-emitting unit to emit light, the drive circuit comprises a drive unit, a storage capacitor, a first switch unit, a second switch unit and a third switch unit, the drive unit comprises a grid electrode, a first electrode and a second electrode, the grid electrode of the drive unit is electrically connected with the storage capacitor to a first end and is used for receiving a first signal, the first electrode of the drive unit is electrically connected with the first end, the second electrode of the drive unit is electrically connected with the third switch unit to an anode of the light-emitting unit, a cathode of the light-emitting unit is electrically connected with a second end and is used for receiving a second signal, the first switch unit and the second switch unit are electrically connected with the grid electrode of the drive unit, the first switch unit and the second switch unit respectively comprise a thin film transistor, and the leakage current of at least‑12A. The brightness change of the light-emitting unit in the light-emitting circuit is small when the light-emitting unit emits light.
Description
Technical Field
The present application relates to the field of electronic technologies, and in particular, to a light emitting circuit, a display panel, and an electronic device.
Background
At present, the driving of horizontal scanning lines of an AMOLED display panel is realized by an external integrated circuit, the external integrated circuit can control the gradual opening of all levels of line scanning lines, and a GOA (Gate Driver on array) method is adopted, so that the line scanning driving circuit can be integrated on a display panel substrate, the number of external ICs can be reduced, the production cost of the display panel is reduced, and the narrow frame of a display device can be realized. However, the current leakage current of the thin film transistor in the GOA circuit is large, and the output waveform of the output terminal in the GOA circuit is more and more distorted with the increase of the leakage current, even turned on in advance, which causes abnormal display of the display panel.
Disclosure of Invention
In a first aspect, the present application provides a light emitting circuit applied to a display panel. The light-emitting circuit comprises a driving circuit and a light-emitting unit, the driving circuit is used for driving the light-emitting unit to emit light, the driving circuit comprises a driving unit, a storage capacitor, a first switch unit, a second switch unit and a third switch unit, the driving unit comprises a grid electrode, a first electrode and a second electrode, the grid electrode of the driving unit is electrically connected with the storage capacitor to a first end and used for receiving a first signal, the first electrode of the driving unit is electrically connected with the first end, the second electrode of the driving unit is electrically connected with the third switch unit to the anode of the light-emitting unit, the cathode of the light-emitting unit is electrically connected with a second end and used for receiving a second signal, the first switch unit and the second switch unit are both electrically connected with the grid electrode of the driving unit, and the first switch unit and the second switch unit both comprise thin film transistors, the leakage current of at least one thin film transistor in the first switch unit and the second switch unit is less than 10-12A。
In a second aspect, the present application also provides a light emitting circuit. The light-emitting circuit is applied to a display panel and comprises a driving circuit and a light-emitting unit, wherein the driving circuit is used for driving the light-emitting unit to emit light, the driving circuit comprises a driving unit, a storage capacitor, a first switch unit, a second switch unit and a third switch unit, the driving unit comprises a grid electrode, a first electrode and a second electrode, the grid electrode of the driving unit is electrically connected with the storage capacitor to a first end and used for receiving a first signal, the first electrode of the driving unit is electrically connected with the first end, the second electrode of the driving unit is electrically connected with the third switch unit to the anode of the light-emitting unit, the cathode of the light-emitting unit is electrically connected with a second end and used for receiving a second signal, the first switch unit and the second switch unit are both electrically connected with the grid electrode of the driving unit, and the first switch unit and the second switch unit both comprise thin film transistors, and the leakage current of at least one thin film transistor in the first switch unit and the second switch unit is less than that of the driving unit.
In a third aspect, the present application further provides a display panel including the light emitting circuit of the first aspect or the second aspect.
In a fourth aspect, the present application further provides an electronic device, where the electronic device includes a device body and the display panel of the third aspect, and the device body is used for bearing the display panel.
In the light emitting circuit provided by the first aspect of the present application, the first switch unit and the second switch unit are both electrically connected to the gate of the driving unit, and a leakage current of at least one thin film transistor in the first switch unit and the second switch unit is less than 10-12When the light-emitting unit is driven to emit light in the driving unit, the voltage of the grid electrode of the driving unit is reduced less due to the leakage current factors of the first switch unit and the second switch unit, so that the brightness change of the light-emitting unit driven by the driving unit to emit light is ensured to be small or even unchanged, and the abnormal display can be reduced or even eliminated when the light-emitting circuit is applied to a display panel.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic diagram of a light emitting circuit according to an embodiment of the present disclosure.
Fig. 2 is a timing diagram of a light emitting circuit driving a light emitting unit according to an embodiment of the present disclosure.
Fig. 3 is a circuit diagram of a light emitting circuit according to an embodiment of the present disclosure.
Fig. 4 is a timing diagram illustrating driving of the light emitting circuit of fig. 3.
Fig. 5 is a circuit schematic diagram of a first switch unit in a light emitting circuit according to an embodiment of the present disclosure.
Fig. 6 is a circuit schematic diagram of a first switch unit in a light emitting circuit according to another embodiment of the present disclosure.
Fig. 7 is a circuit diagram of a second switch unit in a light emitting circuit according to still another embodiment of the present application.
Fig. 8 is a schematic diagram of a light emitting circuit according to another embodiment of the present disclosure.
Fig. 9 is a timing diagram of a light emitting circuit driving a light emitting unit according to another embodiment of the present application.
Fig. 10 is a circuit diagram of a light emitting circuit according to still another embodiment of the present application.
Fig. 11 is a circuit schematic diagram of a first switch unit in a light emitting circuit according to an embodiment of the present disclosure.
Fig. 12 is a circuit schematic diagram of a second switch unit in a light emitting circuit according to an embodiment of the present disclosure.
Fig. 13 is a schematic view of a display panel according to an embodiment of the present application.
Fig. 14 is a schematic view of an electronic device according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without inventive step, are within the scope of the present disclosure.
Referring to fig. 1, fig. 1 is a schematic diagram of a light emitting circuit according to an embodiment of the present disclosure.The light emitting circuit 100 includes a driving circuit 110 and a light emitting unit 120, wherein the driving circuit 110 is used for driving the light emitting unit 120 to emit light. The driving circuit 110 includes a driving unit 111, a storage capacitor C, a first switching unit 112, a second switching unit 113, and a third switching unit 114. The driving unit 111 includes a gate g, a first electrode s, and a second electrode d. The gate g of the driving unit 111 is electrically connected to the storage capacitor C to the first end a for receiving the first signal VDD. A first electrode s of the driving unit 111 is electrically connected to the first terminal a, a second electrode d of the driving unit 111 is electrically connected to the third switching unit 114 to the anode of the light emitting unit 120, and the cathode of the light emitting unit 120 is electrically connected to the second terminal B for receiving a second signal VSS. The first switch unit 112 and the second switch unit 113 are electrically connected to the gate g of the driving unit 111, the first switch unit 112 and the second switch unit 113 each include a thin film transistor, and a leakage current of at least one thin film transistor in the first switch unit 112 and the second switch unit 113 is less than 10-12A。
The term "leakage current of a thin film transistor" means that V is defined by the voltage difference between the gate and the source of the thin film transistorGSWith VTHAs a reference point, starting a voltage transition V in the opposite directionGSDeviation setting in the range of 5-10V corresponding to the drain-source voltage difference VDSUnder the condition (1), the drain current is large. The light emitting unit 120 may be, but is not limited to, a light emitting diode. A leakage current of at least one thin film transistor of the first switch unit 112 and the second switch unit 113 is less than 10-12A, comprising: only the leakage current of at least one thin film transistor in the first switching unit 112 is less than 10-12A; alternatively, only the drain current of at least one thin film transistor in the second switching unit 113 is less than 10-12A; alternatively, the leakage current of at least one thin film transistor in the first switching unit 112 is less than 10-12A, and a leakage current of at least one thin film transistor in the second switching unit 113 is less than 10-12A. In the schematic view of the present embodiment, the driving unit 111 includesThe thin film transistor T2 is illustrated as an example.
In this embodiment, the first switch unit 112 and the second switch unit 113 are electrically connected to the gate g of the driving unit 111, and a leakage current of at least one thin film transistor of the first switch unit 112 and the second switch unit 113 is less than 10-12A, when the driving unit 111 drives the light emitting unit 120 to emit light, the voltage of the gate g of the driving unit 111 is reduced less due to the leakage current factors of the first switch unit 112 and the second switch unit 113, so that the luminance change when the driving unit 111 drives the light emitting unit 120 to emit light is ensured to be small or even unchanged, and further, the display abnormality is weakened or even eliminated.
Optionally, in an embodiment, at least one thin film transistor in the first switch unit 112 and the second switch unit 113 is a metal oxide thin film transistor.
The metal oxide thin film transistor means that a material of a channel layer (also referred to as an active layer or an active region) of the thin film transistor is a metal oxide. It is understood that the layers in the channel layer may be illustrated as a single layer, two layers, or more than two layers. When the film layers of the channel layer are two or more than two layers, at least one film layer in the channel layer is made of metal oxide.
Optionally, the channel layer of the metal Oxide thin film transistor includes one of Indium Gallium Zinc Oxide (IGZO), Gallium Zinc Oxide (GZO), Indium Zinc Oxide (IZO), Indium Gallium Tin Oxide (IGZTO), Indium Tin Oxide (ITO), a combination of multiple metal oxides, or a multi-layer thin film stack of multiple metal oxides. .
The operation principle of the light emitting circuit 100 of the present application when driving the display panel 10 (see fig. 13) is described in detail below. Referring to fig. 2, fig. 2 is a timing diagram of a light emitting unit driven by a light emitting circuit according to an embodiment of the present disclosure. The light emitting circuit 100 has a multi-frame driving time for driving the display panel 10, and each frame driving time includes an initialization period (initialization), denoted by (r) in the figure, in which the first switching unit 112 is turned on, the second switching unit 113 is turned off, the third switching unit 114 is turned off, and the gate g of the driving unit 111 is written with a reset signal Vint.
The gate g of the driving unit 111 is written with a reset signal to eliminate a signal remained when the light emitting circuit 100 drives the display panel 10 to display a previous frame of picture, so as to prevent the signal remained when the display panel 10 displays the previous frame of picture from affecting the display panel 10 driven by the light emitting circuit 100 to display the picture in the current frame of driving time.
Further, in one embodiment, each frame driving time further includes an information writing and Compensation phase (Data & Compensation) following and consecutive to the initialization phase, which is denoted by (c). In the information writing and compensating phase, the first switch unit 112 is turned off, the second switch unit 113 is turned on, the third switch unit 114 is turned off, and the second switch unit 113 receives a data signal and writes the data signal to the gate g of the driving unit 111.
In this embodiment, in the information writing and compensation stage, the data signal is written to the gate g of the driving unit 111 to prepare for the subsequent driving unit 111 to drive the light emitting unit 120 to emit light according to the data signal.
Further, in one embodiment, each frame driving time further includes a light emitting phase (Emission) after and continuous with the information writing and compensating phase, which is denoted by- (c) in the figure. In the light emitting stage, the first switch unit 112 is turned off, the second switch unit 113 is turned off, the third switch unit 114 is turned on, and the driving unit 111 drives the light emitting unit 120 to emit light.
In this embodiment, when the second switching unit 113 receives a data signal and writes the data signal into the gate g of the driving unit 111, the first switching unit 112 and the second switching unit are electrically connected to each other through the gate g of the driving unit 111A unit 113, and a leakage current of at least one thin film transistor in the first switch unit 112 and the second switch unit 113 is less than 10-12A, the voltage value of the data signal received by the gate g of the driving unit 111 is reduced less due to the leakage current factors of the first switch unit 112 and the second switch unit 113, so that the luminance change when the driving unit 111 drives the light-emitting unit 120 to emit light is ensured to be small, and even the luminance change is not easily perceived by human eyes.
Since the leakage current of at least one thin film transistor in the first switch unit 112 and the second switch unit 113 is less than 10-12A, even when the refresh rate of the light emitting circuit 100 is low, the leakage current of the first switch unit 112 and the second switch unit 113 still does not have a great influence on the voltage of the gate of the driving unit 111, so that the luminance change when the driving unit 111 drives the light emitting unit 120 to emit light is ensured to be small, and even the luminance change is not easily perceived by human eyes. The refresh rate is a frequency corresponding to a minimum repetition period of the control signal (CLK) of the light emitting circuit 100. When the light emitting circuit continuously outputs signals to the light emitting unit, if the frequency of the control signal is changed, the refresh rate of the light emitting circuit is dynamically changed. The frequency of the control signal of the light emitting circuit 100 may be in the range of 1Hz to 120Hz, i.e., the refresh rate of the light emitting circuit 100 is 1Hz to 120 Hz. Preferably, the refresh rate of the light emitting circuit is 30HZ, 60HZ, 90HZ, but the invention is not limited thereto.
Referring to fig. 3, fig. 3 is a circuit schematic diagram of a light emitting circuit according to an embodiment of the present disclosure. In this embodiment, the first switch unit 112 includes an N-type first thin film transistor T5, and the first thin film transistor T5 is a metal oxide thin film transistor. The gate G of the first thin film transistor T5 is configured to receive an (n-1) th gate control signal G (n-1), the first electrode s of the first thin film transistor T5 is electrically connected to the gate G of the driving unit 111, and the second electrode d of the first thin film transistor T5 is electrically connected to the third terminal E to receive the reset signal Vint.
The first thin film transistor T5 is a metal oxide thin film transistor, and the metal oxide thin film transistor refers to the foregoing description, which is not repeated herein.
Further, in an embodiment, the second switch unit 113 includes a second thin film transistor T1 of an N-type and a third thin film transistor T4 of a P-type, the second thin film transistor T1 is a metal oxide thin film transistor, the gate g of the second thin film transistor T1 is configured to receive an nth-level gate control signal, the first electrode s of the second thin film transistor T1 is configured to receive the data signal, the second electrode d of the second thin film transistor T1 is configured to be electrically connected to the first electrode s of the third thin film transistor T4, and the gate g and the second electrode d of the third thin film transistor T4 are electrically connected to the gate g of the driving unit 111.
It is to be understood that the circuit structures of the first switch unit 112 and the second switch unit 113 may be independent of each other, the circuit structure of the first switch unit 112 is not dependent on the circuit structure of the second switch unit 113, and the circuit structure of the second switch is not dependent on the circuit structure of the first switch unit 112. That is, the first switch unit 112 of the present application includes a first thin film transistor T5 of N-type, and the first thin film transistor T5 is a metal oxide thin film transistor; and the second thin film transistor T1 including an N-type and the third thin film transistor T4 including a P-type with the second switching unit 113 may be respectively incorporated into the frame of the light emitting circuit 100 provided in fig. 1. In the schematic diagram of the embodiment, it is exemplified that the first switch unit 112 in the light emitting circuit 100 includes a first thin film transistor T5 of N-type, the first thin film transistor T5 is a metal oxide thin film transistor, and the second switch unit 113 includes a second thin film transistor T1 of N-type and a third thin film transistor T4 of P-type.
Referring to fig. 4, please refer to a timing diagram of a driving circuit of fig. 3 in conjunction with a specific circuit structure of the light emitting unit 120 provided in this embodiment. In the schematic diagram, the initialization stage, the information writing and compensation stage, and the light emitting stage are shown.
In the initialization phase: g (n-1) is high, the first thin film transistor T5 is turned on, that is, the first switching unit 112 is turned on; g (n) is low, the second thin film transistor T1 is turned off, and the second switching unit 113 is turned off; e (n) is high, the fourth thin film transistor T3 is turned off, that is, the third switching unit 114 is turned off; since the first switching unit 112 is turned on, the second switching unit 113 is turned off, and the third switching unit 114 is turned off, the reset signal is written to the gate g of the driving unit 111 via the first switching unit 112 in the initialization stage.
In the information writing and compensation stage: g (n-1) is low, the first thin film transistor T5 is turned off, that is, the first switching unit 112 is turned off; g (n) is high level, the second tft T1 is turned on, and since the reset signal is written into the gate g of the driving unit 111 in the initialization phase, and the gate g of the driving unit 111 is electrically connected to the gate g of the third tft T4, the third tft T4 is also turned on, that is, the second switch unit 113 is turned on; e (n) is high, the fourth thin film transistor T3 is turned off, that is, the third switching unit 114 is turned off. Since the first switching unit 112 is turned off, the second switching unit 113 is turned on, and the third switching unit 114 is turned off, the data signal is written to the gate g of the driving unit 111 through the second switching unit 113 in the information writing and compensating stage.
In the light emitting stage: g (n-1) is low, the first thin film transistor T5 is turned off, that is, the first switching unit 112 is turned off; g (n) is low, the second thin film transistor T1 is turned off, and the second switching unit 113 is turned off; e (n) is low, the fourth thin film transistor T3 is turned on, that is, the third switching unit 114 is turned on. Since the first switching unit 112 is turned off, the second switching unit 113 is turned off, and the third switching unit 114 is turned on, the driving unit 111 drives the light emitting unit 120 to emit light in a light emitting stage.
In particular, the current I flowing through the light-emitting cellDSAs in equation (1).
IDS＝K[VGS-VTH]2/2 (1)
Wherein, VGSIs the voltage between the gate g and the source s of the driving unit 111, VTHThe threshold voltage for the turn-on of the driving unit 111, and K is a constant, and is related to the characteristics of the driving unit 111 itself. In the normal case:
K＝μNCoxW/L (2)
wherein, muNIs the mobility of the carriers of the drive unit 111, CoxIs a capacitance per unit area of the driving unit 111, W is a width of a channel layer of the driving unit 111, and L is a length of the channel layer of the driving unit 111.
And, instead,
VGS＝VG-VDD (3)
VG＝VTH+VData (4)
according to the formulas (1), (2), (3) and (4), the following results are obtained:
IDS＝K[VData-VDD]2/2 (5)
as can be seen from equation (5), the current I flowing through the light emitting unit 120DSAnd threshold voltage V of driving unit 111THIndependently, so that compensation of the threshold voltage V of the drive unit 111 can be achievedTHThe drive current is influenced by the variation of (c).
It is to be understood that, in the circuit diagram of the present embodiment, the third switching unit 114 includes one P-type fourth thin film transistor T3 as an example, and it is to be understood that, in other embodiments, the number of the thin film transistors included in the third switching unit 114 is not limited to one, and the types of the thin film transistors in the third switching unit 114 are not limited to the P-type thin film transistors, as long as the third switching unit 114 is turned off in the initialization stage, turned off in the information writing and compensation stage, and turned on in the light emitting stage. Accordingly, the signal En for driving the third switching unit 114 can also be designed according to the state required by the third switching unit 114. For example, in other embodiments, the third switching unit 114 includes an N-type thin film transistor, and since the third switching unit 114 is turned off during the initialization period, En is at a low level during the initialization period; since the third switching unit 114 is turned off during the information writing and compensating stage, En is at a low level during the information writing and compensating stage; since the third switching unit 114 is turned on during the light emitting period, the light emitting period En is at a high level.
Referring to fig. 5, fig. 5 is a circuit schematic diagram of a first switch unit in a light emitting circuit according to an embodiment of the present disclosure. The first switch unit 112 includes at least one first thin film transistor T5, when one first thin film transistor T5 is included in the first switch unit 112, the first thin film transistor T5 is N-type or P-type, and the first thin film transistor T5 is a metal oxide thin film transistor; when the first switch unit 112 includes two or more first thin film transistors T5, at least one of the first thin film transistors T5 is a metal oxide thin film transistor, and the type of the first thin film transistor T5 is any combination of N-type or P-type. As long as it is satisfied that the first switch unit 112 is turned on in the initialization phase, turned off in the information writing and compensation phase, and turned off in the light emitting phase.
For an N-type thin film transistor, when a grid g of the thin film transistor is loaded with a high level, the thin film transistor is turned on; when the grid g of the thin film transistor is loaded with low level, the thin film transistor is closed. For a P-type thin film transistor, when the grid g of the thin film transistor is loaded with a low level, the thin film transistor is turned on; when the grid g of the thin film transistor is loaded with high level, the thin film transistor is closed.
In the schematic diagram of the present embodiment, the first switch unit 112 includes a P-type first thin film transistor T5 as an example. When the first switching unit 112 includes the first thin film transistor T5 of N-type, G (N-1) is at a high level during the initialization period since the first switching unit 112 is turned on during the initialization period; since the first switch unit 112 is turned off during the information writing and compensation phase, it is at a low level during the information writing and compensation phase G (n-1); since the first switching unit 112 is turned off during the light emitting period, it is at a low level during the light emitting period G (n-1).
Referring to fig. 6, fig. 6 is a circuit schematic diagram of a first switch unit in a light emitting circuit according to another embodiment of the present application. In the schematic diagram of the present embodiment, it is exemplified that the first switch unit 112 includes three N-type first thin film transistors T5 connected in series, wherein at least one of the first thin film transistors T5 is a metal oxide thin film transistor. In this embodiment, it is only necessary to control the voltage signal applied to the gate g of each first thin film transistor T5 so that the first switch unit 112 is turned on in the initialization phase, turned off in the information writing and compensation phase, and turned off in the light emitting phase.
Referring to fig. 7, fig. 7 is a circuit schematic diagram of a second switch unit in a light emitting circuit according to another embodiment of the present application. In this embodiment, the second switching unit 113 includes one or more second thin film transistors T1 and one third thin film transistor T4, and the one or more second thin film transistors T1 are connected in series. The first electrode s of the first-stage second thin film transistor T1 receives the data signal VDataThe second electrode d of the last second tft T1 is electrically connected to the first electrode s of the third tft T4, at least one second tft T1 of the one or more second tfts T1 is a metal oxide tft, the type of the second tft T1 is any combination of N-type or P-type, and the gate g and the second electrode d of the third tft T4 are both electrically connected to the gate g of the driving unit 111.
The plurality of second thin film transistors T1 connected in series means that the first electrode s of the m-th stage second thin film transistor T1 is electrically connected to the second electrode d of the m-1 th stage second thin film transistor T1, and the second electrode d of the m-th stage second thin film transistor T1 is electrically connected to the first electrode s of the m +1 th stage second thin film transistor T1, where m is a positive integer and is greater than 2.
In this embodiment, the second switch unit 113 includes three N-type second thin film transistors T1 for example, and it can be understood that in other embodiments, the number of the second thin film transistors T1 may be other, the type of the second thin film transistors T1 may be any combination of N-type or P-type, and it is only necessary that the second switch unit 113 is turned off in the initialization stage, the second switch unit 113 is turned on in the information writing and compensating stage, and the second switch unit 113 is turned off in the light emitting stage.
When the second switch unit 113 includes a plurality of second tfts T1 connected in series, at least one of the second tfts T1 of the one or more second tfts T1 is a metal oxide tft, so that the leakage current of the second switch unit 113 is small, the voltage value of the data signal received by the gate g of the driving unit 111 is reduced less due to the leakage current of the second switch unit 113, and the luminance variation when the driving unit 111 drives the light emitting unit 120 to emit light is small.
The above embodiments are provided by way of example to illustrate that the driving unit 111 in the light emitting circuit 100 is a P-type thin film transistor. The driving unit 111 is a low temperature polysilicon thin film transistor.
Referring to fig. 8, fig. 8 is a schematic diagram of a light emitting circuit according to another embodiment of the present disclosure. The light emitting circuit 100 includes a driving circuit 110 and a light emitting unit 120, wherein the driving circuit 110 is used for driving the light emitting unit 120 to emit light. The driving circuit 110 includes a driving unit 111, a storage capacitor C, a first switching unit 112, a second switching unit 113, and a third switching unit 114. The driving unit 111 includes a gate g, a first electrode s, and a second electrode d, the gate g of the driving unit 111 is electrically connected to the storage capacitor C to the first end a for receiving a first signal VDD. A first electrode s of the driving unit 111 is electrically connected to the first terminal a, a second electrode d of the driving unit 111 is electrically connected to the third switching unit 114 to the anode of the light emitting unit 120, and the cathode of the light emitting unit 120 is electrically connected to the second terminal B for receiving a second signal VSS. The first switch unit 112 and the second switch unit 113 are electrically connected to the gate g of the driving unit 111, the first switch unit 112 and the second switch unit 113 each include a thin film transistor, and a leakage current of at least one of the thin film transistors in the first switch unit 112 and the second switch unit 113 is smaller than a leakage current of the driving unit 111.
For the definition of the leakage current, please refer to the foregoing description, and will not be described herein. The leakage current of at least one thin film transistor in the first switch unit 112 and the second switch unit 113 is smaller than the leakage current of the driving unit 111, and includes: only the leakage current of at least one thin film transistor in the first switching unit 112 is smaller than the leakage current of the driving unit 111; alternatively, only the drain current of at least one thin film transistor in the second switching unit 113 is smaller than the drain current of the driving unit 111; alternatively, the leakage current of at least one thin film transistor in the first switch unit 112 is smaller than the leakage current of the driving unit 111 and the leakage current of at least one thin film transistor in the second switch unit 113 is smaller than the leakage current of the driving unit 111.
In this embodiment, the leakage current of at least one thin film transistor in the first switch unit 112 and the second switch unit 113 is smaller than the leakage current of the driving unit 111, so that when the driving unit 111 drives the light emitting unit 120 to emit light, the voltage of the gate g of the driving unit 111 is reduced less due to the leakage current of the first switch unit 112 and the second switch unit 113, thereby ensuring that the luminance change when the driving unit 111 drives the light emitting unit 120 to emit light is small.
In general, the smaller the leakage current of the thin film transistor, the stronger the driving capability. In this embodiment, a leakage current of at least one thin film transistor of the first switch unit 112 and the second switch unit 113 is smaller than a leakage current of the driving unit 111. On one hand, the driving unit 111 has better driving capability, and the gate g voltage of the driving unit 111 is ensured to be reduced less due to the leakage current of the first switch unit 112 and the second switch unit 113.
In one possible embodiment, the driving unit 111 is a low temperature polysilicon thin film transistor, that is, the material of the channel layer of the driving unit 111 includes low temperature polysilicon. At least one of the thin film transistors in the first switch unit 112 and the second switch unit 113 is a metal oxide thin film transistor, so that a leakage current of at least one of the thin film transistors in the first switch unit 112 and the second switch unit 113 is smaller than a leakage current of the driving unit 111. For the metal oxide thin film transistor, please refer to the above description, which is not repeated herein. It should be understood that the types of the thin film transistors in the driving unit 111, the first switch unit 112, and the second switch unit 113 are not limited to the aforementioned types, and the types of the thin film transistors in the driving unit 111, the first switch unit 112, and the second switch unit 113 may be other types as long as the leakage current of at least one of the thin film transistors in the first switch unit 112 and the second switch unit 113 is smaller than the leakage current of the driving unit 111.
Referring to fig. 9, fig. 9 is a timing diagram of a light emitting unit driven by a light emitting circuit according to another embodiment of the present application. The light emitting circuit 100 has a multi-frame driving time to drive the display panel, and each frame driving time includes an initialization stage (denoted by (r) in the drawing) in which the first switching unit 112 is turned on, the second switching unit 113 is turned off, the third switching unit 114 is turned off, and a reset signal is written to the gate g of the driving unit 111. The initialization stage is described with reference to the foregoing description, and is not repeated herein.
Each frame driving time further includes an information writing and compensating stage (denoted by @inthe drawing) subsequent to and consecutive to the initialization stage, in which the first switching unit 112 is turned off, the second switching unit 113 is turned on, the third switching unit 114 is turned off, and the second switching unit 113 receives a data signal and writes the data signal to the gate g of the driving unit 111. For the information writing and compensation stage, please refer to the foregoing description, and further description is omitted here.
Each frame of driving time further includes a light emitting stage (indicated by (c)) located after and consecutive to the information writing and compensating stage, in which the first switching unit 112 is turned off, the second switching unit 113 is turned off, the third switching unit 114 is turned on, and the driving unit 111 drives the light emitting unit 120 to emit light. The light-emitting stage is described with reference to the foregoing description, and is not repeated herein.
Referring to fig. 10, fig. 10 is a circuit schematic diagram of a light emitting circuit according to another embodiment of the present application. The first switch unit 112 includes a first thin film transistor T5 of N-type, a drain current of the first thin film transistor T5 is smaller than a drain current of the driving unit 111, a gate G of the first thin film transistor T5 is configured to receive an (N-1) -th gate control signal G (N-1), a first electrode s of the first thin film transistor T5 is electrically connected to the gate G of the driving unit 111, and a second electrode d of the first thin film transistor T5 is electrically connected to a third terminal E to receive the reset signal Vint.
In one embodiment, the driving unit 111 is a low temperature polysilicon thin film transistor, and the first thin film transistor T5 is a metal oxide thin film transistor. It is to be understood that the types of the driving unit 111 and the first thin film transistor T5 are not limited thereto as long as the first thin film transistor T5 has a leakage current less than that of the driving unit 111.
In one embodiment, the second switch unit 113 includes a second thin film transistor T1 of N-type and a third thin film transistor T4 of P-type, a leakage current of the second thin film transistor T1 is smaller than a leakage current of the driving unit 111, a gate g of the second thin film transistor T1 is for receiving an nth-level gate control signal g (N), and a first electrode s of the second thin film transistor T1 is for receiving a data signal VDataThe second electrode d of the second thin film transistor T1 is electrically connected to the first electrode s of the third thin film transistor T4, the gate g of the third thin film transistor T4 and the second electrodeThe electrode d is electrically connected to the gate g of the driving unit 111.
It is to be understood that the circuit structures of the first switch unit 112 and the second switch unit 113 may be independent of each other, the circuit structure of the first switch unit 112 is not dependent on the circuit structure of the second switch unit 113, and the structure of the second switch circuit 11 is not dependent on the circuit structure of the first switch unit 112.
Referring to fig. 11, fig. 11 is a circuit schematic diagram of a first switch unit in a light emitting circuit according to an embodiment of the present disclosure. The first switch unit 112 includes at least one first thin film transistor T5, when the first switch unit 112 includes one first thin film transistor T5, the first thin film transistor T5 is N-type or P-type, and the leakage current of the first thin film transistor T5 is less than that of the driving unit 111; when the first switch unit 112 includes two or more first thin film transistors T5, at least one of the first thin film transistors T5 is a metal oxide thin film transistor, and the type of the first thin film transistor T5 is any combination of N-type or P-type. In the illustration of the present embodiment, the first switch unit 112 includes two first thin film transistors T5 connected in series, and one of the first thin film transistors T5 is an N-type thin film transistor, and the other first thin film transistor T5 is a P-type thin film transistor. The leakage current of at least one first thin film transistor T5 of the two first thin film transistors T5 connected in series is less than the leakage current of the driving unit 111.
In this embodiment, the first tft T5 having a smaller leakage current than the driving unit 11 is a metal oxide tft, and the driving unit 111 is a low temperature polysilicon tft. Please refer to the foregoing description for a metal oxide thin film transistor, which is not described herein again. In other embodiments, the type of the first thin film transistor T5 and the type of the driving unit 111 are not limited thereto, and it is only necessary that the leakage current of the first thin film transistor T5 is smaller than the leakage current of the driving unit 111.
Referring to fig. 12, fig. 12 is a circuit schematic diagram of a second switch unit in a light emitting circuit according to an embodiment of the present disclosure. The second switching unit 113 includes one or more second thin film transistors T1, and a third thin film transistor T4. The one or more second thin film transistors T1 are connected in series, the first electrode s of the first stage second thin film transistor T1 receives a data signal, the second electrode d of the last stage second thin film transistor T1 is electrically connected to the first electrode s of the third thin film transistor T4, the leakage current of at least one second thin film transistor T1 of the one or more second thin film transistors T1 is smaller than the leakage current of the driving unit 111, and the type of the second thin film transistor T1 is any combination of N-type or P-type, and the gate g and the second electrode d of the third thin film transistor T4 are both electrically connected to the gate g of the driving unit 111.
In this embodiment, the number of the second thin film transistors T1 is three as an example. The second thin film transistor T1 with a leakage current smaller than that of the driving unit 111 is a metal oxide thin film transistor, and the driving unit 111 is a low temperature polysilicon thin film transistor. It is understood that in other embodiments, the second thin film transistor T1 having a smaller leakage current than the driving unit 111 and the type of the driving unit 111 may be other types.
Referring to fig. 13, fig. 13 is a schematic view of a display panel according to an embodiment of the present disclosure. The display panel 10 comprises the light emitting circuit 100 according to any of the previous embodiments. The light emitting circuit 100 please refer to the foregoing description, which is not repeated herein. The display panel 10 may be, but is not limited to, a flexible display panel.
Further, the display panel 10 includes a plurality of scan lines 300 and a plurality of data lines 500. The plurality of scan lines 300 are disposed at intervals, the plurality of data lines 500 are disposed at intervals, and the plurality of data lines 500 and the plurality of scan lines 300 are disposed in an intersecting and insulating manner. The region where two adjacent scan lines 300 cross two adjacent data lines 500 is defined as a sub-pixel region where the light emitting unit 120 is located. The Data line 500 is used for transmitting Data signals Data (n) and Data (n-1), and the scan line 300 is used for transmitting gate control signals G (n), gate control signals G (n-1), and the like.
In one embodiment, the plurality of scan lines 300 extend along a first direction D1 and are spaced along a second direction D2, wherein the first direction D1 is not equal to the second direction D2, and optionally the first direction D1 is perpendicular to the second direction D2. The plurality of data lines 500 extend along the second direction D2 and are spaced apart along the first direction D1.
Referring to fig. 14, fig. 14 is a schematic view of an electronic device according to an embodiment of the present disclosure. The electronic device 1 may be, but is not limited to, a mobile phone, a tablet computer, a notebook computer, or the like. The electronic device 1 includes a device body 20 and a display panel 10, wherein the device body 20 is used for carrying the display panel 10. Please refer to the foregoing description for the display panel 10, which is not described herein. The electronic device 1 may be, but is not limited to, a flexible electronic device.
In one embodiment, the apparatus body 20 may be, but not limited to, a housing 210, and a circuit board 230 accommodated in an accommodating space formed by the housing 210 and the display panel 10. The housing 210 includes a back plate 211 and a frame 212 connected to a periphery of the back plate 211. The back plate 211 is connected with the frame 212 to form an opening, and the display panel 10 is accommodated in the opening.
Although embodiments of the present application have been shown and described, it is understood that the above embodiments are illustrative and not restrictive, and that those skilled in the art may make changes, modifications, substitutions and alterations to the above embodiments without departing from the scope of the present application, and that such changes and modifications are also to be considered as within the scope of the present application.
Claims (24)
1. The light-emitting circuit is applied to a display panel and is characterized by comprising a driving circuit and a light-emitting unit, wherein the driving circuit is used for driving the light-emitting unit to emit light and comprises a driving unit, a storage capacitor, a first switch unit, a second switch unit and a third switch unitThe driving unit comprises a grid electrode, a first electrode and a second electrode, the grid electrode of the driving unit is electrically connected with the storage capacitor to a first end and used for receiving a first signal, the first electrode of the driving unit is electrically connected with the first end, the second electrode of the driving unit is electrically connected with the third switch unit to the anode of the light-emitting unit, the cathode of the light-emitting unit is electrically connected with a second end and used for receiving a second signal, the first switch unit and the second switch unit are electrically connected with the grid electrode of the driving unit, the first switch unit and the second switch unit respectively comprise a thin film transistor, and the leakage current of at least one thin film transistor in the first switch unit and the second switch unit is less than 10-12A。
2. The light-emitting circuit according to claim 1, wherein at least one of the thin film transistors in the first switching unit and the second switching unit is a metal oxide thin film transistor.
3. The light-emitting circuit according to claim 1, wherein the light-emitting circuit has a multi-frame driving time for driving the display panel, each frame driving time including an initialization stage in which the first switching unit is turned on, the second switching unit is turned off, the third switching unit is turned off, and a reset signal is written to a gate of the driving unit.
4. The light-emitting circuit according to claim 3, wherein each frame driving time further includes an information writing and compensating phase subsequent to and consecutive to the initialization phase, in which the first switching unit is turned off, the second switching unit is turned on, the third switching unit is turned off, and the second switching unit receives a data signal and writes the data signal to the gate of the driving unit.
5. The light-emitting circuit according to claim 4, wherein each frame driving time further includes a light-emitting period subsequent to and consecutive to the information writing and compensating period, in which the first switching unit is turned off, the second switching unit is turned off, the third switching unit is turned on, and the driving unit drives the light-emitting unit to emit light.
6. The light emitting circuit according to claim 2, wherein the first switching unit comprises at least one first thin film transistor, and wherein the at least one first thin film transistor is an N-type metal oxide thin film transistor, a gate of the first thin film transistor is configured to receive an (N-1) th gate control signal, a first electrode of the first thin film transistor is electrically connected to the gate of the driving unit, and a second electrode of the first thin film transistor is electrically connected to the third terminal to receive a reset signal.
7. The light emitting circuit according to claim 2, wherein the second switching unit includes at least one second thin film transistor, and one third thin film transistor, the at least one second thin film transistor is an N-type metal oxide thin film transistor, the at least one second thin film transistor is connected in series, a first electrode of the first-stage second thin film transistor receives a data signal, a second electrode of the last-stage second thin film transistor is electrically connected with a first electrode of the third thin film transistor, a gate of the second thin film transistor is used for receiving an nth stage gate control signal, a first electrode of the second thin film transistor is used for receiving the data signal, the second electrode of the second thin film transistor is electrically connected with the first electrode of the third thin film transistor, and the grid electrode and the second electrode of the third thin film transistor are electrically connected with the grid electrode of the driving unit.
8. The light-emitting circuit according to claim 1, wherein the driving unit includes a P-type low-temperature polycrystalline oxide transistor.
9. The light emitting circuit according to any one of claims 2, 6, and 7, wherein the metal oxide transistor comprises at least one of indium gallium zinc oxide, indium gallium tin oxide, indium tin oxide, a combination of multiple metal oxides, or a multi-layered thin film stack of multiple metal oxides.
10. The light emitting circuit of claim 1, wherein the refresh rate of the light emitting circuit is dynamically changed if the frequency of the control signal is changed while the light emitting circuit continuously outputs the signal to the light emitting cell.
11. The light emitting circuit of claim 10, wherein the refresh rate of the light emitting circuit is between 1Hz and 120 Hz.
12. A light-emitting circuit is applied to a display panel and is characterized by comprising a driving circuit and a light-emitting unit, wherein the driving circuit is used for driving the light-emitting unit to emit light, the driving circuit comprises a driving unit, a storage capacitor, a first switch unit, a second switch unit and a third switch unit, the driving unit comprises a grid electrode, a first electrode and a second electrode, the grid electrode of the driving unit is electrically connected with the storage capacitor to a first end and used for receiving a first signal, the first electrode of the driving unit is electrically connected with the first end, the second electrode of the driving unit is electrically connected with the third switch unit to the positive electrode of the light-emitting unit, the negative electrode of the light-emitting unit is electrically connected with a second end and used for receiving a second signal, and the first switch unit and the second switch unit are electrically connected with the grid electrode of the driving unit, the first switch unit and the second switch unit both comprise thin film transistors, and the leakage current of at least one thin film transistor in the first switch unit and the second switch unit is smaller than the leakage current of the driving unit.
13. The light-emitting circuit according to claim 12, wherein at least one of the thin film transistors in the first switching unit and the second switching unit is a metal oxide thin film transistor.
14. The light-emitting circuit according to claim 12, wherein the light-emitting circuit has a multi-frame driving time for driving the display panel, each frame driving time including an initialization stage in which the first switching unit is turned on, the second switching unit is turned off, the third switching unit is turned off, and a reset signal is written to a gate of the driving unit.
15. The light-emitting circuit according to claim 14, wherein each frame driving time further includes an information writing and compensating stage subsequent to and consecutive to the initialization stage, in which the first switching unit is turned off, the second switching unit is turned on, the third switching unit is turned off, and the second switching unit receives and writes a data signal to the gate of the driving unit.
16. The light-emitting circuit according to claim 15, wherein each frame driving time further includes a light-emitting period subsequent to and consecutive to the information writing and compensating period, in which the first switching unit is turned off, the second switching unit is turned off, the third switching unit is turned on, and the driving unit drives the light-emitting unit to emit light.
17. The light emitting circuit according to claim 13, wherein the first switching unit comprises at least one first thin film transistor, and wherein the at least one first thin film transistor is an N-type metal oxide thin film transistor, a leakage current of the first thin film transistor is smaller than a leakage current of the driving unit, a gate of the first thin film transistor is configured to receive an (N-1) -th gate control signal, a first electrode of the first thin film transistor is electrically connected to the gate of the driving unit, and a second electrode of the first thin film transistor is electrically connected to a third terminal to receive a reset signal.
18. The light emitting circuit according to claim 13, wherein the second switching unit comprises at least one second thin film transistor and a third thin film transistor, the second thin film transistor has a leakage current smaller than that of the driving unit, the at least one second thin film transistor is an N-type metal oxide thin film transistor, the at least one second thin film transistor is connected in series, a first electrode of a first stage of the second thin film transistor receives the data signal, a second electrode of a last stage of the second thin film transistor is electrically connected to a first electrode of the third thin film transistor, a gate of the second thin film transistor receives the nth stage of gate control signal, the first electrode of the second thin film transistor receives the data signal, and the second electrode of the second thin film transistor is electrically connected to a first electrode of the third thin film transistor, and the grid electrode and the second electrode of the third thin film transistor are electrically connected with the grid electrode of the driving unit.
19. The light-emitting circuit according to claim 12, wherein the driving unit includes a P-type low temperature poly-oxide transistor.
20. The light emitting circuit according to any one of claims 13, 17, and 18, wherein the metal oxide transistor comprises at least one of indium gallium zinc oxide, indium gallium tin oxide, indium tin oxide, a combination of multiple metal oxides, or a multi-layered thin film stack of multiple metal oxides.
21. The light emitting circuit of claim 12, wherein the refresh rate of the light emitting circuit is dynamically changed if the frequency of the control signal is changed while the light emitting circuit continuously outputs the signal to the light emitting cell.
22. The light emitting circuit of claim 21, wherein the refresh rate of the light emitting circuit is between 1Hz and 120 Hz.
23. A display panel characterized in that the display panel comprises a light emitting circuit according to any one of claims 1 to 22.
24. An electronic device, comprising a device body and the display panel according to claim 23, wherein the device body is configured to carry the display panel.
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Application publication date: 20210709 |