CN113093618A - Brake controller hardware architecture and control method - Google Patents
Brake controller hardware architecture and control method Download PDFInfo
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- CN113093618A CN113093618A CN202110366431.XA CN202110366431A CN113093618A CN 113093618 A CN113093618 A CN 113093618A CN 202110366431 A CN202110366431 A CN 202110366431A CN 113093618 A CN113093618 A CN 113093618A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/25—Pc structure of the system
- G05B2219/25257—Microcontroller
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02T—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
- Y02T90/00—Enabling technologies or technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02T90/10—Technologies relating to charging of electric vehicles
- Y02T90/16—Information or communication technologies improving the operation of electric vehicles
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- Regulating Braking Force (AREA)
Abstract
The present disclosure provides a brake controller hardware architecture, comprising a control panel, a drive panel and a collection panel, wherein the control panel comprises a main controller and a standby controller; the acquisition board inputs state signals to the main controller and the standby controller, the main controller and the standby controller are in communication connection through in-board communication, and signal output ends of the main controller and the standby controller are electrically connected with a signal input end of the driving board; a control method comprises three conditions; the utility model provides a main control unit, standby controller collaborative work design to increase dissimilar redundancy backup design in main control unit, increased system's reliability.
Description
Technical Field
The disclosure relates to the field of controller structures, and in particular to a brake controller hardware architecture and a control method.
Background
The aircraft brake controller is an important airborne device of the aircraft and is responsible for controlling the landing brake process of the aircraft. According to the wave sound statistics, the taking-off and landing of the airplane only account for 6% of the total flight time, and the catastrophic accidents in the ground movement account for more than 41%, wherein most of the catastrophic accidents are related to a braking system. Therefore, the matched brake controller also has the extremely-required index requirements of high safety, high reliability and the like.
The existing brake controller is usually designed according to function realization and generally comprises a control panel, a drive panel, a collection panel and the like. In order to realize the brake control function, a large amount of data exchange is needed, for example, the data is collected by the collecting board and then transmitted to the control board for operation, and then the signals are transmitted to the drive board for drive output. If the functions on the board are distributed unreasonably, the internal structure of the controller is disordered, and the design size and weight of the controller are increased; the data transmission amount is increased, and the reliability is reduced. In addition, the existing brake controller has a series of problems of incomplete redundancy design, incomplete functions, underutilized DSP resources and the like.
Disclosure of Invention
In order to solve at least one of the above technical problems, the present disclosure provides a brake controller hardware architecture and a control method.
The hardware architecture of the brake controller comprises a control board, a drive board and an acquisition board, wherein the acquisition board acquires data, a signal output end of the acquisition board is electrically connected with a signal input end of the control board, and a signal output end of the control board is electrically connected with a signal input end of the drive board;
the control panel includes:
the main control unit comprises a main left brake control panel, a main right brake control panel, a main BIT/automatic brake/communication plate, an emergency brake plate and a tire pressing plate, wherein the main left brake control panel, the main right brake control panel, the main BIT/automatic brake/communication plate, the emergency brake plate and the tire pressing plate are detachably connected with a main upper back plate, the main upper back plate is electrically connected with a main lower back plate, and the main lower back plate is connected with an aerial plug;
the standby controller comprises a standby left brake control panel, a standby right brake control panel and a standby BIT/automatic brake/communication panel, the standby left brake control panel, the standby right brake control panel and the standby BIT/automatic brake/communication panel are detachably connected with a standby upper back panel, the standby upper back panel is electrically connected with a standby lower back panel, and the standby lower back panel is connected with the aerial plug;
the acquisition board inputs a state signal to the main controller and the standby controller, the main controller is in communication connection with the standby controller through in-board communication, and signal output ends of the main controller and the standby controller are electrically connected with a signal input end of the driving board.
Specifically, the signals collected by the collecting board comprise pedal signals, accumulator signals, wheel speed signals, tire pressure signals, throttle lever signals, wheel load signals, landing gear signals, automatic brake switch signals, output signal recovery, an anti-skid switch and temperature signals;
the input signals of the main controller comprise pedal signals, accumulator signals, wheel speed signals, tire pressure signals, throttle lever signals, wheel load signals, undercarriage signals, automatic brake switch signals, output signals, anti-skid switches and temperature signals;
the input signals of the standby controller comprise wheel speed signals, tire pressure signals, throttle lever signals, wheel load signals, undercarriage signals, automatic brake switch signals and output signals for recovery.
Preferably, main left brake control panel/reserve right brake control panel is DSP + FPGA framework, and input signal includes pedal signal, wheel year signal, the fast signal of wheel, throttle lever signal, pressure signal, temperature signal and output signal back production, and output signal includes control valve signal and trip valve signal.
Preferably, the main BIT/automatic brake/communication board and the spare BIT/automatic brake/communication board are of a DSP + FPGA architecture, input signals comprise undercarriage signals, an automatic brake switch and output signals for extraction, and output signals comprise automatic brake switch excitation and stop brake valve signals.
Preferably, the emergency brake plate is an analog circuit, the input signal comprises an accumulator signal, an antiskid switch signal, a pressure signal and an output signal recovery, and the output signal comprises a control valve signal.
Preferably, the tire pressure plate is an analog circuit, the input signal includes a tire pressure signal and the output signal includes a tire pressure signal and a tire pressure signal, and the output signal includes a TPIC.
A control method of a brake controller is based on the hardware architecture of the brake controller, and the specific method comprises the following steps:
when the main controller has no fault, the main controller and the standby controller work normally, the main controller manages a bus and outputs a control signal, and the standby controller performs hot backup;
when the main controller breaks down, if the standby controller works normally, the standby controller is switched to output a control signal.
Specifically, in a normal braking state, the main controller controls the aircraft to brake after receiving an instruction signal, the main left brake control board/the main right brake control board performs operation processing on an input signal of the acquisition board and outputs a control current to the control board, and the control board controls the servo valve to output a braking pressure;
in the braking process, the main BIT/automatic braking/communication board carries out BIT detection work, the bus communication is guided, and the tire pressure board is used for measuring tire pressure signals.
In a standby braking state, the standby controller controls the aircraft to brake after receiving an instruction signal, the standby left brake control panel/the standby right brake control panel performs operation processing on an input signal of the acquisition panel and outputs a control current to the control panel, and the control panel controls the servo valve to output brake pressure;
and in the braking process, the spare BIT/automatic braking/communication board carries out BIT detection work and leads bus communication.
When main control unit with when standby controller all breaks down, emergent brake block passes through analog circuit output control signal, controls the constant voltage brake is realized to the drive plate.
According to at least one embodiment of the disclosure, a design framework of five main boards and two back boards is provided for a main controller; a design framework of three main boards and two back boards is provided for the standby controller, a cooperative work design of a main controller and the standby controller is provided, a non-similar redundancy backup design is added in the main controller, and the reliability of the system is improved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the disclosure and together with the description serve to explain the principles of the disclosure.
Fig. 1 is a block diagram of a controller of a brake controller hardware architecture according to the present disclosure.
Fig. 2 is a block diagram of the structure of the main left brake control plate/the main right brake control plate/the backup left brake control plate/the backup right brake control plate according to the present disclosure.
Fig. 3 is a block diagram of the main BIT/autobrake/communication board and the spare BIT/autobrake/communication board according to the present disclosure.
Fig. 4 is a block diagram of the emergency brake pedal according to the present disclosure.
FIG. 5 is a block diagram of a tire pressure plate according to the present disclosure.
Fig. 6 is an operation diagram of a control method of a brake controller according to the present disclosure.
Detailed Description
The present disclosure will be described in further detail with reference to the drawings and embodiments. It is to be understood that the specific embodiments described herein are for purposes of illustration only and are not to be construed as limitations of the present disclosure. It should be further noted that, for the convenience of description, only the portions relevant to the present disclosure are shown in the drawings.
It should be noted that the embodiments and features of the embodiments in the present disclosure may be combined with each other without conflict. The present disclosure will be described in detail below with reference to the accompanying drawings in conjunction with embodiments.
The utility model provides a brake controller hardware architecture, includes control panel, drive plate and collection board, gathers the board and gathers data, gathers the signal output part of board and is connected with the signal input part electricity of control panel, and the signal output part of control panel is connected with the signal input part electricity of drive plate.
As shown in fig. 1, the control board includes:
the main controller comprises a main left brake control panel, a main right brake control panel, a main BIT/automatic brake/communication plate, an emergency brake plate and a tire pressure plate, wherein the main left brake control panel, the main right brake control panel, the main BIT/automatic brake/communication plate, the emergency brake plate and the tire pressure plate are detachably connected with a main upper back plate, the main upper back plate is electrically connected with a main lower back plate, and the main lower back plate is connected with an aerial plug;
the standby controller comprises a standby left brake control panel, a standby right brake control panel and a standby BIT/automatic brake/communication panel, the standby left brake control panel, the standby right brake control panel and the standby BIT/automatic brake/communication panel are detachably connected with the standby upper back panel, the standby upper back panel is electrically connected with the standby lower back panel, and the standby lower back panel is connected with the aerial plug;
the main control unit comprises 5 daughter boards and 2 backplates, and 5 daughter boards are named as main left brake control panel, main right brake control panel, main BIT/automatic brake/communication board, emergent brake block and child clamp plate in proper order, correspond left No. 1 board, No. 2 board, No. 3 board, No. 4 board and No. 5 board in figure 1 respectively.
The standby controller is composed of 3 sub-boards and 2 back boards, wherein the 3 sub-boards are named as a standby left brake control board, a standby right brake control board and a standby BIT/automatic brake/communication board in sequence and respectively correspond to the No. 1 board, the No. 2 board and the No. 3 board on the right side in the figure 1.
The structure, function and the like of the two No. 1 plates in the figure 1 are completely the same, but the installation positions are different; the two No. 2 plates have the same structure, function and the like, and are only arranged at different positions; the two No. 3 plates have the same structure, function and the like, and are only arranged at different positions;
the No. 1 board, No. 2 board output control signal control brake process, its input is the all kinds of signals of gathering the board collection, and the drive signal to the drive plate of output brake control valve, drive plate drive brake control valve work, and the control panel still includes the CPU module simultaneously, and it is mainly to carry out the calculation of brake control law, adjusts output signal for the left brake and the right brake of aircraft can effectual collaborative work.
And the 3 # plate realizes the BIT, the automatic braking function and the communication function of the braking system.
The No. 4 plate realizes the emergency brake function through an analog circuit.
The 5 # plate realizes the functions of measuring the tire pressure signals and transmitting the tire pressure signals.
And the number 1 plate, the number 2 plate, the number 3 plate, the number 4 plate and the number 5 plate adopt the modularized design idea, and all functions are realized in a separated mode. All the plates can be detached, interchangeability is strong, and maintenance time and cost are reduced.
The acquisition board inputs state signals to the main controller and the standby controller, the main controller and the standby controller are in communication connection through in-board communication, and signal output ends of the main controller and the standby controller are electrically connected with signal input ends of the drive board.
As shown in fig. 6, the signals collected by the collecting board include pedal signals, accumulator signals, wheel speed signals, tire pressure signals, throttle lever signals, wheel load signals, landing gear signals, automatic brake switch signals, output signal recovery, anti-skid switches and temperature signals;
the input signals of the main controller comprise pedal signals, accumulator signals, wheel speed signals, tire pressure signals, throttle lever signals, wheel load signals, undercarriage signals, automatic brake switch signals, output signals, anti-skid switches and temperature signals;
the input signals of the standby controller comprise wheel speed signals, tire pressure signals, throttle lever signals, wheel load signals, landing gear signals, automatic brake switch signals and output signals for recovery.
As shown in fig. 2, the main left brake control board/main right brake control board/standby left brake control board/standby right brake control board is of a DSP + FPGA architecture, the input signals include pedal signals, wheel-borne signals, wheel speed signals, throttle lever signals, pressure signals, temperature signals and output signals including control valve signals and trip valve signals. A
The FPGA has the main functions of processing data in parallel, accelerating the data acquisition and preprocessing process, transmitting the data to the DSP and accelerating the convolution process. And the DSP performs operation processing after receiving the data transmitted by the FPGA. The DSP is mainly used for carrying out complex calculation, and provides possibility for realizing advanced control rate algorithm. The DSP of the design is implanted with an intelligent control law algorithm, so that the brake control effect is optimized.
As shown in fig. 3, the main BIT/automatic brake/communication board and the spare BIT/automatic brake/communication board are in a DSP + FPGA architecture, input signals include landing gear signals, an automatic brake switch and output signal extraction, and output signals include automatic brake switch excitation and stop brake valve signals.
In order to improve the reliability of the brake control system and reduce the maintenance cost of the brake control system, the system is designed with BIT function. The BIT specific work comprises a power-on test, a function test before takeoff, continuous monitoring in flight, a function test before landing, continuous work in landing, a maintenance function and the like.
As shown in fig. 4, the emergency brake plate is an analog circuit, the input signal includes accumulator signal, anti-skid switch signal, pressure signal and output signal extraction, and the output signal includes control valve signal.
As shown in fig. 5, the tire pressure plate is an analog circuit, the input signal includes a tire pressure signal and the output signal includes a TPIC.
A control method of a brake controller based on the hardware architecture of the brake controller comprises 3 conditions:
(1) when the main controller has no fault, namely is in a normal braking state, the main controller and the standby controller work normally, the main controller manages the bus and outputs control signals, and the standby controller performs hot backup;
the main controller receives the command signal and then controls the airplane to brake, the main left brake control panel/the main right brake control panel carries out operation processing on the input signal of the acquisition panel and outputs control current to the control panel, and the control panel controls the servo valve to output brake pressure;
in the braking process, the main BIT/automatic braking/communication board carries out BIT detection work and controls bus communication, the tire pressure board measures tire pressure signals and transmits the tire pressure signals to other systems, and the work of auxiliary braking and driver judgment are achieved.
(2) When the main controller breaks down, if the standby controller works normally, the standby controller is switched to the standby controller to output control signals, and the standby controller controls the aircraft to brake after receiving instruction signals under the standby brake state, the standby left brake control panel/the standby right brake control panel perform operation processing on input signals of the acquisition panel and output control currents to the control panels, and the control panels control the servo valves to output brake pressure;
and in the braking process, the spare BIT/automatic braking/communication board carries out BIT detection work and leads bus communication.
(3) When the main controller and the standby controller both have faults, namely, the main controller and the standby controller are in an emergency braking state, the system is not switched at the moment, the main controller still outputs control signals, a performance degradation processing scheme is adopted, and the main controller only acquires signals necessary for finishing the braking process of the airplane and does not acquire monitoring quantity and auxiliary judgment quantity. The emergency brake plate outputs a control signal through the analog circuit to control the drive plate to realize constant-pressure braking.
The total open-close principle plans the whole structure of the controller, and provides a design framework of five main boards and two back boards for the main controller; a design framework of three main boards and two back boards is provided for the standby controller, a modular design idea is adopted, and each function is realized in a separated mode. All the plates can be detached, interchangeability is strong, and maintenance time and cost are reduced.
The controller can realize the complete brake function. The method comprises normal braking, automatic braking, emergency braking, stop braking, landing gear stop-up and rotation braking and the like. A special BIT function board is designed to strengthen the self-checking function of the brake system.
The powerful functions of FPGA and DSP hardware are fully utilized. The advantage of using the FPGA + DSP framework is that: all input interfaces are uniformly connected to the FPGA, the signal order is clear, the FPGA can be used for processing data in parallel to accelerate the convolution process, and the efficiency is improved; and the DSP is used for calculating the control rate based on an intelligent algorithm to optimize the brake control.
The main controller and the standby controller work cooperatively, and a dissimilar redundancy backup design is added in the main controller, so that the reliability of the system is improved.
In the description herein, reference to the description of the terms "one embodiment/mode," "some embodiments/modes," "example," "specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment/mode or example is included in at least one embodiment/mode or example of the application. In this specification, the schematic representations of the terms used above are not necessarily intended to be the same embodiment/mode or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments/modes or examples. Furthermore, the various embodiments/aspects or examples and features of the various embodiments/aspects or examples described in this specification can be combined and combined by one skilled in the art without conflicting therewith.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present application, "plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
It will be understood by those skilled in the art that the foregoing embodiments are merely for clarity of illustration of the disclosure and are not intended to limit the scope of the disclosure. Other variations or modifications may occur to those skilled in the art, based on the foregoing disclosure, and are still within the scope of the present disclosure.
Claims (10)
1. The utility model provides a brake controller hardware architecture, includes control panel, drive plate and collection board, gather board data collection, the signal output part of gathering the board with the signal input part electricity of control panel is connected, the signal output part of control panel with the signal input part electricity of drive plate is connected, its characterized in that, the control panel includes:
the main control unit comprises a main left brake control panel, a main right brake control panel, a main BIT/automatic brake/communication plate, an emergency brake plate and a tire pressing plate, wherein the main left brake control panel, the main right brake control panel, the main BIT/automatic brake/communication plate, the emergency brake plate and the tire pressing plate are detachably connected with a main upper back plate, the main upper back plate is electrically connected with a main lower back plate, and the main lower back plate is connected with an aerial plug;
the standby controller comprises a standby left brake control panel, a standby right brake control panel and a standby BIT/automatic brake/communication panel, the standby left brake control panel, the standby right brake control panel and the standby BIT/automatic brake/communication panel are detachably connected with a standby upper back panel, the standby upper back panel is electrically connected with a standby lower back panel, and the standby lower back panel is connected with the aerial plug;
the acquisition board inputs a state signal to the main controller and the standby controller, the main controller is in communication connection with the standby controller through in-board communication, and signal output ends of the main controller and the standby controller are electrically connected with a signal input end of the driving board.
2. A brake controller hardware architecture as claimed in claim 1,
the signals collected by the collecting plate comprise pedal signals, accumulator signals, wheel speed signals, tire pressure signals, throttle lever signals, wheel load signals, undercarriage signals, automatic brake switch signals, output signal recovery, an anti-skid switch and temperature signals;
the input signals of the main controller comprise pedal signals, accumulator signals, wheel speed signals, tire pressure signals, throttle lever signals, wheel load signals, undercarriage signals, automatic brake switch signals, output signals, anti-skid switches and temperature signals;
the input signals of the standby controller comprise wheel speed signals, tire pressure signals, throttle lever signals, wheel load signals, undercarriage signals, automatic brake switch signals and output signals for recovery.
3. The brake controller hardware architecture of claim 2, wherein the main left brake control board/the main right brake control board/the spare left brake control board/the spare right brake control board is a DSP + FPGA architecture, the input signals include a pedal signal, a wheel load signal, a wheel speed signal, a throttle lever signal, a pressure signal, a temperature signal, and an output signal recovery, and the output signal includes a control valve signal and a trip valve signal.
4. The brake controller hardware architecture of claim 2, wherein the main BIT/autobrake/communication board and the spare BIT/autobrake/communication board are DSP + FPGA architectures, the input signals include landing gear signals, autobrake switches, and output signals include autobrake switch activation and shutdown brake valve signals.
5. The brake controller hardware architecture of claim 2, wherein the emergency brake pedal is an analog circuit, the input signal comprises an accumulator signal, an anti-skid switch signal, a pressure signal and an output signal comprising a control valve signal.
6. The brake controller hardware architecture of claim 2, wherein the tire pressure plate is an analog circuit, the input signal comprises a tire pressure signal and the output signal comprises a tire pressure recovery signal, and the output signal comprises a TPIC.
7. A control method of a brake controller, comprising a hardware architecture of a brake controller according to any one of claims 1 to 6, the method comprising:
when the main controller has no fault, the main controller and the standby controller work normally, the main controller manages a bus and outputs a control signal, and the standby controller performs hot backup;
when the main controller breaks down, if the standby controller works normally, the standby controller is switched to output a control signal.
8. The control method of the brake controller according to claim 7, wherein in a normal braking state, the main controller controls the aircraft to brake after receiving a command signal, the main left brake control board/the main right brake control board performs operation processing on the input signal of the acquisition board and outputs a control current to the control board, and the control board controls the servo valve to output a braking pressure;
in the braking process, the main BIT/automatic braking/communication board carries out BIT detection work, the bus communication is guided, and the tire pressure board is used for measuring tire pressure signals.
9. The control method of the brake controller according to claim 7, wherein in a standby braking state, the standby controller controls the aircraft to brake after receiving a command signal, the standby left brake control board/the standby right brake control board performs operation processing on the input signal of the acquisition board and outputs a control current to the control board, and the control board controls the servo valve to output a braking pressure;
and in the braking process, the spare BIT/automatic braking/communication board carries out BIT detection work and leads bus communication.
10. The control method of a brake controller as claimed in claim 7, wherein when both the main controller and the standby controller fail, the emergency brake board outputs a control signal through an analog circuit to control the driving board to implement constant voltage braking.
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| CN113721503A (en) * | 2021-08-16 | 2021-11-30 | 北京超星未来科技有限公司 | Vehicle-mounted computing platform, unmanned system and vehicle |
| CN113799975A (en) * | 2021-08-18 | 2021-12-17 | 西安航空制动科技有限公司 | Aircraft brake controller based on FPGA |
| CN114261382A (en) * | 2022-01-26 | 2022-04-01 | 南京中车浦镇海泰制动设备有限公司 | High-safety brake control unit based on motor drive |
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| CN113093618B (en) | 2022-05-17 |
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