CN113065300B - Method, system and device for backtracking simulation waveform in chip EDA simulation - Google Patents

Method, system and device for backtracking simulation waveform in chip EDA simulation Download PDF

Info

Publication number
CN113065300B
CN113065300B CN202110351659.1A CN202110351659A CN113065300B CN 113065300 B CN113065300 B CN 113065300B CN 202110351659 A CN202110351659 A CN 202110351659A CN 113065300 B CN113065300 B CN 113065300B
Authority
CN
China
Prior art keywords
simulation
waveform
information
case
storage path
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202110351659.1A
Other languages
Chinese (zh)
Other versions
CN113065300A (en
Inventor
袁力
胡扬央
韦虎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mouxin Technology Shanghai Co ltd
Original Assignee
Mouxin Technology Shanghai Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mouxin Technology Shanghai Co ltd filed Critical Mouxin Technology Shanghai Co ltd
Priority to CN202110351659.1A priority Critical patent/CN113065300B/en
Publication of CN113065300A publication Critical patent/CN113065300A/en
Application granted granted Critical
Publication of CN113065300B publication Critical patent/CN113065300B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/32Circuit design at the digital level
    • G06F30/33Design verification, e.g. functional simulation or model checking

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)

Abstract

The invention discloses a method, a system and a device for backtracking simulation waveforms in chip EDA simulation, and relates to the technical field of chip development. The method comprises the steps of: acquiring information of completion of operation of a simulation case, recording simulation waveform basic information of the simulation case through a backtracking system, and mapping and storing the simulation waveform basic information corresponding to the name and/or number of the simulation case; collecting simulation waveform searching instructions triggered by a user aiming at a backtracking system; acquiring waveform storage path information of a corresponding simulation case in the backtracking system according to the simulation waveform searching instruction; and outputting the waveform storage path information through a display screen and/or storing the waveform storage path information into a result file of a specified path for viewing by a user. The invention improves the efficiency of checking and searching the simulation waveform file of the simulation case by the verification personnel on the basis of not influencing the simulation speed, and has simple and convenient operation.

Description

Method, system and device for backtracking simulation waveform in chip EDA simulation
Technical Field
The invention relates to the technical field of chip development, in particular to a method, a system and a device for backtracking simulation waveforms in chip EDA simulation.
Background
In the chip design field, verification (Verification) works through the whole design flow, from behavior-level HDL design to chip streaming, a large number of EDA (Eletronic Design Automation, electronic design automation) Verification is required. With the increase of the design chip scale, the verification work of the chip is more and more important. Wherein a test case (case test) is a series of codes written to verify the function or performance of a test item. When EDA simulation is performed through the test cases, simulation results are usually stored in the form of FSDB (Fast Signal Data Base) waveforms, and bug (error) is located and corrected later through a waveform debug tool such as Verdi.
During the debug of a chip, it is often necessary for a verifier to provide an FSDB waveform under some sort of simulation test scenario for reference when a debugger configures chip parameters. If the simulation test scene is the same or similar scene which is simulated before the verifier, the verifier can directly search the FSDB waveform file obtained by the previous simulation to provide the debugger with the FSDB waveform file. However, since the number of FSDB waveforms simulated is often large, it may be difficult for a verifier to find a desired target FSDB waveform in a short time, so that the verifier can only re-simulate the test cases simulated before, which causes serious waste of hard disk resources and time costs of the server.
Disclosure of Invention
The invention aims at: the method, the system and the device for backtracking simulation waveforms in chip EDA simulation are provided for overcoming the defects of the prior art. According to the invention, the trace back system is arranged to record the basic information of the simulation waveform after the simulation case is finished, the waveform storage path information of the corresponding simulation case can be searched from the trace back system according to the simulation waveform searching instruction triggered by the user, and then the waveform storage path information is output through the display screen or stored into the result file of the appointed path for the user to check.
In order to achieve the above object, the present invention provides the following technical solutions:
a method for backtracking simulation waveforms in chip EDA simulation comprises the following steps:
acquiring information of completion of operation of a simulation case, recording simulation waveform basic information of the simulation case through a backtracking system, wherein the simulation waveform basic information at least comprises waveform storage path information and simulation running time information of the simulation case, and mapping and storing the simulation waveform basic information corresponding to the name and/or number of the simulation case;
collecting simulation waveform searching instructions triggered by a user aiming at the backtracking system;
acquiring waveform storage path information of a corresponding simulation case in the backtracking system according to the simulation waveform searching instruction;
outputting the waveform storage path information through a display screen and/or storing the waveform storage path information into a result file of a specified path.
Further, the waveform is an FSDB waveform; and acquiring triggering operation of a user on one or more waveform storage paths in the waveform storage path information, and outputting corresponding one or more FSDB waveforms through a display screen.
Further, the step of obtaining waveform storage path information of the corresponding simulation case in the trace-back system according to the simulation waveform searching instruction comprises,
judging whether the simulation waveform searching instruction contains a simulation case name or a simulation case number or simulation running time information;
judging to contain a simulation case name, searching in a backtracking system based on the simulation case name, and acquiring waveform storage path information of a simulation case corresponding to the simulation case name;
judging to contain a simulation case number, searching in a backtracking system based on the simulation case number, and acquiring waveform storage path information of a simulation case corresponding to the simulation case number;
judging that the simulation run time information is contained, searching in a backtracking system based on the simulation run time, and acquiring waveform storage path information of a simulation case corresponding to the simulation run time;
and when judging that the simulation case name information, the simulation case number information and the simulation running time information are not included, acquiring waveform storage path information of all simulation cases in the backtracking system.
Further, according to the field information of the data structure set by the user, constructing a data structure corresponding to the simulation waveform basic file in the backtracking system; the data structure at least comprises 3 fields, which are respectively used for storing simulation case name and/or number information of a simulation case, waveform storage path information of the simulation case and simulation running time information;
for any simulation case, the name and/or number of the simulation case and the basic information of the simulation waveform are acquired and then stored under the corresponding field in the data structure to realize the mapping storage.
Further, the data structure further includes a 4 th field for storing test scenario information to which the simulation case belongs; at this time, the step of acquiring the waveform storage path information of the corresponding simulation case in the trace-back system according to the simulation waveform searching instruction includes,
judging whether the simulation waveform searching instruction contains testing scene information or not;
judging to contain test scene information, searching in a backtracking system based on the test scene information, and acquiring waveform storage path information of all simulation cases corresponding to the test scene information.
Further, the simulation running time information is simulation ending time, current time stamp information is obtained when the operation of the simulation case is completed, and the time stamp information is used as the simulation ending time information.
Further, the step of obtaining information of completion of the execution of the simulation case includes,
monitoring all simulation cases for EDA simulation, and when the operation of the simulation cases is completed, identifying the simulation cases based on preset completion keywords;
the backtracking system detects the identification information of the simulation case, when the identification information has the completion key words, the simulation case is judged to be completed in operation, otherwise, the simulation case is judged to be not completed in operation.
Further, the simulation waveform searching instruction is that a user inputs a wave_fsdb-check operation command through a user operation interface or the user selects a wave_fsdb-check operation option output in the user operation interface.
The invention also provides a backtracking system of the simulation waveform in the chip EDA simulation, which comprises the following structures:
the case operation recording module is used for recording simulation waveform basic information of the simulation case when the operation of the simulation case is completed, wherein the simulation waveform basic information at least comprises waveform storage path information and simulation running time information of the simulation case; mapping and storing the simulation waveform basic information corresponding to the name and/or number of the simulation case;
the backtracking triggering module is used for acquiring a simulation waveform searching instruction triggered by a user;
the backtracking processing module is used for acquiring waveform storage path information of a corresponding simulation case according to the simulation waveform searching instruction; and outputting the waveform storage path information through a display screen and/or storing the waveform storage path information into a result file of the specified path.
The invention also provides a chip EDA simulation device, which comprises:
the test system is used for performing simulation test through the simulation case of the circuit operation to be tested, generating simulation waveform data and storing the simulation waveform data into a designated storage path;
the backtracking system is used for recording simulation waveform basic information of the simulation case when the operation of the simulation case is completed, wherein the simulation waveform basic information at least comprises waveform storage path information and simulation running time information of the simulation case, and the simulation waveform basic information is mapped and stored corresponding to the name and/or number of the simulation case; acquiring a simulation waveform searching instruction triggered by a user, and acquiring waveform storage path information of a corresponding simulation case in the backtracking system according to the simulation waveform searching instruction; outputting waveform storage path information through a display screen and/or storing the waveform storage path information into a result file of a specified path.
Compared with the prior art, the invention has the following advantages and positive effects by taking the technical scheme as an example: through the backtracking system, the relevant simulation waveform basic information can be automatically recorded after the verifier completes the simulation of the simulation case, and when the chip debugger needs to backtrack the EDA simulation waveform, the verifier can quickly position the required simulation waveform through the backtracking system, so that the reference waveform is obtained. The backtracking system only records the basic information such as the waveform storage path, the simulation running time, the simulation case name and the like of the simulation case, and basically does not increase the cost on the simulation IO (Input/Output) port, so that the efficiency of checking and searching the simulation waveform file of the simulation case by a verifier is improved on the basis of not influencing the simulation speed, and the operation is simple and convenient. The invention avoids the tedious operation that a verifier manually checks the simulation logs one by one to find the simulation waveforms, and also avoids the waste of hard disk resources and time cost caused by re-simulating the test cases.
Further, the data structure corresponding to the simulation waveform basic file can further include a test scene field for storing test scene information to which the simulation case belongs, so that a user can search waveform storage path information of all the corresponding simulation cases in the backtracking system according to the test scene information, and the user can search a simulated FSDB waveform according to the test scene provided by a debugger conveniently.
Drawings
Fig. 1 is a flowchart of a method for tracing back a simulation waveform in chip EDA simulation according to an embodiment of the present invention.
Fig. 2 is a diagram illustrating an exemplary data format of a simulation waveform basic file according to an embodiment of the present invention.
Fig. 3 is an information transmission schematic diagram of waveform searching performed by the backtracking system according to the embodiment of the present invention.
Fig. 4 is a schematic block diagram of a backtracking system according to an embodiment of the present invention.
Fig. 5 is a schematic structural diagram of an EDA simulation device according to an embodiment of the present invention.
Reference numerals illustrate:
a backtracking system 100; the case operation record module 110, the backtracking trigger module 120 and the backtracking processing module 130;
an EDA simulation apparatus 200, a test system 210, and a backtracking system 220.
Detailed Description
The method, system and apparatus for backtracking simulation waveforms in chip EDA simulation disclosed in the present invention are described in further detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the technical features or combinations of technical features described in the following embodiments should not be regarded as being isolated, and they may be combined with each other to achieve a better technical effect. In the drawings of the embodiments described below, like reference numerals appearing in the various drawings represent like features or components and are applicable to the various embodiments. Thus, once an item is defined in one drawing, no further discussion thereof is required in subsequent drawings.
It should be noted that the structures, proportions, sizes, etc. shown in the drawings are merely used in conjunction with the disclosure of the present specification, and are not intended to limit the applicable scope of the present invention, but rather to limit the scope of the present invention. The scope of the preferred embodiments of the present invention includes additional implementations in which functions may be performed out of the order described or discussed, including in a substantially simultaneous manner or in an order that is reverse, depending on the function involved, as would be understood by those of skill in the art to which embodiments of the present invention pertain.
Techniques, methods, and apparatus known to one of ordinary skill in the relevant art may not be discussed in detail, but should be considered part of the specification where appropriate. In all examples shown and discussed herein, any specific values should be construed as merely illustrative, and not a limitation. Thus, other examples of the exemplary embodiments may have different values.
Examples
Referring to fig. 1, a method for backtracking simulation waveforms in chip EDA simulation is provided. The method comprises the following steps:
s100, obtaining information of completion of operation of a simulation case, recording simulation waveform basic information of the simulation case through a backtracking system, wherein the simulation waveform basic information at least comprises waveform storage path information and simulation running time information of the simulation case, and mapping and storing the simulation waveform basic information corresponding to the name and/or number of the simulation case.
First, according to a design under test (DUT, design Under Testbench), such as a chip to be verified, a verifier configures a simulation environment (or verification environment), and copies or links files required in the execution of a simulation case (case, or test case) to a simulation catalog of the simulation case. Then, the EDA simulation tool is called and proper parameters are configured to perform simulation operation, so that a simulation case is operated. And when the operation of the simulation case is completed, ending the simulation verification to obtain a simulation result. The simulation results are typically saved in the form of FSDB waveforms.
When the information of the completion of the operation of the simulation case is obtained, the backtracking system can be triggered to record the simulation waveform basic information of the simulation case, wherein the simulation waveform basic information at least comprises waveform storage path information and simulation running time information of the simulation case. Specifically, for example, when the operation of the simulation case is completed, a simulation waveform recording instruction is sent to the backtracking system, and after the backtracking system receives the simulation waveform recording instruction, the backtracking system triggers the recording operation of the simulation waveform basic information of the simulation case.
The backtracking system can also map and store the basic information of the simulation waveform corresponding to the name and/or number of the simulation case. The mapping storage means that the names and/or numbers of the simulation cases and the simulation waveform basic information are stored in a one-to-one correspondence manner, so that the simulation waveform basic information of the simulation cases can be obtained according to the names and/or numbers of the simulation cases, and the names and/or numbers of the simulation cases can be obtained according to the simulation waveform basic information of the simulation cases.
In this embodiment, preferably, before step S100, the method may further include the following steps: collecting a data structure corresponding to a simulation waveform basic file set by a user; constructing a data structure corresponding to the simulation waveform basic file in the backtracking system according to the data structure field information set by the user; the data structure defines at least 3 fields, namely a waveform name, a waveform path (address) and time, and is used for storing simulation case name and/or number information of a simulation case, waveform storage path information of the simulation case and simulation running time information respectively.
Preferably, field 1 is a waveform name, which is unique (different simulated waveforms have different waveform names), and may be composed of letters and/or numbers; the 2 nd field is a waveform path (address) for describing a storage path address of the simulation waveform, expressed by a symbol/+ letter; the 3 rd field is time, which is used to display the simulation run time of the simulation case, typically expressed in years/months/days. Of course, more specific times such as hours, minutes, seconds, etc. may also be displayed as desired, without limitation.
Preferably, the simulation running time information is simulation ending time, current time stamp information is obtained when the operation of the simulation case is completed, and the time stamp information is used as the simulation ending time information.
By way of example of a typical approach, the user-set data structure may be as follows:
Struct Waveform_str
{
Char *fsdb_name
Char *fsdb_dir
Char *time
}
when a simulation case (case) is run, the backtracking system records the simulation Waveform basic information of the simulation case through the data structure wave_str, wherein the simulation Waveform basic information of the simulation case comprises: the simulation case name, the waveform storage path of the simulation case, and the simulation end time. The data format of the simulation waveform basic file formed based on the foregoing data structure is shown in fig. 2. In fig. 2, column 1 records a simulation case name, for example, "ddr_bist", corresponding waveform storage path information is recorded in column 2 of the same row, and is "/proj/a/work_view/sim_work/ddr_best_test/ddr_best.
Thus, in step S100, for any simulation case, the name and/or number of the simulation case and the basic information of the simulation waveform (including the waveform storage path and the simulation end time of the simulation case) are acquired, and then stored under the corresponding field in the data structure to implement mapping storage.
In this embodiment, preferably, the specific steps for obtaining the information about the completion of the operation of the simulation case may be as follows: monitoring all simulation cases for EDA simulation, and when the operation of the simulation cases is completed, identifying the simulation cases based on preset completion keywords; the backtracking system detects the identification information of the simulation case, when the identification information has the completion key words, the simulation case is judged to be completed in operation, otherwise, the simulation case is judged to be not completed in operation.
The completion key may be set by the user or the system. By way of example and not limitation, such as the character "PASS".
By using the technical scheme, when the running of one simulation case (case) is completed, a PASS mark is marked on the simulation case as a simulation completion mark. Then, the identification information of the simulation case is automatically detected through a backtracking system, when the identification information has the 'PASS' completion keyword, the simulation case is judged to be completed in operation, and the simulation Waveform basic information of the simulation case is recorded through the data structure wave_str.
By way of example and not limitation, the trace-back system may trigger the automatic detection of the identification information of the simulation case in the simulation environment every time a predetermined time step passes, based on a predetermined time step. The time step may be user or system configurable.
And acquiring a simulation waveform searching instruction triggered by a user aiming at the backtracking system.
When the verifier needs to use the backtracking system to search the simulation waveform, the simulation waveform searching instruction can be triggered. Preferably, the simulation waveform searching instruction is that a user inputs a wave_fsdb-check operation command through a user operation interface or the user selects a wave_fsdb-check operation option output in the user operation interface.
By way of example and not limitation, referring to FIG. 3, for example, when a user needs to use the backtracking system to perform a simulated waveform lookup, an operation command "wave_fsdb-check" may be input as a simulated waveform lookup instruction through an associated Linux terminal (Linux) window.
And acquiring waveform storage path information of a corresponding simulation case in the backtracking system according to the simulation waveform searching instruction.
In this embodiment, preferably, the step of acquiring the waveform storage path information of the corresponding simulation case in the traceback system according to the above-mentioned simulation waveform searching instruction may be as follows:
judging whether the simulation waveform searching instruction contains a simulation case name or a simulation case number or simulation running time information;
judging to contain a simulation case name, searching in a backtracking system based on the simulation case name, and acquiring waveform storage path information of a simulation case corresponding to the simulation case name;
judging to contain a simulation case number, searching in a backtracking system based on the simulation case number, and acquiring waveform storage path information of a simulation case corresponding to the simulation case number;
judging that the simulation run time information is contained, searching in a backtracking system based on the simulation run time, and acquiring waveform storage path information of a simulation case corresponding to the simulation run time;
and when judging that the simulation case name information, the simulation case number information and the simulation running time information are not included, acquiring waveform storage path information of all simulation cases in the backtracking system.
And outputting the waveform storage path information through a display screen and/or storing the waveform storage path information into a result file of a specified path for viewing by a user.
Alternatively, for the output waveform storage path, the user may select a particular simulated waveform that he wishes to view by triggering an operation. Specifically, triggering operation of a user on one or more waveform storage paths in the waveform storage path information is collected, and one or more corresponding simulation waveforms are output through a display screen. The simulation waveform is, for example, an FSDB waveform.
By way of example and not limitation, if a user selects a certain waveform storage path in the trigger waveform storage path information through a mouse, the FSDB waveform corresponding to the waveform storage path is output. Of course, the selected trigger may be a voice trigger, or may be other action triggers, which are not limited herein.
In another implementation manner of this embodiment, the set data structure may further define a 4 th field, i.e. a test scenario field, where the test scenario field may be used to store test scenario information to which the simulation case belongs. A test scenario is similar to a test item (or simulation item) and may correspond to one or more simulation cases (cases).
At this time, the step of acquiring the waveform storage path information of the corresponding simulation case in the trace-back system according to the simulation waveform searching instruction includes: judging whether the simulation waveform searching instruction contains testing scene information or not; judging to contain test scene information, searching in a backtracking system based on the test scene information, and acquiring waveform storage path information of all simulation cases corresponding to the test scene information.
Therefore, the user can search waveform storage path information of all corresponding simulation cases in the backtracking system according to the test scene information, and is convenient for searching all simulated FSDB waveforms related to the test scene according to the test scene provided by the debugging personnel.
According to the technical scheme, the PASS mark is carried out after one simulation case is run, the trace-back system can automatically trigger the recording of the simulation Waveform basic information of the simulation case when detecting the PASS mark, and the simulation Waveform basic information is recorded through the set data structure wave_str. When the backtracking system is required to be used for searching waveforms, a user only needs to input a wave_fsdb-check operation command on the associated Linux terminal, and then can output waveform storage path information of all simulation waveform information through a display screen, or store the waveform storage path information into a result file' fsdb.
Referring to fig. 4, a trace-back system of simulation waveforms in chip EDA simulation is provided according to another embodiment of the present invention.
The backtracking system 100 includes a case run record module 110, a backtracking trigger module 120, and a backtracking process module 130.
The case operation recording module 110 is configured to record, when the operation of the simulation case is completed, simulation waveform basic information of the simulation case, where the simulation waveform basic information includes at least waveform storage path information and simulation runtime information of the simulation case; and mapping and storing the simulation waveform basic information corresponding to the name and/or number of the simulation case.
The backtracking trigger module 120 is configured to collect a simulated waveform search instruction triggered by a user.
The backtracking processing module 130 is configured to obtain waveform storage path information of a corresponding simulation case according to the simulation waveform searching instruction; and outputting the waveform storage path information through a display screen and/or storing the waveform storage path information into a result file of the specified path for viewing by a user.
In this embodiment, the backtracking processing module 130 is further configured to: judging whether the simulation waveform searching instruction contains a simulation case name or a simulation case number or simulation running time information; judging to contain a simulation case name, searching in a backtracking system based on the simulation case name, and acquiring waveform storage path information of a simulation case corresponding to the simulation case name; judging to contain a simulation case number, searching in a backtracking system based on the simulation case number, and acquiring waveform storage path information of a simulation case corresponding to the simulation case number; judging that the simulation run time information is contained, searching in a backtracking system based on the simulation run time, and acquiring waveform storage path information of a simulation case corresponding to the simulation run time; and when judging that the simulation case name information, the simulation case number information and the simulation running time information are not included, acquiring waveform storage path information of all simulation cases in the backtracking system.
The backtracking processing module 130 may be further configured to: and acquiring triggering operation of a user on one or more waveform storage paths in the waveform storage path information, and outputting corresponding one or more simulation waveforms through a display screen.
In this embodiment, the backtracking system 100 may further include a data structure configuration module configured to: and acquiring a data structure corresponding to the simulation waveform basic file set by a user, and constructing the data structure corresponding to the simulation waveform basic file in the backtracking system according to the field information of the data structure set by the user. The data structure at least comprises 3 fields, which are respectively used for storing simulation case name and/or number information of the simulation case, waveform storage path information of the simulation case and simulation running time information.
At this time, the mapping storage unit of the case run record module 110 is configured to: for any simulation case, the name and/or number of the simulation case and the basic information of the simulation waveform are acquired and then stored under the corresponding field in the data structure to realize mapping storage.
Preferably, the data structure further includes a 4 th field test scenario field for storing test scenario information to which the simulation case belongs. At this time, the backtracking processing module 130 may be further configured to: judging whether the simulation waveform searching instruction contains testing scene information or not; judging to contain test scene information, searching in a backtracking system based on the test scene information, and acquiring waveform storage path information of all simulation cases corresponding to the test scene information.
Other technical features are referred to the previous embodiments and will not be described here again.
Referring to FIG. 5, another embodiment of the present invention provides an EDA simulation apparatus.
The EDA simulation apparatus 200 includes a testing system 210 and a backtracking system 220.
The test system 210 is configured to perform a simulation test by using the circuit operation simulation case under test, generate simulation waveform data, and store the generated simulation waveform data in a designated storage path.
In particular, the test system 210 may include a simulation circuit module and a simulation waveform storage module. The simulation circuit module is used for receiving the test excitation information of the simulation case to carry out simulation test. The simulation waveform storage module is used for storing simulation waveform data obtained after the simulation circuit unit performs simulation test.
The backtracking system 220 is configured to record, when the operation of the simulation case is completed, simulation waveform basic information of the simulation case, where the simulation waveform basic information includes at least waveform storage path information and simulation run time information of the simulation case, and map and store the simulation waveform basic information corresponding to a name and/or a number of the simulation case; acquiring a simulation waveform searching instruction triggered by a user, and acquiring waveform storage path information of a corresponding simulation case in the backtracking system according to the simulation waveform searching instruction; outputting waveform storage path information through a display screen and/or storing the waveform storage path information into a result file of a specified path for viewing by a user.
Specifically, the backtracking system 220 may include a case-run record module, a backtracking trigger module, and a backtracking processing module.
The case operation recording module is used for recording simulation waveform basic information of the simulation case when the operation of the simulation case is completed, and the simulation waveform basic information at least comprises waveform storage path information and simulation operation time information of the simulation case; and mapping and storing the simulation waveform basic information corresponding to the name and/or number of the simulation case.
The backtracking triggering module is used for collecting simulation waveform searching instructions triggered by a user.
The backtracking processing module is used for acquiring waveform storage path information of a corresponding simulation case according to the simulation waveform searching instruction; and outputting the waveform storage path information through a display screen and/or storing the waveform storage path information into a result file of the specified path for viewing by a user.
Other technical features are referred to the previous embodiments and will not be described here again.
In the above description, the disclosure of the present invention is not intended to limit itself to these aspects. Rather, the components may be selectively and operatively combined in any number within the scope of the present disclosure. In addition, terms like "comprising," "including," and "having" should be construed by default as inclusive or open-ended, rather than exclusive or closed-ended, unless expressly defined to the contrary. All technical, scientific, or other terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Common terms found in dictionaries should not be too idealized or too unrealistically interpreted in the context of the relevant technical document unless the present disclosure explicitly defines them as such. Any alterations and modifications of the present invention, which are made by those of ordinary skill in the art based on the above disclosure, are intended to be within the scope of the appended claims.

Claims (9)

1. A method for backtracking simulation waveforms in chip EDA simulation is characterized by comprising the following steps:
acquiring information of completion of operation of a simulation case, recording simulation waveform basic information of the simulation case through a backtracking system, wherein the simulation waveform basic information at least comprises waveform storage path information and simulation running time information of the simulation case, and mapping and storing the simulation waveform basic information corresponding to the name and/or number of the simulation case;
collecting simulation waveform searching instructions triggered by a user aiming at the backtracking system;
acquiring waveform storage path information of a corresponding simulation case in the backtracking system according to the simulation waveform searching instruction;
outputting the waveform storage path information through a display screen and/or storing the waveform storage path information into a result file of a specified path;
the step of obtaining the information of the completion of the operation of the simulation case comprises the following steps: monitoring all simulation cases for EDA simulation, and when the operation of the simulation cases is completed, identifying the simulation cases based on preset completion keywords; the backtracking system detects the identification information of the simulation case, when the identification information has the completion key words, the simulation case is judged to be completed in operation, otherwise, the simulation case is judged to be not completed in operation.
2. The method according to claim 1, characterized in that: the waveform is an FSDB waveform; and acquiring triggering operation of a user on one or more waveform storage paths in the waveform storage path information, and outputting corresponding one or more FSDB waveforms through a display screen.
3. The method according to claim 1, characterized in that: the step of obtaining waveform storage path information of the corresponding simulation case in the backtracking system according to the simulation waveform searching instruction comprises,
judging whether the simulation waveform searching instruction contains a simulation case name or a simulation case number or simulation running time information;
judging to contain a simulation case name, searching in a backtracking system based on the simulation case name, and acquiring waveform storage path information of a simulation case corresponding to the simulation case name;
judging to contain a simulation case number, searching in a backtracking system based on the simulation case number, and acquiring waveform storage path information of a simulation case corresponding to the simulation case number;
judging that the simulation run time information is contained, searching in a backtracking system based on the simulation run time, and acquiring waveform storage path information of a simulation case corresponding to the simulation run time;
and when judging that the simulation case name information, the simulation case number information and the simulation running time information are not included, acquiring waveform storage path information of all simulation cases in the backtracking system.
4. The method of claim 1, further comprising the step of: constructing a data structure corresponding to the simulation waveform basic file in the backtracking system according to the data structure field information set by the user; the data structure at least comprises 3 fields, which are respectively used for storing simulation case name and/or number information of a simulation case, waveform storage path information of the simulation case and simulation running time information;
for any simulation case, the name and/or number of the simulation case and the basic information of the simulation waveform are acquired and then stored under the corresponding field in the data structure to realize the mapping storage.
5. The method according to claim 4, wherein: the data structure also comprises a 4 th field for storing test scene information to which the simulation case belongs; at this time, the step of acquiring the waveform storage path information of the corresponding simulation case in the trace-back system according to the simulation waveform searching instruction includes,
judging whether the simulation waveform searching instruction contains testing scene information or not;
judging to contain test scene information, searching in a backtracking system based on the test scene information, and acquiring waveform storage path information of all simulation cases corresponding to the test scene information.
6. The method according to any one of claims 1-5, wherein: the simulation running time information is simulation ending time, current time stamp information is obtained when the simulation case is run, and the time stamp information is used as the simulation ending time information.
7. The method according to any one of claims 1-5, wherein: the simulation waveform searching instruction is that a user inputs a wave_fsdb-check operation command through a user operation interface or the user selects a wave_fsdb-check operation option output in the user operation interface.
8. A trace-back system of simulation waveforms in chip EDA simulation, comprising:
the case operation recording module is used for recording simulation waveform basic information of the simulation case when the operation of the simulation case is completed, wherein the simulation waveform basic information at least comprises waveform storage path information and simulation running time information of the simulation case; mapping and storing the simulation waveform basic information corresponding to the name and/or number of the simulation case; the step of obtaining the information of the completion of the operation of the simulation case comprises the following steps: monitoring all simulation cases for EDA simulation, and when the operation of the simulation cases is completed, identifying the simulation cases based on preset completion keywords; the backtracking system detects the identification information of the simulation case, when the identification information has the completion key words, the simulation case is judged to be completed in operation, otherwise, the simulation case is judged to be not completed in operation; the backtracking triggering module is used for acquiring a simulation waveform searching instruction triggered by a user;
the backtracking processing module is used for acquiring waveform storage path information of a corresponding simulation case according to the simulation waveform searching instruction; and outputting the waveform storage path information through a display screen and/or storing the waveform storage path information into a result file of the specified path.
9. An EDA chip simulation device comprising:
the test system is used for performing simulation test through the simulation case of the circuit operation to be tested, generating simulation waveform data and storing the simulation waveform data into a designated storage path;
the backtracking system is used for recording simulation waveform basic information of the simulation case when the operation of the simulation case is completed, wherein the simulation waveform basic information at least comprises waveform storage path information and simulation running time information of the simulation case, and the simulation waveform basic information is mapped and stored corresponding to the name and/or number of the simulation case; acquiring a simulation waveform searching instruction triggered by a user, and acquiring waveform storage path information of a corresponding simulation case in the backtracking system according to the simulation waveform searching instruction; outputting waveform storage path information through a display screen and/or storing the waveform storage path information into a result file of a specified path;
the step of obtaining the information of the completion of the operation of the simulation case comprises the following steps: monitoring all simulation cases for EDA simulation, and when the operation of the simulation cases is completed, identifying the simulation cases based on preset completion keywords; the backtracking system detects the identification information of the simulation case, when the identification information has the completion key words, the simulation case is judged to be completed in operation, otherwise, the simulation case is judged to be not completed in operation.
CN202110351659.1A 2021-03-31 2021-03-31 Method, system and device for backtracking simulation waveform in chip EDA simulation Active CN113065300B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110351659.1A CN113065300B (en) 2021-03-31 2021-03-31 Method, system and device for backtracking simulation waveform in chip EDA simulation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110351659.1A CN113065300B (en) 2021-03-31 2021-03-31 Method, system and device for backtracking simulation waveform in chip EDA simulation

Publications (2)

Publication Number Publication Date
CN113065300A CN113065300A (en) 2021-07-02
CN113065300B true CN113065300B (en) 2024-01-05

Family

ID=76564960

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110351659.1A Active CN113065300B (en) 2021-03-31 2021-03-31 Method, system and device for backtracking simulation waveform in chip EDA simulation

Country Status (1)

Country Link
CN (1) CN113065300B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113591422B (en) * 2021-08-03 2024-01-30 眸芯科技(上海)有限公司 System for generating test case flow information in chip verification and application
CN114662427B (en) * 2022-03-08 2023-07-18 芯华章科技股份有限公司 Debugging method and device for logic system design
CN115062569B (en) * 2022-08-17 2022-12-02 深圳市华杰智通科技有限公司 Parallel acceleration system and method for millimeter wave chip design simulation EDA (electronic design automation)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108446493A (en) * 2018-03-20 2018-08-24 北京润科通用技术有限公司 A kind of power of motor grade emulation mode and device
CN111832236A (en) * 2020-06-29 2020-10-27 山东云海国创云计算装备产业创新中心有限公司 Chip regression testing method and system, electronic equipment and storage medium
CN112100952A (en) * 2020-09-14 2020-12-18 海光信息技术股份有限公司 Post-simulation method and device for integrated circuit, electronic equipment and storage medium
CN112346918A (en) * 2020-10-26 2021-02-09 眸芯科技(上海)有限公司 Method and application for assisting waveform debug in chip verification
US10936776B1 (en) * 2020-03-30 2021-03-02 Cadence Design Systems, Inc. Analyzing waveform data generated for simulated circuit design

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7246333B2 (en) * 2005-10-11 2007-07-17 Hewlett-Packard Development Company, L.P. Apparatus and method for unified debug for simulation

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108446493A (en) * 2018-03-20 2018-08-24 北京润科通用技术有限公司 A kind of power of motor grade emulation mode and device
US10936776B1 (en) * 2020-03-30 2021-03-02 Cadence Design Systems, Inc. Analyzing waveform data generated for simulated circuit design
CN111832236A (en) * 2020-06-29 2020-10-27 山东云海国创云计算装备产业创新中心有限公司 Chip regression testing method and system, electronic equipment and storage medium
CN112100952A (en) * 2020-09-14 2020-12-18 海光信息技术股份有限公司 Post-simulation method and device for integrated circuit, electronic equipment and storage medium
CN112346918A (en) * 2020-10-26 2021-02-09 眸芯科技(上海)有限公司 Method and application for assisting waveform debug in chip verification

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
Despreading chip waveform design for coherent delay-locked tracking in DS/SS systems;Xiaofu Wu等;《IEEE》;631-635 *
EDA数字仿真波形信息文本化的智能化处理;杜涛, 湛军, 李平;微电子学(第04期);386-389 *
基于EDA设计的调试大纲及波形生成技术;丁明清等;《计算机工程与应用》;112-114 *
波形匹配技术在测试性仿真验证中的应用;宋丽蔚;李刚;赵威威;张晔;;计算机测量与控制(第01期);60-62+128 *

Also Published As

Publication number Publication date
CN113065300A (en) 2021-07-02

Similar Documents

Publication Publication Date Title
CN113065300B (en) Method, system and device for backtracking simulation waveform in chip EDA simulation
CN110442511B (en) Visual embedded point testing method and device
US8555234B2 (en) Verification of soft error resilience
US10162742B2 (en) System and method for end to end performance response time measurement based on graphic recognition
CN109271315B (en) Script code detection method, script code detection device, computer equipment and storage medium
CN110377566B (en) Method and system for sorting S parameter test files of PCB
CN112346918A (en) Method and application for assisting waveform debug in chip verification
US20140281719A1 (en) Explaining excluding a test from a test suite
Karnane et al. Automating root-cause analysis to reduce time to find bugs by up to 50%
CN115617640A (en) Software testing method and device, electronic equipment and storage medium
CN111427731B (en) Automatic split code stream and verification code stream testing method and system
CN114048084B (en) Method and device for generating test case schema of schematic diagram and storage medium
CN118152270A (en) Method and system for generating test cases based on UI operation log
US8751870B2 (en) Method and system for providing a random sequence coverage
CN113312080B (en) System, device and method for updating chip software and hardware configuration in chip EDA simulation
CN111179997B (en) Method and device for storing test data of semiconductor memory
CN116955134A (en) Page testing method and related equipment
JPH0581110A (en) Automatic inspection system for consistency of index file
CN114357918A (en) Chip verification method and device, electronic equipment and storage medium
CN116680200A (en) Automatic generation method, system and computer equipment for software test data
CN117350206A (en) Method and equipment for generating simulation excitation file
CN116795614A (en) Register function verification method and related device
CN112559370A (en) Front-end-based React project unit testing method and related equipment
CN105678166A (en) Tamper engine testing method and apparatus
JP2000113006A (en) Function logic verification for electronic circuit support system

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant