CN113053991A - 逆导型igbt的元胞结构及逆导型igbt - Google Patents

逆导型igbt的元胞结构及逆导型igbt Download PDF

Info

Publication number
CN113053991A
CN113053991A CN201911366131.0A CN201911366131A CN113053991A CN 113053991 A CN113053991 A CN 113053991A CN 201911366131 A CN201911366131 A CN 201911366131A CN 113053991 A CN113053991 A CN 113053991A
Authority
CN
China
Prior art keywords
type source
source region
region
gate
conductive type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201911366131.0A
Other languages
English (en)
Inventor
罗海辉
肖强
朱利恒
覃荣震
刘鹏飞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zhuzhou CRRC Times Semiconductor Co Ltd
Original Assignee
Zhuzhou CRRC Times Semiconductor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zhuzhou CRRC Times Semiconductor Co Ltd filed Critical Zhuzhou CRRC Times Semiconductor Co Ltd
Priority to CN201911366131.0A priority Critical patent/CN113053991A/zh
Priority to EP20907435.0A priority patent/EP4084084A4/en
Priority to PCT/CN2020/084136 priority patent/WO2021128653A1/zh
Publication of CN113053991A publication Critical patent/CN113053991A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395Vertical transistors, e.g. vertical IGBT
    • H01L29/7398Vertical transistors, e.g. vertical IGBT with both emitter and collector contacts in the same substrate side
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395Vertical transistors, e.g. vertical IGBT
    • H01L29/7396Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
    • H01L29/7397Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692Surface layout
    • H01L29/0696Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/083Anode or cathode regions of thyristors or gated bipolar-mode devices
    • H01L29/0834Anode regions of thyristors or gated bipolar-mode devices, e.g. supplementary regions surrounding anode regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1095Body region, i.e. base region, of DMOS transistors or IGBTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401Multistep manufacturing processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725Source or drain electrodes for field effect devices
    • H01L29/41741Source or drain electrodes for field effect devices for vertical or pseudo-vertical devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/083Anode or cathode regions of thyristors or gated bipolar-mode devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/36Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395Vertical transistors, e.g. vertical IGBT
    • H01L29/7396Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

本公开提供一种逆导型IGBT的元胞结构及逆导型IGBT。该元胞结构包括位于元胞结构中心的第二导电类型阱区;设置于所述阱区表面内的第一导电类型源区和第二导电类型源区;其中,所述第一导电类型源区位于所述第二导电类型源区两侧并且部分底部覆盖所述第二导电类型源区两侧的部分表面,并使得所述第一导电类型源区的侧面与所述第二导电类型源区未被所述第一导电类型源区覆盖的表面一起合围成一主沟槽;覆盖在所述主沟槽的侧壁和底部上的导电层;设置在所述栅结构上和所述主沟槽中的发射极金属层;其中,所述主沟槽的底部上的部分导电层与所述发射极金属层接触。这种结构可以降低栅极电压对逆导型IGBT内FRD正向导通压降的影响,使FRD获得更低的正向压降。

Description

逆导型IGBT的元胞结构及逆导型IGBT
技术领域
本公开涉及半导体器件技术领域,具体涉及一种逆导型IGBT的元胞结构及逆导型IGBT。
背景技术
绝缘栅双极型晶体管(Insulated Gate Bipolar Transistor,IGBT),是由BJT(双极性晶体管)和MOSFET(金属氧化物半导体场效应晶体管)组成的复合全控型电压驱动式功率半导体器件,已经成为大电压,大电流,高频电力电子应用中最广泛的半导体器件。通常在IGBT的应用中,需要反并联相应规格的快速恢复二极管(Fast Recovery Diode,FRD)作为关断时的电流泄放回路,来保护IGBT芯片。为降低成本以及减少封装带来的各种寄生效应的考虑,可将IGBT与FRD集成在同一个芯片中,即逆导型IGBT(Reverse ConductingIGBT,RC-IGBT)。
传统的逆导型IGBT的元胞结构,如图1和图2所示,集成了IGBT与FRD两种器件的功能,当逆导型IGBT工作在FRD模式时,栅极电压的变化对FRD的性能产生强烈的影响。当逆导型IGBT的栅极电压小于或等于0V时,逆导型IGBT没有形成反型载流子通道,FRD的阳极未短路,FRD的阳极注入效率高,FRD的正向导通压降较低。但是,当逆导IGBT栅极电压大于或等于阈值电压时,逆导型IGBT内,导电类型相反的两源区之间形成反型载流子通道,使FRD的阳极短路,导致FRD阳极注入效率降低,FRD的正向导通压降上升,使FRD无法正常工作。
发明内容
针对上述问题,本公开提供了一种逆导型IGBT的元胞结构及逆导型IGBT。
第一方面,本公开提供一种逆导型IGBT的元胞结构,包括:
第一导电类型衬底;
位于所述衬底上方的第一导电类型漂移层;
位于元胞结构中心且在所述漂移层表面内设置的第位于所述第二导电类型源区两侧并且二导电类型阱区;
设置于所述阱区表面内的第一导电类型源区和第二导电类型源区;其中,所述第一导电类型源区位于所述第二导电类型源区两侧并且所述第一导电类型源区高于所述第二导电类型源区,使得所述第一导电类型源区的部分底部覆盖所述第二导电类型源区两侧的部分表面,并使得所述第一导电类型源区的侧面与所述第二导电类型源区未被所述第一导电类型源区覆盖的表面一起合围成一主沟槽;
覆盖在所述主沟槽的侧壁和底部上的导电层;
设置于所述主沟槽两侧且与所述阱区和所述第一导电类型源区接触的栅结构;
设置在所述栅结构上方和所述主沟槽中的发射极金属层;
其中,所述栅结构中的栅极与所述第一导电类型源区之间,所述栅结构中的栅极与所述主沟槽的侧壁上的部分导电层之间,所述栅结构中的栅极、所述第一导电类型源区和所述主沟槽的侧壁上的部分导电层与所述发射极金属层之间通过层间介质层隔离,所述主沟槽的底部上的部分导电层与所述发射极金属层接触,用于导出所述第一导电类型源区的电流。
根据本公开的实施例,优选地,所述第二导电类型源区的表面比所述第一导电类型源区的表面低0.3um以上。
根据本公开的实施例,优选地,所述导电层为金属层或硅合金层。
根据本公开的实施例,优选地,还包括:
设置于所述漂移层内且位于所述阱区下方的第一导电类型存储区。
根据本公开的实施例,优选地,所述存储区的掺杂浓度比所述衬底的掺杂浓度高一个数量级至两个数量级。
根据本公开的实施例,优选地,还包括:
设置于所述阱区内且位于所述第二导电类型源区下方的寿命控制区。
根据本公开的实施例,优选地,所述栅结构包括位于所述漂移层上方并同时与所述第一导电类型源区、所述阱区和所述漂移层的表面接触的栅极绝缘层,以及位于所述栅极绝缘层上方的栅极。
根据本公开的实施例,优选地,所述栅结构包括设置于所述漂移层内并与所述阱区邻接的栅极沟槽、设置于所述栅极沟槽侧壁和底部的栅极绝缘层以及填充于所述栅极沟槽内的栅极,其中,所述栅极沟槽还与所述第一导电类型源区远离元胞结构中心的一端接触。
根据本公开的实施例,优选地,还包括:
位于所述衬底下方的第二导电类型集电区和与所述集电区相邻接的第一导电类型短路区;
位于所述集电区和所述短路区下方并与所述集电区和所述短路区形成电连接的集电极金属层。
根据本公开的实施例,优选地,所述元胞结构为蜂窝状元胞结构或条形元胞结构。
第二方面,本公开提供一种逆导型IGBT器件,包括若干如第一方面任一项所述的逆导型IGBT的元胞结构。
采用上述技术方案,至少能够达到如下技术效果:
本公开提供一种逆导型IGBT的元胞结构及逆导型IGBT,将第一导电类型源区与发射极金属层通过导电层连接,消除了第一导电类型源区与第二导电类型源区之间的耦合关系,并将第一导电类型源区的电流通过导电层导出,使逆导型IGBT工作在FRD模式且逆导型IGBT栅极电压大于或等于阈值电压时,第一导电类型源区的短路效应对FRD阳极注入影响降低,从而降低栅极电压对FRD正向导通压降的影响,使FRD获得更低的正向压降。
附图说明
附图是用来提供对本公开的进一步理解,并且构成说明书的一部分,与下面的具体实施方式一起用于解释本公开,但并不构成对本公开的限制。在附图中:
图1是传统的平面栅结构的逆导型IGBT的元胞结构的剖面结构示意图;
图2是传统的沟槽栅结构的逆导型IGBT的元胞结构的剖面结构示意图;
图3是本公开一示例性实施例示出的一种平面栅结构的逆导型IGBT的元胞结构的剖面结构示意图;
图4是本公开一示例性实施例示出的另一种平面栅结构的逆导型IGBT的元胞结构的剖面结构示意图;
图5是本公开一示例性实施例示出的另一种平面栅结构的逆导型IGBT的元胞结构的剖面结构示意图;
图6是本公开一示例性实施例示出的一种沟槽栅结构的逆导型IGBT的元胞结构的剖面结构示意图;
图7是本公开一示例性实施例示出的另一种沟槽栅结构的逆导型IGBT的元胞结构的剖面结构示意图;
图8是本公开一示例性实施例示出的另一种沟槽栅结构的逆导型IGBT的元胞结构的剖面结构示意图。
具体实施方式
以下将结合附图及实施例来详细说明本公开的实施方式,借此对本公开如何应用技术手段来解决技术问题,并达到相应技术效果的实现过程能充分理解并据以实施。本公开实施例以及实施例中的各个特征,在不相冲突前提下可以相互结合,所形成的技术方案均在本公开的保护范围之内。在附图中,为了清楚,层和区的尺寸以及相对尺寸可能被夸大。自始至终相同附图标记表示相同的元件。
应理解,尽管可使用术语“第一”、“第二”、“第三”等描述各种元件、部件、区、层和/或部分,这些元件、部件、区、层和/或部分不应当被这些术语限制。这些术语仅仅用来区分一个元件、部件、区、层或部分与另一个元件、部件、区、层或部分。因此,在不脱离本公开教导之下,下面讨论的第一元件、部件、区、层或部分可表示为第二元件、部件、区、层或部分。
应理解,空间关系术语例如“在...上方”、位于...上方”、“在...下方”、“位于...下方”等,在这里可为了方便描述而被使用从而描述图中所示的一个元件或特征与其它元件或特征的关系。应当明白,除了图中所示的取向以外,空间关系术语意图还包括使用和操作中的器件的不同取向。例如,如果附图中的器件翻转,然后,描述为“在其它元件下方”的元件或特征将取向为在其它元件或特征“上”。因此,示例性术语“在...下方”和“在...下”可包括上和下两个取向。器件可以另外地取向(旋转90度或其它取向)并且在此使用的空间描述语相应地被解释。
在此使用的术语的目的仅在于描述具体实施例并且不作为本公开的限制。在此使用时,单数形式的“一”、“一个”和“所述/该”也意图包括复数形式,除非上下文清楚指出另外的方式。还应明白术语“组成”和/或“包括”,当在该说明书中使用时,确定所述特征、整数、步骤、操作、元件和/或部件的存在,但不排除一个或更多其它的特征、整数、步骤、操作、元件、部件和/或组的存在或添加。在此使用时,术语“和/或”包括相关所列项目的任何及所有组合。
这里参考作为本公开的理想实施例(和中间结构)的示意图的横截面图来描述本公开的实施例。这样,可以预期由于例如制备技术和/或容差导致的从所示形状的变化。因此,本公开的实施例不应当局限于在此所示的区的特定形状,而是包括由于例如制备导致的形状偏差。例如,显示为矩形的注入区在其边缘通常具有圆的或弯曲特征和/或注入浓度梯度,而不是从注入区到非注入区的二元改变。同样,通过注入形成的埋藏区可导致该埋藏区和注入进行时所经过的表面之间的区中的一些注入。因此,图中显示的区实质上是示意性的,它们的形状并不意图显示器件的区的实际形状且并不意图限定本公开的范围。
为了彻底理解本公开,将在下列的描述中提出详细的结构以及步骤,以便阐释本公开提出的技术方案。本公开的较佳实施例详细描述如下,然而除了这些详细描述外,本公开还可以具有其他实施方式。
实施例一
如图3所示,本公开实施例提供一种平面栅结构的逆导型IGBT的元胞结构300,包括衬底301、漂移层302、阱区303、第二导电类型源区304、第一导电类型源区305、栅极绝缘层306、栅极307、导电层308、层间介质层309、发射极金属层310、集电区311、短路区312、集电极金属层313。
示例性地,衬底301为第一导电类型的硅基衬底。
漂移层302为第一导电类型的漂移层,位于衬底301上方,漂移层302的厚度根据器件的耐压能力不同来进行选择。
阱区303为第二导电类型的阱区,位于元胞结构中心且设置在漂移层302表面内,阱区303的表面与漂移层302的表面相平齐。
第二导电类型源区304,为第二导电类型的源区,设置于阱区303表面内。
第一导电类型源区305,为第一导电类型的源区,第一导电类型源区305设置于阱区303表面内且位于第二导电类型源区304两侧。第一导电类型源区305高于第二导电类型源区304,使得第一导电类型源区305的底部部分覆盖第二导电类型源区304两侧的部分表面,并使得第一导电类型源区305的侧面与第二导电类型源区304未被第一导电类型源区305覆盖的表面一起合围成一主沟槽(图中未标注)。
本实施例中,上述主沟槽是在阱区303的表面内形成第一导电类型源区305和第二导电类型源区304之后,通过刻蚀两个第一导电类型源区305之间的部分第二导电类型源区304得到的,刻蚀之后,第二导电类型源区304仅剩下位于第一导电类型源区305下方和主沟槽下方的部分。
本实施例中,第二导电类型源区304的表面比第一导电类型源区305的表面低0.3um以上。这种结构可以提高载流子在垂直方向的注入水平。
栅极绝缘层306和栅极307构成栅结构,本实施例中,栅结构为平面栅结构。
栅极绝缘层306位于主沟槽两侧且位于漂移层302上方,栅极绝缘层306同时与第一导电类型源区305、阱区303和漂移层302的表面接触,但不与导电层308接触。栅极绝缘层306使栅极307与第一导电类型源区305、阱区303和漂移层302隔离开。
栅极307为多晶硅栅极,设置于栅极绝缘层306上方。
导电层308设置于上述主沟槽的底部和侧壁,导电层308的厚度为50nm至200nm,导电层308为金属层或硅合金层。
层间介质层309位于栅极307上方,同时覆盖位于第一导电类型源区305上方和位于主沟槽侧壁的部分导电层。层间介质层309将栅极307、第一导电类型源区305、位于第一导电类型源区305上方和位于主沟槽侧壁的部分导电层与发射极金属层310隔离开,还将栅极307与第一导电类型源区305和导电层308隔离开。
发射极金属层310位于层间介质层309上方并填充上述主沟槽,发射极金属层310与位于主沟槽底部的部分导电层接触,用于导出第一导电类型源区305的短路电流。发射极金属层310可以为铝等具有低接触电阻率的金属。
这种结构使逆导型IGBT工作在FRD模式且逆导型IGBT栅极电压大于或等于阈值电压时,第一导电类型源区305的短路电流通过导电层308导出,使该短路电流对第二导电类型源区304的注入影响降低,降低了第一导电类型源区305的短路效应对FRD阳极注入的影响,从而达到降低FRD正向导通压降的目的。
集电区311为第二导电类型的集电区,集电区311位于衬底301下方。
短路区312为第二导电类型的短路区,短路区312位于衬底301下方,与集电区311邻接。
集电极金属层313位于集电区311和短路区312下方并与集电区311和短路区312形成电连接。
本实施例中,如图4所示,元胞结构300还可以包括存储区314,存储区314为第一导电类型的载流子存储区,设置于漂移层302内且位于阱区303下方,存储区314的掺杂浓度比衬底301的掺杂浓度高一个数量级至两个数量级。存储区314可以降低IGBT的导通压降。
如图5所示,元胞结构300还可以包括寿命控制区315,寿命控制区315设置于阱区303内且位于第二导电类型源区304下方,寿命控制区315为低寿命控制区,其少子寿命低于附近其他区域,一般低三个量级到四个量级。寿命控制区315通过在阱区内注入其它类型的杂质来降低少子寿命得到,可以降低FRD的开关损耗。这种元胞结构可以同时获得较低的FRD正向导通压降和较低的FRD开关损耗。
需要说明的是,元胞结构300的形状可以为蜂窝状、短条形(元胞长度≤200um)或长条形。
在本实施例中,第一导电类型和所述第二导电类型相反。例如,第一导电类型为N型时,第二导电类型为P型;第一导电类型为P型时,第二导电类型为N型。具体地,根据实际需要制备的器件类型进行合理选择即可。
本公开提供一种平面栅结构的逆导型IGBT的元胞结构,将第一导电类型源区305与发射极金属层310通过导电层308连接,消除了第一导电类型源区305与第二导电类型源区304之间的耦合关系,并将第一导电类型源区305的电流通过导电层308导出,使逆导型IGBT工作在FRD模式且逆导型IGBT栅极电压大于或等于阈值电压时,第一导电类型源区305的短路效应对FRD阳极注入影响降低,从而降低栅极电压对FRD正向导通压降的影响,使FRD获得更低的正向压降。
实施例二
如图6所示,本公开实施例提供一种沟槽栅结构的逆导型IGBT的元胞结构400,包括衬底401、漂移层402、栅极绝缘层403、栅极404、阱区405、第二导电类型源区406、第一导电类型源区407、导电层408、层间介质层409、发射极金属层410、集电区411、短路区412、集电极金属层413。
示例性地,衬底401为第一导电类型的硅基衬底。
漂移层402为第一导电类型的漂移层,位于衬底401上方,漂移层402的厚度根据器件的耐压能力不同来进行选择。
栅极沟槽(图中未标注)、栅极绝缘层403和栅极404构成栅结构,本实施例中,栅结构为沟槽栅结构。
栅极沟槽设置于元胞结构两侧且位于漂移层402内并与阱区405邻接,栅极沟槽的深度大于阱区405的深度。
栅极绝缘层403设置于上述栅极沟槽的侧壁和底部,使栅极404与第一导电类型源区407、阱区405和漂移层402隔离开。
栅极404为多晶硅栅极,填充于上述栅极沟槽内。
阱区405为第二导电类型的阱区,设置在漂移层402表面内,且位于元胞结构中心位置、两个栅极沟槽之间。阱区405的表面与漂移层402的表面相平齐,阱区405的两端分别与两侧的栅极沟槽接触,即与两侧的栅极绝缘层接触。
第二导电类型源区406,为第二导电类型的源区,设置于阱区405表面内,第二导电类型源区406的表面与漂移层402的表面相平齐。
第一导电类型源区407,为第一导电类型的源区,第一导电类型源区407设置于阱区405表面内且位于第二导电类型源区406两侧。第一导电类型源区407高于第二导电类型源区406,使得第一导电类型源区407的底部部分覆盖第二导电类型源区406两侧的部分表面,并使得第一导电类型源区407的侧面与第二导电类型源区406未被第一导电类型源区407覆盖的表面一起合围成一主沟槽(图中未标注)。
本实施例中,上述主沟槽是在阱区405的表面内形成第一导电类型源区407和第二导电类型源区406之后,通过刻蚀两个第一导电类型源区407之间的部分第二导电类型源区406得到的,刻蚀之后,第二导电类型源区406仅剩下位于第一导电类型源区407下方和主沟槽下方的部分。
本实施例中,第二导电类型源区406的表面比第一导电类型源区407的表面低0.3um以上。这种结构可以提高载流子在垂直方向的注入水平。
导电层408设置于上述沟槽的底部和侧壁并延伸至第一导电类型源区407的上方,导电层408的厚度为50nm至200nm,导电层408为金属层或硅合金层。
层间介质层409位于栅极404上方,同时覆盖第一导电类型源区407、位于第一导电类型源区407上方和位于主沟槽侧壁的部分导电层。层间介质层409将栅极404、第一导电类型源区407、位于第一导电类型源区407上方和位于沟槽侧壁的部分导电层与发射极金属层410隔离开,还将栅极404与第一导电类型源区407和导电层408隔离开。
发射极金属层410位于层间介质层409上方并填充上述沟槽,发射极金属层410与位于沟槽底部的导电层接触,用于导出第一导电类型源区407的短路电流。发射极金属层410可以为铝等具有低接触电阻率的金属。
这种结构使逆导型IGBT工作在FRD模式且逆导型IGBT栅极电压大于或等于阈值电压时,第一导电类型源区407的短路电流通过导电层408导出,使该短路电流对第二导电类型源区406的注入影响降低,降低了第一导电类型源区407的短路效应对FRD阳极注入的影响,从而达到降低FRD正向导通压降的目的。
集电区411为第二导电类型的集电区,集电区411位于衬底401下方。
短路区412为第二导电类型的短路区,短路区412位于衬底401下方,与集电区411邻接。
集电极金属层413位于集电区411和短路区412下方并与集电区411和短路区412形成电连接。
本实施例中,如图7所示,元胞结构400还可以包括存储区414,存储区414为第一导电类型的载流子存储区,设置于漂移层402内且位于阱区405下方,存储区414的掺杂浓度比衬底401的掺杂浓度高一个数量级至两个数量级。存储区414可以降低IGBT的导通压降。
如图8所示,元胞结构400还可以包括寿命控制区415,寿命控制区415设置于阱区405内且位于第二导电类型源区406下方,寿命控制区415为低寿命控制区,其少子寿命低于附近其他区域,一般低三个量级到四个量级。寿命控制区415通过在阱区内注入其它类型的杂质来降低少子寿命得到,可以降低FRD的开关损耗。这种元胞结构可以同时获得较低的FRD正向导通压降和较低的FRD开关损耗。
需要说明的是,元胞结构400的形状可以为蜂窝状、短条形(元胞长度≤200um)或长条形。
在本实施例中,第一导电类型和所述第二导电类型相反。例如,第一导电类型为N型时,第二导电类型为P型;第一导电类型为P型时,第二导电类型为N型。具体地,根据实际需要制备的器件类型进行合理选择即可。
本公开提供一种平面栅结构的逆导型IGBT的元胞结构,将第一导电类型源区407与发射极金属层410通过导电层408连接,消除了第一导电类型源区407与第二导电类型源区406之间的耦合关系,并将第一导电类型源区407的电流通过导电层408导出,使逆导型IGBT工作在FRD模式且逆导型IGBT栅极电压大于或等于阈值电压时,第一导电类型源区407的短路效应对FRD阳极注入影响降低,从而降低栅极电压对FRD正向导通压降的影响,使FRD获得更低的正向压降。
以上仅为本公开的优选实施例而已,并不用于限制本公开,对于本领域的技术人员来说,本公开可以有各种更改和变化。凡在本公开的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本公开的保护范围之内。虽然本公开所公开的实施方式如上,但的内容只是为了便于理解本公开而采用的实施方式,并非用以限定本公开。任何本公开所属技术领域内的技术人员,在不脱离本公开所公开的精神和范围的前提下,可以在实施的形式上及细节上作任何的修改与变化,但本公开的保护范围,仍须以所附的权利要求书所界定的范围为准。

Claims (11)

1.一种逆导型IGBT的元胞结构,其特征在于,包括:
第一导电类型衬底位于所述衬底上方的第一导电类型漂移层;
位于元胞结构中心且在所述漂移层表面内设置的第二导电类型阱区;
设置于所述阱区表面内的第一导电类型源区和第二导电类型源区;其中,所述第一导电类型源区位于所述第二导电类型源区两侧并且所述第一导电类型源区高于所述第二导电类型源区,使得所述第一导电类型源区的部分底部覆盖所述第二导电类型源区两侧的部分表面,并使得所述第一导电类型源区的侧面与所述第二导电类型源区未被所述第一导电类型源区覆盖的表面一起合围成一主沟槽;
覆盖在所述主沟槽的侧壁和底部上的导电层;
设置于所述主沟槽两侧且与所述阱区和所述第一导电类型源区接触的栅结构;
设置在所述栅结构上方和所述主沟槽中的发射极金属层;
其中,所述栅结构中的栅极与所述第一导电类型源区之间,所述栅结构中的栅极与所述主沟槽的侧壁上的部分导电层之间,所述栅结构中的栅极、所述第一导电类型源区和所述主沟槽的侧壁上的部分导电层与所述发射极金属层之间通过层间介质层隔离,所述主沟槽的底部上的部分导电层与所述发射极金属层接触,用于导出所述第一导电类型源区的电流。
2.根据权利要求1所述的逆导型IGBT的元胞结构,其特征在于,所述第二导电类型源区的表面比所述第一导电类型源区的表面低0.3um以上。
3.根据权利要求1所述的逆导型IGBT的元胞结构,其特征在于,所述导电层为金属层或硅合金层。
4.根据权利要求1所述的逆导型IGBT的元胞结构,其特征在于,还包括:
设置于所述漂移层内且位于所述阱区下方的第一导电类型存储区。
5.根据权利要求4所述的逆导型IGBT的元胞结构,其特征在于,所述存储区的掺杂浓度比所述衬底的掺杂浓度高一个数量级至两个数量级。
6.根据权利要求1所述的逆导型IGBT的元胞结构,其特征在于,还包括:
设置于所述阱区内且位于所述第二导电类型源区下方的寿命控制区。
7.根据权利要求1所述的逆导型IGBT的元胞结构,其特征在于,所述栅结构包括位于所述漂移层上方并同时与所述第一导电类型源区、所述阱区和所述漂移层的表面接触的栅极绝缘层,以及位于所述栅极绝缘层上方的栅极。
8.根据权利要求1所述的逆导型IGBT的元胞结构,其特征在于,所述栅结构包括设置于所述漂移层内并与所述阱区邻接的栅极沟槽、设置于所述栅极沟槽侧壁和底部的栅极绝缘层以及填充于所述栅极沟槽内的栅极,其中,所述栅极沟槽还与所述第一导电类型源区远离元胞结构中心的一端接触。
9.如权利要求1所述的逆导型IGBT的元胞结构,其特征在于,还包括:
位于所述衬底下方的第二导电类型集电区和与所述集电区相邻接的第一导电类型短路区;
位于所述集电区和所述短路区下方并与所述集电区和所述短路区形成电连接的集电极金属层。
10.如权利要求1所述的逆导型IGBT的元胞结构,其特征在于,所述元胞结构为蜂窝状元胞结构或条形元胞结构。
11.一种逆导型IGBT器件,其特征在于,包括若干如权利要求1至10任一项所述的逆导型IGBT的元胞结构。
CN201911366131.0A 2019-12-26 2019-12-26 逆导型igbt的元胞结构及逆导型igbt Pending CN113053991A (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN201911366131.0A CN113053991A (zh) 2019-12-26 2019-12-26 逆导型igbt的元胞结构及逆导型igbt
EP20907435.0A EP4084084A4 (en) 2019-12-26 2020-04-10 CELL STRUCTURE OF REVERSE CONDUCTION IGBT AND REVERSE CONDUCTION IGBT
PCT/CN2020/084136 WO2021128653A1 (zh) 2019-12-26 2020-04-10 逆导型igbt的元胞结构及逆导型igbt

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201911366131.0A CN113053991A (zh) 2019-12-26 2019-12-26 逆导型igbt的元胞结构及逆导型igbt

Publications (1)

Publication Number Publication Date
CN113053991A true CN113053991A (zh) 2021-06-29

Family

ID=76505377

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201911366131.0A Pending CN113053991A (zh) 2019-12-26 2019-12-26 逆导型igbt的元胞结构及逆导型igbt

Country Status (3)

Country Link
EP (1) EP4084084A4 (zh)
CN (1) CN113053991A (zh)
WO (1) WO2021128653A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117650161A (zh) * 2023-10-31 2024-03-05 海信家电集团股份有限公司 半导体装置和半导体装置的制造方法

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120037922A1 (en) * 2009-03-30 2012-02-16 Kabushiki Kaisha Toshiba Semiconductor device and semiconductor device manufacturing method
CN104835839A (zh) * 2014-02-12 2015-08-12 英飞凌科技股份有限公司 半导体器件,制造其的方法及发射极与杂质区电连接的igbt
US20160307993A1 (en) * 2014-07-17 2016-10-20 Fuji Electric Co., Ltd. Semiconductor device and method of manufacturing semiconductor device
EP3154091A1 (en) * 2015-10-07 2017-04-12 ABB Technology AG Reverse-conducting semiconductor device
US20180358444A1 (en) * 2017-06-09 2018-12-13 Fuji Electric Co., Ltd. Silicon carbide semiconductor device and method of manufacturing a silicon carbide semiconductor device
US20180366548A1 (en) * 2016-09-14 2018-12-20 Fuji Electric Co.,Ltd. Rc-igbt and manufacturing method thereof
JP2019091796A (ja) * 2017-11-14 2019-06-13 トヨタ自動車株式会社 スイッチング素子とその製造方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10261424B3 (de) * 2002-12-30 2004-07-01 Infineon Technologies Ag Verfahren zum Herstellen eines Emitters mit niedrigem Emitterwirkungsgrad
JP4952638B2 (ja) * 2008-04-07 2012-06-13 トヨタ自動車株式会社 半導体素子と半導体装置とその駆動方法
US20100117117A1 (en) * 2008-11-10 2010-05-13 Infineon Technologies Ag Vertical IGBT Device
US20110062489A1 (en) * 2009-09-11 2011-03-17 Disney Donald R Power device with self-aligned silicide contact
US9209109B2 (en) * 2013-07-15 2015-12-08 Infineon Technologies Ag IGBT with emitter electrode electrically connected with an impurity zone

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120037922A1 (en) * 2009-03-30 2012-02-16 Kabushiki Kaisha Toshiba Semiconductor device and semiconductor device manufacturing method
CN104835839A (zh) * 2014-02-12 2015-08-12 英飞凌科技股份有限公司 半导体器件,制造其的方法及发射极与杂质区电连接的igbt
US20160307993A1 (en) * 2014-07-17 2016-10-20 Fuji Electric Co., Ltd. Semiconductor device and method of manufacturing semiconductor device
EP3154091A1 (en) * 2015-10-07 2017-04-12 ABB Technology AG Reverse-conducting semiconductor device
US20180366548A1 (en) * 2016-09-14 2018-12-20 Fuji Electric Co.,Ltd. Rc-igbt and manufacturing method thereof
US20180358444A1 (en) * 2017-06-09 2018-12-13 Fuji Electric Co., Ltd. Silicon carbide semiconductor device and method of manufacturing a silicon carbide semiconductor device
JP2019091796A (ja) * 2017-11-14 2019-06-13 トヨタ自動車株式会社 スイッチング素子とその製造方法

Also Published As

Publication number Publication date
EP4084084A1 (en) 2022-11-02
WO2021128653A1 (zh) 2021-07-01
EP4084084A4 (en) 2024-01-24

Similar Documents

Publication Publication Date Title
CN103383966B (zh) 具有改善的鲁棒性的半导体器件
CN112786679B (zh) 碳化硅mosfet器件的元胞结构及碳化硅mosfet器件
US8415747B2 (en) Semiconductor device including diode
CN104576720A (zh) 半导体器件和逆导igbt
CN109065621B (zh) 一种绝缘栅双极晶体管及其制备方法
US11398472B2 (en) RC IGBT with an IGBT section and a diode section
US7989921B2 (en) Soi vertical bipolar power component
CN112201688B (zh) 逆导型igbt芯片
CN112201690A (zh) Mosfet晶体管
CN113410294A (zh) 反向导通绝缘栅双极晶体管
CN116153991B (zh) 一种双沟槽栅rc-igbt及其制备方法
CN102456690B (zh) 半导体器件及其制造方法
CN112271218A (zh) 功率半导体器件及其制备方法
CN113394278A (zh) 逆导型igbt及其制备方法
CN115832039A (zh) 一种逆导型igbt器件
CN113054015B (zh) 碳化硅mosfet芯片
EP3989292A1 (en) Insulated gate bipolar transistor
CN111106043B (zh) 功率半导体器件元胞结构、其制备方法及功率半导体器件
CN113053991A (zh) 逆导型igbt的元胞结构及逆导型igbt
CN105957901B (zh) 具有沟槽-肖特基-势垒-肖特基-二极管的半导体装置
JP2024516286A (ja) 逆導通型横型絶縁ゲートバイポーラトランジスタ
CN110534566B (zh) 一种igbt功率器件
CN112002751A (zh) 碳化硅vdmosfet器件的元胞结构、其制备方法及碳化硅vdmosfet器件
CN114335170A (zh) 半导体功率器件
CN111816695A (zh) 反向阻断功率半导体器件和处理反向阻断功率半导体器件的方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20210629