CN113053987A - Capacitor structure, pixel circuit and AMOLED display device - Google Patents
Capacitor structure, pixel circuit and AMOLED display device Download PDFInfo
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Abstract
The invention relates to the technical field of display devices, in particular to a capacitor structure, a pixel circuit and an AMOLED display device, wherein the capacitor structure comprises: the capacitor structure comprises a first electrode plate and a second electrode plate which are sequentially stacked from bottom to top, wherein the orthographic projection of the second electrode plate on a substrate falls into the orthographic projection of the first electrode plate on the substrate, a gap b is formed between each edge of the second electrode plate and each edge of the corresponding first electrode plate, and a contact hole for leaking the first electrode plate is formed in the capacitor structure; to sum up, under the influence of process deviation, when the line width of the first electrode plate fluctuates in the range of the gap b, the dead area of the first electrode plate and the dead area of the second electrode plate are both the area of the second electrode plate, so that the capacitance value is ensured to be fixed and unchanged, the compensation effect of the pixel circuit on the threshold voltage is further ensured, and the image quality of the display device is improved.
Description
Technical Field
The invention relates to the technical field of display devices, in particular to a capacitor structure, a pixel circuit and an AMOLED display device.
Background
An Organic Light Emitting Diode (OLED) display device has many advantages of self-luminescence, low driving voltage, high luminous efficiency, short response time, wide application temperature range, etc., and is considered as a display device with the most potential development by the industry; the OLED display panel may be classified into two broad categories, i.e., a Passive Matrix OLED (PMOLED) and an Active Matrix OLED (AMOLED), according to a driving manner. The AMOLED panel has pixels arranged in an array, belongs to an active display type, has high luminous efficiency, and is generally used for a large-sized display device with high definition.
In order to eliminate the threshold voltage difference between different pixels, a conventional AMOLED panel product may design a corresponding pixel circuit to perform threshold voltage compensation, where the organic light emitting display panel includes a pixel circuit for driving an organic light emitting device to emit light, the pixel circuit generally includes a plurality of Thin Film Transistors (TFTs) and a capacitor, where the capacitor is used to store charges to maintain a gate voltage of the TFT, and the capacitance of the capacitor structure may affect the charge/discharge and charge retention capability of the capacitor.
Specifically, the capacitor comprises a first electrode plate and a second electrode plate which are arranged in a stacked manner, wherein the capacitance value of the capacitor structure is directly determined by the size of the positive facing area of the first electrode plate and the second electrode plate, at present, in the processing process, the line width of the first electrode plate is fluctuated due to the process deviation, so that the positive facing area of the first electrode plate and the positive facing area of the second electrode plate are changed, the corresponding capacitance is also changed, the display among different pixels is different, the compensation effect of the pixel circuit on the threshold voltage is directly influenced, and the image quality of the display device is poor.
Disclosure of Invention
An object of the present application is to provide a capacitor structure, a pixel circuit and an AMOLED display device, so as to solve the technical problem in the prior art that the line width of a first electrode plate fluctuates due to process deviation, so that the facing area of the first electrode plate and a second electrode plate changes, and the size of a corresponding capacitor also changes.
Technical scheme (I)
To achieve the above object, a first aspect of the present invention provides a capacitor structure, including: follow supreme first electrode board and the second electrode board that stacks gradually the setting down, the orthographic projection of second electrode board on the base falls in the orthographic projection of first electrode board on the base, just every edge of second electrode board and corresponding all have clearance b between every edge of first electrode board, the structural contact hole that is used for leaking of capacitor has still been seted up.
Optionally, the first electrode plate and the second electrode plate are both set to be a closed rectangular structure.
Optionally, the contact hole is opened at an edge of the second electrode plate, and one edge of the contact hole coincides with one edge of the second electrode plate.
Optionally, a gap c is formed between each edge of the contact hole and the edge of the second electrode plate.
Optionally, a gap d is formed between an edge of the contact hole and an edge of the first electrode plate.
Optionally, the gap b is determined according to the following formula:
wherein: x is the line width deviation of the first electrode plate; y is the line width deviation of the second electrode plate; z is the offset of the second electrode plate relative to the first electrode plate.
Optionally, the gap c is determined according to the following formula:
wherein: e is the line width deviation of the contact hole; f is the line width deviation of the second electrode plate; g is the offset of the contact hole relative to the second electrode plate
Optionally, the gap d is determined according to the following formula:
wherein: h is the line width deviation of the contact hole; i is the line width deviation of the first electrode plate; j is the offset of the contact hole relative to the first electrode plate.
Optionally, the gap b is greater than or equal to 2 μm.
Optionally, the gap c is greater than or equal to 2 μm.
Optionally, the gap d is greater than or equal to 2 μm.
Optionally, the capacitor structure further includes: the contact hole is used for wrapping the electrolyte layer of the first electrode plate and wrapping the internal dielectric layer of the second electrode plate, and one end of the contact hole penetrates through the internal dielectric layer, the second electrode plate and the electrolyte layer in sequence and is communicated with the first electrode plate.
Optionally, a substrate, an isolation layer, a trench, and a gate insulating layer for wrapping the trench are sequentially stacked below the first electrode plate from bottom to top.
To achieve the above object, a second aspect of the present invention provides a pixel circuit comprising: a capacitive structure according to any preceding claim.
To achieve the above object, a third aspect of the present invention provides an AMOLED display device, comprising: a pixel circuit as described above.
(II) advantageous effects
Compared with the prior art, the invention has the following beneficial effects:
the invention provides a capacitor structure, a pixel circuit and an AMOLED display device, wherein the capacitor structure comprises: the capacitor structure comprises a first electrode plate and a second electrode plate which are sequentially stacked from bottom to top, wherein the orthographic projection of the second electrode plate on a substrate falls into the orthographic projection of the first electrode plate on the substrate, a gap b is formed between each edge of the second electrode plate and each edge of the corresponding first electrode plate, and a contact hole for leaking the first electrode plate is formed in the capacitor structure; to sum up, under the influence of process deviation, when the line width of the first electrode plate fluctuates in the range of the gap b, the dead area of the first electrode plate and the dead area of the second electrode plate are both the area of the second electrode plate, so that the capacitance value is ensured to be fixed and unchanged, the compensation effect of the pixel circuit on the threshold voltage is further ensured, and the image quality of the display device is improved.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention.
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for a person skilled in the art that other drawings can be obtained according to the drawings without inventive exercise, wherein:
FIG. 1 is a schematic diagram of a prior art capacitor structure;
FIG. 2 is a cross-sectional view of FIG. 1;
FIG. 3 is a schematic diagram of a first electrode plate according to the prior art;
FIG. 4 is a schematic diagram of a second electrode plate according to the prior art;
FIG. 5 is a schematic structural diagram of a capacitor structure according to the present invention;
FIG. 6 is a cross-sectional view of FIG. 5;
FIG. 7 is a schematic view of the structure of the first electrode plate in the present invention;
FIG. 8 is a schematic view of the structure of the second electrode plate in the present invention;
fig. 9 is a schematic diagram of a pixel circuit according to the present invention.
In the figure: 1. a first electrode plate; 2. a second electrode plate; 3. a contact hole; 4. an electrolyte layer; 5. an inner dielectric layer; 6. a substrate; 7. an insulating layer; 8. a trench; 9. a gate insulating layer; 10. and (3) a capacitor structure.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.
The invention is described in further detail below with reference to the following figures and detailed description:
an Organic Light Emitting Diode (OLED) display device has many advantages of self-luminescence, low driving voltage, high luminous efficiency, short response time, wide application temperature range, etc., and is considered as a display device with the most potential development by the industry; the OLED display panel may be classified into two broad categories, i.e., a Passive Matrix OLED (PMOLED) and an Active Matrix OLED (AMOLED), according to a driving manner. The AMOLED panel has pixels arranged in an array, belongs to an active display type, has high luminous efficiency, and is generally used for a large-sized display device with high definition.
In order to eliminate the threshold voltage difference between different pixels, a conventional AMOLED panel product may design a corresponding pixel circuit to perform threshold voltage compensation, where the organic light emitting display panel includes a pixel circuit for driving an organic light emitting device to emit light, the pixel circuit generally includes a plurality of Thin Film Transistors (TFTs) and a capacitor, where the capacitor is used to store charges to maintain a gate voltage of the TFT, and the capacitance of the capacitor structure may affect the charge/discharge and charge retention capability of the capacitor.
The capacitor comprises a first electrode plate 1 and a second electrode plate 2 which are stacked, wherein the capacitance value of the capacitor structure is directly determined by the facing area of the first electrode plate 1 and the second electrode plate 2, specifically, as shown in fig. 1, 2 and 4, in the prior art, the second electrode plate 2 is set to be a square-shaped structure, as shown in fig. 1, 2 and 3, the first electrode plate 1 is set to be a closed rectangular structure, after the first electrode plate 1 and the second electrode plate 2 are stacked, the facing area of the first electrode plate 1 and the second electrode plate 2 is only a part of the square-shaped structure with a width a, so that when the line width of the first electrode plate 1 is increased, the corresponding width a is increased, that is, the facing area of the first electrode plate 1 and the second electrode plate 2 is increased, and further, the capacitance value is increased; similarly, when the line width of the first electrode plate 1 is reduced, the corresponding width a is reduced, that is, the facing area of the first electrode plate 1 and the second electrode plate 2 is reduced, and further the capacitance value is reduced; in summary, in the capacitor processing process, even on the same substrate 6, due to process deviation, the line width of the first electrode plate 1 may fluctuate, at this time, the facing area of the first electrode plate 1 and the second electrode plate 2 may change, and the corresponding capacitance may also change, so that the display among different pixels may differ, and further, the compensation effect of the pixel circuit on the threshold voltage may be directly affected, and the image quality of the display device may be poor.
In order to solve the above technical problem, as shown in fig. 5 to 8, a first aspect of the present application provides a capacitor structure 10, including: the electrode plate comprises a first electrode plate 1 and a second electrode plate 2 which are sequentially stacked from bottom to top, wherein in a preferred embodiment, the first electrode plate 1 and the second electrode plate 2 are both arranged into a closed rectangular structure; the orthographic projection of the second electrode plate 2 on the substrate 6 falls within the orthographic projection of the first electrode plate 1 on the substrate 6, that is, the line width of the first electrode plate 1 is greater than the line width of the second electrode plate 2, and a gap b is formed between each edge of the second electrode plate 2 and each edge of the corresponding first electrode plate 1, in a preferred embodiment, the gap b is greater than or equal to 2 μm, and the capacitor structure 10 is further provided with a contact hole 3 for leaking the first electrode plate 1; specifically, as shown in fig. 6, the capacitor structure 10 further includes: the contact hole 3 is used for wrapping an electrolyte layer 4 of the first electrode plate 1 and an internal dielectric layer 5 of the second electrode plate 2, one end of the contact hole penetrates through the internal dielectric layer 5, the second electrode plate 2 and the electrolyte layer 4 in sequence and is communicated with the first electrode plate 1; when the first electrode plate needs to be communicated with an external metal wire, the external metal wire only needs to be communicated with the first electrode plate 1 through the contact hole 3; in summary, under the influence of process deviation, when the line width of the first electrode plate 1 fluctuates within the range of the gap b, the facing areas of the first electrode plate 1 and the second electrode plate 2 are both the area of the second electrode plate 2, so as to ensure that the capacitance value is fixed and unchanged, further ensure the compensation effect of the pixel circuit on the threshold voltage, and improve the image quality of the display device; in summary, by adopting the design of the present application, the influence of the normal fluctuation of the line width of the first electrode plate on the capacitance value of the capacitor structure can be effectively eliminated without changing the process conditions and the process steps and increasing the mask.
Specifically, the clearance b is determined according to the following formula:
wherein: x is a line width deviation of the first electrode plate 1; y is the line width deviation of the second electrode plate 2; z is an offset of the second electrode plate 2 with respect to the first electrode plate 1.
Exemplarily, when the line width deviation of the first electrode plate 1 is ± 1 μm; the line width deviation of the second electrode plate 2 is +/-1 mu m; the offset of the second electrode plate 2 relative to the first electrode plate 1 is ± 1 μm, and the distance b is calculated to be 1.2 μm by substituting the above formula, and in order to further widen the fluctuation range of the first electrode plate 1, it is preferable that the distance b is not less than 2 μm; in another embodiment, when the line width deviation of the first electrode plate 1 is ± 0.8 μm; the line width deviation of the second electrode plate 2 is +/-0.8 mu m; the offset of the second electrode plate 2 relative to the first electrode plate 1 is +/-0.8 μm, and the distance b is calculated to be 0.98 μm by substituting the offset into the formula, that is, under the influence of process deviation, when the line width of the first electrode plate 1 fluctuates within 0.98 μm, the facing areas of the first electrode plate 1 and the second electrode plate 2 are both the area of the second electrode plate 2, so that the capacitance value is ensured to be fixed; to sum up, the distance b between the edge of the first electrode plate 1 and the edge of the second electrode plate 2 can be adjusted in advance as required, and when the line width deviation range of the first electrode plate 1, the line width deviation range of the second electrode plate 2 and the offset range of the second electrode plate 2 relative to the first electrode plate 1 are determined according to multiple processes, the width of the gap b can be calculated by substituting the formula; for the sake of understanding, the following description will be made by taking the gap b as an example of 2 μm or more.
In one embodiment, the second electrode plate 2 is configured as a rectangular structure as shown in fig. 1, the first electrode plate 1 is configured as a closed rectangular structure as shown in fig. 3, after the first electrode plate 1 and the second electrode plate 2 are stacked, the facing width a of the first electrode plate 1 and the second electrode plate 2 is a, and when the line width of the first electrode plate 1 fluctuates within the range of the gap b under the influence of process deviation, the facing width a of the first electrode plate 1 and the second electrode plate 2 is always a, so as to ensure that the capacitance value is fixed; specifically, when the line width of the first electrode plate 1 is increased relative to the last process under the influence of process deviation, at this time, as long as the increase amount of the line width is controlled to be less than or equal to 2 μm, the facing width of the first electrode plate 1 and the second electrode plate 2 is always a, so as to ensure that the capacitance value is fixed; similarly, when the first electrode plate 1 is under the influence of process deviation, the line width is reduced relative to the last process, and at this time, as long as the reduction amount of the line width is controlled to be less than or equal to 2 μm, the opposite widths of the first electrode plate 1 and the second electrode plate 2 are always a, so that the capacitance value is ensured to be fixed, the compensation effect of the pixel circuit on the threshold voltage is further ensured, and the image quality of the display device is improved.
In a preferred embodiment, as shown in fig. 5, 6, 7 and 8, the first electrode plate 1 and the second electrode plate 2 are both configured as a closed rectangular structure, so that when the first electrode plate 1 and the second electrode plate 2 are stacked, the facing area of the first electrode plate 1 and the second electrode plate 2 is the area of the second electrode plate 2; when the line width of the first electrode plate 1 fluctuates within the range of the gap b under the influence of process deviation, the facing area of the first electrode plate 1 and the second electrode plate 2 is always the area of the second electrode plate 2, so that the capacitance value is ensured to be fixed; specifically, when the line width of the first electrode plate 1 is increased relative to the last process under the influence of process deviation, at this time, as long as the increase amount of the line width is controlled to be less than or equal to 2 μm, the facing area of the first electrode plate 1 and the second electrode plate 2 is always the area of the second electrode plate 2, thereby ensuring that the capacitance value is fixed; similarly, when the first electrode plate 1 is under the influence of process deviation, the line width is reduced relative to the last process, and at this time, as long as the reduction amount of the line width is controlled to be less than or equal to 2 μm, the dead-facing area of the first electrode plate 1 and the second electrode plate 2 is always the area of the second electrode plate 2, so that the capacitance value is ensured to be fixed and unchanged, the compensation effect of the pixel circuit on the threshold voltage is further ensured, and the image quality of the display device is improved.
In an embodiment, as shown in fig. 1, the contact hole 3 in the present invention may be disposed at a central position of the second electrode plate 2, and further, in order to avoid an influence on the capacitance value due to a process deviation of the contact hole 3, preferably, a gap c is disposed between each edge of the contact hole 3 and an edge of the second electrode plate 2; specifically, the clearance c can be calculated according to the following formula;
wherein: e is the line width deviation of the contact hole 3; f is the line width deviation of the second electrode plate 2; g is the offset of the contact hole 3 with respect to the second electrode plate 2.
Exemplarily, when the line width deviation of the contact hole 3 is ± 1 μm; the line width deviation of the second electrode plate 2 is +/-1 mu m; the offset of the contact hole 3 relative to the second electrode plate 2 is ± 1 μm, and the gap c is calculated to be 1.2 μm by substituting the above formula, and preferably, the gap c is not less than 2 μm in order to further expand the fluctuation range of the contact hole 3; in another embodiment, when the line width deviation of the contact hole 3 is ± 0.8 μm; the line width deviation of the second electrode plate 2 is +/-0.8 mu m; the offset of the contact hole 3 relative to the second electrode plate 2 is +/-0.8 μm, the offset is substituted into the formula, and the distance b is calculated to be 0.98 μm, namely, under the influence of process deviation, when the line width of the contact hole 3 fluctuates within 0.98 μm, the facing areas of the first electrode plate 1 and the second electrode plate 2 are the areas of the second electrode plate 2, so that the capacitance value is ensured to be fixed; in summary, the gap c between the edge of the contact hole 3 and the edge of the second electrode plate 2 can be adjusted in advance as required, and when the line width deviation range of the contact hole 3, the line width deviation range of the second electrode plate 2 and the offset range of the contact hole 3 relative to the second electrode plate 2 are determined according to multiple processes, the width of the gap c can be calculated by substituting the above formula; for the sake of understanding, the following example will be given with the gap c being 2 μm or more.
In a preferred embodiment, in order to reduce the occupied area of the second contact hole 3 for the second electrode plate 2 and further increase the facing area of the first electrode plate 1 and the second electrode plate 2, as shown in fig. 5, the contact hole 3 is opened at the edge of the second electrode plate 2, and one side of the contact hole 3 coincides with one side of the second electrode plate 2; in this embodiment, the bottom edge of the contact hole 3 coincides with the bottom edge of the second battery panel, that is, an installation cavity with an opening is formed in the direction of the second electrode plate 2 close to the bottom edge, and the contact hole 3 is formed in the installation cavity, so that the first electrode plate 1 is leaked out and is used for being electrically connected with an external metal wire; further, in order to avoid the influence on the capacitance value due to the process deviation of the contact hole 3, it is preferable that a gap d is formed between the edge of the contact hole 3 and the edge of the first electrode plate 1; specifically, the gap d can be calculated according to the following formula;
wherein: h is the line width deviation of the contact hole 3; i is a line width deviation of the first electrode plate 1; j is an offset of the contact hole 3 with respect to the first electrode plate 1.
Exemplarily, when the line width deviation of the contact hole 3 is ± 1 μm; the line width deviation of the first electrode plate 1 is +/-1 mu m; the offset of the contact hole 3 relative to the first electrode plate 1 is ± 1 μm, and the gap c is calculated to be 1.2 μm by substituting the above formula, and in order to further widen the fluctuation range of the contact hole 3, it is preferable that the gap d is 2 μm or more; in another embodiment, when the line width deviation of the contact hole 3 is ± 0.8 μm; the line width deviation of the first electrode plate 1 is +/-0.8 mu m; the offset of the contact hole 3 relative to the first electrode plate 1 is +/-0.8 μm, the offset is substituted into the formula, and the distance d is calculated to be 0.98 μm, namely, under the influence of process deviation, when the line width of the contact hole 3 fluctuates within 0.98 μm, the facing areas of the first electrode plate 1 and the second electrode plate 2 are the areas of the second electrode plate 2, so that the capacitance value is ensured to be fixed; in summary, the gap d between the edge of the contact hole 3 and the edge of the first electrode plate 1 can be adjusted in advance as required, and after the line width deviation range of the contact hole 3, the line width deviation range of the first electrode plate 1 and the offset range of the contact hole 3 relative to the first electrode plate 1 are determined according to a plurality of processes, the width of the gap d can be calculated by substituting the above formula.
According to one embodiment of the invention, a substrate 6, an isolation layer 7, a trench 8 and a gate insulation layer 9 for wrapping the trench 8 are sequentially stacked below the first electrode plate 1 from bottom to top; specifically, as shown in fig. 1 and 5, the trench 8 is configured like an H-shaped structure, wherein a horizontal segment is disposed below the second electrode plate 2 and is bent into a rectangular structure.
As shown in fig. 9, a second aspect of the present application provides a pixel circuit including: the capacitive structure 10 of any one of the preceding claims; specifically, as shown in fig. 9, in this embodiment, the pixel circuit is a 7T1C pixel circuit, and specifically includes: as the pixel circuit body and the capacitor structure 10 in the above embodiment connected to the pixel circuit body are shifted in time, the controller will provide three signals to the pixel circuit in each period, that is, the pixel circuit will correspondingly form three phases, wherein the first phase is a reset phase, in which only the T1 switch needs to be turned on, and at this time, the Vinit signal is transmitted to the capacitor structure 10 through the T1 switch; then, when the reset is completed, a second stage is started correspondingly, in which the T1 switch needs to be turned off, and the T2 switch, the T3 switch and the T4 switch are turned on correspondingly, at this time, the VData signal is first subjected to voltage writing, and then the written voltage is transmitted to the capacitor structure 10 along the T4 switch, the T3 switch and the T2 switch in sequence, according to the analysis process, the capacitance value of the capacitor structure 10 affects the voltage writing amount of the VData signal in the writing process, so as to affect the gate terminal voltage value of the T3 switch, that is, the capacitance value change of the capacitor structure 10 directly fluctuates the terminal voltage of the gate of the T3 switch; specifically, in the prior art, under the influence of process deviation, the first electrode plate 1 will fluctuate, which causes a change in the facing area between the first electrode plate 1 and the second electrode plate 2, thereby causing a change in the capacitance value of the capacitor structure 10, for example, when under the influence of process deviation, the first electrode plate 1 is shifted toward a direction of reduction compared with the first electrode plate 1 prepared by the foregoing process, thereby causing a reduction in the facing area between the first electrode plate 1 and the second electrode plate 2, and further causing a reduction in the capacitance value of the capacitor structure 10, at this time, a reduction in the voltage writing amount of the VData signal in the writing process is caused, thereby causing a difference in display between different pixels, and further directly affecting the compensation effect of the pixel circuit on the threshold voltage, resulting in a poor image quality of the display device.
The technical problem can be effectively solved by adopting the scheme of the application, and particularly, under the influence of process deviation, when the line width of the first electrode plate 1 fluctuates within the range of the gap b, the opposite areas of the first electrode plate 1 and the second electrode plate 2 are the areas of the second electrode plate 2, so that the capacitance value is ensured to be fixed, the compensation effect of the pixel circuit on the threshold voltage is ensured, and the image quality of the display device is improved; illustratively, when the line width of the first electrode plate 1 is reduced relative to the last process under the influence of process deviation, at this time, as long as the reduction amount of the line width is controlled to be less than or equal to 2 μm, the facing area of the first electrode plate 1 and the second electrode plate 2 will always be the area of the second electrode plate 2, so as to ensure that the capacitance value is fixed and unchanged, further ensure the compensation effect of the pixel circuit on the threshold voltage, and improve the image quality of the display device.
A third aspect of the present application provides an AMOLED display device, comprising: such as the pixel circuits described above.
In a fourth aspect, the present application provides a method for manufacturing a capacitor structure 10, the method including:
preparing a substrate 6;
depositing an insulating layer 7 on the outer side of the substrate 6 by a chemical deposition method;
coating the polysilicon on the outer side of the insulating layer by adopting a sputtering mode, and patterning to form a groove 8;
coating and forming a gate insulating layer 9 on the outer side of the trench 8;
forming a PR glue layer as a mask at an outer side of the gate insulating layer 9 through an exposure and development process;
then, printing liquid drops for forming the first electrode plate 1 to the outer side of the gate insulating layer 9 through a PR layer in an ink-jet printing mode, forming the first electrode plate 1 after low-temperature curing, and removing the PR glue layer;
coating an electrolyte layer 4 on the outer side of the first electrode plate 1;
forming a PR glue layer on the outer layer of the electrolyte layer 4 through exposure and development processes to be used as a mask;
wherein, the gap b between the edge of the PR glue layer and the edge of the first electrode plate 1 is more than or equal to 2 μm;
then, printing liquid drops for forming the second electrode plate 2 to the outer side of the electrolyte layer 4 through the PR layer in an ink-jet printing mode, forming the second electrode plate 2 after low-temperature curing, and removing the PR glue layer;
the outer side of the second electrode plate 2 is coated with an internal dielectric layer 5;
a contact hole 3 is formed at a position, close to the edge, of the internal dielectric layer 5, wherein the bottom end of the contact hole 3 sequentially penetrates through the internal dielectric layer 5, the second electrode plate 2 and the electrolyte layer 4, and is communicated with the first electrode plate 1 so as to be used for electrically connecting an external metal wire with the first electrode plate 1;
specifically, the bottom side of the contact hole 3 coincides with the bottom plate of the internal dielectric layer 5, a gap c between each edge of the contact hole 3 and the second electrode plate 2 is greater than or equal to 2 μm, and a gap d between the edge of the contact hole 3 and the first electrode plate 1 is greater than or equal to 2 μm.
In the prior art, in the above processing process, even on the same substrate 6, the line widths of the PR glue layers are different due to the influence of process deviation, so that the line widths of the prepared first electrode plate 1 are different, and further the dead-against area between the first electrode plate 1 and the second electrode plate 2 is different, and finally the capacitance value of the prepared capacitor structure 10 is changed; the technical problem can be effectively solved by adopting the scheme of the application, and particularly, under the influence of process deviation, when the line width of the PR glue layer fluctuates within the range of the gap b, the facing areas of the first electrode plate 1 and the second electrode plate 2 are the areas of the second electrode plate 2, so that the capacitance value is ensured to be fixed, the compensation effect of the pixel circuit on the threshold voltage is ensured, and the image quality of the display device is improved; exemplarily, when the line width of the PR adhesive layer is under the influence of process deviation, the line width is reduced relative to the last process, and at this time, as long as the reduction amount of the line width is controlled to be less than or equal to 2 μm, the facing area of the first electrode plate 1 and the second electrode plate 2 will always be the area of the second electrode plate 2, so as to ensure that the capacitance value is fixed and unchanged, further ensure the compensation effect of the pixel circuit on the threshold voltage, and improve the image quality of the display device.
The embodiments in the present description are all described in a progressive manner, and some of the embodiments are mainly described as different from other embodiments, and the same and similar parts among the embodiments can be referred to each other.
It is noted that in the description and claims of the present application and in the above-mentioned drawings, relational terms such as "first" and "second", and the like, are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application described herein are, for example, capable of operation in sequences other than those illustrated or otherwise described herein.
Also, the terms "comprises," "comprising," and "having," as well as any variations thereof or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements explicitly listed, but may include other steps or elements not explicitly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
Spatially relative terms, such as "above … …," "above … …," "above … …," "above," and the like, may be used herein for ease of description to describe one device or feature's spatial relationship to another device or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if a device in the figures is turned over, devices described as "above" or "on" other devices or configurations would then be oriented "below" or "under" the other devices or configurations. Thus, the exemplary term "above … …" can include both an orientation of "above … …" and "below … …". The device may be otherwise variously oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
The foregoing are merely exemplary embodiments of the present application and are presented to enable those skilled in the art to understand and practice the present application. Various modifications and changes to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present application shall be included in the protection scope of the present application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (15)
1. A capacitive structure, comprising: follow supreme first electrode board (1) and the second electrode board (2) that stack gradually the setting from down, the orthographic projection of second electrode board (2) on base (6) falls in the orthographic projection of first electrode board (1) on base (6), just every edge of second electrode board (2) and corresponding all have clearance b between every edge of first electrode board (1), the structural contact hole (3) that are used for leaking of first electrode board (1) that still offer of electric capacity.
2. A capacitor structure according to claim 1, characterized in that said first electrode plate (1) and said second electrode plate (2) are each provided as a closed rectangular structure.
3. A capacitor structure according to claim 1, characterized in that the contact hole (3) opens at the edge of the second electrode plate (2) and one of the sides of the contact hole (3) coincides with one of the sides of the second electrode plate (2).
4. A capacitor structure according to claim 3, characterized in that there is a gap c between each edge of the contact hole (3) and the edge of the second electrode plate (2).
5. A capacitor structure according to claim 4, characterized in that there is a gap d between the edge of the contact hole (3) and the edge of the first electrode plate (1).
6. A capacitor structure according to claim 1, wherein said gap b is determined according to the formula:
wherein: x is the line width deviation of the first electrode plate (1); y is the line width deviation of the second electrode plate (2); z is the offset of the second electrode plate (2) relative to the first electrode plate (1).
7. A capacitor structure according to claim 4, characterized in that said gap c is determined according to the following formula:
wherein: e is the line width deviation of the contact hole (3); f is the line width deviation of the second electrode plate (2); g is the offset of the contact hole (3) relative to the second electrode plate (2).
8. A capacitor structure according to claim 5, characterized in that said gap d is determined according to the following formula:
wherein: h is the line width deviation of the contact hole (3); i is the line width deviation of the first electrode plate (1); j is the offset of the contact hole (3) relative to the first electrode plate (1).
9. The capacitive structure of claim 6, wherein the gap b is 2 μm or more.
10. The capacitive structure of claim 7 wherein the gap c is 2 μm or greater.
11. The capacitive structure of claim 8, wherein the gap d is 2 μm or greater.
12. The capacitive structure of claim 1, further comprising: the contact hole is used for wrapping an electrolyte layer (4) of the first electrode plate (1) and wrapping an internal dielectric layer (5) of the second electrode plate (2), one end of the contact hole (3) penetrates through the internal dielectric layer (5), the second electrode plate (2) and the electrolyte layer (4) in sequence and is communicated with the first electrode plate (1).
13. The capacitor structure according to claim 12, wherein a substrate (6), an insulating layer (7), a trench (8) and a gate insulating layer (9) for wrapping the trench (8) are sequentially stacked below the first electrode plate (1) from bottom to top.
14. A pixel circuit, comprising: the capacitive structure of any one of claims 1-13.
15. An AMOLED display device, comprising: the pixel circuit of claim 14.
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| US20140374740A1 (en) * | 2013-06-24 | 2014-12-25 | Tianma Micro-Electronics Co., Ltd. | Oxide semiconductor tft array substrate and method for forming the same |
| CN108598127A (en) * | 2018-05-14 | 2018-09-28 | 昆山国显光电有限公司 | Drive substrate and display panel |
| CN111968573A (en) * | 2020-08-31 | 2020-11-20 | 合肥维信诺科技有限公司 | Pixel circuit and display device |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140374740A1 (en) * | 2013-06-24 | 2014-12-25 | Tianma Micro-Electronics Co., Ltd. | Oxide semiconductor tft array substrate and method for forming the same |
| CN108598127A (en) * | 2018-05-14 | 2018-09-28 | 昆山国显光电有限公司 | Drive substrate and display panel |
| CN111968573A (en) * | 2020-08-31 | 2020-11-20 | 合肥维信诺科技有限公司 | Pixel circuit and display device |
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