CN113031862A - Storage system for controlling SATA (Serial advanced technology attachment) disk based on NVME (network video and management entity) protocol - Google Patents
Storage system for controlling SATA (Serial advanced technology attachment) disk based on NVME (network video and management entity) protocol Download PDFInfo
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Abstract
The invention discloses a storage system for controlling SATA disks based on NVME protocol, which comprises a processor and an FPGA module, wherein the processor is connected with the FPGA module through a PCIE bus, the processor is hung with a first memory, the FPGA module is hung with a second memory and an SATA storage array, and the SATA storage array comprises a plurality of SATA disks. The processor sends a read-write instruction to the FPGA module and controls the FPGA module to read and write data to the SATA storage array. The storage system combines the high performance of the NVME protocol and the easy extensibility of the SATA protocol, solves the problem that the SATA interface supported by the existing processor is not enough, realizes continuous high-bandwidth reading and writing of the storage system, can flexibly modify the number and the safety level of the SATA disks, and has low power consumption, low cost, good stability of high and low temperature working environments and good compatibility.
Description
Technical Field
The invention belongs to the technical field of data storage, and particularly relates to a storage system for controlling a SATA (serial advanced technology attachment) disk based on an NVME (network video and management entity) protocol.
Background
With the rapid development of flash memory technology, field programmable logic array technology and SoC technology, a memory system in the field of computer embedding is gradually built. Wherein, the solid state disk composed of the control unit and the flash memory becomes one of the core components of the storage system. Currently, the SATA solid state disk follows the SATA protocol, the highest theoretical bandwidth is 600MB/s, and the AHCI protocol is used at the software application layer. When a high-performance storage system is built, a plurality of SATA disks are required, and a plurality of SATA interfaces are required. With the introduction and development of the NVMe specification, compared with the AHCI protocol, the NVMe specification makes full use of the low latency, high performance and parallelism of the PCIE channel, and greatly improves the read-write performance of the solid state disk.
At present, a storage system in the prior art adopts the following technical scheme: 1) the storage system based on the embedded processor and the SATA disk only supports a small number of SATA interfaces, the SATA interfaces are generally used as system disks, the embedded processor is limited by the number of the SATA interfaces and the type of a protocol, the delay is large, and the speed is low; 2) the storage system based on the embedded processor, the PCIE-to-SATA bridge and the SATA disk has relatively poor safety and flexibility; 3) based on an embedded processor, a PCIE exchange and an NVMe disk storage system, the existing NVMe disk on the market is easy to be damaged when falling at a high temperature and when being at a low temperature. The technical scheme is difficult to be suitable for the requirements of high standard, high customization and expandability of the storage system in the field of security and confidentiality.
Disclosure of Invention
The invention aims to provide a storage system for controlling the SATA disk based on the NVME protocol, which combines the high performance of the NVME protocol and the easy expandability of the SATA protocol, solves the problem that the SATA interface is not sufficiently supported by the existing processor, realizes continuous high-bandwidth reading and writing of the storage system, can flexibly modify the number of the SATA disks, and has the advantages of low power consumption, low cost, good stability of high-temperature and low-temperature working environments and good compatibility.
In order to achieve the purpose, the technical scheme adopted by the invention is as follows:
the invention provides a storage system for controlling SATA disks based on NVME protocol, which comprises a processor and an FPGA module, wherein the processor is connected with the FPGA module through a PCIE bus, the processor is hung with a first memory, the FPGA module is hung with a second memory and an SATA storage array, the SATA storage array comprises a plurality of SATA disks, and the NVME protocol comprises the following steps:
the processor is used for sending a read-write instruction to the FPGA module and managing data in the SATA storage array, wherein the read-write instruction is an NVME protocol instruction, when the read-write instruction is a write instruction, the processor receives first data through a first external interface and issues the write instruction and the first data to a first memory, and the FPGA module receives second data through a second external interface and issues the second data to a second memory; when the data is a read instruction, the processor issues the read instruction and the data in the SATA storage array to the first memory and externally sends the data in the first memory through the first external interface, and the FPGA module issues the data in the SATA storage array to the second memory and externally sends the data in the second memory through the second external interface;
the FPGA module is used for acquiring a read-write instruction in the first memory, analyzing the read-write instruction into an SATA protocol instruction, and controlling data interaction between the SATA storage array and the first memory or the second memory according to the SATA protocol instruction;
the first memory is used for caching first data or data read out from the SATA storage array;
the second memory is used for caching second data or data read out from the SATA storage array;
and the SATA storage array is used for storing the first data and the second data.
Preferably, the processor is an embedded processor.
Preferably, the FPGA module includes a protocol conversion module for converting NVME protocol to SATA protocol and a RAID module for performing parallel read-write control on a plurality of SATA disks, the protocol conversion module is connected to the RAID module, and the RAID module is connected to each SATA disk.
Preferably, the FPGA module further includes an encryption/decryption module, the protocol conversion module, the encryption/decryption module and the RAID module are sequentially connected, and the encryption/decryption module is configured to encrypt and decrypt data in the SATA storage array.
Compared with the prior art, the invention has the beneficial effects that:
1) the NVME protocol is adopted to control the SATA storage array, so that the read-write speed of the SATA disk is higher than that of a pure SATA protocol storage system, and meanwhile, the high-speed parallel characteristic of the FPGA is utilized to enable the storage system to meet the high-performance requirement, if the continuous read-write performance is not lower than 6.4GB/s, the storage performance is high, the compatibility is good, the design is simple, and the fast use is convenient;
2) the SATA disk is adopted as a storage body, so that the characteristics of low power consumption and wide working temperature range of the SATA disk are reserved, the SATA disk can stably work at the temperature of between 55 ℃ below zero and 70 ℃, and the miniaturization of the board card is facilitated;
3) the FPGA module is used for controlling the SATA disks, the RAID model level can be modified randomly according to requirements, the encryption and decryption characteristics can be carried out, the safety is improved, the autonomous control is realized, and the system flexibility is high;
4) a plurality of SATA disks can be controlled by one PCIE interface, and the problem that the SATA interface supported by the existing processor is insufficient is solved.
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FIG. 1 is a schematic diagram of the overall structure of the storage system of the present invention;
fig. 2 is a schematic diagram of the internal structure of the FPGA module of the present invention.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It is to be noted that, unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the present application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
As shown in fig. 1-2, a storage system for controlling SATA disks based on NVME protocol includes a processor and an FPGA module, where the processor is connected to the FPGA module through a PCIE bus, the processor is mounted with a first memory, the FPGA module is mounted with a second memory and a SATA storage array, and the SATA storage array includes a plurality of SATA disks, where:
the processor is used for sending a read-write instruction to the FPGA module and managing data in the SATA storage array, wherein the read-write instruction is an NVME protocol instruction, when the read-write instruction is a write instruction, the processor receives first data through a first external interface and issues the write instruction and the first data to a first memory, and the FPGA module receives second data through a second external interface and issues the second data to a second memory; when the data is a read instruction, the processor issues the read instruction and the data in the SATA storage array to the first memory and externally sends the data in the first memory through the first external interface, and the FPGA module issues the data in the SATA storage array to the second memory and externally sends the data in the second memory through the second external interface;
the FPGA module is used for acquiring a read-write instruction in the first memory, analyzing the read-write instruction into an SATA protocol instruction, and controlling data interaction between the SATA storage array and the first memory or the second memory according to the SATA protocol instruction;
the first memory is used for caching first data or data read out from the SATA storage array;
the second memory is used for caching second data or data read out from the SATA storage array;
and the SATA storage array is used for storing the first data and the second data.
The SATA disk is controlled and managed by the FPGA module and is read and written, under the control of the FPGA module, data interaction between the first memory and the second memory and the SATA storage array can be realized, and continuous high-bandwidth reading and writing of the storage system are realized. The processor is provided with a file system, and can manage data in the SATA storage array in a standard file system mode, so that the use is convenient. Meanwhile, the processor can acquire the number, the initialization state and the capacity information of the SATA disks.
The storage system uses the NVME protocol to control the SATA storage array, greatly optimizes software design and data flow, enables the read-write speed of the SATA disk to be higher than that of a pure SATA protocol storage system, simultaneously utilizes the high-speed parallel characteristic of the FPGA to enable the storage system to meet the high-performance requirement, enables the continuous read-write performance to be not lower than 6.4GB/s, is high in storage performance, good in compatibility and convenient to rapidly put into use. Related components of the SATA system can be avoided, and power consumption and hardware cost are greatly reduced. Meanwhile, the SATA disk is used as a storage body, so that the characteristics of low power consumption and wide working temperature range of the SATA disk are reserved, for example, the SATA disk can stably work in an environment of-55 ℃ to +70 ℃, and the miniaturization of the board card is facilitated. The method is convenient for realizing that one PCIE interface realizes control of a plurality of SATA disks, and solves the problem that the prior processor does not support enough SATA interfaces.
In one embodiment, the processor is an embedded processor.
The embedded processor has the advantages of higher working stability, lower power consumption, strong environmental adaptability and good integration level, and is suitable for the field of security and confidentiality.
In one embodiment, the FPGA module includes a protocol conversion module for converting NVME protocol to SATA protocol and a RAID module for performing parallel read-write control on a plurality of SATA disks, the protocol conversion module is connected to the RAID module, and the RAID module is connected to each SATA disk.
As shown in fig. 2, the protocol conversion module can convert the read-write command issued by the processor, i.e., the NVME protocol command, into the SATA protocol command, so as to control the SATA storage array using the NVME protocol, so that the read-write speed of the SATA disk is higher than that of a pure SATA protocol storage system, and the software design is simpler. The RAID module is in the prior art, is used for controlling parallel reading and writing of a plurality of SATA disks, realizes autonomous control, comprises a plurality of different levels, such as RAID0, RAID1, RAID5, RAID10, RAID50 and the like, can respectively provide different speeds, safety and cost performance, and can select proper RAID level according to actual conditions to meet the requirements of users on the availability, performance and capacity of a storage system.
In an embodiment, the FPGA module further includes an encryption/decryption module, the protocol conversion module, the encryption/decryption module and the RAID module are sequentially connected, and the encryption/decryption module is configured to encrypt and decrypt data in the SATA storage array.
The FPGA module is provided with an encryption and decryption module, for example, when the processor issues a write instruction, the FPGA module analyzes and recombines the NVME protocol instruction into an SATA protocol instruction. The data flow is FIFO formula interface among the common FPGA, can increase encryption and decryption module here, carries out SATA storage array read-write after encrypting the decryption through the FPGA module to data again, further improves the security height and system flexibility to can avoid handling NVME agreement or SATA agreement, improve the operating efficiency.
The working flow of the storage system is as follows:
the external data writing process in the SATA storage array comprises the following steps:
1) the FPGA module receives the second data and caches the second data in a second memory, and the data in the second memory is written into the SATA storage array through the FPGA module.
Specifically, the processor calls a driving module of the FPGA module through a character device (such as a keyboard, a mouse, and the like) to notify the FPGA module of starting recording, that is, the FPGA module starts receiving second data from a second external interface, such as a high-speed serial interface, and carries the second data to a second memory for caching, after the caching is completed, the FPGA module reports an interrupt signal to notify the processor, and after the processor receives the interrupt signal, the processor writes a file, and a write address is an address of the second memory. The processor issues a write instruction to the first memory, the write instruction is an NVME protocol instruction, the FPGA module obtains the write instruction in the first memory and then resolves the write instruction into an SATA protocol instruction, data is conveyed from the second memory according to source address information in the SATA protocol instruction, the conveyed data in the second memory is stored into a sector of an appointed SATA storage array according to target address information in the SATA protocol instruction, after storage is completed, the FPGA module returns completion information to the processor, and after the processor checks the completion information, operation is finished.
2) And the processor receives the first data, caches the first data in the first memory, and then informs the FPGA module to write the data in the first memory into the SATA storage array.
Specifically, the processor receives first data (such as network data) through the first external interface, caches the first data in the first memory, reports an interrupt signal to notify the processor after caching is completed, and writes a file after the processor receives the interrupt signal, wherein the write address is an address of the first memory. And the processor sends a write instruction to the FPGA module, wherein the write instruction is an NVME protocol instruction. The FPGA module obtains a write instruction in the first memory and then resolves the write instruction into an SATA protocol instruction, carries data from the first memory according to source address information in the SATA protocol instruction, and stores the carried data in the first memory into a sector of the appointed SATA storage array according to target address information in the SATA protocol instruction. And after the storage is finished, the FPGA module returns the finishing information to the processor, and the processor finishes the operation after checking the finishing information.
Reading data in the SATA storage array to the outside:
1) the processor controls the FPGA module to read data in the SATA storage array to the second memory, and the FPGA module sends the data in the second memory to the second external interface of the FPGA module.
Specifically, the processor calls a driving module of the FPGA module through a character device (such as a keyboard, a mouse, and the like) to notify the FPGA module of starting a playback request. The processor issues a read instruction to the first memory, the read instruction is an NVME protocol instruction, the FPGA module obtains the read instruction in the first memory and then resolves the read instruction into an SATA protocol instruction, data is conveyed from the SATA storage array according to source address information in the SATA protocol instruction, the conveyed data in the SATA storage array is stored into the second memory according to target address information in the SATA protocol instruction, the data in the second memory is sent out through a second external interface of the FPGA module, and an interrupt signal is generated to inform the processor of finishing reading of the data.
2) The processor controls the FPGA module to read data in the SATA storage array to the first memory and sends the data in the first memory through a first external interface of the processor.
Specifically, the processor issues a read instruction to the first memory, the read instruction is an NVME protocol instruction, the FPGA module obtains the read instruction in the first memory and then resolves the read instruction into an SATA protocol instruction, carries data from the SATA storage array according to source address information in the SATA protocol instruction, stores the carried data in the SATA storage array into the first memory according to target address information in the SATA protocol instruction, sends the data in the first memory to an external device such as an opposite-end PC through a first external interface (such as a network interface) of the processor, and reports an interrupt signal to notify the processor after the write-in is completed.
Further, when the power supply is powered on, the processor loads a driving module of the FPGA module, initializes the FPGA module, and creates an admin queue and an IO queue in the FPGA module according to a read-write instruction of the processor:
the processor initializes the NVME register of the FPGA module and configures the AQA, the ASQ and the ACQ.
ADMIN queuing: updating a DB ring of the FPGA module in the first memory, and then refreshing SQ0 TDBL; the FPGA module detects that the value of SQ0TDBL changes, and starts reading ADMIN _ SQ information to the first memory; after receiving the feedback data, the FPGA module analyzes the data content to complete an IDENTIFY command, a create io sq command and a create io cq command, namely caching the physical addresses of the io sq and the io cq; ADMIN _ CQ is updated and an interrupt signal is uploaded to inform the processor that the process is complete.
IO queue: updating a DB ring of the FPGA module in the first memory, and then refreshing SQ1 TDBL; the FPGA module detects that the value of SQ1TDBL changes, and initiates reading IO _ SQ information to the first memory; after receiving the feedback data, the FPGA module analyzes the data content and completes DMA reading and DMA writing operations, namely the interaction realization of the first memory data and the SATA data is realized; the IO _ CQ is updated and an interrupt signal is uploaded to inform the processor that the processing is completed.
DMA read: extracting a reading address SADR, a SATA disk writing address DADR and a data length LEN of first memory data from IO _ SQ information; the FPGA module reads the data volume of the data length LEN to the reading address SADR of the first memory data and writes the data volume into each SATA disk in a rotating mode according to the data volume of 4 KB; the SATA disk automatically writes the received data to the SATA disk write address DADR, thereby completing the DMA read operation.
DMA write: extracting a write address DADR, a SATA disk read address SADR and a data length LEN of first memory data from IO _ SQ information; the FPGA module sends the data length LEN to each SATA disk; the SATA disk automatically reads the data volume of the data length LEN from the SATA disk read address SADR, sequentially synthesizes the received data according to a 4KB rotation mode, and writes the synthesized data into the write address DADR position of the first memory data, thereby completing the DMA write operation.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above embodiments only express the more specific and detailed embodiments described in the present application, but not be understood as the limitation of the claims of the present application. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (4)
1. A storage system based on NVME protocol control SATA disk, its characterized in that: the storage system based on NVME protocol control SATA disk comprises a processor and an FPGA module, wherein the processor is connected with the FPGA module through a PCIE bus, the processor is hung with a first memory, the FPGA module is hung with a second memory and a SATA storage array, the SATA storage array comprises a plurality of SATA disks, wherein:
the processor is used for sending a read-write instruction to the FPGA module and managing data in the SATA storage array, wherein the read-write instruction is an NVME protocol instruction, when the read-write instruction is a write instruction, the processor receives first data through a first external interface and issues the write instruction and the first data to the first memory, and the FPGA module receives second data through a second external interface and issues the second data to the second memory; when the data in the SATA storage array is a read instruction, the processor issues the read instruction and the data in the SATA storage array to the first memory and externally sends the data in the first memory through the first external interface, and the FPGA module issues the data in the SATA storage array to the second memory and externally sends the data in the second memory through the second external interface;
the FPGA module is used for acquiring a read-write instruction in the first memory, analyzing the read-write instruction into an SATA protocol instruction, and controlling data interaction between the SATA storage array and the first memory or the second memory according to the SATA protocol instruction;
the first memory is used for caching the first data or the data read out from the SATA storage array;
the second memory is used for caching the second data or the data read out from the SATA storage array;
the SATA storage array is used for storing the first data and the second data.
2. The NVME protocol-based SATA disk storage system according to claim 1, wherein: the processor is an embedded processor.
3. The NVME protocol-based SATA disk storage system according to claim 1, wherein: the FPGA module comprises a protocol conversion module for converting NVME protocol into SATA protocol and an RAID module for performing parallel read-write control on the SATA disks, the protocol conversion module is connected with the RAID module, and the RAID module is connected with the SATA disks.
4. The NVME protocol-controlled SATA disk-based storage system according to claim 3, wherein: the FPGA module further comprises an encryption and decryption module, the protocol conversion module, the encryption and decryption module and the RAID module are sequentially connected, and the encryption and decryption module is used for carrying out encryption and decryption processing on data in the SATA storage array.
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