CN113007124B - OLT equipment fan speed regulation circuit and method - Google Patents
OLT equipment fan speed regulation circuit and method Download PDFInfo
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- CN113007124B CN113007124B CN202110347266.3A CN202110347266A CN113007124B CN 113007124 B CN113007124 B CN 113007124B CN 202110347266 A CN202110347266 A CN 202110347266A CN 113007124 B CN113007124 B CN 113007124B
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F04—POSITIVE - DISPLACEMENT MACHINES FOR LIQUIDS; PUMPS FOR LIQUIDS OR ELASTIC FLUIDS
- F04D—NON-POSITIVE-DISPLACEMENT PUMPS
- F04D27/00—Control, e.g. regulation, of pumps, pumping installations or pumping systems specially adapted for elastic fluids
- F04D27/004—Control, e.g. regulation, of pumps, pumping installations or pumping systems specially adapted for elastic fluids by varying driving speed
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F05—INDEXING SCHEMES RELATING TO ENGINES OR PUMPS IN VARIOUS SUBCLASSES OF CLASSES F01-F04
- F05D—INDEXING SCHEME FOR ASPECTS RELATING TO NON-POSITIVE-DISPLACEMENT MACHINES OR ENGINES, GAS-TURBINES OR JET-PROPULSION PLANTS
- F05D2270/00—Control
- F05D2270/30—Control parameters, e.g. input parameters
- F05D2270/303—Temperature
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Abstract
The invention discloses a fan speed regulation circuit and a method of OLT equipment, wherein the circuit comprises a CPU, a temperature chip, a CPLD module and a PFM voltage regulation circuit; I2C signal processing codes and PFM waveform generating codes are written in the CPLD module in advance; the CPLD module is used as a main device to read the temperature value of the temperature chip and compare the temperature value with a target temperature so as to determine whether to output a PFM waveform; meanwhile, the CPLD is also used as slave equipment to receive control information from the CPU, so that the waveform frequency is adjusted according to the control information, and the PFM waveform is output; the PFM voltage regulating circuit regulates the output voltage value according to the PFM waveform output by the CPLD, and supplies the voltage to the fan to realize the speed regulation of the fan. The invention carries out fan speed regulation by the PFM waveform output by the CPLD, can carry out speed regulation by using a common fan, does not need to use an expensive speed-adjustable fan, greatly saves the fan cost and effectively reduces the fan noise.
Description
Technical Field
The invention relates to the technical field of fan speed regulation, in particular to a fan speed regulation circuit and method of OLT equipment.
Background
The optical access network is an access network using light as a transmission medium, and replaces a copper wire for accessing each home. The Optical Network Unit (ODN) is composed of an OLT (Optical Line Terminal), an ONU (Optical Network Unit) and an ODN (Optical Distribution Network), wherein the OLT is a core component of an Optical access Network, is equivalent to a switch or a router in a traditional communication Network and is also a multi-service providing platform. For one OLT device, the service volume and the bandwidth flow are very large, the internal circuit is complex, and a PON chip, a switching chip, a CPU and the like used in the device are all devices with high power consumption and large heat productivity, the power consumption of one OLT is generally more than 50W or even can reach 150W, the OLT device is a single OLT device, which is different from an OLT cabinet machine, for the large heat productivity device, the heat dissipation is very important, the heat dissipation of the OLT basically can only be realized by a fan on the device, 2 schemes are provided for the heat dissipation of the existing OLT fan, one scheme is that a speed-adjustable fan is used, the rotating speed of the fan can be adjusted according to different requirements, the fan is expensive, the single fan is more than 5 expensive than a common fan, and the price is more than 15-25 expensive and is not economic enough for 3-5 fans of the OLT device; one is to use a common fan to control full on or full off, the scheme uses a common high-speed fan without a fan speed regulation function, the fan is low in price, but can only be switched on and off to meet various requirements, and noise is large, so that the service life of the fan is influenced. Therefore, if the ordinary fan can be used for speed regulation control, the purposes of economy, cost saving and meeting the requirements of different scenes can be achieved.
Disclosure of Invention
In view of the above, in order to solve the above problems in the prior art, the present invention provides a fan speed adjusting circuit and method for an OLT device, which can meet the requirements of the OLT device for the rotating speeds of fans with different temperature reductions, and can effectively reduce the noise of the fans.
The invention solves the problems through the following technical means:
on one hand, the invention provides a fan speed regulation circuit of OLT equipment, which comprises a CPU, a temperature chip, a CPLD module and a PFM voltage regulation circuit; wherein, I2C signal processing codes and PFM waveform generating codes are written in the CPLD module in advance;
the temperature chip is used for acquiring the temperature of the OLT equipment;
the CPU is used for reading the temperature value of the temperature chip, and outputting I2C register addresses representing different temperature values to the CPLD module for processing through I2C after internal processing;
the CPLD module is used as an I2C signal with temperature information sent by an I2C slave equipment processing CPU, the waveform frequency is adjusted according to an I2C signal, PFM waveforms with different frequencies are further output, meanwhile, the CPLD module is also used as I2C master equipment for directly reading the temperature value of a temperature chip and is compared with a target value preset in the CPLD module, when the read value is larger than the target value, the CPLD module is not controlled by the I2C signal of the CPU, the CPLD module carries out internal control, directly outputs a high level instead of the PFM waveform, and when waiting for the temperature value read next time, the CPLD module is controlled by the I2C signal of the CPU and outputs the PFM waveforms with different frequencies;
the PFM voltage regulating circuit is used for regulating an output voltage value according to a PFM waveform output by the CPLD module and supplying the voltage value to the fan to realize the speed regulation of the fan; or the full-speed opening of the fan is controlled according to the high level output by the CPLD module.
Further, the outputting of the PFM waveform by the CPLD module specifically includes the following steps:
the CPLD module can compile different registers internally, each register stores different constants, when the CPLD module receives an I2C register address from the CPU, the CPLD module correspondingly extracts the pre-compiled register internal constant value, and then sends the value to the PFM processing code to set the low level holding time of each waveform period, thereby outputting different PFM waveforms;
and simultaneously, the CPLD module directly reads the temperature value of the temperature chip once at regular intervals, compares the temperature value with a preset target value in the CPLD module, judges that the temperature is overhigh when the read value is larger than the target value, is not controlled by an I2C signal of the CPU at the moment, performs internal control by the CPLD module, directly outputs a high level instead of a PFM waveform to ensure that the fan is started at full speed, and is controlled by an I2C signal of the CPU to output the PFM waveform when waiting for the temperature value of the temperature chip read next time to be smaller than the target value.
Further, the PFM voltage regulating circuit comprises a triode Q1, a MOS transistor Q3, an inductor L1, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C15, a capacitor C19, a resistor R36, a resistor R38, a resistor R39, a resistor R42, a resistor R47, a resistor R51 and a resistor R55;
the emitter of the transistor Q1 is grounded, the base of the transistor Q1 is connected to one end of a resistor R39 and one end of a resistor R38, the other end of the resistor R39 is connected to the CPLD module, the collector of the transistor Q1 is connected to one end of a resistor R42 and one end of a resistor R51, the other end of the resistor R42 is connected to the gate of the MOS transistor Q3, the other end of the resistor R3 is connected to the source of the MOS transistor Q3, one end of a capacitor C3 and one end of a capacitor C3, the other end of the capacitor C3 is connected to the other end of the capacitor C3 and grounded, the drain of the MOS transistor Q3 is connected to one end of an inductor L3, the other end of the inductor L3 is connected to one end of the resistor R3, one end of the capacitor C3 and one end of the capacitor C3, the other end of the resistor R3 is connected to the other end of the capacitor C3 and grounded, the other end of the capacitor C3 is connected to the other end of the capacitor C3, and grounded, respectively, The other end of the resistor R55 is connected with the positive pole of the FAN FAN1, and the negative pole of the FAN FAN1 is grounded.
Further, the PFM voltage regulating circuit specifically regulates the wind speed by the following steps:
the amplitude of the PFM waveform output by the CPLD module is 3.3V at most, if the MOS transistor Q3 is directly driven, the MOS transistor Q3 cannot be closed, and the voltage regulation cannot be realized, so that the amplitude of the PFM waveform is raised to 12V by the switching action of the triode Q1 and the pull-up of the resistor R51, and the PFM waveform is used for driving the MOS transistor Q3 by the R42;
according to the obtained amplitude-increased PFM waveform, the MOS tube Q3 is driven to be switched on and off, when the MOS tube Q3 is switched on, the inductor L1 is charged by a 12V power supply, when the MOS tube Q3 is switched off, the inductor L1 can discharge energy, the on-time is fixed, the off-time length of the MOS tube Q3 is adjusted, the energy storage and discharge proportion of the inductor L1 can be changed, filtering is performed through the capacitor C1, the capacitor C2 and the capacitor C3, and therefore stable and adjustable output voltage is achieved, the wind speed of the FAN FAN1 is changed according to the size of input voltage, and adjustable wind speed is achieved.
On the other hand, the invention also provides a fan speed regulating method of the OLT equipment, which comprises the following steps:
the temperature chip acquires the temperature of the OLT equipment;
the CPU reads the temperature value of the temperature chip, and outputs I2C register addresses representing different temperature values to the CPLD module for processing through I2C after internal processing;
I2C signal processing codes and PFM waveform generating codes are written in the CPLD module in advance; the CPLD module is used as an I2C slave device to process an I2C signal with temperature information sent by a CPU, the waveform frequency is adjusted according to an I2C signal, PFM waveforms with different frequencies are further output, meanwhile, the CPLD module is also used as an I2C master device to directly read the temperature value of a temperature chip and is compared with a target value preset in the CPLD module, when the read value is larger than the target value, the CPLD module is not controlled by the I2C signal of the CPU, the CPLD module is used for internal control, directly outputs a high level instead of the PFM waveform, and when waiting for the temperature value read next time, the CPLD module is controlled by the I2C signal of the CPU to output the PFM waveforms with different frequencies;
the PFM voltage regulating circuit regulates an output voltage value according to a PFM waveform output by the CPLD module, and supplies the voltage value to the fan to realize the speed regulation of the fan; or the full-speed opening of the fan is controlled according to the high level output by the CPLD module.
Further, the outputting of the PFM waveform by the CPLD module specifically includes the following steps:
the CPLD module can compile different registers internally, each register stores different constants, when the CPLD module receives an I2C register address from the CPU, the CPLD module correspondingly extracts the pre-compiled register internal constant value, and then sends the value to the PFM processing code to set the low level holding time of each waveform period, thereby outputting different PFM waveforms;
and simultaneously, the CPLD module directly reads the temperature value of the temperature chip once at regular intervals, compares the temperature value with a preset target value in the CPLD module, judges that the temperature is overhigh when the read value is larger than the target value, is not controlled by an I2C signal of the CPU at the moment, performs internal control by the CPLD module, directly outputs a high level instead of a PFM waveform to ensure that the fan is started at full speed, and is controlled by an I2C signal of the CPU to output the PFM waveform when waiting for the temperature value of the temperature chip read next time to be smaller than the target value.
Further, the PFM voltage regulating circuit comprises a triode Q1, a MOS transistor Q3, an inductor L1, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C15, a capacitor C19, a resistor R36, a resistor R38, a resistor R39, a resistor R42, a resistor R47, a resistor R51 and a resistor R55;
the emitter of the transistor Q1 is grounded, the base of the transistor Q1 is connected to one end of a resistor R39 and one end of a resistor R38, the other end of the resistor R39 is connected to the CPLD module, the collector of the transistor Q1 is connected to one end of a resistor R42 and one end of a resistor R51, the other end of the resistor R42 is connected to the gate of the MOS transistor Q3, the other end of the resistor R3 is connected to the source of the MOS transistor Q3, one end of a capacitor C3 and one end of a capacitor C3, the other end of the capacitor C3 is connected to the other end of the capacitor C3 and grounded, the drain of the MOS transistor Q3 is connected to one end of an inductor L3, the other end of the inductor L3 is connected to one end of the resistor R3, one end of the capacitor C3 and one end of the capacitor C3, the other end of the resistor R3 is connected to the other end of the capacitor C3 and grounded, the other end of the capacitor C3 is connected to the other end of the capacitor C3, and grounded, respectively, The other end of the resistor R55 is connected with the positive pole of the FAN FAN1, and the negative pole of the FAN FAN1 is grounded.
Further, the PFM voltage regulating circuit specifically regulates the wind speed by the following steps:
the amplitude of the PFM waveform output by the CPLD module is 3.3V at most, if the MOS transistor Q3 is directly driven, the MOS transistor Q3 cannot be closed, and the voltage regulation cannot be realized, so that the amplitude of the PFM waveform is raised to 12V by the switching action of the triode Q1 and the pull-up of the resistor R51, and the PFM waveform is used for driving the MOS transistor Q3 by the R42;
according to the obtained amplitude-increased PFM waveform, the MOS tube Q3 is driven to be switched on and off, when the MOS tube Q3 is switched on, the inductor L1 is charged by a 12V power supply, when the MOS tube Q3 is switched off, the inductor L1 can discharge energy, the on-time is fixed, the off-time length of the MOS tube Q3 is adjusted, the energy storage and discharge proportion of the inductor L1 can be changed, filtering is performed through the capacitor C1, the capacitor C2 and the capacitor C3, and therefore stable and adjustable output voltage is achieved, the wind speed of the FAN FAN1 is changed according to the size of input voltage, and adjustable wind speed is achieved.
Compared with the prior art, the invention has the beneficial effects that at least:
the fan speed is regulated through the PFM waveform output by the CPLD, the speed can be regulated by using a common fan without using an expensive speed-adjustable fan, the fan cost is greatly saved, compared with the traditional method that the common fan only has 2 states of a switch and is opened, namely, the fan has extremely high noise when running at full speed, the invention can meet the requirements of OLT equipment on the rotating speed of the fan for cooling at different temperatures, and can effectively reduce the noise of the fan.
The circuit for adjusting the voltage through the PFM waveform can realize voltage adjustment and wind speed control only by one triode, one MOS tube, one inductor and a plurality of capacitors, is simple in circuit and saves cost, uses the PFM mode due to the existence of internal resistance of the MOS tube and the inductor, and can reduce loss and improve efficiency compared with the traditional PWM mode adjustment due to the fixed conduction time and short time.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic diagram of a fan speed regulation circuit of an OLT device according to the present invention;
FIG. 2 is a flow chart of a process for a CPLD module;
FIG. 3 is a schematic diagram of the PFM waveform output by the CPLD module;
fig. 4 is a schematic diagram of a PFM voltage regulation circuit.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below. It should be noted that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments, and all other embodiments obtained by those skilled in the art without any inventive work based on the embodiments of the present invention belong to the protection scope of the present invention.
Example 1
As shown in fig. 1, the present invention provides a fan speed regulation circuit of an OLT device, which includes a CPU, a temperature chip, a CPLD (logic chip) module, and a PFM (pulse frequency modulation) voltage regulation circuit; wherein the CPLD module is pre-written with I2C signal processing codes and PFM waveform generation codes. The I2C signal processing code is not used solely for temperature information processing, but only for this function.
The temperature chip is used for acquiring the temperature of the OLT equipment.
The CPU is used for reading the temperature value of the temperature chip, and outputting I2C register addresses representing different temperature values to the CPLD module for processing through I2C after internal processing.
The CPLD module is used as an I2C signal with temperature information sent by the I2C slave unit processing CPU, and the waveform frequency is adjusted according to the I2C signal, so as to output PFM waveforms with different frequencies; meanwhile, the temperature value of the temperature chip is directly read by the I2C main equipment (used for preventing the condition that the temperature reading of the CPU is wrong or the equipment is overheated due to the fact that a poor reading fan is not started) and is compared with a target value preset in the equipment, when the read value is larger than the target value, the temperature value is not controlled by an I2C signal of the CPU, the CPLD module carries out internal control, a high level is directly output instead of a PFM waveform, and when the temperature value of the temperature chip read next time is smaller than the target value, the CPU is controlled by an I2C signal to output PFM waveforms with different frequencies; as shown in fig. 2 and 3.
The PFM voltage regulating circuit is used for regulating an output voltage value according to a PFM waveform output by the CPLD module and supplying the voltage value to the fan to realize the speed regulation of the fan; or the full-speed opening of the fan is controlled according to the high level output by the CPLD module.
Specifically, the outputting of the PFM waveform by the CPLD module specifically includes the following steps:
s31, the CPLD module can compile different registers internally, each register stores different constants, when the CPLD module receives an I2C register address from the CPU, the CPLD module correspondingly extracts the pre-compiled register internal constant value, and then the value is given to the PFM processing code to set the low level holding time of each waveform period, so as to output different PFM waveforms;
s32, at the same time, the CPLD module directly reads the temperature value of the temperature chip once every 10 minutes (time can be set), compares the temperature value with the preset target value, judges that when the read value is larger than the target value, the temperature is over-high, and is not controlled by the I2C signal of the CPU at the moment, the CPLD module carries out internal control, directly outputs high level instead of PFM waveform for the full speed start of the fan, and when the temperature value of the temperature chip read next time is smaller than the target value, the CPLD module is controlled by the I2C signal of the CPU, and outputs PFM waveform.
As shown in fig. 4, the PFM voltage regulating circuit includes a transistor Q1, a MOS transistor Q3, an inductor L1, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C15, a capacitor C19, a resistor R36, a resistor R38, a resistor R39, a resistor R42, a resistor R47, a resistor R51, and a resistor R55.
The emitter of the transistor Q1 is grounded, the base of the transistor Q1 is connected to one end of a resistor R39 and one end of a resistor R38, the other end of the resistor R39 is connected to the CPLD module, the collector of the transistor Q1 is connected to one end of a resistor R42 and one end of a resistor R51, the other end of the resistor R42 is connected to the gate of the MOS transistor Q3, the other end of the resistor R3 is connected to the source of the MOS transistor Q3, one end of a capacitor C3 and one end of a capacitor C3, the other end of the capacitor C3 is connected to the other end of the capacitor C3 and grounded, the drain of the MOS transistor Q3 is connected to one end of an inductor L3, the other end of the inductor L3 is connected to one end of the resistor R3, one end of the capacitor C3 and one end of the capacitor C3, the other end of the resistor R3 is connected to the other end of the capacitor C3 and grounded, the other end of the capacitor C3 is connected to the other end of the capacitor C3, and grounded, respectively, The other end of the resistor R55 is connected with the positive pole of the FAN FAN1, and the negative pole of the FAN FAN1 is grounded.
Specifically, the adjusting the wind speed by the PFM voltage adjusting circuit specifically includes the following steps:
s41, the amplitude of the PFM waveform output by the CPLD module is 3.3V at most, if the MOS transistor Q3 is directly driven, the MOS transistor Q3 cannot be closed, the voltage regulation effect cannot be realized, and then the amplitude of the PFM waveform is raised to 12V by the switching effect of the triode Q1 and the pull-up of the resistor R51, and then the amplitude of the PFM waveform is used for driving the MOS transistor Q3 through the R42; note that, in the conventional ordinary switch circuit, a capacitor is connected to the ground in parallel, and in the PFM waveform control circuit, the capacitor cannot be connected in parallel, otherwise, the capacitor has a filtering effect on a control waveform with a certain frequency;
s42, according to the obtained amplitude-increased PFM waveform, driving an MOS tube Q3 to conduct and close, when an MOS tube Q3 is conducted, a 12V power supply charges an inductor L1, when the MOS tube Q3 is closed, an inductor L1 releases energy, due to the fact that conducting time is fixed, the turn-off time length of an MOS tube Q3 is adjusted, the energy storage and release proportion of the inductor L1 can be changed, filtering is conducted through a capacitor C1, a capacitor C2 and a capacitor C3, and therefore output voltage is stable and adjustable, the wind speed of a FAN FAN1 is changed according to the size of input voltage, and wind speed adjustment is achieved; because the MOS transistor Q3 and the inductor L1 have internal resistance, a part of electric energy is consumed during conduction, the conduction time of PFM waveform control of the invention is fixed and very short, and the electric energy consumed by the internal resistance of the MOS transistor Q3 and the inductor L1 is less in loss and more energy-saving compared with the traditional PWM adjustment of the conduction time control voltage.
Example 2
The invention also provides a fan speed regulating method of the OLT equipment, which comprises the following steps:
s1, acquiring the temperature of the OLT equipment by the temperature chip;
s2, the CPU reads the temperature value of the temperature chip, and outputs the I2C register address representing different temperature values to the CPLD module for processing through I2C after internal processing;
s3, writing I2C signal processing code and PFM waveform generating code in CPLD module in advance (the I2C signal processing code is not only used for temperature information processing, but also used for the invention); the CPLD module is used as an I2C slave device to process an I2C signal with temperature information sent by a CPU, adjusts the waveform frequency according to an I2C signal, further outputs PFM waveforms with different frequencies, and is also used as an I2C master device to directly read the temperature value of a temperature chip (for preventing the CPU temperature reading error or reading a bad fan from causing the device overheating), and is compared with a preset target value in the CPLD module, when the read value is larger than the target value, the CPLD module is not controlled by the I2C signal of the CPU, performs internal control, directly outputs a high level instead of the PFM waveform, waits for the temperature value of the temperature chip read next time to be smaller than the target value, and is controlled by the I2C signal of the CPU to output PFM waveforms with different frequencies; as shown in fig. 2 and 3.
S4, the PFM voltage regulating circuit regulates the output voltage value according to the PFM waveform output by the CPLD module, and supplies the voltage value to the fan to realize the speed regulation of the fan; or the full-speed opening of the fan is controlled according to the high level output by the CPLD module.
Specifically, the outputting of the PFM waveform by the CPLD module specifically includes the following steps:
s31, the CPLD module can compile different registers internally, each register stores different constants, when the CPLD module receives an I2C register address from the CPU, the CPLD module correspondingly extracts the pre-compiled register internal constant value, and then the value is given to the PFM processing code to set the low level holding time of each waveform period, so as to output different PFM waveforms;
s32, at the same time, the CPLD module directly reads the temperature value of the temperature chip once every 10 minutes (time can be set), compares the temperature value with the preset target value, judges that when the read value is larger than the target value, the temperature is over-high, and is not controlled by the I2C signal of the CPU at the moment, the CPLD module carries out internal control, directly outputs high level instead of PFM waveform for the full speed start of the fan, and when the temperature value of the temperature chip read next time is smaller than the target value, the CPLD module is controlled by the I2C signal of the CPU, and outputs PFM waveform.
As shown in fig. 4, the PFM voltage regulating circuit includes a transistor Q1, a MOS transistor Q3, an inductor L1, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C15, a capacitor C19, a resistor R36, a resistor R38, a resistor R39, a resistor R42, a resistor R47, a resistor R51, and a resistor R55.
The emitter of the transistor Q1 is grounded, the base of the transistor Q1 is connected to one end of a resistor R39 and one end of a resistor R38, the other end of the resistor R39 is connected to the CPLD module, the collector of the transistor Q1 is connected to one end of a resistor R42 and one end of a resistor R51, the other end of the resistor R42 is connected to the gate of the MOS transistor Q3, the other end of the resistor R3 is connected to the source of the MOS transistor Q3, one end of a capacitor C3 and one end of a capacitor C3, the other end of the capacitor C3 is connected to the other end of the capacitor C3 and grounded, the drain of the MOS transistor Q3 is connected to one end of an inductor L3, the other end of the inductor L3 is connected to one end of the resistor R3, one end of the capacitor C3 and one end of the capacitor C3, the other end of the resistor R3 is connected to the other end of the capacitor C3 and grounded, the other end of the capacitor C3 is connected to the other end of the capacitor C3, and grounded, respectively, The other end of the resistor R55 is connected with the positive pole of the FAN FAN1, and the negative pole of the FAN FAN1 is grounded.
Specifically, the adjusting the wind speed by the PFM voltage adjusting circuit specifically includes the following steps:
s41, the amplitude of the PFM waveform output by the CPLD module is 3.3V at most, if the MOS transistor Q3 is directly driven, the MOS transistor Q3 cannot be closed, the voltage regulation effect cannot be realized, and then the amplitude of the PFM waveform is raised to 12V by the switching effect of the triode Q1 and the pull-up of the resistor R51, and then the amplitude of the PFM waveform is used for driving the MOS transistor Q3 through the R42; note that, in the conventional ordinary switch circuit, a capacitor is connected to the ground in parallel, and in the PFM waveform control circuit, the capacitor cannot be connected in parallel, otherwise, the capacitor has a filtering effect on a control waveform with a certain frequency;
s42, according to the obtained amplitude-increased PFM waveform, driving an MOS tube Q3 to conduct and close, when an MOS tube Q3 is conducted, a 12V power supply charges an inductor L1, when the MOS tube Q3 is closed, an inductor L1 releases energy, due to the fact that conducting time is fixed, the turn-off time length of an MOS tube Q3 is adjusted, the energy storage and release proportion of the inductor L1 can be changed, filtering is conducted through a capacitor C1, a capacitor C2 and a capacitor C3, and therefore output voltage is stable and adjustable, the wind speed of a FAN FAN1 is changed according to the size of input voltage, and wind speed adjustment is achieved; because the MOS transistor Q3 and the inductor L1 have internal resistance, a part of electric energy is consumed during conduction, the conduction time of PFM waveform control of the invention is fixed and very short, and the electric energy consumed by the internal resistance of the MOS transistor Q3 and the inductor L1 is less in loss and more energy-saving compared with the traditional PWM adjustment of the conduction time control voltage.
The invention carries out fan speed regulation through the PFM waveform output by the CPLD, can carry out speed regulation by utilizing a common fan, does not need to use an expensive speed-adjustable fan, greatly saves the fan cost, has 2 states of a switch and has extremely high noise when being opened compared with the prior art that the common fan is used, namely the fan runs at full speed, can meet the requirements of OLT equipment on the rotating speed of fans cooled at different temperatures, and can effectively reduce the noise of the fan.
The circuit for regulating the voltage through the PFM waveform can realize the voltage regulation and wind speed control only by one triode, one MOS tube, one inductor and a plurality of capacitors, has simple circuit and saves cost, uses the PFM mode due to the existence of the internal resistance of the MOS tube and the inductor, and can reduce loss and improve efficiency compared with the traditional PWM mode regulation because of fixed conduction time and short time.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (4)
1. A fan speed regulation circuit of OLT equipment is characterized by comprising a CPU, a temperature chip, a CPLD module and a PFM voltage regulation circuit; wherein, I2C signal processing codes and PFM waveform generating codes are written in the CPLD module in advance;
the temperature chip is used for acquiring the temperature of the OLT equipment;
the CPU is used for reading the temperature value of the temperature chip, and outputting I2C register addresses representing different temperature values to the CPLD module for processing through I2C after internal processing;
the CPLD module is used as an I2C signal with temperature information sent by an I2C slave equipment processing CPU, the waveform frequency is adjusted according to an I2C signal, PFM waveforms with different frequencies are further output, meanwhile, the CPLD module is also used as I2C master equipment for directly reading the temperature value of a temperature chip and is compared with a target value preset in the CPLD module, when the read value is larger than the target value, the CPLD module is not controlled by the I2C signal of the CPU, the CPLD module carries out internal control, directly outputs a high level instead of the PFM waveform, and when waiting for the temperature value read next time, the CPLD module is controlled by the I2C signal of the CPU and outputs the PFM waveforms with different frequencies;
the PFM voltage regulating circuit is used for regulating an output voltage value according to a PFM waveform output by the CPLD module and supplying the voltage value to the fan to realize the speed regulation of the fan; or the full-speed opening of the fan is controlled according to the high level output by the CPLD module;
the method for outputting the PFM waveform by the CPLD module specifically comprises the following steps:
the CPLD module can compile different registers internally, each register stores different constants, when the CPLD module receives an I2C register address from the CPU, the CPLD module correspondingly extracts the pre-compiled register internal constant value, and then sends the value to the PFM processing code to set the low level holding time of each waveform period, thereby outputting different PFM waveforms;
meanwhile, the CPLD module directly reads the temperature value of the temperature chip once at regular intervals, compares the temperature value with a preset target value in the CPLD module, judges that the temperature is too high when the read value is larger than the target value, is not controlled by an I2C signal of the CPU at the moment, performs internal control by the CPLD module, directly outputs a high level instead of a PFM waveform for enabling the fan to be started at full speed, and is controlled by an I2C signal of the CPU to output the PFM waveform when waiting for the temperature value of the temperature chip read next time to be smaller than the target value;
the PFM voltage regulating circuit comprises a triode Q1, a MOS transistor Q3, an inductor L1, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C15, a capacitor C19, a resistor R36, a resistor R38, a resistor R39, a resistor R42, a resistor R47, a resistor R51 and a resistor R55;
the emitter of the transistor Q1 is grounded, the base of the transistor Q1 is connected to one end of a resistor R39 and one end of a resistor R38, the other end of the resistor R39 is connected to the CPLD module, the collector of the transistor Q1 is connected to one end of a resistor R42 and one end of a resistor R51, the other end of the resistor R42 is connected to the gate of the MOS transistor Q3, the other end of the resistor R3 is connected to the source of the MOS transistor Q3, one end of a capacitor C3 and one end of a capacitor C3, the other end of the capacitor C3 is connected to the other end of the capacitor C3 and grounded, the drain of the MOS transistor Q3 is connected to one end of an inductor L3, the other end of the inductor L3 is connected to one end of the resistor R3, one end of the capacitor C3 and one end of the capacitor C3, the other end of the resistor R3 is connected to the other end of the capacitor C3 and grounded, the other end of the capacitor C3 is connected to the other end of the capacitor C3, and grounded, respectively, The other end of the resistor R55 is connected with the positive pole of the FAN FAN1, and the negative pole of the FAN FAN1 is grounded.
2. The OLT apparatus fan speed regulation circuit of claim 1, wherein the PFM voltage regulation circuit regulates the wind speed specifically comprises the steps of:
the amplitude of the PFM waveform output by the CPLD module is 3.3V at most, if the MOS transistor Q3 is directly driven, the MOS transistor Q3 cannot be closed, and the voltage regulation cannot be realized, so that the amplitude of the PFM waveform is raised to 12V by the switching action of the triode Q1 and the pull-up of the resistor R51, and the PFM waveform is used for driving the MOS transistor Q3 by the R42;
according to the obtained amplitude-increased PFM waveform, the MOS tube Q3 is driven to be switched on and off, when the MOS tube Q3 is switched on, the inductor L1 is charged by a 12V power supply, when the MOS tube Q3 is switched off, the inductor L1 can discharge energy, the on-time is fixed, the off-time length of the MOS tube Q3 is adjusted, the energy storage and discharge proportion of the inductor L1 can be changed, filtering is performed through the capacitor C1, the capacitor C2 and the capacitor C3, and therefore stable and adjustable output voltage is achieved, the wind speed of the FAN FAN1 is changed according to the size of input voltage, and adjustable wind speed is achieved.
3. A fan speed regulation method of OLT equipment is characterized by comprising the following steps:
the temperature chip acquires the temperature of the OLT equipment;
the CPU reads the temperature value of the temperature chip, and outputs I2C register addresses representing different temperature values to the CPLD module for processing through I2C after internal processing;
I2C signal processing codes and PFM waveform generating codes are written in the CPLD module in advance; the CPLD module is used as an I2C slave device to process an I2C signal with temperature information sent by a CPU, the waveform frequency is adjusted according to an I2C signal, PFM waveforms with different frequencies are further output, meanwhile, the CPLD module is also used as an I2C master device to directly read the temperature value of a temperature chip and is compared with a target value preset in the CPLD module, when the read value is larger than the target value, the CPLD module is not controlled by the I2C signal of the CPU, the CPLD module is used for internal control, directly outputs a high level instead of the PFM waveform, and when waiting for the temperature value read next time, the CPLD module is controlled by the I2C signal of the CPU to output the PFM waveforms with different frequencies;
the PFM voltage regulating circuit regulates an output voltage value according to a PFM waveform output by the CPLD module, and supplies the voltage value to the fan to realize the speed regulation of the fan; or the full-speed opening of the fan is controlled according to the high level output by the CPLD module;
the method for outputting the PFM waveform by the CPLD module specifically comprises the following steps:
the CPLD module can compile different registers internally, each register stores different constants, when the CPLD module receives an I2C register address from the CPU, the CPLD module correspondingly extracts the pre-compiled register internal constant value, and then sends the value to the PFM processing code to set the low level holding time of each waveform period, thereby outputting different PFM waveforms;
meanwhile, the CPLD module directly reads the temperature value of the temperature chip once at regular intervals, compares the temperature value with a preset target value in the CPLD module, judges that the temperature is too high when the read value is larger than the target value, is not controlled by an I2C signal of the CPU at the moment, performs internal control by the CPLD module, directly outputs a high level instead of a PFM waveform for enabling the fan to be started at full speed, and is controlled by an I2C signal of the CPU to output the PFM waveform when waiting for the temperature value of the temperature chip read next time to be smaller than the target value;
the PFM voltage regulating circuit comprises a triode Q1, a MOS transistor Q3, an inductor L1, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C15, a capacitor C19, a resistor R36, a resistor R38, a resistor R39, a resistor R42, a resistor R47, a resistor R51 and a resistor R55;
the emitter of the transistor Q1 is grounded, the base of the transistor Q1 is connected to one end of a resistor R39 and one end of a resistor R38, the other end of the resistor R39 is connected to the CPLD module, the collector of the transistor Q1 is connected to one end of a resistor R42 and one end of a resistor R51, the other end of the resistor R42 is connected to the gate of the MOS transistor Q3, the other end of the resistor R3 is connected to the source of the MOS transistor Q3, one end of a capacitor C3 and one end of a capacitor C3, the other end of the capacitor C3 is connected to the other end of the capacitor C3 and grounded, the drain of the MOS transistor Q3 is connected to one end of an inductor L3, the other end of the inductor L3 is connected to one end of the resistor R3, one end of the capacitor C3 and one end of the capacitor C3, the other end of the resistor R3 is connected to the other end of the capacitor C3 and grounded, the other end of the capacitor C3 is connected to the other end of the capacitor C3, and grounded, respectively, The other end of the resistor R55 is connected with the positive pole of the FAN FAN1, and the negative pole of the FAN FAN1 is grounded.
4. The OLT equipment fan speed regulation method of claim 3, wherein the PFM voltage regulation circuit regulates the wind speed specifically comprises the steps of:
the amplitude of the PFM waveform output by the CPLD module is 3.3V at most, if the MOS transistor Q3 is directly driven, the MOS transistor Q3 cannot be closed, and the voltage regulation cannot be realized, so that the amplitude of the PFM waveform is raised to 12V by the switching action of the triode Q1 and the pull-up of the resistor R51, and the PFM waveform is used for driving the MOS transistor Q3 by the R42;
according to the obtained amplitude-increased PFM waveform, the MOS tube Q3 is driven to be switched on and off, when the MOS tube Q3 is switched on, the inductor L1 is charged by a 12V power supply, when the MOS tube Q3 is switched off, the inductor L1 can discharge energy, the on-time is fixed, the off-time length of the MOS tube Q3 is adjusted, the energy storage and discharge proportion of the inductor L1 can be changed, filtering is performed through the capacitor C1, the capacitor C2 and the capacitor C3, and therefore stable and adjustable output voltage is achieved, the wind speed of the FAN FAN1 is changed according to the size of input voltage, and adjustable wind speed is achieved.
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