CN112988488B - System and method for testing interrupt time - Google Patents
System and method for testing interrupt time Download PDFInfo
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- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
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Abstract
The invention relates to a system and a method for testing interrupt time, wherein the system comprises: the device comprises an upper computer, a configurable input source, at least one tested power supply module and a configurable load; at least one power supply module to be tested is connected in parallel between the configurable test source and the load; the upper computer is connected to the configurable input source, the at least one tested power supply module and the configurable load, the upper computer is combined into a testing case library according to the number of the tested power supply modules, all possible input source working conditions and load working conditions, the configurable input source and the configurable load are controlled to work according to the target input source working conditions and the load working conditions corresponding to the target testing cases in the testing case library, and the at least one tested power supply module is controlled to execute an interruption time testing algorithm so as to obtain the interruption time of each target testing case. By the technical scheme, the real interrupt time can be conveniently, quickly, efficiently and accurately tested, so that the real interrupt occupancy rate is calculated, and the code quality is accurately evaluated.
Description
Technical Field
The invention relates to the technical field of interrupt time determination, in particular to a system and a method for testing interrupt time.
Background
At present, a power module generally adopts digital control, a core of the digital control generally adopts a DSP (digital signal processor) chip, functions with higher real-time requirements, such as control loop calculation, overvoltage and overcurrent protection, dynamic processing strategies, sampling filtering and the like, are often executed by using an ISR (interrupt service routine), the DSP preferentially executes the ISR, and executes a main program after the ISR is executed in an interrupt cycle, so that interrupt time (i.e. ISR execution time) is a very important index for module control, the interrupt occupancy (the proportion of the ISR execution time in the interrupt cycle) is too high due to the overlong interrupt time, so that the execution time is insufficient, and in extreme cases, for example, the interrupt overflow (the interrupt time exceeds the interrupt cycle) can cause that the next interrupt cannot be executed in time, therefore, it is very important to accurately test the interruption time in the development process of the power module.
There are two main methods for testing the interrupt time:
the method comprises the following steps: manually finding the branch with the longest execution time in the ISR, and manually counting how many system clock cycles are needed for program execution.
The second method comprises the following steps: the method comprises the steps of finding out a branch with the longest execution time in an artificial ISR, changing codes to ensure that each judgment condition executes the longest branch, setting the level of a certain test output pin to be high when entering the ISR, setting the test output pin to be low when exiting the ISR, and then electrifying a single board to use an oscilloscope to measure the time of the high level.
Disclosure of Invention
In order to overcome the problems in the related art, the invention provides a system and a method for testing the interrupt time, which can conveniently, quickly, efficiently and accurately test the real interrupt time, thereby calculating the real interrupt occupancy rate and accurately evaluating the code quality.
According to a first aspect of embodiments of the present invention, there is provided a system for testing interrupt time, the system including:
the device comprises an upper computer, a configurable input source, a configurable load and at least one tested power supply module;
the at least one power module under test is connected in parallel between the configurable input source and the configurable load;
the upper computer is connected to the configurable input source, the at least one tested power supply module and the configurable load, the upper computer is combined into a testing case library according to the number of the tested power supply modules, all possible input source working conditions and load working conditions, the configurable input source and the configurable load are controlled to work in sequence according to the target input source working conditions, the target load working conditions and the serial numbers of the target test cases corresponding to the target test cases in the testing case library, and a test command and the serial numbers of the target test cases are issued to the at least one tested power supply module so as to control the at least one tested power supply module to execute K times of interrupt time test algorithms on each target test case, so that the interrupt time of each target test case is obtained through testing.
In an embodiment, preferably, the determining manner of the target test case includes:
and receiving a test case selection command input by a user, and determining the selected test case as the target test case according to the test case selection command.
In one embodiment, preferably, the interrupt time test algorithm includes:
receiving the test command and the number of the target test case, and allowing an interrupt time test algorithm to be executed;
reading the timer count T1 upon entering the interrupt service routine;
reading the timer count T2 when the interrupt service routine is about to exit;
acquiring a time T3 between the response interrupt and the read T1 and a time T4 between the read T2 and the exit interrupt;
calculating the current interruption time, wherein the current interruption time is calculated by adopting the following formula:
T=（T2-T1）+T3+T4。
in one embodiment, preferably, the at least one tested power supply module is further configured to:
the interruption time T of the current time and the interruption time T of the target test casexyzComparing the two, and determining the maximum value as the new interruption time T of the target test casexyz new.；
After each test case in all the target test cases executes the interrupt time test algorithm for K times, the interrupt time T of all the target test cases is comparedxyz new.Selecting the maximum interruption time from the data to determine the maximum interruption time;
and the tested power supply module forms the interrupt time corresponding to all the target test cases into an array, and sends the array, the longest interrupt time and the corresponding target test case number to an upper computer.
In one embodiment, preferably, the at least one tested power supply module is further configured to:
the current interruption time T and the final interruption time TmaxComparing the two, and determining the maximum value of the two as the new final interrupt time T of the target test casemax new；
After each test case in all the target test cases executes the interrupt time test algorithm for K times, the final interrupt time T is calculatedmax newAnd sending the data to an upper computer.
According to a second aspect of the embodiments of the present invention, there is provided a method for testing an interruption time, which is used in a system for testing an interruption time as described in any one of the embodiments of the first aspect, the method including:
combining the test case base according to the number of the tested power supply modules, all possible input source working conditions and load working conditions;
and controlling the configurable input source and the configurable load to work according to the target input source working condition, the target load working condition and the serial number of the target test case corresponding to the target test case in the test case library in sequence, and issuing a test command and the serial number of the target test case to the at least one tested power supply module so as to control the at least one tested power supply module to execute K times of interrupt time test algorithms on each target test case, so as to test and obtain the interrupt time of each target test case.
In an embodiment, preferably, the determining manner of the target test case includes:
and receiving a test case selection command input by a user, and determining the selected test case as the target test case according to the test case selection command.
In one embodiment, preferably, the interrupt time test algorithm includes:
receiving the test command and the number of the target test case, and allowing an interrupt time test algorithm to be executed;
reading the timer count T1 upon entering the interrupt service routine;
reading the timer count T2 when the interrupt service routine is about to exit;
acquiring a time T3 between the response interrupt and the read T1 and a time T4 between the read T2 and the exit interrupt;
calculating the current interruption time, wherein the current interruption time is calculated by adopting the following formula:
T=（T2-T1）+T3+T4。
in one embodiment, preferably, the method further comprises:
the interruption time T of the current time and the interruption time T of the target test casexyzComparing the two, and determining the maximum value as the new interruption time T of the target test casexyz；
After each test case in all the target test cases executes the interrupt time test algorithm for K times, the interrupt time T of all the target test cases is comparedxyz novelSelecting the maximum interruption time from the data to determine the maximum interruption time;
and the tested power supply module forms the interrupt time corresponding to all the target test cases into an array, and sends the array, the longest interrupt time and the corresponding target test case number to an upper computer.
In one embodiment, preferably, the method further comprises:
the current interruption time T and the final interruption time TmaxComparing the two, and determining the maximum value of the two as the new final interrupt time T of the target test casemax new；
When each of all target test casesAfter the test cases all execute the interrupt time test algorithm for K times, the final interrupt time T is calculatedmax newAnd sending the data to an upper computer.
The technical scheme provided by the embodiment of the invention can have the following beneficial effects:
in the embodiment of the invention, the upper computer, the configurable input source, the configurable load and the tested module form a test system, the combined test case base is designed according to three parameters of the number of the tested power supply modules, the input working condition and the load working condition, and the interrupt time of the module is automatically tested by using an interrupt time test algorithm.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention.
FIG. 1 is a block diagram illustrating an interrupt time testing system in accordance with an exemplary embodiment.
FIG. 2 is a flow chart illustrating a method of testing interrupt times according to an exemplary embodiment.
FIG. 3 is a detailed flow chart illustrating a method for testing interrupt times according to an exemplary embodiment.
FIG. 4 is a detailed flow diagram illustrating another method for testing interrupt times in accordance with an exemplary embodiment.
FIG. 5 is a detailed flow chart illustrating yet another method for testing interrupt times in accordance with an exemplary embodiment.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the invention, as detailed in the appended claims.
FIG. 1 is a block diagram illustrating an interrupt time test system, according to an exemplary embodiment, as shown in FIG. 1, including:
the device comprises an upper computer 101, a configurable input source 102, a configurable load 104 and at least one tested power supply module 103;
the at least one power supply under test module 103 is connected in parallel between the configurable input source 102 and the configurable load 104;
the upper computer 101 is connected to the configurable input source 102, the at least one tested power supply module 103 and the configurable load 104, the upper computer 101 combines a testing case library according to the number of the tested power supply modules, all possible input source working conditions and load working conditions, controls the configurable input source and the configurable load to work according to the target input source working conditions, the target load working conditions and the serial numbers of the target test cases corresponding to the target test cases in the testing case library in sequence, and issues a test command and the serial numbers of the target test cases to the at least one tested power supply module 103 so as to control the at least one tested power supply module to execute K times of interrupt time test algorithms on each target test case, so as to test the interrupt time of each target test case.
In this embodiment, the upper computer combines all possible input source working conditions (such as various different input voltages, different input frequencies, alternating current or direct current, various source jump …, and the like allowed in the module specification) and load working conditions (such as no-load, half-load, full-load, various load jump, short circuit …, and the like) into a test case library according to the number of the tested power modules, further controls the configurable input source and the configurable load to operate according to the target input source working condition and the target load working condition corresponding to the target test case in the test case library, and controls the at least one tested power module to execute an interrupt time test algorithm to test and obtain the interrupt time of each target test case, thereby improving the development efficiency and the software quality of the power modules, and efficiently and accurately obtaining the interrupt time.
In an embodiment, preferably, the determining manner of the target test case includes:
and receiving a test case selection command input by a user, and determining the selected test case as the target test case according to the test case selection command.
In one embodiment, preferably, the interrupt time test algorithm includes:
receiving the test command and the number of the target test case, and allowing an interrupt time test algorithm to be executed;
reading the timer count T1 upon entering the interrupt service routine;
reading the timer count T2 when the interrupt service routine is about to exit;
acquiring a time T3 between the response interrupt and the read T1 and a time T4 between the read T2 and the exit interrupt;
calculating the current interruption time, wherein the current interruption time is calculated by adopting the following formula:
T=（T2-T1）+T3+T4。
in one embodiment, preferably, the at least one tested power supply module is further configured to:
the interruption time T of the current time and the interruption time T of the target test casexyzComparing the two, and determining the maximum value as the new interruption time T of the target test casexyz new.；
After each test case in all the target test cases executes the interrupt time test algorithm for K times, the interrupt time T of all the target test cases is comparedxyz novelSelecting the maximum interruption time from the data to determine the maximum interruption time;
and the tested power supply module forms the interrupt time corresponding to all the target test cases into an array, and sends the array, the longest interrupt time and the corresponding target test case number to an upper computer.
In one embodiment, preferably, the at least one tested power supply module is further configured to:
the current interruption time T and the final interruption time TmaxComparing the two, and determining the maximum value of the two as the new final interrupt time T of the target test casemax new；
After each test case in all the target test cases executes the interrupt time test algorithm for K times, the final interrupt time T is calculatedmax newAnd sending the data to an upper computer.
Fig. 2 is a flowchart illustrating a method for testing interrupt time according to an exemplary embodiment, as shown in fig. 2, the method comprising:
step S201, combining the number of the tested power supply modules, all possible input source working conditions and load working conditions into a test case library;
step S202, controlling the configurable input source and the configurable load to work according to the target input source working condition and the target load working condition corresponding to the target test case in the test case library, and controlling at least one tested power supply module to execute an interrupt time test algorithm so as to test and obtain the interrupt time of each target test case.
In an embodiment, preferably, the determining manner of the target test case includes:
and receiving a test case selection command input by a user, and determining the selected test case as the target test case according to the test case selection command.
In the embodiment, a user can select a target test case according to personal needs, the user can select all cases to perform complete testing or select part of test cases, and the upper computer can automatically number the test cases according to the selection sequence of the user.
Specifically, when the interrupt time test algorithm is executed, various embodiments may be implemented according to different needs, and the following description will take a centralized embodiment as an example to describe the above technical solution of the present invention in detail.
Example one
As shown in fig. 3, when the interruption time of all the operating conditions and the longest interruption time and operating conditions thereof need to be tested, the following steps can be implemented:
s301, the upper computer synthesizes a test case library by three parameter groups of the number of modules, input working conditions and load working conditions, and the serial number E of each test casexyz；
Step S302, the upper computer executes the selected target test cases according to the sequence of the test case numbers, controls the input source and the load to work according to the configuration of the test cases, issues a test command and the test case numbers to the tested power supply, and executes a K-pass interrupt time test algorithm on each target test case;
step S303, the power module to be tested receives the test command and the case number ExyzThe interrupt time test algorithm F is allowed to be executed.
Step S304, reading timer count T1 when entering the interrupt service program;
step S305, reading the timer count T2 when the interrupt service routine is about to exit;
in step S306, a time T3 from the response interruption to the reading T1 and a time T4 from the reading T2 to the exit interruption are obtained, and the current interruption time is calculated, wherein the current interruption time is calculated by using the following formula:
T=（T2-T1）+T3+T4；
step S307, the current interruption time T and the previously determined current interruption time T are comparedmaxComparing the current interruption time T with the maximum valuemax new。
Step S308, judging whether the selected test case is executed for K times;
step S309, comparing the interruption time T of all test casesmax newTaking the maximum value as the longest interruption time Tmax new；
Step S310, the interruption time of all test cases is formed into an array, and the longest interruption time T is determinedmax newAnd corresponding case numbers and uploading the test results to an upper computer。
Therefore, the interruption time of all working conditions is obtained, the longest interruption time and the working conditions are also obtained, the whole testing process can be automatically completed, and the method is rapid and accurate.
Example two
As shown in fig. 4, when the detailed interrupt time of each operating condition is not needed, only the longest interrupt time is needed, the following steps can be implemented:
s401, the upper computer synthesizes a test case library by three parameters of the module number, the input working condition and the load working condition, and the serial number E of each test casexyz；
S402, the upper computer executes the selected target test cases according to the sequence of the test case numbers, controls the input source and the load to work according to the configuration of the test cases, issues a test command and the test case numbers to the tested power supply, and executes a K-pass interrupt time test algorithm on each target test case;
step S403, the power module to be tested receives the test command and the case number ExyzThe interrupt time test algorithm F is allowed to be executed.
Step S404, reading timer count T1 when entering the interrupt service program;
step S405, reading timer count T2 when the interrupt service routine is about to exit;
in step S406, a time T3 from the response interruption to the reading T1 and a time T4 from the reading T2 to the exit interruption are obtained, and the current interruption time is calculated, wherein the current interruption time is calculated by using the following formula:
T=（T2-T1）+T3+T4；
step S407, the current interruption time T and the previously determined current interruption time T are comparedmaxComparing the current interruption time T with the maximum valuemax new。
Step S408, judging whether the selected test case is executed for K times;
step S409, comparing the interruption time T of all test casesmax newTaking the maximum value as the longest interruption time Tmax new；
Step S410, setting the longest interruption time Tmax newAnd uploading to an upper computer.
EXAMPLE III
On the basis of the second embodiment, the upper computer may also not issue a test command to the power module to be tested, the interrupt time test algorithm of the module is automatically executed by powering on, the obtained interrupt time result is automatically stored in the module EEPROM, and is read out when needed, or the obtained interrupt time is compared with a set maximum allowable value, if the result exceeds the maximum allowable value, the module lights an alarm indicator light, and if the result does not exceed the maximum allowable value, the module does not light, as shown in fig. 5 specifically, the method includes:
s501, the upper computer synthesizes a test case library by three parameter groups of the number of modules, input working conditions and load working conditions, and the serial number E of each test casexyz；
Step S502, the upper computer executes the selected target test cases according to the sequence of the test case numbers, controls the input source and the load to work according to the configuration of the test cases, issues a test command and the test case numbers to the tested power supply, and executes a K-pass interrupt time test algorithm on each target test case;
step S503, reading the timer count T1 when entering the interrupt service routine;
step S504, reading timer count T2 when the interrupt service routine is about to exit;
in step S505, a time T3 from the response interruption to the reading T1 and a time T4 from the reading T2 to the exit interruption are obtained, and the current interruption time is calculated, where the current interruption time is calculated by using the following formula:
T=（T2-T1）+T3+T4；
step S506, the current interruption time T and the previously determined current interruption time T are comparedmaxComparing the current interruption time T with the maximum valuemax new。
Step S507, timing the interruption time Tmax newSaving in EEPROM, real-time storing TmaxAnd compared with the maximum allowable interruption time value, if the maximum allowable interruption time value is exceeded, the lamp is lightened to warn, and if the maximum allowable interruption time value is not exceeded, the lamp is not warned.
It is further understood that the term "plurality" means two or more, and other terms are analogous. "and/or" describes the association relationship of the associated objects, meaning that there may be three relationships, e.g., a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship. The singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It will be further understood that the terms "first," "second," and the like are used to describe various information and that such information should not be limited by these terms. These terms are only used to distinguish one type of information from another and do not denote a particular order or importance. Indeed, the terms "first," "second," and the like are fully interchangeable. For example, first information may also be referred to as second information, and similarly, second information may also be referred to as first information, without departing from the scope of the present invention.
It is further to be understood that while operations are depicted in the drawings in a particular order, this is not to be understood as requiring that such operations be performed in the particular order shown or in serial order, or that all illustrated operations be performed, to achieve desirable results. In certain environments, multitasking and parallel processing may be advantageous.
Other embodiments of the invention will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the invention following, in general, the principles of the invention and including such departures from the present disclosure as come within known or customary practice within the art to which the invention pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims.
It will be understood that the invention is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the invention is limited only by the appended claims.
Claims (4)
1. A system for testing interrupt time, the system comprising:
the device comprises an upper computer, a configurable input source, a configurable load and at least one tested power supply module;
the at least one power module under test is connected in parallel between the configurable input source and the configurable load;
the upper computer is connected to the configurable input source, the at least one tested power supply module and the configurable load, and is combined into a testing case library according to the number of the tested power supply modules, all possible input source working conditions and load working conditions, the configurable input source and the configurable load are controlled to work in sequence according to the target input source working conditions, the target load working conditions and the serial numbers of the target test cases corresponding to the target test cases in the testing case library, and a test command and the serial numbers of the target test cases are issued to the at least one tested power supply module so as to control the at least one tested power supply module to execute K times of interrupt time test algorithms on each target test case, so that the interrupt time of each target test case is obtained through testing;
the interrupt time test algorithm comprises:
receiving the test command and the number of the target test case, and allowing an interrupt time test algorithm to be executed;
reading the timer count T1 upon entering the interrupt service routine;
reading the timer count T2 when the interrupt service routine is about to exit;
acquiring a time T3 between the response interrupt and the read T1 and a time T4 between the read T2 and the exit interrupt;
calculating the current interruption time, wherein the current interruption time is calculated by adopting the following formula:
T=（T2-T1）+T3+T4;
the at least one power module under test is further configured to:
the current interruption time T and the final interruption time TmaxComparing the two, and determining the maximum value of the two as the new final interrupt time T of the target test casemax new；
After each test case in all the target test cases executes the interrupt time test algorithm for K times, the final interrupt time T is calculatedmax newAnd sending the data to an upper computer.
2. The system of claim 1, wherein the target test case is determined in a manner comprising:
and receiving a test case selection command input by a user, and determining the selected test case as the target test case according to the test case selection command.
3. A method for testing interrupt time, which is used in the interrupt time testing system according to any one of claims 1 to 2, the method comprising:
combining the test case base according to the number of the tested power supply modules, all possible input source working conditions and load working conditions;
controlling the configurable input source and the configurable load to work according to the target input source working condition, the target load working condition and the serial number of the target test case corresponding to the target test case in the test case library in sequence, and issuing a test command and the serial number of the target test case to the at least one tested power supply module so as to control the at least one tested power supply module to execute K times of interrupt time test algorithms on each target test case, so as to test and obtain the interrupt time of each target test case;
the interrupt time test algorithm comprises:
receiving the test command and the number of the target test case, and allowing an interrupt time test algorithm to be executed;
reading the timer count T1 upon entering the interrupt service routine;
reading the timer count T2 when the interrupt service routine is about to exit;
acquiring a time T3 between the response interrupt and the read T1 and a time T4 between the read T2 and the exit interrupt;
calculating the current interruption time, wherein the current interruption time is calculated by adopting the following formula:
T=（T2-T1）+T3+T4；
the current interruption time T and the final interruption time TmaxComparing the two, and determining the maximum value of the two as the new final interrupt time T of the target test casemax new；
After each test case in all the target test cases executes the interrupt time test algorithm for K times, the final interrupt time T is calculatedmax newAnd sending the data to an upper computer.
4. The method of claim 3, wherein the target test case is determined in a manner that comprises:
and receiving a test case selection command input by a user, and determining the selected test case as the target test case according to the test case selection command.
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Address after: 518000 Room 301, building 1, hualite Industrial Park, Tongguan Road, Tianliao community, Yutang street, Guangming District, Shenzhen City, Guangdong Province Patentee after: Shenzhen youyou Green Energy Co.,Ltd. Address before: 518000 Room 301, building 1, hualite Industrial Park, Tongguan Road, Tianliao community, Yutang street, Guangming District, Shenzhen City, Guangdong Province Patentee before: SHENZHEN UUGREENPOWER ELECTRIC Co.,Ltd. |
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