CN112946337A

CN112946337A - High-precision signal measuring method and digital oscilloscope

Info

Publication number: CN112946337A
Application number: CN202110519459.2A
Authority: CN
Inventors: 曾显华; 罗森; 刘山
Original assignee: Shenzhen Siglent Technologies Co Ltd
Current assignee: Shenzhen Siglent Technologies Co Ltd
Priority date: 2021-05-13
Filing date: 2021-05-13
Publication date: 2021-06-11
Anticipated expiration: 2041-05-13
Also published as: CN112946337B

Abstract

The application relates to a high-precision measurement method of signals and a digital oscilloscope, wherein the high-precision measurement method utilizes single offset distributed each time to carry out voltage offset adjustment on analog signals for multiple times, and obtains the total offset of superposed signals relative to the analog signals when the ADC (analog to digital converter) code value of a sampling point is about to occur or just jumps, so as to further obtain the actual voltage value of the sampling point. According to the technical scheme, under the condition that the resolution ratio of the ADC is not improved, the amplitude of any sampling point on the analog signal is accurately determined by using a voltage bias adjusting mode, so that the actual voltage value of the sampling point with smaller measurement error is obtained, and the vertical measurement precision is effectively improved under the condition that the hardware cost of the digital oscilloscope is not increased, so that the middle-low-end digital oscilloscope still can play a role in high-precision measurement occasions.

Description

High-precision signal measuring method and digital oscilloscope

Technical Field

The application relates to the technical field of oscilloscopes, in particular to a high-precision signal measuring method and a digital oscilloscope.

Background

Oscilloscopes are indispensable tools for designing, manufacturing and maintaining electronic equipment, most of the existing oscilloscopes mainly use digital oscilloscopes, are increasingly popularized due to functions of waveform triggering, storing, displaying, measuring, analyzing and the like, and with rapid development of scientific and market requirements, the digital oscilloscopes are considered to be eyes of engineers and are used as necessary tools for meeting measurement challenges of the engineers.

The digital oscilloscope can perform digital visual conversion and display on an analog electric signal, and along with the increasing complexity of a tested circuit system, engineers have increasingly strict requirements on the measurement accuracy of a circuit, so that the digital oscilloscope is required to have enough vertical resolution to improve the vertical measurement accuracy of the digital oscilloscope. In the past, most of digital oscilloscopes adopt an analog-to-digital converter (ADC) with 8-bit resolution to convert an analog signal into a digital signal, and the limited resolution causes large quantization noise of the digital signal, so that the vertical measurement accuracy is low. Although the high-resolution ADC can be used for improving the vertical resolution, the high-resolution ADC is expensive and is only applied to a high-end digital oscilloscope, and is not cost-effective if the high-resolution ADC is applied to a low-end digital oscilloscope; in addition, the use of the high-resolution ADC brings more data, thereby placing higher requirements on the performance of a memory and a processor in the digital oscilloscope, and inevitably increasing the hardware cost of the digital oscilloscope.

The great influence on the vertical measurement accuracy of the digital oscilloscope is the quantization error of the ADC, if the ADC with 8-bit resolution is adopted, 256 voltage levels are theoretically provided, and when the factors such as the linearity of the ADC and the resolution of a display screen are considered, only 200 voltage levels are corresponding to a full-screen signal; for example, for a digital oscilloscope with a grid number of 8div and a vertical shift of 100mV/div, a full screen voltage is 800mV, and then a quantization error in the vertical direction is 800mV/200=4mV, which is an unacceptable case in high-precision measurement applications, so it is necessary to further reduce the quantization error in the vertical direction of the digital oscilloscope. If an ADC with 12-bit resolution is used, the quantization error of the ADC is 800mV/3200=0.25mV under the full screen voltage of 100mV/div, so although the quantization error can be greatly reduced and the vertical measurement accuracy can be improved, the price of the digital oscilloscope is very high, the cost of the ADS5400 digital oscilloscope with 12-bit resolution of the TI brand is $952.16, and the cost of the ADC081000 digital oscilloscope with 8-bit resolution of the same brand is only 87 $ 12. Therefore, from the aspect of application cost, the digital oscilloscope adopting the ADC with higher resolution is more suitable for being used on a high-end oscilloscope, and the digital oscilloscope with the middle-low end still adopts the ADC with 8-bit resolution as a main part.

Disclosure of Invention

The technical problem that this application mainly solved is how to improve the vertical measurement precision of middle and low end digital oscilloscope. In order to solve the problems, the application provides a high-precision signal measuring method and a digital oscilloscope.

According to a first aspect, the present application provides a method of high-precision measurement of a signal, comprising: acquiring a quantization error of an analog signal during ADC processing and a minimum offset during voltage offset adjustment, and configuring the offset number N1 which can perform voltage offset adjustment with the minimum offset within an analog voltage range corresponding to an ADC code value of a first sampling point on the analog signal; dividing the analog voltage range into equal parts according to the offset number N1 and a preset precision control parameter N2, and distributing single offset when the analog signal is subjected to voltage offset adjustment successively; carrying out voltage offset adjustment on the analog signal for multiple times according to the single offset distributed each time, so that the ADC (analog to digital converter) code value of a second sampling point on the formed superposed signal is about to occur or just jumps, and the total offset of the superposed signal relative to the analog signal is obtained; the second sampling point and the first sampling point have the same sampling position on each frame digital waveform corresponding to the analog signal; determining a division area of a first sampling point on the analog signal in the analog voltage range according to the total offset, and converting to obtain an actual voltage value of the first sampling point; and the measurement error corresponding to the actual voltage value of the first sampling point is smaller than the quantization error of the analog signal during ADC processing.

The obtaining of the quantization error of the analog signal during ADC processing and the minimum offset during voltage offset adjustment, and configuring the offset number N1 capable of performing voltage offset adjustment with the minimum offset within the analog voltage range corresponding to the ADC code value of the first sampling point on the analog signal, includes: acquiring ADC resolution digit used by the analog signal participating in ADC processing, and division number and vertical gear used by each frame of digital waveform display corresponding to the analog signal, and calculating to obtain quantization error of the analog signal during ADC processing; acquiring DAC resolution digit and voltage offset range used by the analog signal participating in voltage offset adjustment, and calculating to obtain the minimum offset of the analog signal during voltage offset adjustment; and rounding the quotient operation result of the quantization error and the minimum offset to obtain the offset number N1 which can perform voltage offset adjustment by the minimum offset in the analog voltage range corresponding to the ADC code value of the first sampling point on the analog signal.

The equally dividing the analog voltage range according to the offset number N1 and a preset precision control parameter N2, and allocating a single offset when the analog signal is successively subjected to voltage offset adjustment, includes: rounding the quotient operation result of the offset number N1 and a preset precision control parameter N2 to obtain an equal number, dividing the analog voltage range into equal parts, and setting each equal part of divided area as a moving unit of waveform vertical offset when the analog signal is subjected to voltage offset regulation; the offset number N1 is greater than the precision control parameter N2; rounding one half of the offset number N1 to obtain a single offset when the voltage offset adjustment is performed on the analog signal for the first time, and rounding the obtained rounding result by one half to obtain a single offset when the voltage offset adjustment is performed on the analog signal for the next time until the obtained single offset is equal to the precision control parameter N2; each resulting single offset comprises a number of said units of movement.

The voltage offset adjustment of the analog signal for multiple times is performed according to the single offset which is distributed successively, so that the ADC code value of the second sampling point on the formed superposed signal is about to occur or just jumps, and the total offset of the superposed signal relative to the analog signal is obtained, and the method comprises the following steps: performing voltage offset adjustment on the analog signal in a first vertical direction according to the first obtained single offset, and judging whether an ADC (analog-to-digital converter) coding value of a second sampling point on the superposed signal formed by the adjustment jumps or not; if not, continuing to perform voltage offset adjustment on the analog signal in the first vertical direction according to the next obtained single offset, and if so, performing voltage offset adjustment on the analog signal in the second vertical direction according to the next obtained single offset; performing voltage offset adjustment on the analog signal for multiple times until single offset participating in adjustment recurses to the precision control parameter N2, so that the ADC code value of a second sampling point on the formed superposed signal is about to occur or just jumps; and determining the total offset of the superposed signal relative to the analog signal according to the single offset participating in adjustment and the corresponding vertical direction.

The method comprises the following steps of determining a division area of a first sampling point on the analog signal in the analog voltage range according to the total offset, and converting to obtain an actual voltage value of the first sampling point, wherein the division area comprises: when the ADC code value of a second sampling point on the formed superposed signal is about to jump, subtracting the number of the mobile units included in the total offset from the number of equal division of the analog voltage range, and calculating the serial number of the divided area where the first sampling point is located; when the ADC code value of a second sampling point on the formed superposed signal just jumps, adding 1 to the number of equal parts divided by using the analog voltage range, subtracting the number of the mobile units included in the total offset, and calculating the serial number of a divided area where the first sampling point is located; and determining the actual voltage value of the first sampling point in the analog voltage range according to the serial number of the divided area where the first sampling point is located.

After obtaining the actual voltage value of the first sampling point, the method further comprises the following steps: and performing time domain measurement on the analog signal by using the actual voltage value of the first sampling point, and displaying a time domain measurement result and/or the actual voltage value of the first sampling point.

According to a second aspect, the present application provides a digital oscilloscope, comprising: a digital-to-analog converter for generating a bias signal for each voltage bias adjustment; the bias adjusting circuit is used for generating an analog bias voltage according to the bias signal; the impedance transformation network is used for superposing the analog bias voltage on an input analog signal to form a superposed signal; the analog-to-digital converter is used for carrying out ADC processing on the superposed signal to obtain an ADC encoding value of a first sampling point on the analog signal; and the processing component is connected with the digital-to-analog converter and the analog-to-digital converter, and is used for sending the control code word corresponding to the offset signal to the digital-to-analog converter, acquiring an ADC (analog-to-digital converter) code value of a first sampling point on the analog signal from the analog-to-digital converter, and obtaining an actual voltage value of the first sampling point by the high-precision measurement method in the first aspect.

The processing part includes: the configuration module is used for acquiring quantization errors of the analog signals during ADC processing and minimum offset during voltage offset adjustment, and configuring the offset number N1 which can perform voltage offset adjustment with the minimum offset within an analog voltage range corresponding to an ADC code value of a first sampling point on the analog signals; the distribution module is used for dividing the analog voltage range into equal parts according to the offset number N1 and a preset precision control parameter N2, and distributing single offset when the analog signal is subjected to voltage offset adjustment successively; the control module is used for carrying out voltage offset adjustment on the analog signal for multiple times according to the single offset distributed each time, so that an ADC (analog-to-digital converter) code value of a second sampling point on the formed superposed signal is about to occur or just jumps, and the total offset of the superposed signal relative to the analog signal is obtained; the second sampling point and the first sampling point have the same sampling position on each frame digital waveform corresponding to the analog signal; the calculation module is used for determining a division area of a first sampling point on the analog signal in the analog voltage range according to the total offset, and converting to obtain an actual voltage value of the first sampling point; and the measurement error corresponding to the actual voltage value of the first sampling point is smaller than the quantization error of the analog signal during ADC processing.

The digital oscilloscope further comprises an attenuation network and an adjustable gain amplifier: the attenuation network is used for accessing the analog signal, attenuating the analog signal and inputting the attenuated signal to the impedance transformation network; the adjustable gain amplifier is used for carrying out gain adjustment on the superposed signals output by the impedance transformation network and inputting the adjusted signals after gain adjustment to the analog-to-digital converter.

According to a third aspect, the present application provides a computer-readable storage medium having stored thereon a program executable by a processor to implement the high-precision measurement method described in the first aspect above.

The invention has the beneficial effects that:

the embodiment provides a high-precision measurement method of a signal and a digital oscilloscope, wherein the high-precision measurement method utilizes single offset distributed each time to perform multiple voltage offset adjustments on an analog signal, obtains the total offset of a superposed signal relative to the analog signal when an ADC (analog to digital converter) code value of a sampling point is about to occur or just jumps, and further obtains the actual voltage value of the sampling point. According to the technical scheme, under the condition that the resolution ratio of the ADC is not improved, the amplitude of any sampling point on the analog signal is accurately determined by using a voltage bias adjusting mode, so that the actual voltage value of the sampling point with smaller measurement error is obtained, the vertical measurement precision is effectively improved under the condition that the hardware cost of the digital oscilloscope is not increased, and the middle-low-end digital oscilloscope still can play a role in high-precision measurement occasions.

Drawings

FIG. 1 is a schematic diagram of a digital oscilloscope according to an embodiment of the present application;

FIG. 2 is a schematic diagram of a digital oscilloscope in another embodiment;

FIG. 3 is a schematic diagram of a processing component;

FIG. 4 is a schematic diagram of the waveform shifting of an analog signal;

FIG. 5 is a flow chart of a method for high precision measurement of signals in the present application;

FIG. 6 is a flow chart of configuring offset numbers;

FIG. 7 is a flow chart for dividing the analog voltage range into equal portions and assigning a single offset;

FIG. 8 is a flow chart of voltage bias adjustment performed multiple times on an analog signal;

FIG. 9 is a flow chart of calculating an actual voltage value of a first sampling point;

FIG. 10 is a schematic diagram of dividing analog voltage ranges corresponding to ADC code values into equal parts;

FIG. 11 is a schematic diagram of voltage bias adjustment of an analog signal in one embodiment;

fig. 12 is a schematic structural diagram of a digital oscilloscope in yet another embodiment.

Detailed Description

The present invention will be described in further detail with reference to the following detailed description and accompanying drawings. Wherein like elements in different embodiments are numbered with like associated elements. In the following description, numerous details are set forth in order to provide a better understanding of the present application. However, those skilled in the art will readily recognize that some of the features may be omitted or replaced with other elements, materials, methods in different instances. In some instances, certain operations related to the present application have not been shown or described in detail in order to avoid obscuring the core of the present application from excessive description, and it is not necessary for those skilled in the art to describe these operations in detail, so that they may be fully understood from the description in the specification and the general knowledge in the art.

Furthermore, the features, operations, or characteristics described in the specification may be combined in any suitable manner to form various embodiments. Also, the various steps or actions in the method descriptions may be transposed or transposed in order, as will be apparent to one of ordinary skill in the art. Thus, the various sequences in the specification and drawings are for the purpose of describing certain embodiments only and are not intended to imply a required sequence unless otherwise indicated where such sequence must be followed.

The numbering of the components as such, e.g., "first", "second", etc., is used herein only to distinguish the objects as described, and does not have any sequential or technical meaning. The term "connected" and "coupled" when used in this application, unless otherwise indicated, includes both direct and indirect connections (couplings).

The first embodiment,

Referring to fig. 1, the present embodiment discloses a digital oscilloscope, where the digital oscilloscope 1 mainly includes an impedance transformation network 11, an analog-to-digital converter 12, a processing unit 13, a digital-to-analog converter 14, and a bias adjusting circuit 15, which are respectively described below.

The digital-to-analog converter 14, also called DAC device, is connected to the processing unit 13, and the control words in digital form are sent by the processing unit 14 to the digital-to-analog converter 14, which digital-to-analog converter 14 then converts the control words into an offset signal for each voltage offset adjustment. The control code word is an input instruction of the DAC device and can be digital combined coding, and different coding forms enable the DAC device to output bias signals with different adjusting functions; the bias signal is an analog electrical signal and can determine the direction and magnitude of the voltage bias.

The offset adjusting circuit 15 is also called a dc offset circuit, and is connected to the digital-to-analog converter 14, and is capable of generating an analog offset voltage according to an input offset signal. In a specific embodiment, the bias adjusting circuit 15 may be a transistor to form a cascode circuit, and then the cascode circuit formed by the transistor must ensure that the emitter junction and the collector junction of the transistor are forward biased and reverse biased to reasonably set the operating point thereof so as to enable the base, the emitter and the collector of the transistor to be at the required potentials by the setting of the external circuit in order to perform voltage amplification on the bias signal without distortion.

The impedance transforming network 11, also called an impedance transformer, is connectable to the bias adjusting circuit 15 and an external analog source for receiving the analog signal from the analog source and superimposing the analog bias voltage generated by the bias adjusting circuit 15 on the input analog signal to form a superimposed signal. The analog signal source and the load device are usually connected by a transmission line in the electronic circuit, and the matching between the load device and the transmission line needs to be solved, so that the analog signal on the transmission line is transmitted to the load device without reflection; meanwhile, the problem of impedance matching between the analog information source and a transmission line connected with a load device is solved, so that the analog information source transmits the maximum power to the load device; then, at the connection point of the two ends of the transmission line, the solution of impedance matching is realized by an impedance matching network, so as to achieve the specific matching relationship between the impedance of the load device and the impedance in the analog information source. In the process of impedance transformation and matching of the impedance transformation network 11, analog bias voltage can be superimposed on the input analog signal to adjust the waveform size of the analog signal, which not only can improve the performance of the analog signal, but also can realize the waveform movement of the analog signal, and provide convenience for viewing and measuring the analog signal.

The analog-to-digital converter 12, also called an ADC device, is connected to the impedance transformation network 11, and is mainly configured to perform ADC processing on the superimposed signal output by the impedance transformation network 11 to obtain an ADC code value of a first sampling point on the analog signal. Since the analog-to-digital converter 12 realizes the conversion from analog quantity to digital quantity, the sampling process of the analog converter 12 on the analog signal is also the digital coding process on each sampling point on the analog signal, and each sampling point has a coding result, so that the superposed signal can be converted into a corresponding digital signal; for convenience of explanation, the encoding result of any sampling point on the analog signal is represented by an ADC encoding value of a first sampling point, where the first sampling point is any one sampling point on the analog signal.

The processing unit 15 is connected to the digital-to-analog converter 14 and the analog-to-digital converter 12, and is configured to send a control codeword corresponding to the offset signal to the digital-to-analog converter 14, obtain an ADC encoded value of a first sampling point on the analog signal from the analog-to-digital converter 12, and obtain an actual voltage value of the first sampling point by a built-in high-precision measurement method. The high-precision measurement method will be described in detail in example two below. It should be noted that the processing unit 15 may adopt devices such as a microprocessor, a CPU, an FPGA, and the like, as long as the program corresponding to the high-precision measurement method can be run and the related logic function can be implemented, and the specific device type is not limited.

Further, referring to fig. 2, the digital oscilloscope 1 further comprises an attenuation network 16 and an adjustable gain amplifier 17, so as to improve the processing performance of the digital oscilloscope 1 on the analog signal and adapt to the amplitude measurement range of the analog signal; the attenuator network 16 and the adjustable gain amplifier will be described separately below.

The attenuation network 16, also called an attenuator, may be connected to the impedance transformation network 11, and is configured to access the analog signal, attenuate the analog signal, and input the attenuated signal to the impedance transformation network 11. The adjustable gain amplifier 17, also called a VGA device, may be disposed on a signal channel between the impedance transforming network 11 and the analog-to-digital converter 12, and is configured to perform gain adjustment on the superimposed signal output by the impedance transforming network 11, and input the adjusted signal after gain adjustment to the analog-to-digital converter 12. In a specific embodiment, referring to fig. 2, the adjustable gain amplifier 17 may also be connected to an input of the digital-to-analog converter 14, and the processing unit 13 may then send the control code word not only to the digital-to-analog converter 14, but also to the adjustable gain amplifier 17, thereby configuring the gain of the adjustable gain amplifier.

It should be noted that the attenuation network 16 and the adjustable gain amplifier 17 mainly function to adjust the analog signal to adapt to the amplitude range (from the minimum amplitude to the maximum amplitude) of the analog signal; attenuation network 16 serves to attenuate large signals while the adjustable gain amplifier serves to amplify small signals.

Further, referring to fig. 2, the digital oscilloscope 1 further includes a display 18, where the display 18 is connected to the processing unit 13, and is configured to display a digital waveform corresponding to the analog signal, or display some processing results of the processing unit 13; the type of display 18 and the display form of the display content are not limited.

In this embodiment, for an analog signal (such as a regulated dc signal, a sine wave signal, a rectangular wave signal, etc.) output by an analog signal source, the analog signal passes through the attenuation network 16, is input into the impedance transformation network 11, and then is superimposed with a suitable analog bias voltage, the superimposed signal formed by the superimposition is input into the adjustable gain amplifier 17 for gain adjustment to form an adjustment signal, the adjustment signal reaches the analog-to-digital converter 12 and is converted into a digital signal, and the digital signal is further processed by the processing component 13 and then can be displayed by the display 18.

In this embodiment, the digital-to-analog converter 14 (i.e., DAC device) and the offset adjustment circuit 15 may be utilized to generate a minimum offset of the analog offset voltage. The digital to analogue converter 14 and the offset adjustment circuit 15 cooperate to provide a voltage offset in the vertical direction for the waveform of the analogue signal, and the minimum offset can be calculated by dividing the full voltage offset range by all the code values of the DAC. For example, in a vertical shift position of 100mV/div, the offset adjusting circuit 15 can provide an offset of ± 2V, that is, a voltage offset range of 4V, and in the case of using a DAC with 16-bit resolution, the minimum offset amount of the analog offset voltage can be generated by the digital-to-analog converter 14 and the offset adjusting circuit 15 to be 4V/2^16=0.06mV, so that an integral multiple voltage value of the minimum offset amount is used to be superimposed on the analog signal, thereby shifting up or down the waveform of the analog signal in the amplitude vertical direction.

In this embodiment, since the attenuation network 16, the impedance transformation network 11, the adjustable gain amplifier 17, the analog-to-digital converter 12, the processing unit 13, the digital-to-analog converter 14, the bias adjusting circuit 15 and the display 18 are all common components of a digital oscilloscope, and in practical applications, the connection relationship of the components as shown in fig. 2 is also set, so that the circuit structure of these common components will not be described in detail here.

The great influence on the vertical precision of the digital oscilloscope 1 is the quantization error of the analog-to-digital converter 12, the traditional middle-low grade digital oscilloscope generally uses 8-bit resolution ADC devices, namely 2^8=256 levels, and finally, the full-screen signal only corresponds to 200 levels by considering the factors of the linearity of the ADC devices, the resolution of a display and the like. For a digital oscilloscope with the graduation number of 8div and the vertical gear of 100mV/div, the full screen voltage is 800mV, the quantization error can represent 800mV/200=4mV, and the quantization error is an unacceptable result in high-precision measurement application.

Referring to fig. 2 and 4, when the adjustment signal is processed by the ADC of the ADC 12, the ADC code value of each sampling point is obtained, and the ADC code value is encoded to form a digital signal and displayed in the form of each frame of digital waveform, so that in the time domain display state, the ordinate represents the voltage amplitude, and the abscissa represents the time. For any sampling point on the analog signal, such as a first sampling point, if n represents the ADC code value of the first sampling point, the ADC code values of the previous sampling point and the next sampling point are n-1 and n +1 respectively; the analog voltage range corresponding to the ADC code value n can be represented as b1-b2, the voltage range is equal to the quantization error of the ADC device, the specific value range is F ^ n (n + 0.5)/2 ^ R to F ^ n (n + 4.5)/2 ^ R, wherein n is the serial number of the ADC code value (the larger n is, the larger the voltage amplitude of the sampling point is), F is the analog voltage input full-scale range of the ADC device, and R is the resolution bit number of the ADC device. If the actual voltage of the first sampling point is within the analog voltage range b1-b2, the actual voltage of the first sampling point is classified as the same ADC code value n regardless of the position of the waveform a1 or the position of the waveform a2, and it cannot be further determined at which position of the waveforms a1 and a2 the actual voltage of the first sampling point is. In order to achieve the purpose of effectively judging the actual voltage of the first sampling point, the waveform of the analog signal is vertically moved through direct current offset, if a forward analog offset voltage is superposed on the waveform of the first sampling point and the waveform is moved to the position of a waveform a3, the ADC code value of the first sampling point jumps to n +1, and the position of the waveform in the analog voltage range b1-b2 can be calculated as long as the offset of the waveform can be obtained, so that the actual voltage of the first sampling point can be obtained; of course, if the waveform of the first sampling point is superimposed with an inverted analog bias voltage and moved to the position of the waveform a4, the ADC code value of the first sampling point jumps to n-1, and the offset of the waveform can be obtained to estimate which position of the waveform in the analog voltage range b1-b2, and the actual voltage of the first sampling point can be obtained at this time.

In order to accurately obtain the offset of the waveform of the first sampling point in the voltage offset adjustment, the minimum offset of the voltage offset adjustment needs to be far smaller than the quantization error of the ADC device. For example, when the analog-to-digital converter 12 adopts 8-bit resolution, the quantization error of the ADC device is 4 mV; if the DAC80501 chip with 16-bit resolution is adopted in the DAC 14, the minimum offset of the analog offset voltage generated by the offset adjusting circuit 15 can reach 0.06mV, and then the processing unit 13 can increase or decrease the control code word of the DAC to flexibly configure the analog offset voltage, so as to finely adjust the vertical amplitude of the waveform of the first sampling point, and accurately move the waveform to the position of the waveform a3 or the waveform a 4.

In the present embodiment, referring to fig. 2 and 3, the processing component 13 includes a configuration module 131, an allocation module 132, a control module 133, and a calculation module 134, which are respectively described below.

The configuration module 131 is mainly used for acquiring a quantization error of the analog signal during ADC processing and a minimum offset during voltage offset adjustment, so as to configure the offset number N1 capable of performing voltage offset adjustment with the minimum offset within an analog voltage range corresponding to an ADC code value of a first sampling point on the analog signal.

The allocating module 132 is connected to the configuring module 131, and is mainly configured to divide the analog voltage range equally according to the offset number N1 and a preset precision control parameter N2, and allocate a single offset when the voltage offset adjustment is performed successively on the analog signal.

The control module 133 is connected to the distribution module 132, and is mainly configured to perform multiple voltage offset adjustments on the analog signal according to a single offset distributed each time, so that an ADC code value of a second sampling point on the formed superimposed signal is about to occur or just jumps, and a total offset generated by the superimposed signal with respect to the analog signal is obtained; the second sampling point and the first sampling point have the same sampling position on each frame digital waveform corresponding to the analog signal.

The calculating module 134 is connected to the control module 133, and is mainly configured to determine a division area where a first sampling point on the analog signal is located within the analog voltage range according to the total offset, and convert to obtain an actual voltage value of the first sampling point; the measurement error corresponding to the actual voltage value of the first sampling point is smaller than the quantization error of the analog signal during the ADC processing.

In this embodiment, in order to enable the digital oscilloscope 1 to implement the functions of waveform display and time domain measurement, the calculating module 134 can also perform time domain measurement (such as viewing amplitude, finding peak value, measuring period, calculating frequency, etc.) on the analog signal by using the actual voltage value of the first sampling point, and then send the time domain measurement result and/or the actual voltage value of the first sampling point to the display 18 for display, so as to facilitate the user to view the digital waveform of the analog signal and the time domain measurement result of the analog signal.

The specific functions of the configuration module 131, the allocation module 132, the control module 133 and the calculation module 134 in the processing unit 13 will be described in detail in the second embodiment below.

Example II,

On the basis of the digital oscilloscope disclosed in the first embodiment, the present embodiment discloses a high-precision signal measurement method, and the execution carrier of the high-precision signal measurement method is the processing component 13 of the digital oscilloscope 1 in fig. 1 to 3. Referring to fig. 5, the high-precision measurement method in the present embodiment mainly includes

steps

210 and 240, which are described below.

In step 210, the configuration module 131 in the processing unit 13 obtains the quantization error of the analog signal during ADC processing and the minimum offset during voltage offset adjustment, and configures the offset number N1 that can perform voltage offset adjustment with the minimum offset within the analog voltage range corresponding to the ADC code value of the first sampling point on the analog signal.

In step 220, the distribution module 132 in the processing unit 13 equally divides the analog voltage range according to the offset number N1 and the preset precision control parameter N2, and distributes a single offset when the analog signal is successively adjusted for voltage offset.

In step 230, the control module 133 in the processing unit 13 performs multiple voltage offset adjustments on the analog signal according to the successively allocated single offset, so that the ADC code value of the second sampling point on the formed superimposed signal is about to occur or just jumps, and the total offset of the superimposed signal with respect to the analog signal is obtained.

It should be noted that the second sampling point and the first sampling point have the same sampling position on each frame digital waveform corresponding to the analog signal, and since the digital signal corresponding to the analog signal is displayed by the digital waveform of one frame, in order to represent the moving condition of the waveform of the sampling point at a certain sampling position, the sampling point at the same sampling position in each frame digital waveform is taken as an example here, and the ADC code value of the sampling point after each voltage offset adjustment is analyzed; for example, each frame of digital waveform has a sampling position with a sampling number of 1-100, the sampling position with the sampling number of 50 can be determined as an observation object, the ADC coding values of the sampling point at the sampling number of 50 before and after each voltage offset adjustment are analyzed, and then the total offset of the waveform of the sampling point after a plurality of voltage offset adjustments is further obtained.

In step 240, the calculating module 134 in the processing unit 13 determines the divided region of the first sampling point on the analog signal in the analog voltage range according to the total offset, and converts to obtain the actual voltage value of the first sampling point.

It should be noted that the divided region where the first sampling point is located in the analog voltage range represents the waveform amplitude height of the first sampling point and also represents the actual voltage magnitude of the first sampling point, and the voltage range of the divided region is the measurement error of identifying the actual voltage to the maximum extent.

In this embodiment, referring to fig. 3 and fig. 6, the step 210 executed by the configuration module 131 mainly relates to the process of configuring the offset number N1, and specifically includes

steps

211 and 213, which are respectively described as follows.

And step 211, acquiring ADC resolution digits used by the analog signals participating in ADC processing and division numbers and vertical gears used for displaying each frame of digital waveform corresponding to the analog signals, and calculating to obtain quantization errors of the analog signals during ADC processing.

For a digital oscilloscope with division number of 8div and vertical gear of 100mV/div, the full screen voltage is 800mV, and if the digital oscilloscope adopts an analog-to-digital converter with 8-bit ADC resolution to carry out ADC processing on an analog signal, the theoretical quantization error is 800mV/2^8=3.125 mV; however, in practice, considering the linearity of the ADC device and the resolution of the display, the final full-screen signal corresponds to only 200 levels, and the quantization error may represent 800mV/200=4 mV.

And 212, acquiring DAC resolution digit numbers and voltage offset ranges used by the analog signals to participate in voltage offset adjustment, and calculating to obtain the minimum offset of the analog signals during voltage offset adjustment.

If the digital oscilloscope adopts a digital-to-analog converter with the resolution of 16 DAC and an offset adjusting circuit with the voltage offset range of +/-2V, the minimum offset of the analog offset voltage is 4V/2^16=0.06 mV.

Step 213, rounding the quotient of the quantization error and the minimum offset to obtain an offset number N1 that can perform voltage offset adjustment with the minimum offset within the analog voltage range corresponding to the ADC code value of the first sampling point on the analog signal.

For example, in the case that the quantization error is 3.125mV and the minimum offset is 0.06mV, the analog voltage range corresponding to the ADC code value of the first sampling point on the analog signal is 3.125mV, and the maximum offset number that can be realized within the analog voltage range of 3.125mV by using the minimum offset of 0.06mV, i.e. the offset number N1= [3.125mV/0.06mV ] =52, where [ ] represents the rounding operation, because the calculation result may have a decimal case, and the offset number must be an integer value.

In the present embodiment, referring to fig. 3 and fig. 7, the step 220 executed by the allocating module 132 mainly relates to the process of equally dividing the analog voltage range and allocating the single offset, and specifically may include

steps

221 and 222, which are respectively described as follows.

Step 221, rounding the quotient operation result of the offset number N1 and the preset precision control parameter N2 to obtain an equal number, equally dividing the analog voltage range, and setting each equally divided region as a moving unit of waveform vertical offset when the analog signal is subjected to voltage offset adjustment; the offset number N1 here is greater than the accuracy control parameter N2.

It should be noted that the preset precision control parameter N2 is a parameter that can be set by a user in a self-defined manner, and is intended to reasonably set the number of equally divided parts of the analog voltage range, so that the number of equally divided parts is not too large, which may cause too large subsequent calculation amount and too long calculation time. Of course, if the problems of the calculation amount and the calculation time length are not considered, the precision control parameter N2 can be directly assigned to 1, so that the analog voltage range is divided into equal parts by the offset number N1, the voltage range of the divided region is the minimum, the waveform position of the first sampling point can be accurately positioned, and the minimum measurement error and the maximum vertical measurement precision are achieved. Since the number of equal parts N3= [ N1/N2], where [ ] represents a rounding operation, the smaller the value of N2 is, the higher the vertical measurement accuracy achieved at last.

For example, as shown in fig. 10, for a first sampling point on an analog signal, an analog voltage range corresponding to an ADC code value N of the first sampling point is b1-b2, and the analog voltage range can be divided into equal parts if the number of equal parts N3= [ N1/N2] is obtained, so that 1 to N1/N2 divided regions are obtained, and each divided region has an equal voltage range. Next, each divided region may be regarded as one moving unit P in which the waveform is vertically shifted at the time of voltage offset adjustment, and the waveform is moved by several such moving units P at each time of voltage offset adjustment, where several means one or more.

Step 222, performing one-half rounding on the half of the offset number N1 to obtain a single offset when the voltage offset adjustment is performed on the analog signal for the first time, and performing one-half rounding on the obtained rounding result to obtain a single offset when the voltage offset adjustment is performed on the analog signal for the next time until the obtained single offset is equal to the precision control parameter N2; it should be noted that each single offset obtained includes several units of movement.

It can be understood that for the offset number N1, the calculation result of [ N1/2] is a single offset amount of the first voltage offset adjustment, i.e., the waveform of the first sampling point needs to be offset by [ N1/2] shift unit P; the calculation result of [ N1/4] is a single offset of the second voltage offset adjustment, namely the waveform of the first sampling point needs to be offset by [ N1/4] movement units P again; the calculation result of [ N1/8] is a single offset of the first voltage offset adjustment, namely the waveform of the first sampling point needs to be offset by [ N1/8] movement units P again; so set up until the calculated single offset is equal to the accuracy control parameter N2.

For example, when the number of offsets N1=4 and the accuracy control parameter N2=1 are set, the voltage offset adjustment may be performed twice, with the single offset amount of the first voltage offset adjustment being 2 movement units P and the single offset amount of the second voltage offset adjustment being 1 movement unit P.

It should be noted that, in order to better divide the analog voltage range corresponding to the ADC code value of the first sampling point into equal parts and better implement the iterative computation end condition that the single offset is equal to the precision control parameter N2, the offset number N1 and the precision control parameter N2 may be preferably configured to be even numbers.

In this embodiment, referring to fig. 3 and fig. 8, the step 230 executed by the control module 133 mainly relates to a process of performing multiple voltage offset adjustments on the analog signal, and specifically may include

steps

231 and 236, which are respectively described as follows.

In step 231, voltage offset adjustment in the first vertical direction is performed on the analog signal according to the first obtained single offset. Here, the first vertical direction may be a direction in which the waveform moves upward (when the amplitude voltage of the waveform increases) or a direction in which the waveform moves downward (when the amplitude voltage of the waveform decreases), and then the second vertical direction corresponding to the first vertical direction is the opposite direction.

Step 232, judging whether the ADC code value of the second sampling point on the superimposed signal formed by the present adjustment jumps, if so, going to step 233, otherwise, going to step 234.

The second sampling point and the first sampling point have the same sampling position on each frame digital waveform corresponding to the analog signal, and since the digital signal corresponding to the analog signal is displayed by the digital waveform of one frame, in order to represent the moving condition of the waveform of the sampling point at a certain sampling position, the sampling point at the same sampling position in each frame digital waveform is taken as an example, and the ADC code value of the sampling point after each voltage offset adjustment is analyzed.

Step 233, if yes, performing voltage offset adjustment in the second vertical direction on the analog signal according to the single offset obtained next time; step 235 is then entered.

If the first vertical direction is the direction in which the waveform moves upward, then the second vertical direction is the direction in which the waveform moves downward.

If not, the analog signal continues to be adjusted for the voltage bias in the first vertical direction according to the next obtained single offset in step 234, and then the process proceeds to step 235.

And 235, performing voltage offset adjustment on the analog signal for multiple times until each single offset participating in adjustment recurses to the precision control parameter N2, so that the ADC code value of the second sampling point on the formed superposed signal is about to occur or just jumps.

The total offset of the superimposed signal relative to the analog signal is determined 236 based on the individual offsets each participating in the adjustment and the corresponding vertical direction.

For example, as shown in fig. 1 and 10, for the first sampling point on the analog signal, the analog voltage range corresponding to the ADC code value N of the first sampling point is b1-b2, and the analog voltage range is divided into 1 to [ N1/N2] divided regions, each of which is a moving unit P. When the voltage offset adjustment is performed on the analog signal for the first time, the processing unit 13 sends the control codeword to the digital-to-analog converter 14, the digital-to-analog converter 14 sends the offset signal to enable the offset adjustment circuit 15 to generate a forward analog offset voltage, and the waveform of the first sampling point on the analog signal is overlapped with the forward analog offset voltage and then moves up by N1/2 moving units P (i.e. the single offset of the first voltage offset adjustment). In the first case, the ADC code value of the first sampling point is still N, which indicates that the waveform after the movement is still in the analog voltage range corresponding to the ADC code value N, and then the waveform before the movement should be in the lower half of the analog voltage range corresponding to the ADC code value N (for the region of 1 to beamn 1/N2); in the first case, the ADC code value jump at the first sample point is N +1, indicating that the shifted waveform is within the analog voltage range corresponding to ADC code value N +1, then the waveform before the shift should be in the upper half of the analog voltage range corresponding to ADC code value N (corresponding to the region of ZZ N1/N2-N1/N2).

When the voltage offset adjustment is performed on the analog signal for the second time, on one hand, if the processing unit 13 determines that the first adjustment is in the first condition, the processing unit 13 sends a control codeword to make the offset adjustment circuit 15 generate a forward analog offset voltage, and after the waveform of the second sampling point on the analog signal is superimposed on the forward analog offset voltage, the analog signal is moved upwards by N1/4 moving units P (i.e. the single offset of the second voltage offset adjustment); in this case, two situations may occur after the superimposed signal is processed by the ADC, and in the third situation, the ADC code value of the second sampling point is still N, which indicates that the waveform after the movement is still within the analog voltage range corresponding to the ADC code value N, and then the waveform before the movement should be in the lower half of the analog voltage range corresponding to the ADC code value N (corresponding to the region 1 to ¼ N1/N2); in the fourth case, where the ADC code value at the first sample point jumps to N +1, indicating that the shifted waveform is within the analog voltage range for ADC code value N +1, then the waveform before the shift should be in the upper half of the lower half of the analog voltage range for ADC code value N (corresponding to the regions ¼ N1/N2 through 041N 1/N2). On the other hand, if the processing unit 13 determines that the first adjustment is in the second case, the processing unit 13 sends a control codeword to make the bias adjustment circuit 15 generate a negative analog bias voltage, and the waveform of the second sampling point on the analog signal is superimposed with the negative analog bias voltage and then moves N1/4 movement units P downward (i.e. the single offset of the second voltage bias adjustment); in this case, two situations may occur after the superimposed signal is processed by ADC, in the fifth situation, the ADC code value at the second sampling point is still N, which indicates that the waveform after moving is still in the analog voltage range corresponding to the ADC code value N, and then the waveform before moving should be in the lower half of the upper half of the analog voltage range corresponding to the ADC code value N (corresponding to the area of Tr N1/N2 to Tr N1/N2); in the sixth case, the ADC code value at the second sampling point jumps to N +1, indicating that the shifted waveform is within the analog voltage range corresponding to the ADC code value N +1, then the waveform before shifting should be the upper half of the analog voltage range corresponding to the ADC code value N (the area corresponding to the microspheres N1/N2-N1/N2).

When the voltage offset of the analog signal is adjusted for the third time, reference can be made to the process of the second offset adjustment, except that the waveform of the second sampling point in the third adjustment process moves up or down by N1/8 moving units P (i.e. the single offset of the second voltage offset adjustment); therefore, the divided region of the waveform of the second sampling point in the analog voltage range b1-b2 can be further reduced.

It can be understood that, through the above multiple recursion operations, when the number of movement units corresponding to a single offset is equal to the precision control parameter N2, the last movement is performed on the waveform of the second sampling point on the analog signal; if the waveform after the last movement is in the analog voltage range corresponding to the ADC code value n, indicating that the ADC code value of the second sampling point is about to jump; and if the waveform after the last movement is in the analog voltage range corresponding to the ADC code value n +1, indicating that the ADC code value of the second sampling point just jumps. Thus, it can be determined in which divided region of 1 to N1/N2 the waveform of the second sampling point is specifically located.

It should be noted that the total offset of the superimposed signal relative to the analog signal is related to both the single offset involved in the adjustment and the direction of the vertical movement of each waveform; the single offsets in the first vertical direction should be added and the single offsets in the second vertical direction should be subtracted.

In the present embodiment, referring to fig. 4 and fig. 9, the step 210 executed by the calculating module 134 mainly relates to a process of calculating an actual voltage value of the first sampling point, and specifically may include the steps 241-243, which are respectively described as follows.

In step 241, when the ADC code value of the second sampling point on the formed superimposed signal is about to jump, the number of the moving units included in the total offset is subtracted from the number of the divided parts divided by the analog voltage range (i.e., N3= [ N1/N2 ]), and the calculation result is the serial number of the divided region where the first sampling point is located.

In step 242, when the ADC code value of the second sampling point on the formed superimposed signal has just jumped, the number of equal parts divided by the analog voltage range (i.e., N3= [ N1/N2 ]) is added to 1, and the number of the moving units included in the total offset is subtracted, so that the calculation result is the serial number of the divided area where the first sampling point is located.

And 243, determining the actual voltage value of the first sampling point in the analog voltage range according to the serial number of the divided area where the first sampling point is located.

Referring to fig. 1 and 11, in the case where the offset number N1=4 and the precision control parameter N2=1, for a first sample point on the analog signal, an analog voltage range corresponding to the ADC code value N of the first sample point is b1-b2, and the analog voltage range is divided into 4 divided regions c1, c2, c3, c4, each of which is one unit of movement. The analog voltage range corresponding to the ADC code value n +1 is divided into regions d1 and d2, and the analog voltage range corresponding to the ADC code value n-1 is divided into regions e3 and e 4. In the case where the waveform a of the first sampling point is not subjected to voltage offset adjustment, only the waveform a is known to be within the analog voltage range corresponding to the ADC code value n, but it is not known which divided region is specifically.

Firstly, the processing unit 13 sends out a control code word to perform first voltage offset adjustment on the analog signal, so that the waveform a of a first sampling point moves upwards by N1/2=2 movement units; in the first case, the waveform a is still in the analog voltage range corresponding to the ADC code value n, and then the waveform a before moving is known to be in the divided region of c1 or c 2; in the second case, the waveform a is in the analog voltage region corresponding to the ADC code value n +1, and it is known that the waveform a before moving is in the divided region of c3 or c 4.

Then, the processing unit 13 determines which case the first movement occurs, and if the first case occurs, the processing unit 13 issues a control codeword to perform the second voltage offset adjustment on the analog signal, so that the waveform a of the second sampling point moves upward by N1/4=1 movement unit again; in the third case, the waveform a is in the analog voltage range corresponding to the ADC code value n, and it is known that the original waveform a should be in the division area of c 1; in the fourth case, the waveform a is in the analog voltage region corresponding to the ADC code value n +1, and it is known that the original waveform a should be in the division region of c 2. If the second condition occurs, the processing unit 13 sends out a control code word to perform the second voltage offset adjustment on the analog signal, so that the waveform a of the second sampling point moves downwards by N1/4=1 moving unit; in the fifth case, the waveform a is in the analog voltage range corresponding to the ADC code value n, and it is known that the original waveform a should be in the division area of c 3; in the sixth case, the waveform a is in the analog voltage region corresponding to the ADC code value n +1, and it is known that the original waveform a should be in the division region of c 4. It can be understood that the original waveform a is specifically located in which divided region can be known through two voltage bias adjustments.

It is understood that if the first and third cases occur, and the total number of shifts is 3 units of movement, then N3-3=1 results in a division area of c 1; if the first case and the fourth case occur, and the total offset number is 3 movement units, then N3+1-3=2 obtains the division area of c 2; if the second case and the fifth case occur, the total offset number is 1 moving unit, and then N3-1=3 obtains the division area of c 3; if the second case and the sixth case occur, and the total number of shifts is 1 movement unit, N3+1-1=4 results in the division area of c 4.

It should be noted that, after knowing the analog voltage range corresponding to the ADC code value N of the first sample point is b1-b2, i.e., the voltage range corresponding to F ^ N (N-0.5)/2 ^ R to F ^ N (N + 0.5)/2 ^ R, and knowing the division region number k where the waveform of the first sample point is located, the actual voltage value of the first sample point in the analog voltage range can be determined, which is expressed as F ^ N + (k-N1/N2/2)/(N1/2))/2 ^ R to F ^ N + (k + 1-N1/N2/2)/(N1/N2))/2 ^ R. Wherein n is the serial number of the ADC coding value, F is the full-scale range of the analog voltage input of the ADC device, and R is the resolution digit of the ADC device.

In this embodiment, the following process may be further included after obtaining the actual voltage value of the first sampling point: the time domain measurement is performed on the analog signal by using the actual voltage value of the first sampling point, and since the first sampling point represents any sampling point on the analog signal, the actual voltage value of each sampling point can be obtained according to the

above step

210 and 240, so that not only can the high-precision amplitude value of each sampling point be checked through the display mode, but also the rising edge, the falling edge and the peak value on the analog signal can be found out, and further, the time domain parameters such as the period, the frequency and the like of the analog signal can be measured, thereby providing technical support for the digital oscilloscope to perform the high-precision time domain measurement.

Example III,

On the basis of the high-precision measurement method disclosed in the second embodiment, a digital oscilloscope is disclosed in the present embodiment.

Referring to fig. 12, the digital oscilloscope 3 includes a memory 31 and a processor 32. Among them, the memory 31 may be considered as a computer-readable storage medium for storing a program, which may be a program code corresponding to the digital modulation method in the second embodiment.

The processor 32 is connected to the memory 31 for implementing the digital modulation method by executing the program stored in the memory 31. Then, the functions implemented by the processor 32 can refer to

steps

210 and 220 in the second embodiment, and refer to the steps illustrated in fig. 5 to 9, which will not be described in detail here.

Those skilled in the art will appreciate that all or part of the functions of the various methods in the above embodiments may be implemented by hardware, or may be implemented by computer programs. When all or part of the functions of the above embodiments are implemented by a computer program, the program may be stored in a computer-readable storage medium, and the storage medium may include: a read only memory, a random access memory, a magnetic disk, an optical disk, a hard disk, etc., and the program is executed by a computer to realize the above functions. For example, the program may be stored in a memory of the device, and when the program in the memory is executed by the processor, all or part of the functions described above may be implemented. In addition, when all or part of the functions in the above embodiments are implemented by a computer program, the program may be stored in a storage medium such as a server, another computer, a magnetic disk, an optical disk, a flash disk, or a removable hard disk, and may be downloaded or copied to a memory of a local device, or may be version-updated in a system of the local device, and when the program in the memory is executed by a processor, all or part of the functions in the above embodiments may be implemented.

The present invention has been described in terms of specific examples, which are provided to aid understanding of the invention and are not intended to be limiting. For a person skilled in the art to which the invention pertains, several simple deductions, modifications or substitutions may be made according to the idea of the invention.

Claims

1. A method for high precision measurement of a signal, comprising:

acquiring a quantization error of an analog signal during ADC processing and a minimum offset during voltage offset adjustment, and configuring the offset number N1 which can perform voltage offset adjustment with the minimum offset within an analog voltage range corresponding to an ADC code value of a first sampling point on the analog signal;

dividing the analog voltage range into equal parts according to the offset number N1 and a preset precision control parameter N2, and distributing single offset when the analog signal is subjected to voltage offset adjustment successively;

carrying out voltage offset adjustment on the analog signal for multiple times according to the gradually distributed single offset, so that the ADC (analog to digital converter) code value of a second sampling point on the formed superposed signal is about to occur or just jumps, and the total offset of the superposed signal relative to the analog signal is obtained; the second sampling point and the first sampling point have the same sampling position on each frame digital waveform corresponding to the analog signal;

determining a division area of a first sampling point on the analog signal in the analog voltage range according to the total offset, and converting to obtain an actual voltage value of the first sampling point; and the measurement error corresponding to the actual voltage value of the first sampling point is smaller than the quantization error of the analog signal during ADC processing.

2. The method for high-precision measurement according to claim 1, wherein the obtaining of the quantization error of the analog signal during ADC processing and the minimum offset during voltage offset adjustment configures an offset number N1 capable of performing voltage offset adjustment with the minimum offset within an analog voltage range corresponding to the ADC code value of the first sampling point on the analog signal, and comprises:

acquiring ADC resolution digit used by the analog signal participating in ADC processing, and division number and vertical gear used by each frame of digital waveform display corresponding to the analog signal, and calculating to obtain quantization error of the analog signal during ADC processing;

acquiring DAC resolution digit and voltage offset range used by the analog signal participating in voltage offset adjustment, and calculating to obtain the minimum offset of the analog signal during voltage offset adjustment;

and rounding the quotient operation result of the quantization error and the minimum offset to obtain the offset number N1 which can perform voltage offset adjustment by the minimum offset in the analog voltage range corresponding to the ADC code value of the first sampling point on the analog signal.

3. The method for measuring with high precision as claimed in claim 1, wherein the dividing the analog voltage range by equal parts according to the offset number N1 and a preset precision control parameter N2, and allocating the single offset when the analog signal is adjusted with voltage offset successively comprises:

rounding the quotient operation result of the offset number N1 and a preset precision control parameter N2 to obtain an equal division number, dividing the analog voltage range into equal parts, and setting each equal division area as a moving unit of the waveform vertical offset when the analog signal is subjected to voltage offset regulation; the offset number N1 is greater than the precision control parameter N2;

rounding one half of the offset number N1 to obtain a single offset when the voltage offset adjustment is performed on the analog signal for the first time, and rounding the obtained rounding result by one half to obtain a single offset when the voltage offset adjustment is performed on the analog signal for the next time until the obtained single offset is equal to the precision control parameter N2; each resulting single offset comprises a number of said units of movement.

4. The method for high-precision measurement according to claim 3, wherein the voltage offset adjustment of the analog signal is performed multiple times according to the single offset allocated in sequence, so that the ADC code value of the second sampling point on the formed superimposed signal is about to occur or just jump, and the total offset of the superimposed signal relative to the analog signal is obtained, and the method comprises the following steps:

performing voltage offset adjustment on the analog signal in a first vertical direction according to the first obtained single offset, and judging whether an ADC (analog-to-digital converter) coding value of a second sampling point on the superposed signal formed by the adjustment jumps or not;

if not, continuing to perform voltage offset adjustment on the analog signal in the first vertical direction according to the next obtained single offset, and if so, performing voltage offset adjustment on the analog signal in the second vertical direction according to the next obtained single offset;

performing voltage offset adjustment on the analog signal for multiple times until single offset participating in adjustment recurses to the precision control parameter N2, so that the ADC code value of a second sampling point on the formed superposed signal is about to occur or just jumps;

and determining the total offset of the superposed signal relative to the analog signal according to the single offset participating in adjustment and the corresponding vertical direction.

5. The method for measuring with high precision as claimed in claim 4, wherein the determining the division area of the first sampling point on the analog signal in the analog voltage range according to the total offset amount, and converting to obtain the actual voltage value of the first sampling point comprises:

when the ADC code value of a second sampling point on the formed superposed signal is about to jump, subtracting the number of the mobile units included in the total offset from the number of equal division of the analog voltage range, and calculating the serial number of the divided area where the first sampling point is located;

when the ADC code value of a second sampling point on the formed superposed signal just jumps, adding 1 to the number of equal parts divided by using the analog voltage range, subtracting the number of the mobile units included in the total offset, and calculating the serial number of a divided area where the first sampling point is located;

and determining the actual voltage value of the first sampling point in the analog voltage range according to the serial number of the divided area where the first sampling point is located.

6. The high-precision measurement method according to any one of claims 1 to 5, further comprising, after obtaining the actual voltage value of the first sampling point: and performing time domain measurement on the analog signal by using the actual voltage value of the first sampling point, and displaying a time domain measurement result and/or the actual voltage value of the first sampling point.

7. A digital oscilloscope, comprising:

a digital-to-analog converter for generating a bias signal for each voltage bias adjustment;

the bias adjusting circuit is used for generating an analog bias voltage according to the bias signal;

the impedance transformation network is used for superposing the analog bias voltage on an input analog signal to form a superposed signal;

the analog-to-digital converter is used for carrying out ADC processing on the superposed signal to obtain an ADC encoding value of a first sampling point on the analog signal;

the processing component is connected with the digital-to-analog converter and the analog-to-digital converter and used for sending the control code word corresponding to the offset signal to the digital-to-analog converter, acquiring the ADC code value of the first sampling point on the analog signal from the analog-to-digital converter, and obtaining the actual voltage value of the first sampling point by the high-precision measurement method according to any one of claims 1 to 6.

8. The digital oscilloscope of claim 7, wherein the processing component comprises:

the configuration module is used for acquiring quantization errors of the analog signals during ADC processing and minimum offset during voltage offset adjustment, and configuring the offset number N1 which can perform voltage offset adjustment with the minimum offset within an analog voltage range corresponding to an ADC code value of a first sampling point on the analog signals;

the distribution module is used for dividing the analog voltage range into equal parts according to the offset number N1 and a preset precision control parameter N2, and distributing single offset when the analog signal is subjected to voltage offset adjustment successively;

the control module is used for carrying out voltage offset adjustment on the analog signal for multiple times according to the single offset distributed each time, so that an ADC (analog-to-digital converter) code value of a second sampling point on the formed superposed signal is about to occur or just jumps, and the total offset of the superposed signal relative to the analog signal is obtained; the second sampling point and the first sampling point have the same sampling position on each frame digital waveform corresponding to the analog signal;

the calculation module is used for determining a division area of a first sampling point on the analog signal in the analog voltage range according to the total offset, and converting to obtain an actual voltage value of the first sampling point; and the measurement error corresponding to the actual voltage value of the first sampling point is smaller than the quantization error of the analog signal during ADC processing.

9. The digital oscilloscope of claim 7, further comprising an attenuation network and an adjustable gain amplifier:

the attenuation network is used for accessing the analog signal, attenuating the analog signal and inputting the attenuated signal to the impedance transformation network;

the adjustable gain amplifier is used for carrying out gain adjustment on the superposed signals output by the impedance transformation network and inputting the adjusted signals after gain adjustment to the analog-to-digital converter.

10. A computer-readable storage medium, characterized in that the medium has stored thereon a program executable by a processor to implement the high-precision measurement method according to any one of claims 1 to 6.