CN112928158A - Memory based on spin texture and preparation method thereof - Google Patents
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- 229910005900 GeTe Inorganic materials 0.000 claims abstract description 8
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- 239000004020 conductor Substances 0.000 claims abstract description 7
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(IV) oxide Inorganic materials O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 claims abstract description 7
- 229910052742 iron Inorganic materials 0.000 claims description 8
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- 229910000889 permalloy Inorganic materials 0.000 claims description 6
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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Abstract
The invention relates to a memory based on spin texture, which comprises a substrate, a ferroelectric layer and a ferromagnetic layer; the ferroelectric layer is positioned on the substrate; the ferromagnetic layer is located on the ferroelectric layer; the substrate is made of conductive material, and the ferroelectric layer is made of GeTe, SnTe or HfO2The material of the ferromagnetic layer is a material that conducts electrons having spin polarization. The memory device has the advantages of low power consumption, small size, high-density integration, simple structural design, high read-write speed and compatibility with a CMOS (complementary metal oxide semiconductor) process. The invention also relates to a preparation method of the memory based on the spin texture.
Description
Technical Field
The invention belongs to the technical field of storage, and particularly relates to a spin texture-based memory and a preparation method thereof.
Background
The invention has been half a century away from the memory invention, and with the rise and rapid development of new information technologies such as artificial intelligence, internet of things, big data and the like, the data volume is increased explosively, and the demand for data storage and processing speed is more and more intense. Therefore, the bottleneck problem of storage is more prominent in the development of modern information society, and in order to solve the problem, the main technical solutions at present comprise a magnetic field writing MRAM based on the spintronics and an SOT-, STT-MRAM based on the spin action, an FRAM based on the ferroelectric material, and a PRAM based on the phase change of the material and an RRAM based on the resistance change effect.
MRAM: the basic structure is a magnetic tunnel junction, i.e., the bottom film is a ferromagnetic material (pinning layer) whose magnetic spin direction is fixed; the middle layer is a tunneling layer; the upper layer is a free layer whose spin direction can be changed under an applied stress. If the spin direction of the free layer and the spin direction of the pinned layer coincide, the tunnel layer is in a low resistance state; otherwise, the circuit is in a high-impedance state. Thus, MRAM makes use of the resistance change of such a magnetic tunnel junction to realize storage. With the conventional MRAM, since a magnetic field cannot be introduced in the semiconductor device itself, a large current needs to be introduced to generate the magnetic field, and thus a bypass needs to be added in the structure. Therefore, this structure consumes much power and is also difficult to perform high-density integration. If the polarized current drive, namely STT-MRAM, is adopted, the bypass is not required to be added, so that the power consumption can be reduced, and the integration level can be greatly improved.
FRAM: mainly utilizes the ferroelectric effect of the ferroelectric crystal, when an electric field is applied to the ferroelectric crystal, the central atom moves to a low energy level along the direction of the electric field, and when the electric field is reversed, the central atom moves to a low energy level on the other side. And the data will not return to the intermediate state after the electric field is removed because the center is at a high energy level and will not return to the intermediate state if the atoms do not get energy, so the FRAM holds the data without voltage and without periodic refreshing as in DRAM. Since the ferroelectric effect is a polarization characteristic inherent to the ferroelectric crystal and is independent of the electromagnetic effect, the content of the FRAM memory is not affected by external conditions (such as magnetic field factors), and the FRAM memory can be used as a common ROM memory and has a nonvolatile memory characteristic.
PRAM: another new type of memory is PRAM. It is also a sandwich structure. In the middle is a phase change layer (GST, as with the disc material) which has a property of being able to switch between a crystalline (low resistance state) and an amorphous (high resistance state), i.e. to use the change in the high and low resistance states to achieve storage.
RRAM: RRAM looks similar to PRAM, except that the principle of the intermediate transition layer is different. Phase change is the transition of a material between a crystalline state and an amorphous state, and resistance change is the detection of the high and low resistance states of a structure by forming and breaking filaments (conductive paths) in the material.
From the existing storage technologies, the FRAM has the advantages of low power consumption, low working voltage, radiation resistance and the like; the RRAM has the advantages of simple design, large capacity and good compatibility with CMOS (complementary metal oxide semiconductor) process; the STT-MRAM has the advantages of high read-write speed, fatigue resistance, irradiation resistance and the like. At the same time, however, these new principle devices also have some inherent disadvantages that limit their further development. For example, in FRAM, the ferroelectric material preparation process is poor in compatibility with CMOS, and cannot be further reduced in size, and cannot meet high-density integration; the MRAM has a complicated process and a limited information writing speed. Therefore, it is highly desirable to develop a novel nonvolatile memory with low power consumption, small size, high density integration, simple structure design, fast read/write speed, and compatibility with CMOS process.
Disclosure of Invention
The invention aims to solve the technical problem in the prior art and provides a memory based on spin texture and a preparation method thereof.
To solve the above technical problem, an embodiment of the present invention provides a spin texture based memory, including a substrate, a ferroelectric layer, and a ferromagnetic layer;
the ferroelectric layer is positioned on the substrate;
the ferromagnetic layer is located on the ferroelectric layer;
the substrate is made of conductive material, and the ferroelectric layer is made of GeTe, SnTe or HfO2The material of the ferromagnetic layer is a material that conducts electrons having spin polarization.
On the basis of the technical scheme, the invention can be further improved as follows.
Further, the material of the substrate is doped silicon.
Further, the material of the ferromagnetic layer is permalloy, Fe or Co.
Further, the thickness of the ferroelectric layer is 5-200 nm.
Further, the ferromagnetic layer has a thickness of 5 to 20 nm.
In order to solve the above technical problem, an embodiment of the present invention provides a method for manufacturing a spin texture based memory, including the following steps:
depositing the ferroelectric layer on the substrate;
depositing the ferromagnetic layer on the ferroelectric layer;
the substrate is made of conductive material, and the ferroelectric layer is made of GeTe, SnTe or HfO2The material of the ferromagnetic layer is a material that conducts electrons having spin polarization.
On the basis of the technical scheme, the invention can be further improved as follows.
Further, the material of the substrate is doped silicon.
Further, the material of the ferromagnetic layer is permalloy, Fe or Co.
Further, the ferroelectric layer and the ferromagnetic layer are deposited by physical vapor deposition.
Further, the thickness of the ferroelectric layer is 5-200 nm; or the thickness of the ferromagnetic layer is 5-20 nm.
The invention has the beneficial effects that: the storage device adopts different principles for reading/writing information, utilizes electricity to realize the electric polarization of the iron electrode when the information is written, thereby changing the spin texture, and has the advantages of high writing speed and low writing voltage of the ferroelectric memory; when information is read out, a spin dependent scattering (spin dependent) based mechanism of a spin electronic device is utilized, so that the device has the advantage of high information reading speed of the MRAM, and meanwhile, the storage device has the advantages of low power consumption, small size, high-density integration, simple structural design and compatibility with a CMOS (complementary metal oxide semiconductor) process.
Drawings
FIG. 1 is a schematic structural diagram of a spin texture-based memory according to an embodiment of the present invention;
fig. 2 is a schematic diagram illustrating an operation principle of a spin texture based memory according to an embodiment of the present invention.
In the drawings, the components represented by the respective reference numerals are listed below:
1. substrate, 2, ferroelectric layer, 3, ferromagnetic layer.
Detailed Description
The principles and features of this invention are described below in conjunction with the following drawings, which are set forth by way of illustration only and are not intended to limit the scope of the invention.
As shown in fig. 1, a spin texture-based memory according to an embodiment of the present invention includes a substrate 1, a ferroelectric layer 2, and a ferromagnetic layer 3;
the ferroelectric layer 2 is positioned on the substrate 1;
the ferromagnetic layer 3 is located on the ferroelectric layer 2;
the substrate 1 is made of a conductive material, and the ferroelectric layer 2 is made of GeTe, SnTe or HfO2The material of the ferromagnetic layer 3 is a material that conducts electrons having spin polarization.
In the above embodiment, the substrate 1 and the ferromagnetic layer 3 can be used as electrodes to apply an electric field to the middle ferroelectric layer 2, the material of the ferroelectric layer 2 can be a ferroelectric material with significant spin-orbit coupling, and the spin texture can be changed by voltage.
The basic operating principle and process of the memory device of the present invention are as follows: the ferroelectric layer material in the memory has strong Spin orbit coupling effect, and the Spin Texture (Spin Texture) of the ferroelectric layer material can be changed according to the change of the ferroelectric polarization of the ferroelectric layer material, namely the direction and the size distribution of Spin vectors in space, so that the ferroelectric polarization of the ferroelectric layer material can be changed by changing the direction of an external electric field, and the Spin Texture of the ferroelectric layer material is also changed. Specifically, the upper and lower layers of the memory device are used as electrodes to apply an electric field to the middle ferroelectric layer, and the inversion of the ferroelectric polarization Ps of the ferroelectric layer material is controlled by the inversion of the electric field, so that the spin texture in the ferroelectric layer material is changed. In addition, different spin texture states in the ferroelectric layer material have an effect on the electron transport process at the interface of the ferroelectric layer material and the ferromagnetic layer thin film material: the scattering of electrons with different spin polarizations in the ferromagnetic thin film material is different, so when a current Js is applied to the ferromagnetic layer material, the spin-polarized electrons are scattered by different spin textures generated in the ferroelectric layer material in the transport process of the current, and the scattering is different in magnitude, so that the current flowing through the ferromagnetic layer is different, and different resistance states are generated in the ferromagnetic thin film.
The above principle and the read/write process are shown in the following fig. 2, where the directions of the coordinate axes are shown in the figure, and fig. 2 is a side sectional view of the memory cell. Here, the common voltage source symbols in the circuit diagram are used, and the symbols "-" denote a current source, "S" denotes the spin direction of electrons in the material of the ferromagnetic layer, and "S'" denotes the spin texture direction in the material of the ferromagnetic layer. Since the polarization state of the ferroelectric layer is always kept stable when a current is applied to the material of the ferromagnetic layer, the spin direction therein can be fixed. In fig. 2(a), if the spin texture indirectly controlled by the applied electric field in the ferroelectric layer is consistent with the spin direction of the electrons in the ferromagnetic layer, the current in the ferromagnetic layer material is less scattered at the interface, which represents a low resistance state at this time, and may correspond to "0" in the computer language; in fig. 2(b), the applied voltage changes direction, which causes the polarization direction in the ferroelectric layer material to change, and thus the spin texture is also changed, so that the spin texture in the ferroelectric layer material is opposite to the electron spin direction in the ferromagnetic layer material, and the electrons in the ferromagnetic layer material are scattered largely at the interface, and appear as a high resistance state, which may correspond to "1" in the computer language. Wherein, the process of changing the direction of the applied voltage to indirectly change the spin texture of the ferroelectric layer material is the process of writing information; the process of reading the change of the high and low resistance states of the resistance from the ferromagnetic layer material is the process of information readout.
From the working principle and process of the above device, the memory device of the present invention has the following basic features:
(1) non-volatile: spin texturing is used to store information, which is determined by the structure and composition of the material itself, does not require input energy such as voltage or current to maintain, and does not easily return to its original state once changed, and thus is a typical non-volatile memory.
(2) The structural design is simple: in the device structure, only three layers of materials are needed, namely a substrate with conductivity, a magnetic metal and a ferromagnetic semiconductor. Reading of information is similar to RRAM, reading the resistance of the word bit line crossing the selected cell, and writing is similar to FRAM, using a voltage to flip the ferroelectric polarization direction.
(3) The reading and writing speed is high: in the device design, information writing and reading are completed by different material regions (information writing is completed by the ferroelectric layer, information reading is completed by the ferromagnetic layer), the information reading and information writing processes are independent, and the time interval limit of information writing and reading operations of STT-MRAM and RRAM is avoided. Meanwhile, the information reading process is non-destructive, and operations such as SET/RESET in FRAM and RRAM are not needed.
(4) The process compatibility is good: the material used by the device is ferroelectric semiconductor and ferromagnetic metal, wherein, the ferroelectric semiconductor can be the material used by RRAM such as GeTe, even HfO commonly used in CMOS process can be used2Materials, ferromagnetic metals such as Fe and Co, do not need high temperature heat treatment in the growth process, therefore, the materials used by the device can be prepared at low temperature and are completely compatible with CMOS process.
Optionally, the material of the substrate 1 is doped silicon.
Optionally, the material of the ferromagnetic layer 3 is permalloy (Ni)80Fe20) Fe or Co.
Optionally, the ferroelectric layer 2 has a thickness of 5-200 nm.
Optionally, the ferromagnetic layer 3 has a thickness of 5-20 nm.
The embodiment of the invention provides a preparation method of a memory based on spin texture, which comprises the following steps:
depositing the ferroelectric layer 2 on the substrate 1;
depositing the ferromagnetic layer 3 on the ferroelectric layer 2;
the substrate 1 is made of a conductive material, and the ferroelectric layer 2 is made of GeTe, SnTe or HfO2The material of the ferromagnetic layer 3 is a material that conducts electrons having spin polarization.
In the above embodiment, the spin texture of the ferroelectric layer is controlled by the electric polarization thereof, so as to realize information writing; double frequency resistance (R) to ferromagnetic layer by Hall electrode structure2ω) And testing to obtain the high and low states of the resistor, thereby realizing the reading of information.
Optionally, the material of the substrate 1 is doped silicon.
Optionally, the material of the ferromagnetic layer 3 is permalloy (Ni)80Fe20) Fe or Co.
Alternatively, the ferroelectric layer 2 and the ferromagnetic layer 3 are deposited by physical vapor deposition.
In the embodiment, a plurality of electron beam evaporation sources can be selected, so that continuous deposition of a plurality of layers of different films can be realized, and possible pollution in the sample transfer process is avoided.
Optionally, the thickness of the ferroelectric layer 2 is 5-200 nm; or the thickness of the ferromagnetic layer 3 is 5-20 nm.
The storage device based on the spin texture utilizes the spin texture to store information, the macroscopic magnetic moment is not controlled, and the ferroelectric layer does not have magnetism, so that the storage device can be prevented from being interfered by a magnetic field. The inversion process of the spin texture is controlled by electric polarization, so that the power consumption in the information writing process can be reduced, and compared with the magnetic moment control based on an STT process, the method also has the advantage of high writing speed.
In the description of the present invention, it is to be understood that the terms "central," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the invention and to simplify the description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be considered limiting of the invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
In the present invention, unless otherwise expressly stated or limited, the first feature "on" or "under" the second feature may be directly contacting the first and second features or indirectly contacting the first and second features through an intermediate. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (10)
1. A spin texture based memory comprising a substrate (1), a ferroelectric layer (2) and a ferromagnetic layer (3);
the ferroelectric layer (2) is positioned on the substrate (1);
the ferromagnetic layer (3) is located on the ferroelectric layer (2);
the substrate (1) is made of a conductive material, and the ferroelectric layer (2) is made of GeTe, SnTe or HfO2The material of the ferromagnetic layer (3) is a material that conducts electrons with spin polarization.
2. A spin texture based memory as claimed in claim 1, wherein the material of the substrate (1) is doped silicon.
3. A spin texture based memory as claimed in claim 1, wherein the material of the ferromagnetic layer (3) is permalloy, Fe or Co.
4. A spin texture based memory as claimed in claim 1, wherein the ferroelectric layer (2) has a thickness of 5-200 nm.
5. A spin texture based memory as claimed in claim 1, wherein the ferromagnetic layer (3) has a thickness of 5-20 nm.
6. A method for preparing a memory based on spin texture is characterized by comprising the following steps:
depositing a ferroelectric layer (2) on a substrate (1);
depositing a ferromagnetic layer (3) on the ferroelectric layer (2);
the substrate (1) is made of a conductive material, and the ferroelectric layer (2) is made of GeTe, SnTe or HfO2The material of the ferromagnetic layer (3) is a material that conducts electrons with spin polarization.
7. A method according to claim 6, wherein the material of the substrate (1) is doped silicon.
8. A spin texture based memory as claimed in claim 6, wherein the material of the ferromagnetic layer (3) is permalloy, Fe or Co.
9. A method according to claim 6, wherein the ferroelectric layer (2) and the ferromagnetic layer (3) are deposited by physical vapor deposition.
10. A method according to claim 6, wherein the thickness of the ferroelectric layer (2) is 5-200 nm; or the thickness of the ferromagnetic layer (3) is 5-20 nm.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004134507A (en) * | 2002-10-09 | 2004-04-30 | Matsushita Electric Ind Co Ltd | Non-volatile field effect transistor equipped with laminated insulating film |
| CN101262040A (en) * | 2008-04-24 | 2008-09-10 | 湘潭大学 | Oxide lanthanon magnetic semiconductor/ferroelectric heterogeneous structure and its making method |
| CN104362094A (en) * | 2014-10-16 | 2015-02-18 | 中国科学院上海技术物理研究所 | Preparation method of ferroelectric field effect transistor for regulation of ferromagnetism |
| CN107488833A (en) * | 2017-08-08 | 2017-12-19 | 电子科技大学 | A kind of new Magnetoelectric film material and preparation method thereof |
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- 2019-12-05 CN CN201911234564.0A patent/CN112928158A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004134507A (en) * | 2002-10-09 | 2004-04-30 | Matsushita Electric Ind Co Ltd | Non-volatile field effect transistor equipped with laminated insulating film |
| CN101262040A (en) * | 2008-04-24 | 2008-09-10 | 湘潭大学 | Oxide lanthanon magnetic semiconductor/ferroelectric heterogeneous structure and its making method |
| CN104362094A (en) * | 2014-10-16 | 2015-02-18 | 中国科学院上海技术物理研究所 | Preparation method of ferroelectric field effect transistor for regulation of ferromagnetism |
| CN107488833A (en) * | 2017-08-08 | 2017-12-19 | 电子科技大学 | A kind of new Magnetoelectric film material and preparation method thereof |
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| C. RINALDI等: "Evidence for spin to charge conversion in GeTe(111)", 《APL MATERIALS》 * |
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