CN112924854B - Arbitrary waveform format generation method, apparatus, test device and storage medium - Google Patents
Arbitrary waveform format generation method, apparatus, test device and storage medium Download PDFInfo
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/31813—Test pattern generators
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
- G01R31/318371—Methodologies therefor, e.g. algorithms, procedures
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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Abstract
The application relates to an arbitrary waveform format generation method, an arbitrary waveform format generation device, test equipment and a storage medium. The method comprises the following steps: acquiring a waveform reading instruction, and reading a waveform data sequence according to the waveform reading instruction; acquiring minimum waveform format unit information; and splicing the target waveform according to the minimum waveform format unit information and the waveform data sequence. The method can splice any required waveforms only by the minimum waveform format unit information and the waveform data sequence, meets the test requirement of mass production chips, and improves the test efficiency.
Description
Technical Field
The present application relates to the field of integrated circuit testing technologies, and in particular, to a method and apparatus for generating an arbitrary waveform format, a testing device, and a storage medium.
Background
With the increasing scale of integrated circuits, the functionality of ICs (Integrated Circuit, integrated circuits) is increasing. Testing is performed before the IC leaves the factory, and thus various types of digital waveform states are required to test the function of the IC.
The general digital tester can only generate 4 kinds, 16 kinds and other limited fixed waveform formats, can only generate several kinds or more than ten kinds of limited digital waveforms, and does not meet the current IC test requirements, so that the test efficiency is low.
Disclosure of Invention
In view of the foregoing, it is desirable to provide an arbitrary waveform format generation method, apparatus, test device, and storage medium capable of generating an arbitrary waveform format.
In a first aspect, there is provided a method of generating an arbitrary waveform format, the method comprising:
acquiring a waveform reading instruction, and reading a waveform data sequence according to the waveform reading instruction;
acquiring minimum waveform format unit information;
and splicing the target waveform according to the minimum waveform format unit information and the waveform data sequence.
In one embodiment, the waveform data sequence is generated by a computer device, and the generating of the waveform data sequence includes:
determining a minimum waveform format unit according to waveform requirements;
and generating the waveform data sequence according to the minimum waveform format unit and the waveform timing requirement.
In one embodiment, the minimum waveform format unit information includes a minimum waveform format unit, a clock period, a clock cycle number, and a waveform cycle number;
splicing a target waveform according to the minimum waveform format unit information and the waveform data sequence, wherein the method comprises the following steps:
under the control of the clock cycle, a target waveform is spliced according to the minimum waveform format unit, the clock cycle number, the waveform data sequence and the waveform cycle number.
In one embodiment, under the control of the clock cycle, a target waveform is spliced according to the minimum waveform format unit, the clock cycle number, the waveform data sequence and the waveform cycle number, including:
under the control of the clock cycle, the clock cycle number is used as the holding time of each bit of waveform data sequence, the number of waveform cycles is used as the cycle number of each group of waveform data sequence, and the target waveform is spliced according to the minimum waveform format unit and the waveform data sequence.
In one embodiment, the generating method of the minimum waveform format unit information includes:
calculating a minimum waveform format unit for generating the waveform data sequence according to the duration time of the high level and the low level in the required waveform;
setting the number of waveform periods according to the minimum waveform format unit;
the number of clock cycles is determined based on the clock cycle and the minimum waveform unit.
In one embodiment, the method further comprises: outputting the target waveform to a chip to be tested, and testing the chip to be tested according to the target waveform;
and stopping the test if the end of the test process is detected.
In one embodiment, if the end of the test procedure is detected, stopping the test includes:
stopping outputting the waveform when the occurrence of a stop signal in the target waveform is detected;
or stopping outputting the waveform when the output size of the target waveform is equal to the preset file size.
In a second aspect, there is provided an arbitrary waveform format generating apparatus comprising:
the first acquisition module is used for acquiring a waveform reading instruction and reading a waveform data sequence according to the waveform reading instruction;
the second acquisition module is used for acquiring the minimum waveform format unit information;
and the waveform generation module is used for splicing the target waveform according to the minimum waveform format unit information and the waveform data sequence.
In a third aspect, there is provided a test apparatus comprising a memory storing a computer program and a processor which when executing the computer program performs the steps of:
acquiring a waveform reading instruction, and reading a waveform data sequence according to the waveform reading instruction;
acquiring minimum waveform format unit information;
and splicing the target waveform according to the minimum waveform format unit information and the waveform data sequence.
In a fourth aspect, there is provided a computer readable storage medium having stored thereon a computer program which, when executed by a processor, performs the steps of:
acquiring a waveform reading instruction, and reading a waveform data sequence according to the waveform reading instruction;
acquiring minimum waveform format unit information;
and splicing the target waveform according to the minimum waveform format unit information and the waveform data sequence.
The method, the device, the test equipment and the storage medium for generating the arbitrary waveform format acquire a waveform reading instruction and read a waveform data sequence according to the waveform reading instruction; acquiring minimum waveform format unit information; and splicing the target waveform according to the minimum waveform format unit information and the waveform data sequence. The method can splice any required waveforms only by the minimum waveform format unit information and the waveform data sequence, meets the test requirement of mass production chips, and improves the test efficiency.
Drawings
FIG. 1 is an application environment diagram of an arbitrary waveform format generation method in one embodiment;
FIG. 2 is a flow chart of a method of generating arbitrary waveform format in one embodiment;
FIG. 3 is a flow chart of a waveform data sequence generation step in one embodiment;
FIG. 4 is an exemplary diagram of a method of arbitrary waveform format generation in one embodiment;
FIG. 5 is a complete schematic diagram of a method of arbitrary waveform format generation in one embodiment;
FIG. 6 is a block diagram showing the structure of an arbitrary waveform format generating apparatus in one embodiment;
FIG. 7 is an internal block diagram of a test device in one embodiment.
Detailed Description
The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.
The existing testing machine can only generate 4 kinds of limited and fixed waveform formats, such as 16 kinds of limited and fixed waveform formats, and can only generate several kinds or more than ten kinds of limited digital waveforms, and the existing IC testing requirements are not met. The digital tester is not programmable, but can only generate a limited fixed waveform format, which cannot be modified. However, the testing of the IC requires an arbitrary waveform format, so that in the current IC testing process, a lot of inconveniences are brought to mass production testing due to the lack of a related digital testing machine, and the testing efficiency is low.
The arbitrary waveform format generation method provided by the application can be applied to an application environment shown in figure 1. The computer equipment is communicated with the testing machine, the testing machine acquires a waveform data sequence and minimum waveform format unit information from the computer equipment, then a target waveform is spliced according to the acquired waveform data sequence and the minimum waveform format unit information, and the target waveform is transmitted to the chip to be tested.
In one embodiment, as shown in fig. 2, an arbitrary waveform format generating method is provided, and the method is applied to the test machine in fig. 1 for illustration, and includes the following steps:
step 202, acquiring a waveform reading instruction, and reading a waveform data sequence according to the waveform reading instruction.
The waveform reading instruction refers to a command sent by the testing machine for reading the waveform data sequence. The waveform data sequence refers to a sequence of binary codes required by the tester to generate the target waveform, with "1" representing a high level and "0" representing a low level.
Specifically, a waveform reading instruction sent by a testing machine is obtained, and a data memory in the testing machine reads a waveform data sequence from a memory of computer equipment according to the waveform reading instruction; the testing machine stores the read waveform data sequence into a data memory in the testing machine; a vector reading module in an FPGA (Field Programmable Gate Array ) module in the testing machine reads the waveform data sequence from a data memory of the testing machine so that the testing machine generates a target waveform according to the waveform data sequence and the minimum waveform format unit information.
When the data memory of the testing machine has no needed waveform data sequence, the waveform data sequence is read from the memory of the computer equipment and stored in the data memory of the testing machine. Storing waveform data sequences in the memory of the computer device and in the data memory of the tester can improve the reliability of the data.
The testing machine stores the waveform data sequence read from the memory of the computer equipment into the data memory of the testing machine, and when the waveform reading instruction is obtained, the waveform data sequence is directly obtained from the data memory of the testing machine, so that the time of data transmission can be reduced, and the transmission efficiency is improved.
Step 204, obtaining minimum waveform format unit information.
The minimum waveform format unit information includes minimum waveforms required for generating the target waveform and other minimum waveform format unit related information.
Specifically, a clock module of the testing machine acquires minimum waveform format unit information from a memory of the computer equipment; or the clock module of the testing machine acquires the minimum waveform format unit information from the data memory of the testing machine, and the minimum waveform format unit information in the data memory of the testing machine is also acquired from the memory of the computer equipment.
When the data memory of the testing machine has no minimum waveform format unit information, the minimum waveform format unit information is read from the memory of the computer equipment and stored in the data memory of the testing machine. Storing the minimum waveform format unit information in the memory of the computer device and in the data memory of the tester can improve the reliability of the data.
The test machine stores the minimum waveform format unit information read from the memory of the computer equipment into the data memory of the test machine, and when the target waveform needs to be generated, the minimum waveform format unit information is directly obtained from the data memory of the test machine, so that the time for data transmission can be reduced, and the transmission efficiency is improved.
And step 206, splicing the target waveform according to the minimum waveform format unit information and the waveform data sequence.
Specifically, according to the obtained minimum waveform format unit information and each bit binary code in the waveform data sequence, the required target waveform is spliced.
In the method for generating the arbitrary waveform format, a waveform reading instruction is acquired, and a waveform data sequence is read according to the waveform reading instruction; acquiring minimum waveform format unit information; and splicing the target waveform according to the minimum waveform format unit information and the waveform data sequence. The method can splice any required waveforms only by the minimum waveform format unit information and the waveform data sequence, meets the test requirement of mass production chips, and improves the test efficiency.
In one embodiment, the waveform data sequence is generated by a computer device, as shown in FIG. 3, and the generating of the waveform data sequence includes:
determining a minimum waveform format unit according to waveform requirements;
and generating the waveform data sequence according to the minimum waveform format unit and the waveform timing requirement.
Wherein the waveform requirement refers to the duration of high level and low level in a required section of target waveform. The minimum waveform format unit refers to a period of the minimum waveform format unit required for generating the waveform data sequence, that is, a minimum duration of one high level or one low level. The waveform timing requirement refers to the waveform timing of the target waveform required by the chip to be tested.
Specifically, the computer device determines the period of the minimum waveform format unit, i.e., the minimum duration of one high level or low level, based on the durations of high and low levels in the target waveform. The waveform data sequence is generated based on the minimum duration of the high level or the low level and the waveform timing of the target waveform.
The computer device stores the generated minimum waveform format unit and waveform data sequence in the memory of the computer device, so that the memory of the testing machine reads the required minimum waveform format unit and waveform data sequence from the memory of the computer device according to the requirement.
In one embodiment, the minimum waveform format unit information includes a minimum waveform format unit, a clock period, a number of clock periods, and a number of waveform periods;
splicing a target waveform according to the minimum waveform format unit information and the waveform data sequence, wherein the method comprises the following steps:
under the control of the clock cycle, a target waveform is spliced according to the minimum waveform format unit, the clock cycle number, the waveform data sequence and the waveform cycle number.
Specifically, the minimum waveform format unit information includes a minimum waveform format unit, a clock cycle number, and a waveform cycle number. After the computer equipment generates the minimum waveform format unit, the clock cycle number and the waveform cycle number are determined according to the minimum waveform format unit and the clock cycle, the minimum waveform format unit, the clock cycle number and the waveform cycle number are stored into the memory of the computer equipment, and the test machine stores the minimum waveform format unit, the clock cycle number and the waveform cycle number in the memory of the computer equipment into the data memory of the test machine. When the tester needs to generate the target waveform, a clock module of the tester reads the minimum waveform format unit, the clock period number and the waveform period number from the data memory, and under the control of the clock period, the target waveform is spliced according to the minimum waveform format unit, the clock period number, the waveform data sequence and the waveform period number.
In one embodiment, the generating manner of the minimum waveform format unit information includes:
calculating a minimum waveform format unit for generating the waveform data sequence according to the duration time of the high level and the low level in the required waveform;
setting the number of waveform periods according to the minimum waveform format unit;
the number of clock cycles is determined based on the clock cycle and the minimum waveform unit.
Specifically, as shown in fig. 3, the computer device calculates the greatest common divisor of the durations of the high level and the low level, that is, the minimum duration of one high level or low level, according to the durations of the high level and the low level in the target waveform, and takes the greatest common divisor of the durations of the high level and the low level as the period of the minimum waveform format unit. The waveform period number is set according to the period of the minimum waveform format unit, and the waveform period number refers to the cycle number of each group of waveform data sequence. The clock period refers to the main clock signal of the bottom layer of the tester, and is the minimum non-zero common divisor of all high-level and low-level durations in the unit period of the waveform of the required target waveform. Calculating the period of the minimum waveform format unit according to the clock period requires more than a few clock periods, namely, the period of the minimum waveform format unit divided by the clock period is equal to the clock period number, and the holding time of each bit waveform data sequence is the clock period number multiplied by the clock period.
In one embodiment, under the control of the clock cycle, a target waveform is spliced according to the minimum waveform format unit, the clock cycle number, the waveform data sequence and the waveform cycle number, including:
under the control of the clock cycle, the clock cycle number is used as the holding time of each bit of waveform data sequence, the number of waveform cycles is used as the cycle number of each group of waveform data sequence, and the target waveform is spliced according to the minimum waveform format unit and the waveform data sequence.
Specifically, under the control of a master clock signal, an FPGA module of the tester takes the clock cycle number as the holding time of each bit of waveform data sequence, takes the waveform cycle number as the cycle number of each group of waveform data sequence, and splices the target waveform according to the waveform data sequence. As shown in fig. 4, the minimum waveform format unit has a period of T1, a clock period of T0, a clock period of Tcnt, and a waveform period of T1cnt, and the desired target waveform is 2s low, 4s high, 2s low, and 4s high. Assuming that the clock period T0 is 1s, the duration of the high level of the required target waveform is 4s, the duration of the low level is 2s, and the period T1 of the minimum waveform format unit is 2s, that is, the duration of the minimum waveform is T1; the clock cycle number tcnt=t1/t0=2, i.e. the hold time of each bit waveform data sequence is 2 clock cycles; setting T1cnt to 3, the number of cycles per set of waveform data sequences is 3. The computer equipment generates a waveform data sequence 01010110111 according to the minimum waveform unit period T1 and waveform time sequence, stores the waveform data sequence and T1, T0, T1cnt and Tcnt into a memory, and downloads the waveform data sequence and T1, T0, T1cnt and Tcnt in the memory of the computer equipment into a data memory of the testing machine. Since tcnt=t1/t0=2, that is, the binary hold time of each bit of the waveform data sequence required for programming according to the minimum waveform format unit is 2T 0 cycles, the detected signals are the same in both clock cycles, that is, one set of waveform data sequences is output as 001111, and the number of cycles of each set of waveform data sequences is 3, the data sequence of the output target waveform is 001111 001111 001111.
In one embodiment, the method further comprises: outputting the target waveform to a chip to be tested, and testing the chip to be tested according to the target waveform;
and stopping the test if the end of the test process is detected.
Specifically, the tester outputs the generated target waveform to the multi-path level conversion circuit for level conversion, and outputs the data sequence of the converted target waveform to the chip to be tested. The testing machine also needs to detect whether the testing process is finished, and when the testing process is detected to be finished, the waveform output of the chip to be tested is stopped, and the testing is stopped. And when the testing process is not finished, continuing to sequentially output the data sequence of the next group of waveforms in the testing machine.
In this embodiment, the target waveform is converted by the multi-path level conversion circuit, so that the voltage of the tester is consistent with the chip to be tested, and the driving capability can be improved, thereby improving the testing capability of the chip to be tested.
In one embodiment, if the end of the test procedure is detected, the test is stopped, including:
stopping outputting the waveform when the occurrence of a stop signal in the target waveform is detected;
or stopping outputting the waveform when the output size of the target waveform is equal to the preset file size.
Specifically, the testing machine detects whether the testing process is finished or not, and can stop outputting the waveform and stopping testing by detecting whether a stop signal appears in the data sequence of the target waveform and stopping testing when the stop signal appears in the data sequence of the target waveform; the output waveform is stopped and the test is stopped by setting the preset file size, and whether the test process is finished or not can be detected by other means when the data sequence size of the output target waveform is equal to the preset file size.
The testing machine detects whether the testing process is finished through the stop signal, a preset stop signal is added into a data sequence of the target waveform after the required target waveform is generated, and the output waveform is stopped after the preset stop signal is detected in the testing process, so that the testing is stopped.
The testing machine judges whether the testing process is finished or not through the preset file size, when the target waveform is generated, the data sequence size of the target waveform needs to be known, when the output waveform is detected to be equal to the data sequence size of the preset target waveform, the output of the target waveform is proved to be finished, and then the output of the waveform is stopped, and the testing is stopped.
In order to facilitate understanding of the technical solution provided by the embodiments of the present application, a complete arbitrary waveform format generation process is used to briefly describe the arbitrary waveform format generation method provided by the embodiments of the present application:
(1) The computer equipment calculates a minimum waveform format unit for generating the waveform data sequence according to the duration time of the high level and the low level in the required waveform;
setting the number of waveform periods according to the minimum waveform format unit;
determining the number of clock cycles based on the clock cycle and the minimum waveform element;
(2) The computer equipment generates the waveform data sequence according to the minimum waveform format unit and the waveform time sequence requirement, and stores the minimum waveform format unit, the clock period number, the waveform period number and the waveform data sequence in a memory of the computer equipment and downloads the waveform data sequence into a data memory of the testing machine.
(2) The data memory of the testing machine acquires a waveform reading instruction, and reads a waveform data sequence in the data memory of the testing machine according to the waveform reading instruction;
acquiring minimum waveform format unit information in a data memory of the tester, wherein the minimum waveform format unit information comprises a minimum waveform format unit, clock cycles and waveform cycle numbers;
(3) Under the control of clock cycle, the FPGA module of the tester takes the clock cycle number as the holding time of each bit of waveform data sequence, takes the waveform cycle number as the cycle number of each group of waveform data sequence, and splices the target waveform according to the minimum waveform format unit and the waveform data sequence.
(4) Outputting the target waveform to a chip to be tested, and testing the chip to be tested according to the target waveform;
stopping outputting the waveform when the occurrence of a stop signal in the target waveform is detected;
or stopping outputting the waveform when the output size of the target waveform is equal to the preset file size.
It should be understood that, although the steps in the flowcharts of fig. 3-5 are shown in order as indicated by the arrows, these steps are not necessarily performed in order as indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least some of the steps in fig. 3-5 may include multiple steps or stages that are not necessarily performed at the same time, but may be performed at different times, nor does the order in which the steps or stages are performed necessarily performed in sequence, but may be performed alternately or alternately with at least a portion of the steps or stages in other steps or other steps.
In one embodiment, as shown in fig. 6, there is provided an arbitrary waveform format generating apparatus including: a first acquisition module 602, a second acquisition module 604, and a third acquisition module 606, wherein:
the first obtaining module 602 is configured to obtain a waveform reading instruction, and read a waveform data sequence according to the waveform reading instruction.
A second obtaining module 604, configured to obtain minimum waveform format unit information.
The waveform generation module 606 is configured to splice the target waveform according to the minimum waveform format unit information and the waveform data sequence.
In one embodiment, the waveform data sequence is generated by a computer device for determining a minimum waveform format unit based on waveform requirements;
and generating the waveform data sequence according to the minimum waveform format unit and the waveform timing requirement.
In one embodiment, the minimum waveform format unit information includes a minimum waveform format unit, a clock period, a number of clock periods, and a number of waveform periods;
the waveform generation module 606 is further configured to splice a target waveform according to the minimum waveform format unit, the clock cycle number, the waveform data sequence, and the waveform cycle number under control of the clock cycle.
In one embodiment, the waveform generation module 606 is further configured to splice the target waveform according to the minimum waveform format unit and the waveform data sequence under the control of the clock cycle, using the clock cycle number as the hold time of each bit of the waveform data sequence, and using the number of waveform cycles as the number of cycles of each group of the waveform data sequence.
In one embodiment, the generating manner of the minimum waveform format unit information includes:
calculating a minimum waveform format unit for generating the waveform data sequence according to the duration time of the high level and the low level in the required waveform;
setting the number of waveform periods according to the minimum waveform format unit;
the number of clock cycles is determined based on the clock cycle and the minimum waveform unit.
In one embodiment, the arbitrary waveform format generating device further includes an output module, configured to output the target waveform to a chip to be tested, and test the chip to be tested according to the target waveform;
and stopping the test if the end of the test process is detected.
In one embodiment, the output module is further configured to stop outputting the waveform when a stop signal is detected to occur in the target waveform;
or stopping outputting the waveform when the output size of the target waveform is equal to the preset file size.
The specific limitation of the arbitrary waveform format generating apparatus may be referred to the limitation of the arbitrary waveform format generating method hereinabove, and will not be described herein. The respective modules in the arbitrary waveform format generating apparatus described above may be implemented in whole or in part by software, hardware, or a combination thereof. The modules can be embedded in the processor in the test equipment or independent of the processor in the test equipment in a hardware form, and can also be stored in the memory in the test equipment in a software form, so that the processor can call and execute the operations corresponding to the modules.
In one embodiment, a test apparatus is provided, the internal structure of which may be as shown in FIG. 7. The test equipment comprises a processor, a memory, a communication interface, a display screen and an input device which are connected through a system bus. Wherein the processor of the test device is configured to provide computing and control capabilities. The memory of the test equipment comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The communication interface of the test device is used for carrying out wired or wireless communication with an external terminal, and the wireless mode can be realized through WIFI, an operator network, NFC (near field communication) or other technologies. The computer program is executed by a processor to implement a method of arbitrary waveform format generation. The display screen of the test equipment can be a liquid crystal display screen or an electronic ink display screen, and the input device of the test equipment can be a touch layer covered on the display screen, can also be keys, a track ball or a touch pad arranged on the shell of the test equipment, and can also be an external keyboard, a touch pad or a mouse and the like.
It will be appreciated by those skilled in the art that the structure shown in fig. 7 is merely a block diagram of a portion of the structure associated with the present inventive arrangements and is not limiting of the test apparatus to which the present inventive arrangements are applied, and that a particular test apparatus may include more or fewer components than shown, or may combine certain components, or have a different arrangement of components.
In one embodiment, a test device is provided comprising a memory and a processor, the memory having stored therein a computer program, the processor when executing the computer program performing the steps of:
acquiring a waveform reading instruction, and reading a waveform data sequence according to the waveform reading instruction;
acquiring minimum waveform format unit information;
and splicing the target waveform according to the minimum waveform format unit information and the waveform data sequence.
In one embodiment, the processor when executing the computer program further performs the steps of: the waveform data sequence is generated by a computer device, the generating of the waveform data sequence comprising:
determining a minimum waveform format unit according to waveform requirements;
and generating the waveform data sequence according to the minimum waveform format unit and the waveform timing requirement.
In one embodiment, the processor when executing the computer program further performs the steps of: the minimum waveform format unit information comprises a minimum waveform format unit, clock cycles and waveform cycle numbers;
splicing a target waveform according to the minimum waveform format unit information and the waveform data sequence, wherein the method comprises the following steps:
under the control of the clock cycle, a target waveform is spliced according to the minimum waveform format unit, the clock cycle number, the waveform data sequence and the waveform cycle number.
In one embodiment, the processor when executing the computer program further performs the steps of: under the control of the clock cycle, a target waveform is spliced according to the minimum waveform format unit, the clock cycle number, the waveform data sequence and the waveform cycle number, and the method comprises the following steps:
under the control of the clock cycle, the clock cycle number is used as the holding time of each bit of waveform data sequence, the number of waveform cycles is used as the cycle number of each group of waveform data sequence, and the target waveform is spliced according to the minimum waveform format unit and the waveform data sequence.
In one embodiment, the processor when executing the computer program further performs the steps of: the generating mode of the minimum waveform format unit information comprises the following steps:
calculating a minimum waveform format unit for generating the waveform data sequence according to the duration time of the high level and the low level in the required waveform;
setting the number of waveform periods according to the minimum waveform format unit;
the number of clock cycles is determined based on the clock cycle and the minimum waveform unit.
In one embodiment, the processor when executing the computer program further performs the steps of: the method further comprises the steps of: outputting the target waveform to a chip to be tested, and testing the chip to be tested according to the target waveform;
and stopping the test if the end of the test process is detected.
In one embodiment, the processor when executing the computer program further performs the steps of: if the end of the testing process is detected, stopping the testing, including:
stopping outputting the waveform when the occurrence of a stop signal in the target waveform is detected;
or stopping outputting the waveform when the output size of the target waveform is equal to the preset file size.
In one embodiment, a computer readable storage medium is provided having a computer program stored thereon, which when executed by a processor, performs the steps of:
acquiring a waveform reading instruction, and reading a waveform data sequence according to the waveform reading instruction;
acquiring minimum waveform format unit information;
and splicing the target waveform according to the minimum waveform format unit information and the waveform data sequence.
In one embodiment, the computer program when executed by the processor further performs the steps of: the waveform data sequence is generated by a computer device, the generating of the waveform data sequence comprising:
determining a minimum waveform format unit according to waveform requirements;
and generating the waveform data sequence according to the minimum waveform format unit and the waveform timing requirement.
In one embodiment, the computer program when executed by the processor further performs the steps of: the minimum waveform format unit information comprises a minimum waveform format unit, clock cycles and waveform cycle numbers;
splicing a target waveform according to the minimum waveform format unit information and the waveform data sequence, wherein the method comprises the following steps:
under the control of the clock cycle, a target waveform is spliced according to the minimum waveform format unit, the clock cycle number, the waveform data sequence and the waveform cycle number.
In one embodiment, the computer program when executed by the processor further performs the steps of: under the control of the clock cycle, a target waveform is spliced according to the minimum waveform format unit, the clock cycle number, the waveform data sequence and the waveform cycle number, and the method comprises the following steps:
under the control of the clock cycle, the clock cycle number is used as the holding time of each bit of waveform data sequence, the number of waveform cycles is used as the cycle number of each group of waveform data sequence, and the target waveform is spliced according to the minimum waveform format unit and the waveform data sequence.
In one embodiment, the computer program when executed by the processor further performs the steps of: the generating mode of the minimum waveform format unit information comprises the following steps:
calculating a minimum waveform format unit for generating the waveform data sequence according to the duration time of the high level and the low level in the required waveform;
setting the number of waveform periods according to the minimum waveform format unit;
the number of clock cycles is determined based on the clock cycle and the minimum waveform unit.
In one embodiment, the computer program when executed by the processor further performs the steps of: the method further comprises the steps of: outputting the target waveform to a chip to be tested, and testing the chip to be tested according to the target waveform;
and stopping the test if the end of the test process is detected.
In one embodiment, the computer program when executed by the processor further performs the steps of: if the end of the testing process is detected, stopping the testing, including:
stopping outputting the waveform when the occurrence of a stop signal in the target waveform is detected;
or stopping outputting the waveform when the output size of the target waveform is equal to the preset file size.
Those skilled in the art will appreciate that implementing all or part of the above described methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in embodiments provided herein may include at least one of non-volatile and volatile memory. The nonvolatile Memory may include Read-Only Memory (ROM), magnetic tape, floppy disk, flash Memory, optical Memory, or the like. Volatile memory can include random access memory (Random Access Memory, RAM) or external cache memory. By way of illustration, and not limitation, RAM can be in the form of a variety of forms, such as static random access memory (Static Random Access Memory, SRAM) or dynamic random access memory (Dynamic Random Access Memory, DRAM), and the like.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples illustrate only a few embodiments of the application, which are described in detail and are not to be construed as limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.
Claims (10)
1. A method of arbitrary waveform format generation, the method comprising:
acquiring a waveform reading instruction, and reading a waveform data sequence according to the waveform reading instruction;
acquiring minimum waveform format unit information; the minimum waveform format unit information comprises a minimum waveform format unit, clock cycles and waveform cycle numbers;
under the control of the clock cycle, taking the clock cycle number as the holding time of each bit of waveform data sequence, taking the waveform cycle number as the cycle number of each group of waveform data sequence, and splicing a target waveform according to the minimum waveform format unit and the waveform data sequence;
the waveform reading instruction is acquired, and before the waveform data sequence is read according to the waveform reading instruction, the method further comprises the steps of: according to the duration time of the high level and the low level in the required waveform, a minimum waveform format unit for generating a waveform data sequence corresponding to the required waveform is calculated; setting the number of waveform periods according to the minimum waveform format unit; determining the number of clock cycles based on the clock cycle and the minimum waveform element; generating a waveform data sequence corresponding to the required waveform according to the minimum waveform format unit and the waveform time sequence requirement, and storing the minimum waveform format unit, the clock period number, the waveform period number and the waveform data sequence corresponding to the required waveform in a memory of the computer equipment.
2. The method of claim 1, wherein the waveform data sequence is generated by a computer device, and wherein the generating of the waveform data sequence comprises:
determining a minimum waveform format unit according to waveform requirements;
and generating the waveform data sequence according to the minimum waveform format unit and the waveform time sequence requirement.
3. The method according to claim 1, wherein the method further comprises:
outputting the target waveform to a chip to be tested, and testing the chip to be tested according to the target waveform;
and stopping the test if the end of the test process is detected.
4. A method according to claim 3, wherein stopping the test if the end of the test procedure is detected comprises:
stopping outputting the waveform when the occurrence of a stop signal in the target waveform is detected;
or stopping outputting the waveform when the output size of the target waveform is equal to the preset file size.
5. An arbitrary waveform format generating apparatus, the apparatus comprising:
the first acquisition module is used for acquiring a waveform reading instruction and reading a waveform data sequence according to the waveform reading instruction;
the second acquisition module is used for acquiring the minimum waveform format unit information; the minimum waveform format unit information comprises a minimum waveform format unit, clock cycles and waveform cycle numbers; the waveform generation module is used for taking the clock cycle number as the holding time of each bit of waveform data sequence and the waveform cycle number as the cycle number of each group of waveform data sequence under the control of the clock cycle, and splicing a target waveform according to the minimum waveform format unit and the waveform data sequence;
the waveform reading instruction is acquired, and before the waveform data sequence is read according to the waveform reading instruction, the method further comprises the steps of: according to the duration time of the high level and the low level in the required waveform, a minimum waveform format unit for generating a waveform data sequence corresponding to the required waveform is calculated; setting the number of waveform periods according to the minimum waveform format unit; determining the number of clock cycles based on the clock cycle and the minimum waveform element; generating a waveform data sequence corresponding to the required waveform according to the minimum waveform format unit and the waveform time sequence requirement, and storing the minimum waveform format unit, the clock period number, the waveform period number and the waveform data sequence corresponding to the required waveform in a memory of the computer equipment.
6. The apparatus of claim 5, wherein the waveform data sequence is generated by a computer device for determining a minimum waveform format unit based on waveform requirements; and generating the waveform data sequence according to the minimum waveform format unit and the waveform timing requirement.
7. The apparatus of claim 5, wherein the apparatus further comprises:
the output module is used for outputting the target waveform to a chip to be tested, and testing the chip to be tested according to the target waveform; and stopping the test if the end of the test process is detected.
8. The apparatus of claim 7, wherein the device comprises a plurality of sensors,
the output module is further used for stopping outputting the waveform when detecting that a stop signal appears in the target waveform; or stopping outputting the waveform when the output size of the target waveform is equal to the preset file size.
9. A test device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor implements the steps of the method of any one of claims 1 to 4 when the computer program is executed.
10. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method of any of claims 1 to 4.
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