CN112910255B - Charge pump circuit with low current mismatch - Google Patents
Charge pump circuit with low current mismatch Download PDFInfo
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- CN112910255B CN112910255B CN202110130565.1A CN202110130565A CN112910255B CN 112910255 B CN112910255 B CN 112910255B CN 202110130565 A CN202110130565 A CN 202110130565A CN 112910255 B CN112910255 B CN 112910255B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
- H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
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Abstract
The invention discloses a charge pump circuit with low current mismatch.A reference current bias circuit is respectively connected with a charging circuit and a discharging circuit, the outputs of the charging circuit and the discharging circuit are respectively connected with the anode and the cathode of an input port of an operational amplifier, the cathode of the operational amplifier is connected with the output of the operational amplifier to form a unity gain negative feedback structure, and the anode of the operational amplifier is used as an output port of the charge pump and is connected with the input of a first source follower and the input of a second source follower. The circuit structure of the invention ensures that the current matching effect which can be achieved by the operational amplifier is realized by a circuit with a simple structure under the condition of low current mismatch of the charge pump, and the consumed power consumption is reduced by simplifying a redundant circuit.
Description
Technical Field
The invention belongs to the technical field of digital-analog hybrid circuit chips, and particularly relates to a charge pump circuit with low current mismatch.
Background
The charge pump phase-locked loop mainly comprises a phase frequency detector circuit, a charge pump circuit, a low-pass filter, a voltage-controlled oscillator and a frequency divider. The phase noise is the most important performance index of the phase-locked loop, and the phase noise of the charge pump phase-locked loop mainly comprises two parts: the low frequency region phase noise depends on the output current noise of the charge pump circuit, and the high frequency region phase noise depends on the phase noise of the voltage controlled oscillator. In order to reduce the phase noise of the phase-locked loop, it is necessary to reduce both the output noise current of the charge pump circuit and the phase noise of the voltage-controlled oscillator. The current noise source of the charge pump circuit comprises charge sharing, charge injection, clock feed-through and current mismatch, wherein the charge sharing can be solved by adding a current path to enable a current mirror to be always in a working state, the charge injection and the clock feed-through can be solved by adding dummy transistors, and two ideas are mainly used for inhibiting the current mismatch of the charge pump:
1. the output impedance of the current mirror is increased. The current mirror output impedance can be improved by using the current mirror with the cascode structure, but under the condition of smaller characteristic dimension, the channel length modulation effect is obvious, and even if the two-stage current mirror with the cascode structure is used, a good current matching effect can not be achieved, and if the three-stage current mirror with the cascode structure is used, the output voltage swing of the charge pump is greatly reduced. The output impedance of the current mirror is also increased by the operational amplifier, but the problem of reduced output voltage swing of the charge pump is also faced.
2. Dynamic current matching techniques. The output voltage of the current mirror dynamically changes along with the output voltage of the charge pump through the operational amplifier, when the output voltage of the charge pump changes, the output of the two current mirrors is at the same voltage, and therefore the effect of current matching is achieved.
Referring to fig. 1, a conventional charge pump circuit for implementing dynamic current matching is shown, in which an operational amplifier a1 is used for implementing dynamic current matching, and an operational amplifier a2 is used for solving the problem of charge sharing. Operational amplifier A1 realizes VG=VOUTThe drain-source voltages of the switching tubes M11-M14 operating in the linear region are negligible, so that V is always kept when the output voltage of the charge pump changesG≈VH≈VF≈VOUTTherefore, the output voltages of the current mirrors formed by the transistors M3-M6 are the same, so that i isdn=i0(ii) a In the same way, the output voltages of the current mirrors formed by the transistors M7-M10 are the same, so that i isup=i0(ii) a Thus idn=iupAnd the charging current and the discharging current of the charge pump realize good matching effect. Because the output range of the charge pump is very wide, the two operational amplifiers need to be close to the input and output swing of the power supply voltage, and also need enough gain to achieve a good current matching effect, the complexity of the operational amplifier design is increased, and the complexity of the charge pump circuit design is also increased.
Disclosure of Invention
The present invention provides a charge pump circuit with low current mismatch, which has a simple structure and low current mismatch, and is used for a charge pump phase-locked loop as a sub-module circuit in the phase-locked loop.
The invention adopts the following technical scheme:
a charge pump circuit with low current mismatch comprises a reference current bias circuit, wherein the reference current bias circuit is respectively connected with the input ends of a charging circuit and a discharging circuit, the output ends of the charging circuit and the discharging circuit are respectively connected with the anode and the cathode of the input end of an operational amplifier, the cathode of the operational amplifier is connected with the output end of the operational amplifier to form a unity gain negative feedback structure, and the anode of the operational amplifier is used as the output port of the charge pump and is respectively connected with the input end of a first source follower and the input end of a second source follower; the reference current bias circuit is used for generating a charging current reference and a discharging current reference; the charging circuit is used for copying the current of the reference current source and sending the charging current to the output end of the charge pump circuit; the discharge circuit is used for copying the current of the reference current source and sending the discharge current to the output end of the charge pump circuit; the operational amplifier is used for stabilizing voltage; the first source follower is used for realizing that the voltage Vn follows the output voltage VOUT(ii) a change; the second source follower is used for realizing that the voltage Vp follows the output voltage VOUTAnd (4) changing.
Specifically, the reference current bias circuit comprises M1 and a power supply VDDVia a reference current source ICPThe drain of M1 is connected, the gate of M1 is respectively connected with the gate of M3 and a bias voltage VbnThe source of M1 is connected with the drain of M2, the gate of M2 is connected with the gate of M4 and the drain of M1, the source of M2 is connected with GND, the source of M4 is connected with GND, the drain of M4 is connected with the source of M3, the drain of M3 is connected with the source of M12, the gate of M12 is connected with Vn, the drain of M12 is connected with the drain of M11, the gate of M11 is connected with Vp, the source of M11 is connected with the drain of M10, the gate of M10 is connected with a bias voltage VbpThe source of M10 is connected with the drain of M9, the gate of M9 is connected with the drains of M11 and M12, and the source of M9And VDDAnd (4) connecting.
Further, M1, M2, M3, M4 and M12 are all N-channel field effect transistors; m9, M10 and M11 are all P-channel field effect transistors.
Specifically, the charging circuit comprises M13 and a power supply VDDThe grid of the M13 is respectively connected with the grid of M9, the drain of M11 and the drain of M12 in the reference current bias circuit; the drain of M13 is connected with the source of M14, the gate of M14 is connected with the gate of M10 in the reference current bias circuit, the drain of M14 is connected with the source of M17 and the source of M18 respectively, and the gate of M17 is connected with UP; the drain electrode of M17 is connected with the output of operational amplifier, the negative input of operational amplifier, and the drain electrode of M19 in discharge circuit, the grid electrode of M18 is connected with UPB, the drain electrode of M18 is connected with the positive input end of operational amplifier, the drain electrode of M20 in discharge circuit, and the output end V of charge pumpOUTAnd (4) connecting.
Further, M9, M11, M13, M14, M17 and M18 are P-channel field effect transistors; m12, M19 and M20 are all N-channel field effect transistors.
Specifically, the discharge circuit comprises M6, GND is connected with the source of M6, the grid of M6 is connected with the grid of M2, the grid of M4 and the drain of M1 in reference current bias, and the drain of M6 is connected with the source of M5; the gate of M5 is connected with the gate of M1 and the gate of M3 in the reference current bias, the drain of M5 is connected with the source of M19 and the source of M20, the gate of M19 is connected with DNB, the drain of M19 is connected with the output of operational amplifier, the negative pole input of operational amplifier and the drain of M17 in the charging circuit, the gate of M20 is connected with DN, the drain of M20 is connected with the positive pole input of operational amplifier, the drain of M18 in the charging circuit and the output end V of charge pumpOUTAnd (4) connecting.
Further, M17 and M18 are both P-channel field effect transistors; m1, M2, M3, M4, M5, M6, M19 and M20 are all N-channel field effect transistors.
Specifically, the first source follower includes M15 and M16, and power supply VDDThe gate of M15 is connected with the gate of M13 in the charging circuit, the gate of M9 in the reference current bias and the reference current respectivelyThe drain of M11 in bias and the drain of M12 in reference current bias are connected, the drain of M15 is connected to the source of M16 and Vn, respectively, the gate of M16 is connected to VOUTThe drain of M16 is connected with GND; the output Vn of the first source follower is connected to the gate of M12 in the reference current bias; m9, M11, M13, M15, M16 are P-channel field effect transistors, M12 are N-channel field effect transistors, and M12, M15, and M16 are low threshold transistors.
Specifically, the second source follower includes M7 and M8, power supply VDDThe drain of M7, the gate of M7 and VOUTThe source of M7 is respectively connected with the drain of M8 and Vp, the gate of M8 is respectively connected with the gate of M6, the drain of M1 in reference current bias, the gate of M2 in reference current bias and the gate of M4 in reference current bias in the discharge circuit, and the source of M8 is connected with GND; the output Vp of the second source follower is connected with the gate of the M11 in the reference current bias; m1, M2, M4, M7 and M8 are all N-channel field effect transistors, and M7, M8 and M11 are low threshold transistors.
Compared with the prior art, the invention has at least the following beneficial effects:
the charge pump circuit with low current mismatch can keep good matching of charging current and discharging current when the output voltage of the charge pump changes, can realize low current mismatch even in a wide charge pump current change range of 50-400 mu A, and has the advantages of small transistor usage amount, simple structure, low cost and low extra power consumption.
Further, a reference current bias circuit is used for copying the reference current ICPGenerating a charging current copy reference and a discharging current copy reference; since the sizes of M3 and M1 are the same, the sizes of M4 and M2 are the same, i0Can be paired with ICPMaking a copy i0Current as a reference for charge current replication, ICPThe current is used as a copy reference of the discharge current;
further, since the size of M13 is equal to the size of M9, the size of M14 is equal to the size of M10, and the charging current iupTo i0A copy is made and current is delivered to the charge pump output port.
Further, due to the ruler of M5In inches equal to the size of M1, and the size of M6 is equal to the size of M2, so that the discharge current idnTo ICPA copy is made and current is delivered to the charge pump output port.
Further, at the output voltage V of the charge pumpOUTWhile varying, voltage VFAnd VHAll follow VOUTChange in order to let VEFollowing VOUTVariation of (1), input of the first source follower and VOUTPhase connected, output is Vn, Vn is connected with M12 grid, thus realizing VEFollowing VOUTBy adjusting the size of M16 and M12, voltage V is achievedEAnd VFFollowing VOUTSynchronously change, thereby achieving idn=i0The effect of (1).
Further, in order to let VGFollowing VOUTVariation of (2), input of the second source follower and VOUTConnected, output is Vp, Vp is connected with M11 grid, thus realizing VGFollowing VOUTBy adjusting the size of M17 and M11, the voltage V can be realizedGAnd VHFollowing VOUTSynchronously change, achieved iup=i0The effect of (1); due to idn=i0,iup=i0Obtainable idn=iupAnd the effect of current matching is realized.
In summary, the circuit structure of the invention ensures that the current matching effect which can be achieved by the operational amplifier is realized by a circuit with a simple structure under the condition of low current mismatch of the charge pump, and the consumed power consumption is reduced by simplifying a redundant circuit.
The technical solution of the present invention is further described in detail by the accompanying drawings and embodiments.
Drawings
FIG. 1 is a circuit diagram of a conventional dynamic current matching charge pump;
FIG. 2 is a block diagram of a charge pump circuit according to the present invention;
FIG. 3 is I CP400 muA, mismatch current and output voltage VOUTA relationship diagram of (1);
FIG. 4 shows a variant ICPNext, the maximum current mismatch ratio of the charge pump.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
It is also to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the specification of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
Various structural schematics according to the disclosed embodiments of the invention are shown in the drawings. The figures are not drawn to scale, wherein certain details are exaggerated and possibly omitted for clarity of presentation. The shapes of various regions, layers and their relative sizes and positional relationships shown in the drawings are merely exemplary, and deviations may occur in practice due to manufacturing tolerances or technical limitations, and a person skilled in the art may additionally design regions/layers having different shapes, sizes, relative positions, according to actual needs.
The invention provides a charge pump circuit with low current mismatch, which adopts a simple circuit to replace the action of an operational amplifier to realize dynamic current matching, thereby not only simplifying the structure of the charge pump, but also saving the area and the power consumption of an operational amplifier circuit and simplifying the design of the charge pump circuit.
Referring to fig. 2, a charge pump circuit with low current mismatch according to the present invention includes a reference current bias circuit, a charging circuit, a discharging circuit, an operational amplifier, a first source follower and a second source follower; the reference current bias circuit is respectively connected with the input ends of the charging circuit and the discharging circuit, the output ends of the charging circuit and the discharging circuit are respectively connected with the positive pole and the negative pole of the input end of the operational amplifier, the negative pole of the operational amplifier is connected with the output end of the operational amplifier to form a unity gain negative feedback structure, and the positive pole of the operational amplifier is used as the output port of the charge pump and is respectively connected with the input end of the first source follower and the input end of the second source follower.
A reference current bias circuit for generating a charging current reference and a discharging current reference;
the charging circuit copies the current of the reference current source and sends the charging current to the output end of the charge pump circuit;
the discharge circuit copies the current of the reference current source and sends the discharge current to the output end of the charge pump circuit;
the operational amplifier stabilizes voltage and reduces the influence of charge sharing on the charge pump;
a first source follower for realizing that the voltage Vn follows the output voltage VOUT(ii) a change;
a second source follower for realizing the voltage Vp following the output voltage VOUTAnd (4) changing.
The reference current bias circuit comprises M1, power supply VDDVia a current source ICPAnd drain of M1The grid of M1 is respectively connected with the grid of M3 and a bias voltage VbnThe source of M1 is connected with the drain of M2, the gate of M2 is connected with the gate of M4 and the drain of M1, the source of M2 is connected with GND, the source of M4 is connected with GND, the drain of M4 is connected with the source of M3, the drain of M3 is connected with the source of M12, the gate of M12 is connected with Vn, the drain of M12 is connected with the drain of M11, the gate of M11 is connected with Vp, the source of M11 is connected with the drain of M10, the gate of M10 is connected with a bias voltage VbpThe source of M10 is connected with the drain of M9, the gate of M9 is connected with the drains of M11 and M12, and the source of M9 is connected with VDDAnd (4) connecting.
The charging circuit comprises M13, VDDThe source of M13 is connected, the grid of M13 is respectively connected with the grid of M9, the drain of M11 and the drain of M12 in the reference current bias circuit, the drain of M13 is connected with the source of M14, the grid of M14 is connected with the grid of M10 in the reference current bias circuit, the drain of M14 is respectively connected with the source of M17 and the source of M18, the grid of M17 is connected with UP, the drain of M17 is respectively connected with the output of an operational amplifier, the negative pole input of the operational amplifier and the drain of M19 in the discharge circuit, the grid of M18 is connected with UPB, the drain of M18 is respectively connected with the positive pole input of the operational amplifier, the drain of M20 in the discharge circuit and the output end V of the charge pumpOUTAnd (4) connecting.
The discharging circuit comprises M6, GND is connected with the source of M6, the gate of M6 is connected with the gate of M2, the gate of M4 and the drain of M1 in reference current bias, the drain of M6 is connected with the source of M5, the gate of M5 is connected with the gate of M1 and the gate of M3 in reference current bias, the drain of M5 is connected with the source of M19 and the source of M20, the gate of M19 is connected with DNB, the drain of M19 is connected with the output of an operational amplifier, the negative pole input of the operational amplifier and the drain of M17 in a charging circuit, the gate of M20 is connected with DN, and the drain of M20 is connected with the positive pole input end of the operational amplifier, the drain of M18 in the charging circuit and the output end V of a charge pumpOUTAnd (4) connecting.
The first source follower comprises M15 and M16, the source of M15 and VDDThe grid of M15 is connected with the grids of M9 and M13 and then is connected with the drains of M11 and M12, and the sizes of M15 are M9 and M11/20 of 3, the current flowing through M15 and M16 is i01/20 for maintaining the normal operation of the first source follower, the gate of M16 is the input terminal of the source follower and connected to VOUTThe drains of M16 and M15 are connected to the output Vn of the source follower, and Vn is connected to the gate of M12 to provide dynamic bias voltage for M12.
The second source follower comprises M7 and M8, the source of M8 is connected with GND, the gate of M8 is connected with the gates of M2, M4 and M6 and then connected with the drain of M1, the size of M8 is 1/20 of M2, M4 and M6, so that the current flowing through M7 and M8 is ICP1/20 for maintaining the normal operation of the second source follower, the gate of M7 is the input terminal of the source follower and connected to VOUTThe drains of M7 and M8 are connected to the output Vp of the source follower, Vp is connected to the gate of M11, and the dynamic bias voltage is provided for M11.
Referring to fig. 2, the working principle of the charge pump circuit with low current mismatch according to the present invention is as follows:
current ICPFor the charge pump current, supplied from the outside, a power supply VDDThe input signals UP, DN, UPB and DNB of the charge pump are provided by a phase frequency detector of the phase-locked loop, and the output end of the charge pump is connected with a loop filter of the phase-locked loop. The structure has three current paths, wherein the current path 1 is composed of a current source ICPAnd M1 and M2, wherein the current path 2 is composed of M9, M10, M11, M12, M3, and M4, and the current i of the path is used as the reference current source of the charge pump0By 1: 1 replica current ICPBias voltage VbnAnd VbpProvided by an additional current mirror (not shown). The third current path is composed of PMOS tubes M13, M14, M17, M18, NMOS tubes M19, M20, M5 and M6, current flows through M5, M6, M9 and M10 when the charge pump works due to the existence of the operational amplifier, and when UP and DN are at low level, M13, M14, M17, M19, M5 and M6 form the current path if i and DN are at low levelupAnd idnIf there is no match, the operational amplifier will either source or sink current, holding VA=VOUTWhen UP, DN are at high level, M13, M14, M18, M19, M5, M6 form a current path if i is high levelupAnd idnMatch, then ioutIs zero; if iupAnd idnIf there is no match, then current flows in or out of the charge pump output, i.e. ioutIs not zero. When the phase-locked loop is in a locked state, current flows into or out of the output end, and the current is current noise for the charge pump. The transistors M9 and M13 are the same in size, and the transistors M10 and M14 are the same in size, so that only V needs to be ensuredOUTAt time of change VG=VHThen i can be realizedup=i0. Similarly, the transistors M3 and M5 are the same size, and the transistors M4 and M6 are the same size, so that only V needs to be ensuredOUTWhen changed, VE=VFThen i can be realizeddn=i0. Thus iup=idn=i0And current dynamic matching is realized.
(1)VOUTAt time of change VG=VHTo realize
Transistors M7 and M8 form a source follower with an input voltage VOUTOutput voltage of Vp,VpConnected to transistor M11, so:
VG=VOUT-Vgs,M7+|Vgs,M11|
wherein, Vgs,M7、Vgs,M11Gate-source voltages of M7 and M11, respectively.
And because of VH=VOUT+|Vds,M18L, wherein Vds,M18Is the drain-source voltage of the transistor M18, so by properly selecting the sizes of M7 and M11
|Vds,M18|=-(Vgs,M7-|Vgs,M11|)
Can realize VG=VH。
(2)VOUTAt time of change VE=VFTo realize
Transistors M15 and M16 form a source follower with an input voltage VOUTOutput voltage of Vn,VnConnected to transistor M12, so:
VE=VOUT+|Vgs,M16|-Vgs,M12
wherein Vgs,M16、Vgs,M12Gate-source voltages of M6 and M12, respectively.
And because of VF=VOUT-Vds,M20In which V isds,M20Is the drain-source voltage of the transistor M20, so by properly selecting the sizes of M15 and M12
Vds,M20=-(|Vgs,M16|-Vgs,M12)
Can realize VE=VF。
The invention uses the voltage follower circuit formed by transistors M7, M8 and M11 to make VG=VHThereby realizing iup=i0. V is controlled by a voltage follower circuit composed of transistors M12, M15 and M16E=VFThereby realizing idn=i0(ii) a Thus realizing iup=idnThe current matching of the charge pump is realized. In practical circuits, only V can be realized because transistors are not idealG≈VH,VE≈VFI.e. can realize iup≈idnThe error is very small.
In summary, the present invention uses transistors M7, M8, M11, M12, M15, and M16 to replace a complex operational amplifier structure, so as to achieve the same current matching effect, and the transistors only use M7, M8, M15, and M16 as two source followers to consume a small amount of extra power consumption, while the operational amplifier for achieving the same current matching effect needs to consume more power consumption, so as to reduce power consumption. Fig. 3 is a simulation diagram of the relationship between the mismatch current and the output voltage of the charge pump, and it can be known from the diagram that the maximum mismatch current of the charge pump of the invention is within 100nA in the variation range of the output voltage of 0.3-0.9V. FIG. 4 shows the charge pump at different ICPThe maximum current mismatch rates are all less than 0.03%, so that the charge pump disclosed by the invention uses fewer transistors, achieves the current mismatch effect of the traditional charge pump, and is simple in structure and capable of reducing extra power consumption.
The above-mentioned contents are only for illustrating the technical idea of the present invention, and the protection scope of the present invention is not limited thereby, and any modification made on the basis of the technical idea of the present invention falls within the protection scope of the claims of the present invention.
Claims (4)
1. A charge pump circuit with low current mismatch is characterized by comprising a reference current bias circuit, wherein the reference current bias circuit is respectively connected with the input ends of a charging circuit and a discharging circuit, the output ends of the charging circuit and the discharging circuit are respectively connected with the anode and the cathode of the input end of an operational amplifier, the cathode of the operational amplifier is connected with the output end of the operational amplifier to form a unity gain negative feedback structure, and the anode of the operational amplifier is used as the output port of the charge pump and is respectively connected with the input end of a first source follower and the input end of a second source follower; the reference current bias circuit is used for generating a charging current reference and a discharging current reference; the charging circuit is used for copying the current of the reference current source and sending the charging current to the output end of the charge pump circuit; the discharge circuit is used for copying the current of the reference current source and sending the discharge current to the output end of the charge pump circuit; the operational amplifier is used for stabilizing voltage; the first source follower is used for realizing that the voltage Vn follows the output voltage VOUT(ii) a change; the second source follower is used for realizing that the voltage Vp follows the output voltage VOUT(ii) a change;
the reference current bias circuit comprises M1, power supply VDDVia a reference current source ICPThe drain of M1 is connected, the gate of M1 is respectively connected with the gate of M3 and a bias voltage VbnThe source of M1 is connected with the drain of M2, the gate of M2 is connected with the gate of M4 and the drain of M1, the source of M2 is connected with GND, the source of M4 is connected with GND, the drain of M4 is connected with the source of M3, the drain of M3 is connected with the source of M12, the gate of M12 is connected with Vn, the drain of M12 is connected with the drain of M11, the gate of M11 is connected with Vp, the source of M11 is connected with the drain of M10, the gate of M10 is connected with a bias voltage VbpThe source of M10 is connected with the drain of M9, the gate of M9 is connected with the drains of M11 and M12, and the source of M9 is connected with VDDConnecting;
the charging circuit comprises M13, M13 source and power supply VDDThe gate of M13 is connected to the gate of M9, the drain of M11 and the gate of the reference current bias circuit,Drain connection of M12; the drain of M13 is connected with the source of M14, the gate of M14 is connected with the gate of M10 in the reference current bias circuit, the drain of M14 is connected with the source of M17 and the source of M18 respectively, and the gate of M17 is connected with UP; the drain electrode of M17 is connected with the output of operational amplifier, the negative input of operational amplifier, and the drain electrode of M19 in discharge circuit, the grid electrode of M18 is connected with UPB, the drain electrode of M18 is connected with the positive input end of operational amplifier, the drain electrode of M20 in discharge circuit, and the output end V of charge pumpOUTConnecting;
the discharge circuit comprises M6, wherein the source of M6 is connected with GND, the gate of M6 is connected with the gate of M2, the gate of M4 and the drain of M1 in reference current bias, and the drain of M6 is connected with the source of M5; the gate of M5 is connected with the gate of M1 and the gate of M3 in the reference current bias, the drain of M5 is connected with the source of M19 and the source of M20, the gate of M19 is connected with DNB, the drain of M19 is connected with the output of operational amplifier, the negative pole input of operational amplifier and the drain of M17 in the charging circuit, the gate of M20 is connected with DN, the drain of M20 is connected with the positive pole input of operational amplifier, the drain of M18 in the charging circuit and the output end V of charge pumpOUTConnecting;
the first source follower comprises M15 and M16, M15 source power supply and VDDThe gate of M15 is connected to the gate of M13, the gate of M9 in the reference current bias, the drain of M11 in the reference current bias, and the drain of M12 in the reference current bias in the charging circuit, the drain of M15 is connected to the source of M16 and Vn, the gate of M16 is connected to the output voltage VOUTThe drain of M16 is connected with GND; the output Vn of the first source follower is connected to the gate of M12 in the reference current bias; m9, M11, M13, M15, M16 are P-channel field effect transistors, M12 are N-channel field effect transistors, M12, M15, and M16 are low threshold transistors;
the second source follower comprises M7 and M8, the drain of M7 and power supply VDDConnection, gate of M7 and output voltage VOUTThe source of M7 is connected to the drain of M8 and Vp, respectively, and the gate of M8 is connected to the gate of M6, the drain of M1 in reference current bias, the gate of M2 in reference current bias, and the gate of M3526 in reference current bias in discharge circuitThe 4 grid is connected, and the M8 source is connected with GND; the output Vp of the second source follower is connected with the gate of the M11 in the reference current bias; m1, M2, M4, M7 and M8 are all N-channel field effect transistors, and M7, M8 and M11 are low threshold transistors.
2. The low current mismatch charge pump circuit of claim 1, wherein M1, M2, M3, M4, M12 are all N-channel field effect transistors; m9, M10 and M11 are all P-channel field effect transistors.
3. The low current mismatch charge pump circuit of claim 1, wherein M9, M11, M13, M14, M17, M18 are all P-channel field effect transistors; m12, M19 and M20 are all N-channel field effect transistors.
4. The low current mismatch charge pump circuit of claim 1, wherein M17, M18 are both P-channel field effect transistors; m1, M2, M3, M4, M5, M6, M19 and M20 are all N-channel field effect transistors.
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