CN112908876A - Silicon chip metal pollution testing method and device - Google Patents

Silicon chip metal pollution testing method and device Download PDF

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Publication number
CN112908876A
CN112908876A CN202110063682.0A CN202110063682A CN112908876A CN 112908876 A CN112908876 A CN 112908876A CN 202110063682 A CN202110063682 A CN 202110063682A CN 112908876 A CN112908876 A CN 112908876A
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silicon wafer
spv
metal
test
testing
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孙超
王婷
严颖杰
林志鑫
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Zing Semiconductor Corp
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Zing Semiconductor Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions

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Abstract

The invention provides a method and a device for testing metal pollution of a silicon wafer, which can obtain SPV test data about metal pollution content in the silicon wafer by performing SPV test on the silicon wafer after the silicon wafer is subjected to heat treatment; by performing SPC data analysis on the SPV test data, the comparison result of the SPV test data and the threshold value can be obtained to judge the quality of the silicon wafer. The invention can realize the digital and automatic test of the metal pollution of the silicon chip so as to improve the test sensitivity, the test accuracy and the test efficiency; complex acid is not needed, so that pollution and danger coefficients can be reduced, and a cleaning process is not needed; therefore, the invention can conveniently and quickly test the metal pollution of the silicon chip, has high sensitivity and high accuracy and effectively saves the manpower and material resources.

Description

Silicon chip metal pollution testing method and device
Technical Field
The invention belongs to the technical field of semiconductors, and relates to a method and a device for testing metal pollution of a silicon wafer.
Background
With the development of the semiconductor industry, higher and higher requirements are placed on the quality of silicon materials, wherein the minority carrier (minority carrier) diffusion length and the minority carrier lifetime are important physical parameters which are concerned and characterize the material performance. Because metal impurities can diffuse into the silicon wafer from the surface to form gap metal through a thermal process, the gap metal is a very effective recombination center and can greatly promote the recombination of current carriers, so that the minority carrier lifetime of the silicon wafer can be reduced, and the performance and reliability of a device can be influenced, the metal pollution is one of main factors influencing the minority carrier diffusion length and the minority carrier lifetime.
However, in the semiconductor manufacturing process, equipment, tools, etc. contacting products are very easy to cause metal contamination to the products, and the reliability and yield of the devices are seriously affected when the silicon wafers after being contaminated by the metal are used for manufacturing the devices.
In the prior art, a Graff (Graff) test is mostly performed on a silicon wafer metal pollution test through chromic acid treatment, namely, the silicon wafer is firstly subjected to heat treatment to drive metal pollution components into the silicon wafer, then the silicon wafer is soaked in chromic acid to perform chromic acid treatment on the silicon wafer, then the silicon wafer is subjected to a cleaning procedure, and finally, under the irradiation of a strong light lamp, manual visual inspection is performed to observe whether the silicon wafer has fog marks or not, so that whether the silicon wafer passes the test or not is judged. However, the accuracy of the test result is low because the test method needs manual judgment; chromic acid is needed for acid treatment, and is harmful to human bodies and the environment, so that the application of chromic acid is limited, for example, the use of chromic acid is managed and controlled in the Shanghai city in 2019; and after the chromic acid treatment, the silicon wafer is cleaned, so that the testing steps are complicated and time-consuming, and manpower and material resources are wasted.
Therefore, it is necessary to provide a method for testing metal contamination of silicon wafer.
Disclosure of Invention
In view of the above disadvantages of the prior art, an object of the present invention is to provide a method and an apparatus for testing metal contamination of silicon wafer, which are used to solve the problems of complicated steps, time consumption and resource waste of the method for testing metal contamination of silicon wafer in the prior art.
In order to achieve the above objects and other related objects, the present invention provides a method for testing metal contamination of a silicon wafer, comprising the steps of:
carrying out heat treatment on the silicon wafer;
carrying out SPV test on the silicon wafer to obtain SPV test data about metal pollution content in the silicon wafer;
and carrying out SPC data analysis on the SPV test data to obtain a comparison result of the SPV test data and a threshold value so as to judge the quality of the silicon wafer.
Optionally, the metal contamination content includes one or a combination of a number of Ni metal atoms and a number of Cu metal atoms per unit volume.
Optionally, the heating temperature of the heat treatment is 700 ℃ to 900 ℃.
Optionally, the value range of the threshold is 5E10/cm3～7E10/cm3And when the metal pollution content is not less than the threshold value, the silicon wafer is judged as a defective product, and when the metal pollution content is less than the threshold value, the silicon wafer is judged as a qualified product.
The invention also provides a silicon wafer metal contamination testing device, which comprises:
the silicon wafer heat treatment equipment is used for carrying out heat treatment on a silicon wafer;
the SPV testing equipment is used for carrying out SPV testing on the silicon wafer to obtain SPV testing data about metal pollution content in the silicon wafer;
and the SPC data analysis equipment is used for carrying out SPC data analysis on the SPV test data to obtain a comparison result of the SPV test data and a threshold value so as to judge the quality of the silicon wafer.
Optionally, the silicon wafer is automatically transferred from the silicon wafer heat treatment equipment, the SPV testing equipment and the SPC data analyzing equipment in sequence.
Optionally, the SPV testing apparatus and SPC data analysis apparatus are integrated within the same apparatus.
Optionally, the silicon wafer metal contamination testing device further comprises an alarm device, wherein the alarm device comprises one or a combination of an acoustic alarm device and an optical alarm device, or the alarm device is an acoustic-optical alarm device.
Optionally, the silicon wafer metal contamination testing device is suitable for testing one or a combination of Ni metal and Cu metal in the silicon wafer.
Optionally, the value range of the threshold set in the SPC data analysis device is 5E10/cm3～7E10/cm3。
As described above, according to the silicon wafer metal contamination testing method and device of the present invention, after the silicon wafer is subjected to the heat treatment, SPV testing is performed on the silicon wafer, so that SPV testing data about metal contamination content in the silicon wafer can be obtained; by performing SPC data analysis on the SPV test data, the comparison result of the SPV test data and the threshold value can be obtained to judge the quality of the silicon wafer. The invention can realize the digital and automatic test of the metal pollution of the silicon chip so as to improve the test sensitivity, the test accuracy and the test efficiency; complex acid is not needed, so that pollution and danger coefficients can be reduced, and a cleaning process is not needed; therefore, the invention can conveniently and quickly test the metal pollution of the silicon chip, has high sensitivity and high accuracy and effectively saves the manpower and material resources.
Drawings
FIG. 1 is a schematic process flow diagram of a silicon wafer metal contamination testing method according to an embodiment of the present invention.
FIG. 2 is a block diagram of a silicon wafer metal contamination testing apparatus according to an embodiment of the present invention.
Fig. 3 is a schematic diagram showing a comparison result between SPV test data and a threshold value according to an embodiment of the present invention.
Description of the element reference numerals
100 first threshold value
200 second threshold value
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
As in the detailed description of the embodiments of the present invention, the cross-sectional views illustrating the device structures are not partially enlarged in general scale for convenience of illustration, and the schematic views are only examples, which should not limit the scope of the present invention. In addition, the three-dimensional dimensions of length, width and depth should be included in the actual fabrication.
For convenience in description, spatial relational terms such as "below," "beneath," "below," "under," "over," "upper," and the like may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that these terms of spatial relationship are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the figures. Further, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present. As used herein, "between … …" is meant to include both endpoints.
In the context of this application, a structure described as having a first feature "on" a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are formed in between the first and second features, such that the first and second features may not be in direct contact.
It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the drawings only show the components related to the present invention rather than being drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of each component in actual implementation may be changed freely, and the layout of the components may be more complicated.
As mentioned in the background, due to the problems of the prior art in testing the metal contamination of silicon wafers, there is a strong need to find alternative solutions.
Since SPV test (surface photovoltage test) is a nondestructive full-sheet scanning measurement siliconAdvanced methods of sheet minority carrier lifetime, diffusion length and metal impurity content. The testing principle is a method for obtaining the diffusion length of minority carriers by measuring the surface voltage generated on the surface of a semiconductor material due to illumination, the content of metal is calculated according to the change of the diffusion length of the minority carriers before and after the illumination, and the calculation formula is as follows: n is a radical ofMetal(atoms/cm3)＝1.05×1016(1/L2 after-1/L2 before)。
Therefore, based on the principle of the SPV test, the inventors performed the following validation tests, specifically operating as follows:
respectively preparing a copper solution and a nickel solution with the concentrations of 3ppb and 0.03ppb by adopting an ICPMS standard solution, and providing a first silicon wafer and a second silicon wafer;
respectively dripping a copper solution with the concentration of 3ppb and a nickel solution with the concentration of 3ppb on different areas of a first silicon chip; respectively dripping a copper solution with the concentration of 0.03ppb and a nickel solution with the concentration of 0.03ppb on different areas on the second silicon chip;
putting the first silicon chip and the second silicon chip into a ventilation cabinet, and drying for 12 hours at normal temperature;
respectively growing epitaxial silicon layers with the thickness of 2 microns on the surfaces of the first silicon wafer and the second silicon wafer so that metal is completely positioned between the epitaxial silicon layers and the silicon wafers to form a first composite silicon wafer and a second composite silicon wafer;
cleaning the first silicon wafer and the second silicon wafer for 10min by using a 5% HF solution so as to avoid the interference of metal components on the surface of the composite silicon wafer on the measurement result;
and testing the first composite silicon wafer and the second composite silicon wafer by adopting SPV measuring equipment.
The SPV measuring equipment is adopted on the surface of the result of the verification test, so that the positions corresponding to the copper metal and the nickel metal in the first composite silicon wafer and the second composite silicon wafer and the metal pollution content can be clearly reflected. Therefore, the SPV measuring equipment can be applied to data acquisition of the metal in the silicon wafer.
SPC (statistical Process control) data analysis is a Process control tool that relies on mathematical statistical methods. The method can analyze and evaluate the production process, discover the symptoms of systematic factors in time according to feedback information, and take measures to eliminate the influence of the systematic factors so as to achieve the purpose of controlling the quality.
Therefore, the inventor provides a silicon wafer metal pollution test method and a silicon wafer metal pollution test device based on SPV test and SPC data analysis, so as to solve the problems of complicated steps, time consumption, resource waste and the like of the silicon wafer metal pollution test method in the prior art.
As shown in fig. 1, the present embodiment provides a method for testing metal contamination of a silicon wafer, where the method for testing metal contamination of a silicon wafer includes the following steps:
carrying out heat treatment on the silicon wafer;
carrying out SPV test on the silicon wafer to obtain SPV test data about metal pollution content in the silicon wafer;
and carrying out SPC data analysis on the SPV test data to obtain a comparison result of the SPV test data and a threshold value so as to judge the quality of the silicon wafer.
According to the silicon wafer metal contamination testing method, after the silicon wafer is subjected to heat treatment, the SPV test is performed on the silicon wafer, so that the SPV test data about the metal contamination content in the silicon wafer can be obtained; by performing the SPC data analysis on the SPV test data, a comparison result of the SPV test data and the threshold value can be obtained to judge the quality of the silicon wafer.
The embodiment can realize digital and automatic test of the metal pollution of the silicon chip, thereby improving the test sensitivity, the test accuracy and the test efficiency; complex acid is not needed, so that pollution and danger coefficients can be reduced, and a cleaning process is not needed; therefore, the testing method is convenient and quick to test, high in sensitivity and accuracy and capable of effectively saving manpower and material resources. The method specifically comprises the following steps:
firstly, a silicon wafer is provided and is placed in a heating furnace to carry out heat treatment on the silicon wafer.
Specifically, the silicon wafer can be fed into the heating furnace by a mechanical arm to perform the heat treatment, so that metal impurities can be diffused into the silicon wafer from the surface of the silicon wafer through a thermal process to form interstitial metal atoms through the heat treatment, so that the metal impurities and the silicon wafer can form a metal compound, and the silicon wafer can be subjected to an SPV test by using SPV test equipment subsequently. The size of the silicon wafer and the type of the heat treatment equipment are not limited herein.
As an example, the heating temperature of the heat treatment is 700 to 900 ℃.
Specifically, since the metal impurities can be diffused into the silicon wafer through the heat treatment, so that the metal impurities can form a metal composite with the silicon wafer, in order to improve the accuracy of the test, in this embodiment, the heating temperature of the heat treatment is preferably 700 ℃ to 900 ℃, such as 700 ℃, 750 ℃, 800 ℃, 900 ℃, but not limited thereto, so as to ensure that the metal impurities are completely diffused into the silicon wafer. The heating temperature of the heat treatment may be specifically set as needed, and is not excessively limited herein.
Then, the silicon wafer is subjected to the SPV test to obtain SPV test data about the metal contamination content in the silicon wafer.
Specifically, the structure, the test operation, and the like of the SPV test apparatus are not limited herein, and the SPV test apparatus can be directly used, or the existing SPV test apparatus can be adaptively modified as needed to form a new SPV test apparatus as needed, which is not limited herein.
As an example, the metal contamination content includes one or a combination of the number of Ni metal atoms and the number of Cu metal atoms per unit volume.
Specifically, in the semiconductor manufacturing process, equipment, a jig and the like used for manufacturing are extremely easy to cause metal pollution to the silicon wafer, wherein metal impurities mainly comprise Cu metal and Ni metal, and the reliability and yield of the semiconductor device can be seriously influenced when the silicon wafer after being polluted by the metal is used for manufacturing a subsequent semiconductor device, so that the content of the metal pollution in the silicon wafer needs to be measured and controlled to prepare the high-quality silicon wafer for the subsequent process, and the high-quality semiconductor device is manufactured.
In this embodiment, the metal contamination content may include one or a combination of the number of Cu metal atoms and the number of Ni metal atoms per unit volume, but the kind of the metal impurities is not limited thereto, and the characterization of the metal contamination content is also not limited thereto.
And then, carrying out SPC data analysis on the SPV test data to obtain a comparison result of the SPV test data and a threshold value so as to judge the quality of the silicon wafer.
Specifically, after the SPV test data are imported into SPC data analysis equipment provided with the threshold, the SPV test data can be automatically compared through SPC data analysis, so that the quality of the silicon wafer can be automatically judged through the obtained comparison result of the SPV test data and the threshold, the test result with high sensitivity and high accuracy can be timely and effectively obtained, the efficiency is improved, and manpower and material resources are saved. The type of the SPC data analysis device is not limited herein, and the operation of the SPC data analysis may be adaptively changed according to the type of the device to be applied, which is not limited herein.
By way of example, the threshold value ranges from 5E10/cm3～7E10/cm3And when the metal pollution content is not less than the threshold value, the silicon wafer is judged as a defective product, and when the metal pollution content is less than the threshold value, the silicon wafer is judged as a qualified product.
Specifically, referring to fig. 3, after acquiring the SPV test data, the SPV test data may be compared with the threshold value to perform digital and automatic judgment on the quality of the silicon wafer. Wherein the threshold value can be set to 5E10/cm3、5.5E10/cm3、6E10/cm3、6.5E10/cm3、7E10/cm3And the like, but is not limited thereto, and may be specifically set as needed. Of course, the threshold is not limited to a single threshold as desiredOne threshold value, two or more threshold values can be set simultaneously, so as to further control the quality of the silicon chip in multiple levels, thereby improving the operation efficiency. Fig. 3 illustrates the comparison result of the SPV test data with the threshold value obtained after the first threshold value 100 and the second threshold value 200 are set simultaneously in the SPC data analysis apparatus. When the metal pollution content is greater than or equal to the first threshold 100, the silicon wafer is judged to be a defective product, when the metal pollution content is less than the first threshold 100, the silicon wafer is judged to be a qualified product, when the metal pollution content is greater than or equal to the first threshold 200, the silicon wafer is judged to be a waste product and the like, and of course, more thresholds can be set as required to divide the silicon wafer into higher grades to adapt to different application requirements without repeatedly carrying out testing and comparison.
Referring to fig. 2, the present embodiment further provides a silicon wafer metal contamination testing apparatus, which includes: the device comprises silicon wafer heat treatment equipment, SPV (spin valve voltage) test equipment and SPC (SPC data analysis) equipment, wherein the silicon wafer heat treatment equipment is used for carrying out heat treatment on a silicon wafer; the SPV test equipment carries out SPV test on the silicon wafer to obtain SPV test data about metal pollution content in the silicon wafer; and the SPC data analysis equipment performs SPC data analysis on the SPV test data to obtain a comparison result of the SPV test data and a threshold value so as to judge the quality of the silicon wafer. It can be understood that the silicon wafer metal contamination testing apparatus further includes a controller and other devices to achieve intelligent management and control, which is not limited herein.
As an example, the silicon wafer is automatically transferred from the silicon wafer thermal processing apparatus, the SPV testing apparatus, and the SPC data analyzing apparatus in sequence.
Specifically, the silicon wafer thermal processing apparatus, the SPV testing apparatus, and the SPC data analyzing apparatus may be independently installed, but are not limited thereto, and the silicon wafer thermal processing apparatus, the SPV testing apparatus, and the SPC data analyzing apparatus may also be integrated in the same device, so as to reduce an equipment occupation area, shorten a transmission path, and the like. The silicon wafer transmission components can be arranged at the inlet and the outlet of the 3 devices to realize the purpose of automatically transmitting the silicon wafers so as to reduce the pollution and the damage to the silicon wafers in the test process, and for example, the transmission components can adopt mechanical arms and the like, but are not limited to the above. The connection and layout of the silicon wafer thermal processing apparatus, the SPV test apparatus, and the SPC data analysis apparatus are not limited herein.
As an example, the SPV testing apparatus and the SPC data analyzing apparatus are integrated in the same apparatus.
Specifically, when the SPV testing apparatus and the SPC data analyzing apparatus are integrated into the same apparatus, the quality result of the silicon wafer can be obtained in time and effectively, so that the testing efficiency can be further improved, but the SPV testing apparatus and the SPC data analyzing apparatus are not limited thereto, and may also be independently provided.
By way of example, the silicon wafer metal contamination testing device may further include an alarm device, and the alarm device may include one or a combination of an acoustic alarm device and an optical alarm device, or the alarm device may be an acoustic-optical alarm device.
Specifically, the alarm device may be electrically connected to the SPC data analysis device, and when the metal contamination content is not less than (greater than or equal to) the threshold value, that is, when the silicon wafer is determined as a defective product, the alarm device may issue an alarm combining sound, light, or sound and light to prompt the worker in time, so that the worker may be noticed in time to handle the defect product in time, reduce the number of abnormal products, and reduce the loss.
By way of example, the silicon wafer metal contamination testing apparatus may be adapted to test one or a combination of Ni metal and Cu metal in the silicon wafer, but is not limited thereto.
As an example, the value range of the threshold value set in the SPC data analysis apparatus may be 5E10/cm3～7E10/cm3。
Specifically, after the SPV test data is acquired by the SPC data analysis device, the SPV test data may be compared with the threshold value set in the SPC data analysis device, so as to implement digitization of the silicon wafer quality,And (4) automatic judgment. Wherein the threshold value can be set to 5E10/cm3、5.5E10/cm3、6E10/cm3、6.5E10/cm3、7E10/cm3And the like, but is not limited thereto, and may be specifically set as needed. Of course, the threshold is not limited to a single threshold, and two or more thresholds may be set simultaneously, so as to further perform multi-level control on the quality of the silicon wafer, thereby improving the operation efficiency.
In summary, according to the silicon wafer metal contamination testing method and device provided by the invention, after the silicon wafer is subjected to heat treatment, the SPV test is performed on the silicon wafer, so that SPV test data about metal contamination content in the silicon wafer can be obtained; by performing SPC data analysis on the SPV test data, the comparison result of the SPV test data and the threshold value can be obtained to judge the quality of the silicon wafer. The invention can realize the digital and automatic test of the metal pollution of the silicon chip so as to improve the test sensitivity, the test accuracy and the test efficiency; complex acid is not needed, so that pollution and danger coefficients can be reduced, and a cleaning process is not needed; therefore, the invention can conveniently and quickly test the metal pollution of the silicon chip, has high sensitivity and high accuracy and effectively saves the manpower and material resources.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.

Claims (10)

1. A silicon chip metal contamination test method is characterized by comprising the following steps:
carrying out heat treatment on the silicon wafer;
carrying out SPV test on the silicon wafer to obtain SPV test data about metal pollution content in the silicon wafer;
and carrying out SPC data analysis on the SPV test data to obtain a comparison result of the SPV test data and a threshold value so as to judge the quality of the silicon wafer.
2. The silicon wafer metal contamination test method of claim 1, characterized in that: the metal contamination content includes one or a combination of the number of Ni metal atoms and the number of Cu metal atoms per unit volume.
3. The silicon wafer metal contamination test method of claim 1, characterized in that: the heating temperature of the heat treatment is 700-900 ℃.
4. The silicon wafer metal contamination test method of claim 1, characterized in that: the value range of the threshold is 5E10/cm3～7E10/cm3And when the metal pollution content is not less than the threshold value, the silicon wafer is judged as a defective product, and when the metal pollution content is less than the threshold value, the silicon wafer is judged as a qualified product.
5. The silicon wafer metal contamination testing device is characterized by comprising:
the silicon wafer heat treatment equipment is used for carrying out heat treatment on a silicon wafer;
the SPV testing equipment is used for carrying out SPV testing on the silicon wafer to obtain SPV testing data about metal pollution content in the silicon wafer;
and the SPC data analysis equipment is used for carrying out SPC data analysis on the SPV test data to obtain a comparison result of the SPV test data and a threshold value so as to judge the quality of the silicon wafer.
6. The silicon wafer metal contamination testing apparatus of claim 5, wherein: and the silicon wafer is automatically transmitted from the silicon wafer heat treatment equipment, the SPV testing equipment and the SPC data analysis equipment in sequence.
7. The silicon wafer metal contamination testing apparatus of claim 5, wherein: the SPV testing equipment and the SPC data analysis equipment are integrated in the same equipment.
8. The silicon wafer metal contamination testing apparatus of claim 5, wherein: the silicon wafer metal pollution testing device further comprises an alarm device, wherein the alarm device comprises one or a combination of an acoustic alarm device and an optical alarm device, or the alarm device is an acoustic-optical alarm device.
9. The silicon wafer metal contamination testing apparatus of claim 5, wherein: the silicon wafer metal pollution testing device is suitable for testing one or combination of Ni metal and Cu metal in the silicon wafer.
10. The silicon wafer metal contamination testing apparatus of claim 5, wherein: the value range of the threshold value set in the SPC data analysis equipment is 5E10/cm3～7E10/cm3。
CN202110063682.0A 2021-01-18 2021-01-18 Silicon chip metal pollution testing method and device Pending CN112908876A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113782465A (en) * 2021-11-11 2021-12-10 西安奕斯伟材料科技有限公司 Method for detecting metal on surface of wafer
CN114256045A (en) * 2021-12-16 2022-03-29 华虹半导体(无锡)有限公司 Method for improving metal pollution of ion implanter

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1187447A (en) * 1997-09-12 1999-03-30 Shin Etsu Handotai Co Ltd Evaluation method for heavy-metal contamination on surface layer of silicon wafer
JP2002368053A (en) * 2001-06-11 2002-12-20 Sony Corp METHOD FOR EVALUATING METALLIC CONTAMINATION AND EQUIPMENT FOR EVALUATING Fe CONTAMINATION
JP2005064054A (en) * 2003-08-18 2005-03-10 Sumitomo Mitsubishi Silicon Corp Method of measuring iron concentration in silicon wafer
JP2007053123A (en) * 2005-08-15 2007-03-01 Sumco Corp Method of determining stabilization of surface of silicon wafer and method of manufacturing silicon wafer
JP2007258602A (en) * 2006-03-24 2007-10-04 Sharp Corp Metal contamination evaluating method, manufacturing method for semiconductor element, and electronic information equipment
US20120049329A1 (en) * 2010-08-27 2012-03-01 Sumco Corporation Method of analyzing iron concentration of boron-doped p-type silicon wafer and method of manufacturing silicon wafer
JP2012202798A (en) * 2011-03-25 2012-10-22 Shin Etsu Handotai Co Ltd METHOD FOR EVALUATING Cu CONCENTRATION OF SILICON WAFER
JP2013084840A (en) * 2011-10-12 2013-05-09 Shin Etsu Handotai Co Ltd Metal contamination evaluation method and epitaxial wafer manufacturing method
JP2014099478A (en) * 2012-11-13 2014-05-29 Sumco Corp Method for evaluating contamination of epitaxial silicon wafer and method for evaluating contamination in furnace of epitaxial growth device
US20160079129A1 (en) * 2014-09-11 2016-03-17 Sumco Corporation Method of evaluating metal contamination in boron-doped p-type silicon wafer, device of evaluating metal contamination in boron-doped p-type silicon wafer, and method of manufacturing boron-doped p-type silicon wafer

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109541422A (en) * 2017-09-21 2019-03-29 上海新昇半导体科技有限公司 A kind of test device of silicon chip minority carrier life
JP7057122B2 (en) * 2017-12-22 2022-04-19 グローバルウェーハズ・ジャパン株式会社 Metal pollution evaluation method

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1187447A (en) * 1997-09-12 1999-03-30 Shin Etsu Handotai Co Ltd Evaluation method for heavy-metal contamination on surface layer of silicon wafer
JP2002368053A (en) * 2001-06-11 2002-12-20 Sony Corp METHOD FOR EVALUATING METALLIC CONTAMINATION AND EQUIPMENT FOR EVALUATING Fe CONTAMINATION
JP2005064054A (en) * 2003-08-18 2005-03-10 Sumitomo Mitsubishi Silicon Corp Method of measuring iron concentration in silicon wafer
JP2007053123A (en) * 2005-08-15 2007-03-01 Sumco Corp Method of determining stabilization of surface of silicon wafer and method of manufacturing silicon wafer
JP2007258602A (en) * 2006-03-24 2007-10-04 Sharp Corp Metal contamination evaluating method, manufacturing method for semiconductor element, and electronic information equipment
US20120049329A1 (en) * 2010-08-27 2012-03-01 Sumco Corporation Method of analyzing iron concentration of boron-doped p-type silicon wafer and method of manufacturing silicon wafer
JP2012202798A (en) * 2011-03-25 2012-10-22 Shin Etsu Handotai Co Ltd METHOD FOR EVALUATING Cu CONCENTRATION OF SILICON WAFER
JP2013084840A (en) * 2011-10-12 2013-05-09 Shin Etsu Handotai Co Ltd Metal contamination evaluation method and epitaxial wafer manufacturing method
JP2014099478A (en) * 2012-11-13 2014-05-29 Sumco Corp Method for evaluating contamination of epitaxial silicon wafer and method for evaluating contamination in furnace of epitaxial growth device
US20160079129A1 (en) * 2014-09-11 2016-03-17 Sumco Corporation Method of evaluating metal contamination in boron-doped p-type silicon wafer, device of evaluating metal contamination in boron-doped p-type silicon wafer, and method of manufacturing boron-doped p-type silicon wafer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113782465A (en) * 2021-11-11 2021-12-10 西安奕斯伟材料科技有限公司 Method for detecting metal on surface of wafer
CN113782465B (en) * 2021-11-11 2022-02-18 西安奕斯伟材料科技有限公司 Method for detecting metal on surface of wafer
CN114256045A (en) * 2021-12-16 2022-03-29 华虹半导体(无锡)有限公司 Method for improving metal pollution of ion implanter

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