CN112820634B - Semiconductor structure, self-supporting gallium nitride layer and preparation method thereof - Google Patents

Semiconductor structure, self-supporting gallium nitride layer and preparation method thereof Download PDF

Info

Publication number
CN112820634B
CN112820634B CN202110049774.3A CN202110049774A CN112820634B CN 112820634 B CN112820634 B CN 112820634B CN 202110049774 A CN202110049774 A CN 202110049774A CN 112820634 B CN112820634 B CN 112820634B
Authority
CN
China
Prior art keywords
gas flow
flow rate
gas
gallium nitride
sacrificial layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202110049774.3A
Other languages
Chinese (zh)
Other versions
CN112820634A (en
Inventor
王颖慧
罗晓菊
特洛伊·乔纳森·贝克
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jiate Semiconductor Technology Shanghai Co ltd
Original Assignee
Jiate Semiconductor Technology Shanghai Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jiate Semiconductor Technology Shanghai Co ltd filed Critical Jiate Semiconductor Technology Shanghai Co ltd
Priority to CN202110049774.3A priority Critical patent/CN112820634B/en
Publication of CN112820634A publication Critical patent/CN112820634A/en
Application granted granted Critical
Publication of CN112820634B publication Critical patent/CN112820634B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02458—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02502—Layer structure consisting of two layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/7806—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
    • H01L21/7813—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate leaving a reusable substrate, e.g. epitaxial lift off
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003—Nitride compounds

Abstract

The application specifically relates to a semiconductor structure, a self-supporting gallium nitride layer and a preparation method thereof, comprising the following steps: providing a substrate; forming a patterned mask layer on a substrate, wherein the patterned mask layer is provided with a plurality of openings; forming a sacrificial layer on the surface of the patterned mask layer by adopting a hydride vapor phase epitaxy process, wherein the sacrificial layer comprises the following steps: placing the substrate with the patterned mask layer in hydride vapor phase epitaxy equipment; introducing reaction gas comprising hydrogen chloride and ammonia gas into hydride vapor phase epitaxy equipment to form the sacrificial layer; the hydrogen chloride gas flow is constant, and the ammonia gas flow continuously changes within a preset range; and forming a thick film gallium nitride layer on the upper surface of the sacrificial layer. In the method for manufacturing a semiconductor structure in the above embodiment, pit defects are reduced in the formed sacrificial layer, and a high-quality seed crystal substrate with few pit defects is provided for subsequent formation of a thick film gallium nitride layer.

Description

Semiconductor structure, self-supporting gallium nitride layer and preparation method thereof
Technical Field
The application belongs to the technical field of semiconductors, and particularly relates to a semiconductor structure, a self-supporting gallium nitride layer and a preparation method thereof.
Background
Self-supporting gallium nitride is currently rapidly developing in a high quality, large size direction. However, during the growth process, due to different control techniques of growth process conditions or the introduction of impurities, gallium nitride is easy to be completely closed in the transverse direction during the growth process, so that a V-shaped pit (bits) defect is formed, and further, if the pit defect is formed by incomplete transverse epitaxial closure during the initial growth period of gallium nitride, the gallium nitride cannot adhere in the non-closed region due to no seed crystal during the epitaxial process, so that a penetrating through hole (hole) is formed, and the through hole directly leads to the wafer not being used in the industry. And the pits or through holes will have a tendency to gradually increase during the subsequent epitaxial growth. The pits or vias are fatal to subsequently fabricated devices because these defects can lead to significant reductions in breakdown voltage of the fabricated devices and even to device failure.
Disclosure of Invention
In view of the foregoing, it is desirable to provide a semiconductor structure, a self-supporting gallium nitride layer and a method for fabricating the same that can solve the above-mentioned problems.
One aspect of the present application provides a method for manufacturing a semiconductor structure, including:
providing a substrate;
forming a patterned mask layer on the substrate, wherein the patterned mask layer is internally provided with a plurality of openings;
and forming a sacrificial layer on the surface of the patterned mask layer by adopting a hydride vapor phase epitaxy process, wherein the sacrificial layer comprises the following steps: placing the substrate with the patterned mask layer in a hydride vapor phase epitaxy device; introducing a reaction gas comprising hydrogen chloride and ammonia gas into the hydride vapor phase epitaxy equipment to form the sacrificial layer; the flow rate of the hydrogen chloride gas is constant, and the flow rate of the ammonia gas continuously changes within a preset range;
and forming a thick film gallium nitride layer on the upper surface of the sacrificial layer.
In the method for manufacturing the semiconductor structure in the above embodiment, the sacrificial layer is formed by adopting the hydride vapor phase epitaxy process before the thick film gallium nitride layer is formed, and in the process of forming the sacrificial layer, the gas flow of hydrogen chloride is constant, and the gas flow of ammonia gas is continuously changed within a preset range.
In one embodiment, the process of forming the sacrificial layer includes at least one growth cycle, and in the growth cycle, the gas flow of the ammonia gas is uniformly reduced from a first gas flow to a second gas flow, and then is uniformly increased from the second gas flow to the first gas flow.
In one embodiment, the time for the gas flow of the ammonia gas to drop from the first gas flow to the second gas flow at a constant speed is 10 s-30 min, and the time for the gas flow of the ammonia gas to rise from the second gas flow to the first gas flow at a constant speed is 10 s-30 min.
In one embodiment, the process of forming the sacrificial layer includes at least one growth cycle, and the gas flow rate of the ammonia gas is sequentially changed in the growth cycle as follows:
the gas flow of the ammonia gas is kept for a first preset time at a first gas flow;
the gas flow rate of the ammonia gas is reduced from the first gas flow rate to a second gas flow rate;
the gas flow of the ammonia gas is maintained for a second preset time at the second gas flow;
the gas flow rate of the ammonia gas is increased from the second gas flow rate to the first gas flow rate.
In one embodiment, the first preset time is greater than 0s and less than or equal to 30min, the time for the gas flow of the ammonia gas to drop from the first gas flow to the second gas flow is 10 s-30 min, the second preset time is greater than 0s and less than or equal to 30min, and the time for the gas flow of the ammonia gas to rise from the second gas flow to the first gas flow is 10 s-30 min.
In one embodiment, the process of forming the sacrificial layer includes at least one growth cycle, and in the growth cycle, the gas flow of the ammonia gas is reduced from a first gas flow to a second gas flow along a cosine curve, and then is increased from the second gas flow to the first gas flow.
In one embodiment, the time for the gas flow rate of the ammonia gas to decrease from the first gas flow rate to the second gas flow rate is 10 s-30 min, and the time for the gas flow rate of the ammonia gas to increase from the second gas flow rate to the first gas flow rate is 10 s-30 min.
In one embodiment, the process of forming the sacrificial layer includes 1 to 30 growth cycles.
In one embodiment, the ratio of V/III in the reaction gas is 20 to 100 during the formation of the sacrificial layer.
In one embodiment, in the process of forming the sacrificial layer, the gas flow rate of the hydrogen chloride is 5 sccm-100 sccm, and the gas flow rate of the ammonia gas is 100 sccm-4 slm.
In one embodiment, forming a thick film gallium nitride layer on the upper surface of the sacrificial layer comprises: and continuously introducing reaction gas comprising hydrogen chloride and ammonia gas into the hydride vapor phase epitaxy equipment to form the thick film gallium nitride layer on the upper surface of the sacrificial layer.
In one embodiment, in the process of forming the thick film gallium nitride layer, the gas flow of the hydrogen chloride is constant, and the gas flow of the ammonia gas continuously changes within a preset range; the ratio of V/III in the reaction gas is 1.2-50.
In one embodiment, the gas flow rate of the hydrogen chloride and the gas flow rate of the ammonia are both constant; the V/III ratio in the reaction gas is 20-100.
In one embodiment, in the process of forming the thick film gallium nitride layer, the gas flow rate of the hydrogen chloride is 50 sccm-1000 sccm, and the gas flow rate of the ammonia gas is 1000 sccm-6 slm.
The application also provides a semiconductor structure, which is prepared by adopting the preparation method in any scheme.
The application also provides a preparation method of the self-supporting gallium nitride layer, which comprises the following steps:
preparing a semiconductor structure using a method of preparing a semiconductor structure as described in any of the above schemes;
and cooling the semiconductor structure to enable the first gallium nitride layer to be automatically stripped, so as to obtain the self-supporting gallium nitride layer.
The application also provides a self-supporting gallium nitride layer, which is prepared by adopting the preparation method.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly introduced below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other embodiments of the drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a method for fabricating a semiconductor structure according to one embodiment of the present application;
fig. 2 is a schematic cross-sectional structure of a structure obtained in step S10 in a method for manufacturing a semiconductor structure according to an embodiment of the present application;
FIG. 3 is a schematic cross-sectional view illustrating a buffer layer formed in a method for fabricating a semiconductor structure according to an embodiment of the present disclosure;
fig. 4 is a schematic cross-sectional structure of the structure obtained in step S20 in the method for manufacturing a semiconductor structure according to an embodiment of the present application;
fig. 5 is a schematic cross-sectional structure of a structure obtained in step S30 in a method for manufacturing a semiconductor structure according to an embodiment of the present application;
FIGS. 6 to 8 are graphs showing the V/III ratio of the reaction gas with time in step S30 in the method for fabricating a semiconductor structure according to an embodiment of the present application;
fig. 9 is a schematic cross-sectional structure of a structure obtained in step S40 in a method for manufacturing a semiconductor structure according to an embodiment of the present application; fig. 9 is a schematic cross-sectional view of a semiconductor structure according to another embodiment of the present disclosure;
fig. 10 is a schematic cross-sectional structure of a self-supporting gallium nitride layer obtained in a method for preparing a self-supporting gallium nitride layer according to another embodiment of the present disclosure; fig. 10 is a schematic cross-sectional view of a self-supporting gan layer according to another embodiment of the present application.
Reference numerals illustrate: 10. a substrate; 11. a buffer layer; 12. patterning the mask layer; 121. an opening; 13. a sacrificial layer; 14. a thick film gallium nitride layer; 15. a self-supporting gallium nitride layer.
Detailed Description
In order to facilitate an understanding of the present application, a more complete description of the present application will now be provided with reference to the relevant figures. Preferred embodiments of the present application are shown in the drawings. This application may, however, be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
Where the terms "comprising," "having," and "including" are used herein, another component may also be added unless explicitly defined as such, e.g., "consisting of … …," etc. Unless mentioned to the contrary, singular terms may include plural and are not to be construed as being one in number.
In one embodiment, please refer to fig. 1, the present application provides a method for preparing a semiconductor structure, which includes the following steps:
s10: providing a substrate;
s20: forming a patterned mask layer on the substrate, wherein the patterned mask layer is internally provided with a plurality of openings;
s30: and forming a sacrificial layer on the surface of the patterned mask layer by adopting a hydride vapor phase epitaxy process, wherein the sacrificial layer comprises the following steps: placing the substrate with the patterned mask layer in a hydride vapor phase epitaxy device; introducing a reaction gas comprising hydrogen chloride and ammonia gas into the hydride vapor phase epitaxy equipment to form the sacrificial layer; the flow rate of the hydrogen chloride gas is constant, and the flow rate of the ammonia gas continuously changes within a preset range;
s40: and forming a thick film gallium nitride layer on the upper surface of the sacrificial layer.
In the method for manufacturing the semiconductor structure in the above embodiment, the sacrificial layer is formed by adopting the hydride vapor phase epitaxy process before the thick film gallium nitride layer is formed, and in the process of forming the sacrificial layer, the gas flow of hydrogen chloride is constant, and the gas flow of ammonia gas is continuously changed within a preset range.
In step S10, referring to step S10 in fig. 1 and fig. 2, a substrate 10 is provided.
In one example, the substrate 10 may be any one of a silicon substrate, a sapphire substrate, a silicon carbide substrate, a gallium arsenide substrate, or an aluminum nitride substrate.
In one example, after providing the substrate and before forming the patterned mask layer on the substrate 10, a step of forming a buffer layer 11 on the upper surface of the substrate 10 may be further included, as shown in fig. 3. Specifically, the buffer layer 11 may include an aluminum nitride layer or/and a gallium nitride layer, that is, the buffer layer 11 may be an aluminum nitride layer, a gallium nitride layer, or a stacked structure of an aluminum nitride layer and a gallium nitride layer.
In step S20, referring to step S20 in fig. 1 and fig. 4, a patterned mask layer 12 is formed on a substrate 10, and a plurality of openings 121 are formed in the patterned mask layer 12.
In one example, patterned masking layer 12 may be a single layer structure, in which case patterned masking layer 12 may be a metal masking layer, a metal alloy masking layer, a silicon-based oxide masking layer (e.g., a silicon dioxide layer), a silicon-based nitride masking layer, a metal oxide masking layer, or a metal nitride masking layer. The thickness of the patterned mask layer 12 may be set according to actual needs, and specifically, the thickness of the patterned mask layer 12 may be, but is not limited to, 10nm to 1000nm; more specifically, it may be 50nm to 700nm; in this embodiment, the thickness of the patterned mask layer 12 may be 70nm to 300nm, for example, 70nm, 100nm, 200nm or 300 nm.
In another example, patterned masking layer 12 may also be a multi-layer structure, where each patterned masking layer may be a metal masking layer, a metal alloy masking layer, a silicon-based oxide masking layer, a silicon-based nitride masking layer, a metal oxide masking layer, or a metal nitride masking layer. The thickness of each patterned mask layer can be set according to actual needs, and specifically, the thickness of each patterned mask layer can be, but is not limited to, 10 nm-1000 nm; more specifically, it may be 50nm to 700nm; in this embodiment, the thickness of each patterned mask layer may be 70nm to 300nm, for example, 70nm, 100nm, 200nm or 300 nm.
It should be noted that, if the patterned mask layer 12 includes a multi-layer structure, the patterns of each layer in the patterned mask layer 12 are basically consistent, that is, the patterned mask layer is manufactured by using a mask with the same pattern, but the patterns of each layer and the patterns of the mask used may be allowed to have deformation amounts not exceeding 20% according to the process as qualified.
In one example, the shape of the opening 121 may be set according to actual needs, and the shape of the opening 121 may be a circle, an ellipse, or an equilateral shape with a number of sides greater than 3.
In one example, patterned masking layer 12 may include a plurality of openings 121 therein, and plurality of openings 121 may be regularly spaced, such as in a matrix arrangement or a hexagonal array arrangement, or the like. In one example, the center distances of adjacent openings 121 may be equal, specifically 1 μm to 100 μm, more specifically 1 μm, 10 μm, 20 μm, 50 μm, 80 μm, 100 μm, or the like; in another example, the lateral distances between the centers of the adjacent openings 121 may be the same, and the longitudinal distances between the centers of the adjacent openings 121 may be the same, but the lateral distances and the longitudinal distances may be different; in yet another example, the openings 121 may be shaped as stripe-shaped openings, which may have a width of 1 μm to 10 μm, specifically 1 μm, 5 μm or 10 μm, and a spacing between adjacent openings 121 may be 1 μm to 10 μm, specifically 1 μm, 5 μm or 10 μm.
In one example, in the patterned mask layer 12, the area of the opening 121 occupies 30% -90% of the total area of the patterned mask layer 12, and in this embodiment, the area of the opening 121 occupies 40% -80%, specifically may be 40%, 50% or 60% of the total area of the patterned mask layer 12.
In one example, step S20 may include the steps of:
s201: forming a mask layer (not shown) on the substrate 10; specifically, the mask layer may be formed by, but not limited to, evaporation or sputtering;
s202: photoetching the mask layer to obtain a patterned mask layer 12; specifically, the mask layer may be subjected to photolithography and a wet etching process or a dry etching process to obtain the patterned mask layer 12.
In step S30, referring to step S30 in fig. 1 and fig. 5, a sacrificial layer 13 is formed on the surface of the patterned mask layer 12 by using a hydride vapor phase epitaxy process, which includes: placing the substrate 10 with the patterned mask layer 12 formed therein in a hydride vapor phase epitaxy apparatus; introducing a reaction gas including hydrogen chloride and ammonia gas into the hydride vapor phase epitaxy apparatus to form a sacrificial layer 13; the flow of hydrogen chloride is constant, and the flow of ammonia gas continuously changes within a preset range.
In one embodiment, in step S30, a gallium nitride sacrificial layer is formed as the sacrificial layer 13 by using a hydride vapor phase epitaxy process, specifically including:
s301: placing the substrate 10 with the patterned mask layer 12 formed therein in a hydride vapor phase epitaxy apparatus;
s302: introducing a reaction gas including hydrogen chloride and ammonia gas into the hydride vapor phase epitaxy apparatus to form a sacrificial layer 13; the flow of hydrogen chloride is constant, and the flow of ammonia gas continuously changes within a preset range.
It should be noted that, the sacrificial layer 13 may be a gallium nitride sacrificial layer, a gallium boat area and a reaction area are provided in the hydride vapor phase epitaxy device, the gallium boat area is provided with liquid gallium, and the substrate 10 with the patterned mask layer 12 is disposed in the reaction area; the hydrogen chloride is reacted before gallium metal to generate gallium chloride, and the gallium chloride is reacted with ammonia gas to generate a gallium nitride sacrificial layer after reaching the reaction zone.
It should be further noted that, the "continuous change" herein refers to a process in which the gas flow rate is continuously decreased or continuously increased, but the gas flow rate may be maintained before, between, or after the decrease; however, there cannot be abrupt changes in the gas flow, i.e., the gas flow cannot be abrupt from one value to another.
Specifically, the gas flow rate of the ammonia gas can be controlled by providing a flow controller (MFC).
In particular, the growth rate is typically controlled at a low level, among other things, considering that the sacrificial layer 13 needs to be maintained at a high quality, so that it acts as a seed for subsequent thick film gallium nitride layer epitaxial deposition. Typically less than 10um/h (microns per hour), while in order to form a laterally continuous epitaxial gallium nitride layer surface, it is desirable to have a growth rate greater than 1um/h. In the reaction process, the growth rate is generally controlled by the amount of hydrogen chloride, so that the amount of gallium chloride generated by the reaction with gallium metal is controlled, and the ammonia gas is kept excessive, so that the gallium chloride is completely reacted.
It was found during growth that higher epitaxial quality of the gallium nitride layer could be achieved with higher v/iii ratio, but at the same time also resulted in too low a lateral growth rate that did not completely close laterally and thus formed pit defects. The use of lower v/iii ratios can increase the lateral growth rate and thus more easily cause lateral closure, reducing pit defects, but the resulting gallium nitride layer has reduced epitaxial quality. The V/III ratio in the present invention means the ratio of the molar molecular weight of the group V element to the group III element.
Since the excess of ammonia gas over hydrogen chloride introduced during growth is always ensured in this example. In order to ensure that the growth environment is basically alkaline and the ammonia gas amount is not excessive, in the step, the gas flow of hydrogen chloride is 5sccm (standard milliliters per minute) to 100sccm, and the gas flow of ammonia gas is 100sccm to 4slm (standard liters per minute); specifically, the flow rate of hydrogen chloride may be 5sccm, 10sccm, 20sccm, 50sccm, 80sccm, 100sccm, or the like, and the flow rate of ammonia gas may be 100sccm, 500sccm, 1slm, 2slm, 3slm, 4slm, or the like.
Specifically, the sacrificial layer 13 needs to be grown with a relatively high V/III ratio (five-three ratio) in the initial growth stage, so as to improve the epitaxial growth quality of the formed gallium nitride sacrificial layer, and then gradually and continuously reduce the gas flow rate of the ammonia gas under the condition of constant gas flow rate of the hydrogen chloride, i.e. reduce the V/III ratio so as to increase the transverse epitaxial growth rate, thereby reducing the occurrence of pit defects.
In one embodiment, the process of forming the sacrificial layer 13 includes at least one growth cycle, in which the gas flow rate of the ammonia gas is uniformly reduced from the first gas flow rate to the second gas flow rate, and then is uniformly increased from the second gas flow rate to the first gas flow rate, the change of the gas flow rate of the ammonia gas results in the change of the V/III ratio in the reaction gas, and the V/III ratio is in direct proportion to the gas flow rate of the ammonia gas; as shown in fig. 6, wherein fig. 6 exemplifies three growth cycles, in each growth cycle, as the gas flow rate of ammonia changes, the V/III ratio in the reaction gas is uniformly decreased from the first V/III ratio n2 to the second V/III ratio n1, and then is uniformly increased from the second V/III ratio n1 to the first V/III ratio n2; this is repeated for a plurality of growth cycles. The first gas flow may be the maximum gas flow of ammonia required for growing the sacrificial layer 13, the second gas flow may be the minimum gas flow of ammonia required for growing the sacrificial layer 13, i.e., the first V/III ratio in fig. 6 may be the maximum V/III ratio in the reaction gas, and the second V/III ratio may be the minimum V/III ratio in the reaction gas.
Specifically, in this embodiment, the time for the flow rate of the ammonia gas to drop from the first flow rate to the second flow rate at a constant speed and the time for the flow rate of the ammonia gas to rise from the second flow rate to the first flow rate may be the same or different in each growth cycle, i.e., t1 in fig. 6 may be equal to t2-t1 or may be unequal to t2-t 1. More specifically, the time for the gas flow rate of the ammonia gas to drop from the first gas flow rate to the second gas flow rate at a constant speed is 10s (seconds) to 30min (minutes), for example, may be 10s, 1min, 10min, 20min or 30min, etc., and the time for the gas flow rate of the ammonia gas to rise from the second gas flow rate to the first gas flow rate at a constant speed is 10s to 30min, for example, may be 10s, 1min, 10min, 20min or 30min, etc.
In another example, the gas flow rate of the ammonia gas may be increased by a process of keeping the gas flow rate of the ammonia gas unchanged in at least one of the processes of the first gas flow rate decreasing from the first gas flow rate to the second gas flow rate, the process of the first gas flow rate increasing from the second gas flow rate and the process of the second gas flow rate increasing from the second gas flow rate to the first gas flow rate, before the first gas flow rate starts to decrease, during the process of the first gas flow rate decreasing from the first gas flow rate to the second gas flow rate, and after the first gas flow rate increasing, as shown in fig. 7, during a growth cycle, the gas flow rate of the ammonia gas is changed in sequence as follows:
the gas flow of the ammonia gas is kept for a first preset time at the first gas flow; that is, the V/III ratio in the reaction gas is maintained at the first V/III ratio n2 for a first preset time t1;
the gas flow rate of the ammonia gas is reduced from the first gas flow rate to the second gas flow rate; that is, the V/III ratio in the reaction gas is reduced from the first V/III ratio n2 to the second V/III ratio n1;
the gas flow of the ammonia gas is maintained for a second preset time (t 3-t 2) at a second gas flow n1; that is, the V/III ratio in the reaction gas is maintained at the second V/III ratio n1 for a second preset time (t 3-t 2);
the gas flow rate of the ammonia gas is increased from the second gas flow rate n1 to the first gas flow rate n2; i.e. the V/III ratio in the reaction gas increases from the second V/III ratio n1 to the first V/III ratio n2.
In fig. 7, only the gas flow rate of the ammonia gas is set to be maintained for a period of time before the first gas flow rate starts to decrease, after the first gas flow rate decreases to the second gas flow rate, and after the first gas flow rate increases; in other examples, at least one process for maintaining the gas flow rate of the ammonia gas for a constant period of time may be added to each of the process of decreasing the first gas flow rate to the second gas flow rate and the process of increasing the first gas flow rate by the second gas flow rate.
As an example, in this embodiment, the time for which the gas flow rate of the ammonia gas decreases, the time for which the gas flow rate of the ammonia gas increases, and the time for which the gas flow rate of the ammonia gas remains unchanged may be the same or different, and specifically, taking fig. 7 as an example, t1, t2-t1, t3-t2, and t4-t3 may be the same or different. Specifically, the time for which the gas flow rate of the ammonia gas is kept constant may be greater than 0s and equal to or less than 30min, i.e., t1 and t3-t2 in fig. 7 may be greater than 0s and equal to or less than 30min, for example, may be 1min, 10min, 20min, 30min, or the like; the time for the gas flow rate of the ammonia gas to drop from the first gas flow rate n2 to the second gas flow rate n1 at a constant speed is 10s to 30min, for example, may be 10s, 1min, 10min, 20min or 30min, etc., and the time for the gas flow rate of the ammonia gas to rise from the second gas flow rate to the first gas flow rate at a constant speed is 10s to 30min, for example, may be 10s, 1min, 10min, 20min or 30min, etc.
In one embodiment, the gas flow rate of the ammonia gas may also decrease from the first gas flow rate to the second gas flow rate along the cosine curve, and then increase from the second gas flow rate to the first gas flow rate, as shown in fig. 8. The time for the V/III ratio in the reaction gas to decrease from the first V/III ratio n2 to the second V/III ratio n1 in each growth cycle may be the same as or different from the time for the second V/III ratio n1 to increase to the first V/III ratio n2, i.e., t1 in FIG. 8 may be equal to t2-t1 or may be unequal to t2-t 1. More specifically, the time for the V/III ratio in the reaction gas to decrease from the first V/III ratio n2 to the second V/III ratio n1 is 10s to 30min, for example, may be 10s, 1min, 10min, 20min, 30min, or the like, and the time for the V/III ratio in the reaction gas to increase from the second V/III ratio n1 to the first V/III ratio n2 is 10s to 30min, for example, may be 10s, 1min, 10min, 20min, 30min, or the like.
Specifically, in each of the above embodiments, the growth cycle in the process of forming the sacrificial layer 13 may be set according to actual needs, and in this embodiment, the process of forming the sacrificial layer 13 may include 1 to 30 growth cycles, specifically, the number of growth cycles may be 1, 10, 20, 30, or the like.
In one example, the V/III ratio in the reaction gas may be 20 to 100, specifically 30 to 70, such as 30, 40, 50, 60 or 70, etc.
As an example, the thickness of the sacrificial layer 13 is 80 μm to 400 μm, and specifically, the thickness of the thick film gallium nitride layer 14 may be 80 μm, 100 μm, 200 μm, 300 μm, 400 μm, or the like.
In this step, by using the above technical solution, the growth early stage of the sacrificial layer 13 can be kept to be higher in quality, and the lateral epitaxy is increased in the subsequent epitaxy process, so that the formation of pit defects is reduced, and the process is repeated for several times, so that a high-quality seed crystal substrate with few pit defects is provided for the subsequent thick film gallium nitride layer. The surface performance of the wafer is improved while the high quality is ensured. It should be noted, however, that the variation in the amount of ammonia gas in the present invention is slowly and continuously varied, and no mutation is present.
In step S40, referring to step S40 in fig. 1 and fig. 9, a thick film gan layer 14 is formed on the upper surface of the sacrificial layer 13.
In one example, the hydride vapor phase epitaxy apparatus is continuously purged with a reactive gas comprising hydrogen chloride and ammonia to form a thick film gallium nitride layer 14 on the upper surface of the sacrificial layer 13.
In one example, during the process of forming the thick film gallium nitride layer 14, the gas flow of hydrogen chloride is constant, the gas flow of ammonia may continuously change within a preset range, and the change manner of the gas flow of ammonia is substantially the same as the change manner of the gas flow of ammonia during the process of forming the sacrificial layer 13, and reference may be made to step S30, which will not be described here; in this step, the flow rate of the ammonia gas is not necessarily changed from the high flow rate to the low flow rate, but may be changed from the low flow rate to the high flow rate. The ratio of V/III in the reaction gas is 1.2 to 50, specifically, the ratio of V/III may be 1.5 to 40, preferably the ratio of V/III may be 2 to 30, more preferably the ratio of V/III may be 3 to 20, such as the ratio of V/III may be 3, 5, 10, 15 or 20, etc.
In another embodiment, the gas flow rates of hydrogen chloride and ammonia are both constant; the V/III ratio in the reaction gas is 20-100; in particular, the V/III ratio may be 20, 50 or 100, etc.
As an example, in this step, in the process of forming the thick film gallium nitride layer 14, the gas flow rate of hydrogen chloride is 50sccm to 1000sccm, and the gas flow rate of hydrogen chloride may be 100sccm to 700sccm, which is limited; the gas flow of the ammonia is 1000 sccm-6 slm; specifically, the flow rate of hydrogen chloride may be 50sccm, 100sccm, 500sccm, 800sccm, or 1000sccm, etc., and the flow rate of ammonia gas may be 1000sccm, 2slm, 3slm, 4slm, 5slm, or 6slm, etc.
In step S30 and step S40, hydrogen chloride and ammonia gas are introduced into the hydride vapor phase epitaxy apparatus under the carrier of a carrier gas, which may include one or more of hydrogen, nitrogen and helium.
As an example, the thick film gallium nitride layer 14 may have a thickness of 500 μm to 2000 μm, specifically, the thick film gallium nitride layer 14 may have a thickness of 500 μm, 1000 μm, 2000 μm, or the like.
With continued reference to fig. 9 in conjunction with fig. 1 to 8, the present application further provides a semiconductor structure prepared by the method for preparing a semiconductor structure as described in the above embodiments.
In still another embodiment, referring to fig. 10 in combination with fig. 1 to 9, the present application further provides a method for preparing a self-supporting gan layer, which may include the following steps:
preparing a semiconductor structure using a method of preparing a semiconductor structure as described in any of the embodiments above; for a specific method of fabricating the semiconductor structure, reference is made to the foregoing embodiments, which are not further described herein;
the semiconductor structure is subjected to a temperature reduction process, so that the first gallium nitride layer 14 is automatically peeled off, to obtain a self-supporting gallium nitride layer 15, as shown in fig. 10.
In one example, the semiconductor structure may be naturally cooled to room temperature, and during the cooling process, the second thick film gallium nitride layer 14 is automatically stripped to obtain the self-supporting gallium nitride layer 15.
In one example, the semiconductor structure may be cooled to room temperature at a cooling rate of 5-30 ℃ per minute, during which time the thick film gallium nitride layer 14 is automatically stripped to yield the self-supporting gallium nitride layer 15. Specifically, the cooling rate may be 5 ℃/min, 10 ℃/min, 15 ℃/min, 20 ℃/min, 25 ℃/min or 30 ℃/min.
In one example, after obtaining the self-supporting gallium nitride layer 15, the self-supporting gallium nitride layer 15 may be further subjected to grinding and polishing processes, so as to make the surface roughness of the product meet the sales requirement. In the grinding and polishing, the sacrificial layer is removed in the grinding and polishing because of the thinner thickness, so that the influence of the non-uniformity in the longitudinal quality on the quality of the finished gallium nitride crystal is not worried.
In yet another embodiment, referring to fig. 10, the present application further provides a self-supporting gan layer 15, where the self-supporting gan layer 15 is prepared by the above-mentioned preparation method of the self-supporting gan layer.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples only represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the claims. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application is to be determined by the claims appended hereto.

Claims (15)

1. A method of fabricating a semiconductor structure, comprising:
providing a substrate;
forming a patterned mask layer on the substrate, wherein the patterned mask layer is internally provided with a plurality of openings;
and forming a sacrificial layer on the surface of the patterned mask layer by adopting a hydride vapor phase epitaxy process, wherein the sacrificial layer comprises the following steps: placing the substrate with the patterned mask layer in a hydride vapor phase epitaxy device; introducing a reaction gas comprising hydrogen chloride and ammonia gas into the hydride vapor phase epitaxy equipment to form the sacrificial layer; the flow rate of the hydrogen chloride gas is constant, and the flow rate of the ammonia gas continuously changes within a preset range; the process of forming the sacrificial layer comprises at least one growth period, wherein in the growth period, the gas flow of the ammonia gas is uniformly reduced from a first gas flow to a second gas flow, and then is uniformly increased from the second gas flow to the first gas flow; or the gas flow of the ammonia gas is reduced to a second gas flow from a first gas flow along a cosine curve in the form of the cosine curve, and then is increased to the first gas flow from the second gas flow;
forming a thick film gallium nitride layer on the upper surface of the sacrificial layer; the sacrificial layer comprises a gallium nitride sacrificial layer that acts as a seed for the thick film gallium nitride layer.
2. The method for manufacturing a semiconductor structure according to claim 1, wherein a time for the gas flow rate of the ammonia gas to decrease from the first gas flow rate to the second gas flow rate at a constant speed is 10s to 30min, and a time for the gas flow rate of the ammonia gas to increase from the second gas flow rate to the first gas flow rate at a constant speed is 10s to 30min.
3. The method of claim 1, wherein the process of forming the sacrificial layer comprises at least one growth cycle in which the gas flow rate of the ammonia gas is sequentially varied as follows:
the gas flow of the ammonia gas is kept for a first preset time at a first gas flow;
the gas flow rate of the ammonia gas is reduced from the first gas flow rate to a second gas flow rate;
the gas flow of the ammonia gas is maintained for a second preset time at the second gas flow;
the gas flow rate of the ammonia gas is increased from the second gas flow rate to the first gas flow rate.
4. The method of manufacturing a semiconductor structure according to claim 3, wherein the first preset time is greater than 0s and less than or equal to 30 minutes, the time for the gas flow of the ammonia gas to decrease from the first gas flow to a second gas flow is 10s to 30 minutes, the second preset time is greater than 0s and less than or equal to 30 minutes, and the time for the gas flow of the ammonia gas to increase from the second gas flow to the first gas flow is 10s to 30 minutes.
5. The method of manufacturing a semiconductor structure according to claim 1, wherein a time for the flow rate of the ammonia gas to decrease from the first flow rate to the second flow rate is 10s to 30min, and a time for the flow rate of the ammonia gas to increase from the second flow rate to the first flow rate is 10s to 30min.
6. The method of any one of claims 1 to 5, wherein the process of forming the sacrificial layer comprises 1 to 30 growth cycles.
7. The method according to any one of claims 1 to 5, wherein a V/III ratio in the reaction gas is 20 to 100 in the process of forming the sacrificial layer.
8. The method of manufacturing a semiconductor structure according to claim 7, wherein a gas flow rate of the hydrogen chloride is 5 seem to 100 seem and a gas flow rate of the ammonia gas is 100 seem to 4slm in the process of forming the sacrificial layer.
9. The method of claim 1, wherein forming a thick film gallium nitride layer on the upper surface of the sacrificial layer comprises: and continuously introducing reaction gas comprising hydrogen chloride and ammonia gas into the hydride vapor phase epitaxy equipment to form the thick film gallium nitride layer on the upper surface of the sacrificial layer.
10. The method of claim 9, wherein the flow of hydrogen chloride is constant and the flow of ammonia gas is continuously varied within a predetermined range during the formation of the thick film gallium nitride layer; the ratio of V/III in the reaction gas is 1.2-50.
11. The method for manufacturing a semiconductor structure according to claim 9, wherein a gas flow rate of the hydrogen chloride and a gas flow rate of the ammonia gas are both constant; the V/III ratio in the reaction gas is 20-100.
12. The method of any one of claims 9 to 11, wherein the hydrogen chloride gas flow rate is 50sccm to 1000sccm and the ammonia gas flow rate is 1000sccm to 6slm during the formation of the thick film gallium nitride layer.
13. A semiconductor structure prepared by the method of any one of claims 1 to 12.
14. A method of preparing a self-supporting gallium nitride layer, comprising:
preparing the semiconductor structure according to any one of claims 1 to 12 by a method of preparing the semiconductor structure;
and cooling the semiconductor structure to enable the thick film gallium nitride layer to be automatically stripped, so as to obtain the self-supporting gallium nitride layer.
15. A self-supporting gallium nitride layer prepared by the preparation method according to claim 14.
CN202110049774.3A 2021-01-14 2021-01-14 Semiconductor structure, self-supporting gallium nitride layer and preparation method thereof Active CN112820634B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110049774.3A CN112820634B (en) 2021-01-14 2021-01-14 Semiconductor structure, self-supporting gallium nitride layer and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110049774.3A CN112820634B (en) 2021-01-14 2021-01-14 Semiconductor structure, self-supporting gallium nitride layer and preparation method thereof

Publications (2)

Publication Number Publication Date
CN112820634A CN112820634A (en) 2021-05-18
CN112820634B true CN112820634B (en) 2024-01-16

Family

ID=75869525

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110049774.3A Active CN112820634B (en) 2021-01-14 2021-01-14 Semiconductor structure, self-supporting gallium nitride layer and preparation method thereof

Country Status (1)

Country Link
CN (1) CN112820634B (en)

Citations (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006116415A (en) * 2004-10-21 2006-05-11 Japan Science & Technology Agency METHOD FOR MANUFACTURING PHOTOCATALYST OF COMPOSITE METAL OXYNITRIDE GaN-ZnO
CN1826433A (en) * 2003-07-24 2006-08-30 S.O.I.Tec绝缘体上硅技术公司 Method of fabricating an epitaxially grown layer
CN101218662A (en) * 2005-08-29 2008-07-09 弗莱堡混合材料股份有限公司 Semi-conductor substrate and method and masking layer for producing a free-standing semi-conductor substrate by means of hydride-gas phase epitaxy
CN101404248A (en) * 2007-10-03 2009-04-08 日立电线株式会社 GaN single-crystal substrate and method for producing GaN single crystal
WO2012050888A2 (en) * 2010-09-28 2012-04-19 North Carolina State University Gallium nitride based structures with embedded voids and methods for their fabrication
JP2012246216A (en) * 2011-05-25 2012-12-13 Agency For Science Technology & Research Method for forming nanostructure on substrate and use of the same
CN102971452A (en) * 2010-05-11 2013-03-13 昆南诺股份有限公司 Gas-phase synthesis of wires
WO2014133267A1 (en) * 2013-02-28 2014-09-04 Seoul Viosys Co., Ltd. Method of fabricating nitride substrate
CN104047054A (en) * 2013-03-15 2014-09-17 氮化物处理股份有限公司 Low carbon group-III nitride crystals
CN104752321A (en) * 2013-12-27 2015-07-01 中芯国际集成电路制造(上海)有限公司 Method for manufacturing semiconductor device
CN107170668A (en) * 2017-06-01 2017-09-15 镓特半导体科技（上海）有限公司 A kind of self-standing gan preparation method
CN107180747A (en) * 2017-06-26 2017-09-19 镓特半导体科技（上海）有限公司 Semiconductor structure, self-standing gan layer and preparation method thereof
CN107195536A (en) * 2017-06-26 2017-09-22 镓特半导体科技（上海）有限公司 Self-standing gan layer and preparation method thereof
CN107881557A (en) * 2016-09-29 2018-04-06 赛奥科思有限公司 The manufacture method and element nitride crystal layered product of nitride crystal substrate
KR20180094437A (en) * 2017-02-15 2018-08-23 한양대학교 산학협력단 Methode for manufacturing gallium nitride substrate using the hydride vapor phase epitaxy
CN108779579A (en) * 2016-03-08 2018-11-09 赛奥科思有限公司 Element nitride crystal substrate
US10497562B1 (en) * 2018-05-29 2019-12-03 Industry-University Cooperation Foundation Hanyang University Method for manufacturing gallium nitride substrate using the hydride vapor phase epitaxy
CN111863945A (en) * 2020-07-15 2020-10-30 北京大学 High-resistance gallium nitride and preparation method of heterostructure thereof
WO2020228164A1 (en) * 2019-05-15 2020-11-19 中国电子科技集团公司第五十五研究所 Epitaxial growth method for reducing interfacial thermal resistance of gallium nitride high electron mobility field-effect transistor

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8768271B1 (en) * 2012-12-19 2014-07-01 Intel Corporation Group III-N transistors on nanoscale template structures
US20170025306A1 (en) * 2015-07-21 2017-01-26 Sunedison Semiconductor Limited (Uen201334164H) Methods for preparing layered semiconductor structures and related bonded structures

Patent Citations (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1826433A (en) * 2003-07-24 2006-08-30 S.O.I.Tec绝缘体上硅技术公司 Method of fabricating an epitaxially grown layer
JP2006116415A (en) * 2004-10-21 2006-05-11 Japan Science & Technology Agency METHOD FOR MANUFACTURING PHOTOCATALYST OF COMPOSITE METAL OXYNITRIDE GaN-ZnO
CN101218662A (en) * 2005-08-29 2008-07-09 弗莱堡混合材料股份有限公司 Semi-conductor substrate and method and masking layer for producing a free-standing semi-conductor substrate by means of hydride-gas phase epitaxy
CN101404248A (en) * 2007-10-03 2009-04-08 日立电线株式会社 GaN single-crystal substrate and method for producing GaN single crystal
CN102971452A (en) * 2010-05-11 2013-03-13 昆南诺股份有限公司 Gas-phase synthesis of wires
WO2012050888A2 (en) * 2010-09-28 2012-04-19 North Carolina State University Gallium nitride based structures with embedded voids and methods for their fabrication
JP2012246216A (en) * 2011-05-25 2012-12-13 Agency For Science Technology & Research Method for forming nanostructure on substrate and use of the same
WO2014133267A1 (en) * 2013-02-28 2014-09-04 Seoul Viosys Co., Ltd. Method of fabricating nitride substrate
CN104047054A (en) * 2013-03-15 2014-09-17 氮化物处理股份有限公司 Low carbon group-III nitride crystals
CN104752321A (en) * 2013-12-27 2015-07-01 中芯国际集成电路制造(上海)有限公司 Method for manufacturing semiconductor device
CN108779579A (en) * 2016-03-08 2018-11-09 赛奥科思有限公司 Element nitride crystal substrate
CN107881557A (en) * 2016-09-29 2018-04-06 赛奥科思有限公司 The manufacture method and element nitride crystal layered product of nitride crystal substrate
KR20180094437A (en) * 2017-02-15 2018-08-23 한양대학교 산학협력단 Methode for manufacturing gallium nitride substrate using the hydride vapor phase epitaxy
CN107170668A (en) * 2017-06-01 2017-09-15 镓特半导体科技（上海）有限公司 A kind of self-standing gan preparation method
CN107180747A (en) * 2017-06-26 2017-09-19 镓特半导体科技（上海）有限公司 Semiconductor structure, self-standing gan layer and preparation method thereof
CN107195536A (en) * 2017-06-26 2017-09-22 镓特半导体科技（上海）有限公司 Self-standing gan layer and preparation method thereof
US10497562B1 (en) * 2018-05-29 2019-12-03 Industry-University Cooperation Foundation Hanyang University Method for manufacturing gallium nitride substrate using the hydride vapor phase epitaxy
WO2020228164A1 (en) * 2019-05-15 2020-11-19 中国电子科技集团公司第五十五研究所 Epitaxial growth method for reducing interfacial thermal resistance of gallium nitride high electron mobility field-effect transistor
CN111863945A (en) * 2020-07-15 2020-10-30 北京大学 High-resistance gallium nitride and preparation method of heterostructure thereof

Also Published As

Publication number Publication date
CN112820634A (en) 2021-05-18

Similar Documents

Publication Publication Date Title
US7888244B2 (en) Threading-dislocation-free nanoheteroepitaxy of Ge on Si using self-directed touch-down of Ge through a thin SiO2 layer
US7192802B2 (en) ALD ZnO seed layer for deposition of ZnO nanostructures on a silicon substrate
US20040077156A1 (en) Methods of defect reduction in wide bandgap thin films using nanolithography
JP2006523033A (en) Method for growing single crystal GaN on silicon
JP2006130647A (en) SELECTIVE GROWTH OF ZnO NANOSTRUCTURE USING PATTERNED ATOMIC LAYER DEPOSITION (ALD) ZnO SEED LAYER
JP2012033944A (en) Method of reducing poor planarization and defect density of silicon germanium
EP3251147B1 (en) Semiconductor wafer comprising a monocrystalline group-iiia nitride layer
KR20060082550A (en) Method of manufacturing a thin film layer
US20070224784A1 (en) Semiconductor material having an epitaxial layer formed thereon and methods of making same
JP2004111848A (en) Sapphire substrate, epitaxial substrate using it, and its manufacturing method
CN112820634B (en) Semiconductor structure, self-supporting gallium nitride layer and preparation method thereof
CA1337170C (en) Method for forming crystalline deposited film
JP5014217B2 (en) Group III nitride semiconductor and method of manufacturing the same
JP5439526B2 (en) Group III nitride semiconductor and substrate for group III nitride semiconductor growth
JPH11340147A (en) Manufacture of nitride semiconductor wafer and element
JP2013211442A (en) Method for manufacturing nitride semiconductor epitaxial wafer
CN112820632B (en) Semiconductor structure, self-supporting gallium nitride layer and preparation method thereof
CN112820636B (en) Semiconductor structure, self-supporting gallium nitride layer and preparation method thereof
JPH02237021A (en) Manufacture of semiconductor device
US20090246460A1 (en) Structure And Method For Forming Crystalline Material On An Amorphous Structure
JP4212426B2 (en) Method for producing group III nitride compound semiconductor substrate
JP3805703B2 (en) Method for producing group 3-5 compound semiconductor and group 3-5 compound semiconductor
CN113161225B (en) Semiconductor structure, self-supporting gallium nitride layer and preparation method thereof
US5961718A (en) Process for selectively depositing diamond films
JPH0513339A (en) Selective growth method for silicon epitaxial film and its manufacture

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant