CN112767868A

CN112767868A - Display panel and display device

Info

Publication number: CN112767868A
Application number: CN202110120315.XA
Authority: CN
Inventors: 田苗苗; 马志丽; 赵欣; 赵虹; 段培; 朱正勇
Original assignee: Kunshan Govisionox Optoelectronics Co Ltd
Current assignee: Kunshan Govisionox Optoelectronics Co Ltd
Priority date: 2021-01-28
Filing date: 2021-01-28
Publication date: 2021-05-07

Abstract

The invention discloses a display panel and a display device. The display panel includes: the display device comprises a display area and a light-transmitting area, wherein the display area is provided with pixel driving circuits arranged in an array manner; in the first direction, a first data signal line, a second data signal line and a third data signal line which provide data signals for the pixel driving circuit are arranged outside the light-transmitting area in a winding mode: the first data signal line, the second data signal line and the third data signal line are all arranged on different film layers; the film layer where the third data signal line is located between the film layer where the first data signal line is located and the film layer where the second data signal line is located; the projection of the first data signal line and the projection of the second data signal line in the thickness direction of the display panel overlap. Compared with the prior art, the embodiment of the invention reduces the capacitive coupling among different data signal lines, reduces crosstalk and improves the display effect of the display panel.

Description

Display panel and display device

Technical Field

The embodiment of the invention relates to the technical field of display, in particular to a display panel and a display device.

Background

With the continuous development of display technology, the application range of display panels is wider and wider, people have higher and higher requirements on display panels, the market has stronger and stronger requirements on narrow frames of display screens, and low-cost and high-resolution display panels have attracted attention. In the conventional display panel, in order to increase the resolution and the screen ratio of the display panel, the arrangement of the data signal lines is dense. Therefore, a strong coupling effect exists between the data signal lines, so that the display panel has a crosstalk problem, and the display effect of the display panel is affected.

Disclosure of Invention

The embodiment of the invention provides a display panel and a display device, which are used for reducing capacitive coupling among different data signal lines, reducing crosstalk and improving the display effect of the display panel.

In order to achieve the technical purpose, the embodiment of the invention provides the following technical scheme:

a display panel comprises a display area and a light-transmitting area, wherein the display area is provided with pixel driving circuits arranged in an array manner; in the first direction, a first data signal line, a second data signal line and a third data signal line which provide data signals for the pixel driving circuit are arranged outside the light-transmitting area in a winding mode:

the first data signal line, the second data signal line and the third data signal line are all arranged on different film layers;

the film layer where the third data signal line is located between the film layer where the first data signal line is located and the film layer where the second data signal line is located; the projection of the first data signal line and the projection of the second data signal line in the thickness direction of the display panel overlap.

According to the technical scheme, the distance between the first data signal line and the second data signal line is larger, more film layers are arranged at intervals, and thicker media exist. Therefore, although the projections of the first data signal line and the second data signal line are overlapped, the parasitic capacitance formed between the first data signal line and the second data signal line is small, and the coupling influence of the first data signal line and the second data signal line is small in the signal transmission process. Based on this, the first data signal line and the second data signal line are arranged to be overlapped in projection in the thickness direction of the display panel, so that the wiring space of the data signal line is reduced, the wiring freedom of the data signal line is increased, and the resolution of the display panel is improved.

Further, the display panel further includes:

a film layer in which the power supply voltage signal line is located between a film layer in which the second data signal line is located and a film layer in which the third data signal line is located; the power supply voltage signal line provides a power supply voltage signal for the pixel driving circuit; the projection of the power supply voltage signal line in the thickness direction of the display panel covers the projection of the first data signal line in the thickness direction of the display panel and covers the projection of the second data signal line in the thickness direction of the display panel. In the embodiment of the invention, the power supply voltage signal wire is added between the first data signal wire and the second data signal wire, which is equivalent to adding a shielding layer, thus being beneficial to further reducing the influence of capacitance coupling between the data signal wires and preventing crosstalk between signals.

Optionally, a projection of the power supply voltage signal line in the thickness direction of the display panel covers a projection of the third data signal line in the thickness direction of the display panel.

Optionally, the power voltage signal is a first power voltage signal or a second power voltage signal of the display panel, so as to reduce the number of signal lines.

Optionally, the power supply voltage signal line is multiplexed as a first power supply voltage signal line of the display panel, or the power supply voltage signal line is multiplexed as a second power supply voltage signal line of the display panel, thereby being beneficial to reducing the number of signal lines.

Further, the display panel further includes a multiplexing circuit, the multiplexing circuit including:

the data input end is used for inputting a data signal in a time-sharing manner;

the multiplexing circuit is used for outputting the input data signals in a time-sharing manner through the data output ends; the data output end is electrically connected with the first data signal line, or the data output end is electrically connected with the second data signal line, or the data output end is electrically connected with the third data signal line.

The embodiment of the invention can enable two or more adjacent data signal lines to share one port of the driving chip by arranging the multiplexing circuit, thereby reducing the number of the data signal lines connected with the driving chip, being beneficial to reducing the number of output channels of the driving chip, reducing the width of a fan-out area and being beneficial to the design of a narrow frame of a display panel.

Optionally, the number of the data output terminals corresponding to one data input terminal is two, three or six.

Further, the pixel driving circuit comprises a first pixel driving unit for driving the first sub-pixel unit to emit light, a second pixel driving unit for driving the second sub-pixel unit to emit light, and a third pixel driving unit for driving the third sub-pixel unit to emit light; the light emitting colors of the first sub-pixel unit, the second sub-pixel unit and the third sub-pixel unit are different; the first pixel driving unit, the second pixel driving unit and the third pixel driving unit are arranged in a first direction and a second direction in an array; the first data signal line, the second data signal line and the third data signal line all extend along the first direction or all extend along the second direction;

preferably, the first direction is a column direction, and the second direction is a row direction;

preferably, in the column direction, the first pixel driving units and the third pixel driving units are alternately arranged, and the second pixel driving units are arranged in a column; in the row direction, the first pixel driving unit, the second pixel driving unit, and the third pixel driving unit are alternately arranged; the first data signal line, the second data signal line and the third data signal line extend along the column direction, and the first pixel driving unit and the third pixel driving unit which are alternately arranged in a column are connected with one first data signal line; a column of the second pixel driving units is connected with one of the second data lines; the first pixel driving units and the third pixel driving units which are alternately arranged in another column are connected with the third data signal line; the first pixel driving unit and the third pixel driving unit connected with the first data signal line and the first pixel driving unit and the third pixel driving unit connected with the third data signal line are arranged in a staggered mode;

optionally, the light emitting color of the first sub-pixel unit is red, the light emitting color of the second sub-pixel unit is green, and the light emitting color of the third sub-pixel unit is blue.

Furthermore, the display panel further comprises a first metal layer, a second metal layer, a third metal layer and a fourth metal layer which are stacked;

the first data signal line is located on the first metal layer, the second data signal line is located on the third metal layer or the fourth metal layer, and the third data signal line is located on the second metal layer; wherein projections of the first data signal line and the third data signal line in a thickness direction of the display panel do not overlap.

Optionally, the materials of the first metal layer and the second metal layer are the same, the materials of the third metal layer and the fourth metal layer are the same, and the sheet resistance of the third metal layer is smaller than that of the first metal layer.

Optionally, the display panel further comprises: a power supply voltage signal line; the second data signal line is located on the fourth metal layer, and the power supply voltage signal line is located on the third metal layer.

the first data signal line is located on the fourth metal layer, the second data signal line is located on the first metal layer or the second metal layer, and the third data signal line is located on the third metal layer; wherein projections of the first data signal line and the third data signal line in a thickness direction of the display panel do not overlap.

Furthermore, at least one organic layer and one inorganic layer are included between the film layer where the first data signal line is located and the film layer where the second data signal line is located.

Optionally, a space between the film layer where the first data signal line is located and the film layer where the second data signal line is located includes: the passivation layer includes an intermediate layer, a first passivation layer, a second passivation layer, and a planarization layer.

Optionally, a space between the film layer where the first data signal line is located and the film layer where the second data signal line is located includes: a first passivation layer, a second passivation layer, and a planarization layer.

Optionally, a space between the film layer where the first data signal line is located and the film layer where the second data signal line is located includes: the intermediate layer, the first passivation layer and the second passivation layer.

Further, the display panel further includes:

the drilling device comprises a drilling area and a drilling routing area surrounding the drilling area; in the hole digging routing area, the first data signal line, the second data signal line and the third data signal line are all arranged on different film layers, and the film layer where the third data signal line is arranged is located between the film layer where the first data signal line is arranged and the film layer where the second data signal line is arranged; the projection of the first data signal line and the projection of the second data signal line in the thickness direction of the display panel overlap.

The embodiment of the invention is arranged in such a way, and is beneficial to improving the data signal transmission effect, the display effect of the digging hole area and the display uniformity of the display panel on the basis of the design of the narrow frame of the digging hole routing area.

Optionally, outside the hole digging routing area, the first data signal line, the second data signal line and the third data signal line are alternately arranged on a third metal layer and a fourth metal layer; the part of the first data signal line, which is positioned in the hole digging routing area, is connected with the part of the first data signal line, which is positioned outside the hole digging routing area, through a via hole, or the part of the second data signal line, which is positioned in the hole digging routing area, is connected with the part of the second data signal line, which is positioned outside the hole digging routing area, through a via hole, or the part of the third data signal line, which is positioned in the hole digging routing area, is connected with the part of the third data signal line, which is positioned outside the hole digging routing area, through a via hole.

Optionally, outside the hole digging and routing area, the first data signal line, the second data signal line and the third data signal line are all disposed on a third metal layer; or the first data signal line, the second data signal line and the third data signal line are all arranged on a fourth metal layer outside the hole digging routing area.

Optionally, the part of the first data signal line, which is located in the hole digging routing area, is arranged to adapt to the edge shape of the hole digging area; the part of the second data signal line, which is positioned in the hole digging routing area, is arranged according to the edge shape of the hole digging area; the part of the third data signal line, which is positioned in the hole digging routing area, is arranged according to the edge shape of the hole digging area.

Further, the projection of the first data signal line and the projection of the second data signal line in the thickness direction of the display panel coincide;

or the projection of the first data signal line in the thickness direction of the display panel covers the projection of the second data signal line in the thickness direction of the display panel;

or, the projection of the second data signal line in the thickness direction of the display panel covers the projection of the first data signal line in the thickness direction of the display panel.

Correspondingly, the invention also provides a display device, comprising: a display panel as provided in any of the embodiments of the present invention.

The display panel provided by the embodiment of the invention comprises a first data signal line, a second data signal line and a third data signal line. The film layer where the third data signal line is located between the film layer where the first data signal line is located and the film layer where the second data signal line is located, and the position relationship shows that the distance between the first data signal line and the second data signal line is large, the film layers with more intervals exist, and a thicker medium exists. Therefore, although the projections of the first data signal line and the second data signal line are overlapped, the parasitic capacitance formed between the first data signal line and the second data signal line is small, and the coupling influence of the first data signal line and the second data signal line is small in the signal transmission process. Based on this, the first data signal line and the second data signal line are arranged to be overlapped in projection in the thickness direction of the display panel, so that the wiring space of the data signal line is reduced, the wiring freedom of the data signal line is increased, and the resolution of the display panel is improved. In summary, the embodiments of the present invention reduce the wiring space of the data signal lines, increase the wiring freedom of the data signal lines, and improve the resolution of the display panel on the basis of reducing the coupling influence between the data signal lines, reducing the signal crosstalk, and improving the display effect.

Drawings

Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention;

FIG. 2 is a schematic cross-sectional view taken along line A-A' of FIG. 1;

FIG. 3 is another schematic cross-sectional view taken along line A-A' of FIG. 1;

FIG. 4 is a schematic cross-sectional view taken along line A-A' of FIG. 1;

FIG. 5 is a schematic cross-sectional view taken along line A-A' of FIG. 1;

fig. 6 is a schematic structural diagram of another display panel according to an embodiment of the present invention;

fig. 7 is a schematic diagram of a data signal on a first data signal line according to an embodiment of the present invention;

FIG. 8 is a schematic cross-sectional view taken along line C-C' of FIG. 6;

FIG. 9 is another schematic cross-sectional view taken along line C-C' of FIG. 6;

FIG. 10 is a schematic cross-sectional view taken along line C-C' of FIG. 6;

fig. 11 is a schematic structural diagram of another display panel according to an embodiment of the present invention;

FIG. 12 is a timing diagram of a multiplexing circuit according to an embodiment of the present invention;

FIG. 13 is a schematic cross-sectional view taken along line D-D' of FIG. 11;

fig. 14 is a schematic structural diagram of another display panel according to an embodiment of the present invention;

FIG. 15 is a schematic cross-sectional view taken along line E-E' of FIG. 14;

FIG. 16 is a schematic cross-sectional view taken along line F-F' of FIG. 14;

fig. 17 is another schematic cross-sectional view taken along line E-E' of fig. 14.

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.

Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention, and fig. 2 is a schematic cross-sectional diagram taken along a-a' in fig. 1. Referring to fig. 1 and 2, the display panel includes a display area and a light-transmitting area (e.g., a hole-digging area for placing a camera, etc., not shown here, and specifically refer to fig. 14), the display area is provided with pixel driving circuits (not shown here, for driving pixel units to emit light) arranged in an array; in the first direction Y, a first data signal line 111, a second data signal line 112, and a third data signal line 113 that supply data signals to the pixel driving circuit are provided around the outside of the light-transmitting region. The first data signal line 111, the second data signal line 112, and the third data signal line 113 constitute a data signal line group 110, which is repeatedly arranged on the display panel.

The first data signal line 111, the second data signal line 112 and the third data signal line 113 are all disposed on different film layers; wherein, the film layer where the third data signal line 113 is located between the film layer where the first data signal line 111 is located and the film layer where the second data signal line 112 is located; the first data signal line 111 overlaps with the projection of the second data signal line 112 in the thickness direction X of the display panel.

The position relationship among the first data signal line 111, the second data signal line 112 and the third data signal line 113 shows that the distance between the first data signal line 111 and the second data signal line 112 is larger, more film layers are spaced, and a thicker medium exists. Therefore, although the projections of the first data signal line 111 and the second data signal line 112 overlap, the parasitic capacitance formed between the two lines is small, and the coupling effect of the two lines is small during signal transmission. On this basis, the first data signal line 111 and the second data signal line 112 are arranged to overlap in projection in the thickness direction X of the display panel in the embodiment of the present invention, which is beneficial to reducing the wiring space of the data signal lines, increasing the wiring freedom of the data signal lines, and improving the resolution of the display panel. In summary, the embodiments of the present invention reduce the wiring space of the data signal lines, increase the wiring freedom of the data signal lines, and improve the resolution of the display panel on the basis of reducing the coupling influence between the data signal lines, reducing the signal crosstalk, and improving the display effect; especially, for the part outside the light-transmitting area, the wiring space of the data signal line is smaller than that of the other part of the display area of the display panel, and the effect of the arrangement mode of the data signal line in the embodiment of the invention is more obvious.

With continued reference to fig. 1 and fig. 2, optionally, the pixel arrangement is RGB arrangement, and each data signal line is in control connection with a pixel driving unit for driving a column of sub-pixel units to emit light. Specifically, the first data signal line 111 is connected to a column of pixel driving units (e.g., referred to as a first pixel driving unit) for driving the first sub-pixel unit 211 to emit light, the second data signal line 112 is connected to a column of pixel driving units (e.g., referred to as a second pixel driving unit) for driving the second sub-pixel unit 212 to emit light, and the third data signal line 113 is connected to a column of pixel driving units (e.g., referred to as a third pixel driving unit) for driving the third sub-pixel unit 213 to emit light. The second data signal line 112 is connected to the second pixel driving unit through a connection line, so as to ensure reliable transmission of the data signal to the second pixel driving unit. Alternatively, the light emission color of the first sub-pixel unit 211 is red (denoted by R), the light emission color of the second sub-pixel unit 212 is green (denoted by G), and the light emission color of the third sub-pixel unit 213 is blue (denoted by B), and the first sub-pixel unit 211, the second sub-pixel unit 212, and the third sub-pixel unit 213 constitute one pixel unit 210.

The display panel further includes a driving chip 310, and the driving chip 310 is used to provide a data signal to each data signal line. In the display process, each data signal line transmits a data signal (voltage signal) to each sub-pixel unit row by row, so that each sub-pixel unit displays different gray scales, thereby forming the whole display screen.

With continued reference to fig. 1 and fig. 2, on the basis of the above embodiments, optionally, the first data signal line 111 and the third data signal line 113 have no overlap in projection in the thickness direction X of the display panel, and the second data signal line 112 and the third data signal line 113 have no overlap in projection in the thickness direction X of the display panel. In the thickness direction X of the display panel, the third data signal line 113 is located between the first data signal line 111 and the second data signal line 112, so that the thickness of the film between the third data signal line 113 and the second data signal line 112 is smaller, and similarly, the thickness of the film between the third data signal line 113 and the first data signal line 111 is smaller. Therefore, the third data signal line 113 and the first data signal line 111 are arranged not to overlap in projection in the thickness direction X of the display panel, which is beneficial to reducing the coupling effect between the first data signal line 111 and the third data signal line 113, and the third data signal line 113 and the second data signal line 112 are arranged not to overlap in projection in the thickness direction X of the display panel, which is beneficial to reducing the coupling effect between the second data signal line 112 and the third data signal line 113.

In addition to the above embodiments, alternatively, the third data signal line 113 may overlap with a projection boundary of the first data signal line 111 in the thickness direction X, or the third data signal line 113 may overlap with a projection boundary of the second data signal line 112 in the thickness direction X. With this arrangement, the space occupied by the entire wiring of the data signal lines in the display panel can be further reduced, and more degrees of freedom can be provided for the wiring of the display panel.

In addition to the above embodiments, there are various alternative ways of overlapping the projections of the first data signal line 111 and the second data signal line 112 in the thickness direction X of the display panel, and they can be set as required in practical application. Some of these are described below, but the present invention is not limited thereto.

With continued reference to fig. 2, in an embodiment, optionally, there is a partial overlap between the projections of the first data signal line 111 and the second data signal line 112 in the thickness direction X of the display panel. As exemplarily shown in fig. 2, the right half of the first data signal line 111 overlaps the left half of the second data signal line 112. In other embodiments, it may also be arranged that the left half of the first data signal line 111 overlaps the right half of the second data signal line 112.

Fig. 3 is another schematic cross-sectional view taken along a-a' in fig. 1. Referring to fig. 3, in an embodiment, optionally, the projections of the first data signal line 111 and the second data signal line 112 in the thickness direction X of the display panel coincide. The widths of the first data signal line 111 and the second data signal line 112 are equal, and therefore, the first data signal line 111 and the second data signal line 112 can be arranged to be completely overlapped, so that the space occupied by the whole wiring of the data signal lines on the display panel is further reduced, and more freedom is provided for the wiring of the display panel.

Fig. 4 is a schematic sectional view taken along a line a-a 'in fig. 1, and fig. 5 is a schematic sectional view taken along a line a-a' in fig. 1. In one embodiment, optionally, the widths of the first data signal line 111 and the second data signal line 112 are different, and one data signal line may be disposed to cover the other data signal line, so as to reduce the space occupied by the whole wiring of the data signal lines in the display panel and provide more freedom for the wiring of the display panel. Specifically, as shown in fig. 4, the projection of the first data signal line 111 in the thickness direction X of the display panel covers the projection of the second data signal line 112 in the thickness direction X of the display panel. Alternatively, as shown in fig. 5, the projection of the second data signal line 112 in the thickness direction X of the display panel covers the projection of the first data signal line 111 in the thickness direction X of the display panel.

Fig. 6 is a schematic structural diagram of another display panel according to an embodiment of the present invention. Referring to fig. 6, in an embodiment, the pixel arrangement is optionally an RGBRGB arrangement. Specifically, the display panel includes a first sub-pixel unit 211, a second sub-pixel unit 212, and a third sub-pixel unit 213. The pixel driving circuit includes a first pixel driving unit for driving the first sub-pixel unit 211 to emit light, a second pixel driving unit for driving the second sub-pixel unit 212 to emit light, and a third pixel driving unit for driving the third sub-pixel unit 213 to emit light. The first sub-pixel unit 211, the second sub-pixel unit 212 and the third sub-pixel unit 213 emit light with different colors; the first, second, and third

sub-pixel units

211, 212, and 213 are closely arranged in an array in the first direction Y and the second direction Z. The first data signal line 111, the second data signal line 112, and the third data signal line 113 each extend in the first direction Y, or each extend in the second direction Z (here, the case of extending in the first direction Y is exemplarily shown). Optionally, the first direction Y is a column direction, and the second direction Z is a row direction.

In the column direction (first direction) Y, the first sub-pixel units 211 and the third sub-pixel units 213 are alternately arranged; correspondingly, in the first direction Y, the first pixel driving units and the third pixel driving units are alternately arranged. The second sub-pixel units 212 are arranged in columns, and correspondingly, the second pixel driving units are arranged in columns. In the row direction (second direction) Z, the first pixel driving units, the second pixel driving units, and the third pixel driving units are alternately arranged; the first data signal line 111, the second data signal line 112 and the third data signal line 113 extend along the column direction Y, and the first pixel driving units and the third pixel driving units alternately arranged in a column are connected with one first data signal line 111; a column of second pixel driving units is connected to a second data line 112; the first pixel driving units and the third pixel driving units which are alternately arranged in another column are both connected with a third data signal line 113; the first pixel driving unit and the third pixel driving unit connected by the first data signal line 111, and the first pixel driving unit and the third pixel driving unit connected by the third data signal line 113 are arranged in a staggered manner.

Alternatively, the light emitting color of the first sub-pixel unit 211 is red, the light emitting color of the second sub-pixel unit 212 is green, and the light emitting color of the third sub-pixel unit 213 is blue.

Fig. 7 is a schematic diagram of a data signal on a first data signal line according to an embodiment of the present invention. Referring to fig. 7, in this arrangement, for example, during the process of lighting the pixel units 210 row by row, the first data signal line 111 and the third data signal line 113 both alternately transmit the voltage signals required by the first sub-pixel unit 211 and the third sub-pixel unit 213; the second data signal line 112 always transmits a voltage signal required by the second sub-pixel unit 212.

Specifically, with reference to fig. 6 and 7, the light emitting process of the display panel includes:

in the first time period Ta1, the scan signal corresponding to the pixel unit 210 in a certain row (for example, the nth row) is asserted, the first data signal line 111 transmits the voltage signal DR required by the first sub-pixel unit 211 (red sub-pixel unit), the second data signal line 112 transmits the voltage signal required by the second sub-pixel unit 212, and the third data signal line 113 transmits the voltage signal required by the third sub-pixel unit 213.

The second period Tb1 is a delay time for each data signal line to perform conversion between each row of data signals.

In the third time period Ta2, the scanning signal corresponding to the pixel unit 210 in the next row (for example, the (n + 1) th row) is active, the first data signal line 111 transmits the voltage signal DB required by the third sub-pixel unit 213 (blue sub-pixel unit), the second data signal line 112 still transmits the voltage signal required by the second sub-pixel unit 212, and the third data signal line 113 transmits the voltage signal required by the first sub-pixel unit 211.

The fourth period Tb2 is a delay time for each data signal line to perform conversion between each row of data signals.

In the fifth period Ta3, the data transmission process of the first period Ta1 is repeated. And so on, until all the pixel units 210 are lighted, the display of the display frame of one frame of the display panel is completed.

In this embodiment, the first data signal line 111 is disposed on the fourth metal layer 40, so that the delay time when the first data signal line 111 transmits signals to the sub-pixel units in different rows can be reduced, and the display effect of the display panel can be improved. Specifically, the first data signal line 111 alternately transmits the voltage signal DR required by the first sub-pixel unit 211 (red sub-pixel unit) and the voltage signal DB required by the third sub-pixel unit 213 (blue sub-pixel unit) when transmitting the data signal to the sub-pixel units of different rows. Taking the sub-pixel unit corresponding to the first data signal line 111 in the nth row as a red sub-pixel unit as an example, the sub-pixel unit corresponding to the first data signal line 111 in the (n + 1) th row is a blue sub-pixel unit, the sub-pixel unit corresponding to the first data signal line 111 in the (n + 2) th row is a red sub-pixel unit, and so on.

The charging time of the first data signal line 111 is recorded as Ta, the time for switching between signals required by different sub-pixel units is recorded as Tb, and the square resistance of the fourth metal layer 40 is small, so that the delay time Tb between each row can be effectively reduced, the charging time Ta is increased, and the image quality problem under different R/B/G pictures can be improved. Similarly, the third data signal line 113 is disposed on the third metal layer 30, so that the delay time of the third data signal line 113 transmitting signals to the sub-pixel units in different rows can be reduced, and the display effect of the display panel can be improved. In addition, the first data signal line 111 and the third data signal line 113 are arranged in the film layer with the same material, so that the difference of data transmission speed and efficiency between different red and blue sub-pixel units caused by different film layer materials can be effectively avoided, and the display effect of the display panel is further improved.

On the basis of the above embodiments, each data signal line in the data signal line group 110 may be optionally disposed in the same layer as each metal layer in the display panel, so as to reduce the thickness of the display panel. In the following, several arrangements of the data signal lines will be described with reference to the rgb pixel arrangement, but the invention is not limited thereto.

Fig. 8 is a schematic cross-sectional view taken along line C-C' of fig. 6. In an embodiment, with reference to fig. 6 to 8, the display panel further includes a first metal layer 10, a second metal layer 20, a third metal layer 30, and a fourth metal layer 40, which are stacked. The first metal layer 10 may be a gate layer, and a plate of a capacitor may be further disposed on the first metal layer 10; the second metal layer 20 may provide a second plate of the capacitor; the third metal layer 30 may be a source drain pattern layer; the fourth metal layer 40 may be provided with a signal line such as a power supply line.

Optionally, at least an intermediate layer 50 is disposed between the first metal layer 10 and the second metal layer 20, and the intermediate layer 50 may serve as a capacitor insulation layer; at least a first passivation layer 60 and a second passivation layer 70 are disposed between the second metal layer 20 and the third metal layer as an insulating layer between the two metal layers. Alternatively, the passivation layer may be made of an organic material or an inorganic material, such as SiO₂、Si₃N₄、Al₂O₃Polyimide, photoresist, benzocyclobutene, and the like. At least a planarization layer 80 is disposed between the third metal layer 30 and the fourth metal layer 40, and optionally, the planarization layer 80 may be made of an organic material, such as polyimide, etc.

Optionally, the first metal layer 10 and the second metal layer 20 are made of the same material, such as molybdenum Mo; the third metal layer 30 and the fourth metal layer 40 are made of the same material, such as titanium aluminum titanium TiAlTi; the sheet resistance of the third metal layer 30 is smaller than that of the first metal layer 10.

In this embodiment, the first data signal line 111 is located in the fourth metal layer 40, the second data signal line 112 is located in the second metal layer 20, and the third data signal line 113 is located in the third metal layer 30; wherein, the projections of the first data signal line 111 and the third data signal line 113 in the thickness direction X of the display panel do not overlap. At this time, at least: a first passivation layer 60, a second passivation layer 70, and a planarization layer 80, and the planarization layer 80 is thicker in thickness. As can be seen, the number of the film layers between the first data signal line 111 and the second data signal line 112 is large, the thickness of the film layers is thick, and the distance between the film layers is large, so that the capacitive coupling between the first data signal line 111 and the second data signal line 112 is small.

Fig. 9 is another schematic cross-sectional view taken along C-C' in fig. 6. Referring to fig. 9, in an embodiment, optionally, the first data signal line 111 is located in the fourth metal layer 40, the second data signal line 112 is located in the first metal layer 10, and the third data signal line 113 is located in the third metal layer 30. With this arrangement, at least: an intermediate layer 50, a first passivation layer 60, a second passivation layer 70, and a planarization layer 80. Compared with fig. 8, in the present embodiment, the number of film layers between the first data signal line 111 and the second data signal line 112 is larger, and the pitch between the first data signal line 111 and the second data signal line 112 is further increased, so that the capacitive coupling between the first data signal line 111 and the second data signal line 112 is smaller.

Fig. 10 is a schematic cross-sectional view taken along line C-C' of fig. 6. Referring to fig. 10, in an embodiment, optionally, the first data signal line 111 is located in the first metal layer 10, the second data signal line 112 is located in the third metal layer 30, and the third data signal line 113 is located in the second metal layer 20. Unlike fig. 8 and 9, in the present embodiment, the second data signal line 112 connected to the green sub-pixel unit (the second sub-pixel unit 212) is disposed in the third metal layer 30, and the first data signal line 111 and the third data signal line 113 are disposed in the first metal layer 10 and the second metal layer 20, respectively.

Because the sheet resistance of the first metal layer 10 and the second metal layer 20 is greater than that of the third metal layer 30, the delay time and the voltage drop on the second data signal line 112 are smaller, which is beneficial to the display effect of the green sub-pixel unit, and for the visual experience of human eyes, the influence of the green sub-pixel unit on the brightness of the display image is larger, which is beneficial to improving the uniformity of the display panel and improving the display effect of the display panel. In addition, in the embodiment, the first data signal line 111 and the third data signal line 113 are disposed in the same film layer, so that differences in data transmission speed and efficiency between different red and blue sub-pixel units caused by different film layer materials can be reduced, and the display effect of the display panel is improved.

In another embodiment, optionally, the first data signal line 111 is located in the second metal layer 20, the second data signal line 112 is located in the fourth metal layer 40, and the third data signal line 113 is located in the first metal layer 10. Compared with fig. 10, in the present embodiment, the number of film layers between the first data signal line 111 and the second data signal line 112 is larger, and the pitch between the first data signal line 111 and the second data signal line 112 is further increased, so that the capacitive coupling between the first data signal line 111 and the second data signal line 112 is smaller.

Fig. 11 is a schematic structural diagram of another display panel according to an embodiment of the present invention. Referring to fig. 11, on the basis of the above embodiments, the display panel optionally further includes a multiplexing circuit 410. The multiplexing circuit 410 includes: a data input terminal and at least two data output terminals corresponding to one data input terminal. The data input end is used for inputting a data signal in a time-sharing manner; the multiplexing circuit 410 is used for outputting the input data signal through the data output end in a time-sharing manner; the data output terminal is electrically connected to the first data signal line 111, or the data output terminal is electrically connected to the second data signal line 112, or the data output terminal is electrically connected to the third data signal line 113. Therefore, in the embodiment of the present invention, by setting the multiplexing circuit 410, two or more adjacent data signal lines can share one port of the driving chip, thereby reducing the number of data signal lines connected to the driving chip, being beneficial to reducing the number of output channels of the driving chip 310, reducing the width of a fan-out area, and being beneficial to the design of a narrow frame of a display panel.

Alternatively, in the multiplexing circuit 410, the number of the data output terminals corresponding to one data input terminal is two, three or six, and may be set as required in practical applications. The principle of the multiplexing circuit 410 is explained below by taking an alternative example in conjunction with fig. 11.

The multiplexing circuit 410 includes a first transistor M1 and a second transistor M2. A first pole of the first transistor M1 is electrically connected to a first pole of the second transistor M2 and serves as an input terminal of the multiplexing circuit 410; the second pole of the first transistor M1 serves as the first output terminal of the multiplexing circuit 410; the second pole of the second transistor M2 serves as the second output terminal of the multiplexing circuit 410. Optionally, the display panel further includes a first control signal line 411 and a second control signal line 412. The gate of the first transistor M1 is electrically connected to the first control signal line 411, and the first control signal line 411 is used for controlling the on/off of the first transistor M1; the gate of the second transistor M2 is electrically connected to the second control signal line 412, and the second control signal line 412 is used for controlling the second transistor M2 to be turned on or off.

The operation principle of the multiplexer circuit 410 will be explained below by taking the first transistor M1 and the second transistor M2 as P-type transistors, but the invention is not limited thereto. In other embodiments, the transistors in the multiplexing circuit 410 may be replaced with N-type transistors.

Fig. 12 is a timing diagram of a multiplexing circuit according to an embodiment of the invention. As shown in fig. 12, when the first transistor M1 and the second transistor M2 are both P-type transistors, the first control signal Demux1 and the second control signal Demux2 are both active low. Referring to fig. 11 and 12, the data input terminal is used to input different data signals in two stages, and specifically, in the first stage, the data input terminal inputs a data signal required for the data signal line connected to the first transistor M1 and outputs the data signal to the data signal line connected to the first transistor M1; in the second stage, the data input terminal inputs a data signal required for the data signal line connected to the second transistor M2, and outputs the data signal to the data signal line connected to the second transistor M2 in the second stage.

Illustratively, for the multiplexing circuit 410 connecting the first data signal line 111 and the second data signal line 112, the operation of the multiplexing circuit 410 when driving the last row of pixels includes:

in the first period T1, the first control signal Demux1 is low, the second control signal Demux2 is high, and the Scan signal Scan is high. The first transistor M1 is turned on, the second transistor M2 is turned off, and the pixel circuit corresponding to the last row of pixels is in a non-data writing stage. The data signal of the red sub-pixel unit generated by the driving chip 310 is transmitted to the first data signal line 111 through the first and second poles of the first transistor M1, and the first data signal line stores the data signal of the red sub-pixel unit due to the storage capacitor.

In the second phase T2, the first control signal Demux1 is at a high level, the second control signal Demux2 is at a low level, and the Scan signal Scan is at a high level. The first transistor M1 is turned off, the second transistor M2 is turned on, and the pixel circuit corresponding to the last row of pixels is in a non-data writing stage. The data signal of the green sub-pixel unit generated by the driving chip 310 is transferred to the second data signal line 112 through the first and second poles of the second transistor M2, and the second data signal line stores the data signal of the green sub-pixel unit due to the storage capacitance.

In the third stage T3, the first control signal Demux1 is at a high level, the second control signal Demux2 is at a high level, and the Scan signal Scan is at a low level. The first transistor M1 is turned off, the second transistor M2 is turned off, the pixel circuit corresponding to the last row pixel is in the data writing stage, and the first data signal line 111 writes the data signal of the red sub-pixel unit into the corresponding pixel circuit; at the same time, the second data signal line 112 writes the data signal of the green sub-pixel unit into the corresponding pixel circuit.

In summary, the multiplexing circuit 410 transmits the data signal to the corresponding data signal line through the same output port of the two-stage time-division multiplexing driving chip 310. Alternatively, when the multiplexing circuit 410 includes two output terminals, the first multiplexing circuit 410 may connect the first data signal line 111 and the second data signal line 112; the second multiplexing circuit 410 may connect the third data signal line 113 and the first data signal line 111; the third multiplexing circuit 410 may connect the second data signal line 112 and the third data signal line 113; by analogy, half of the output ports of the driving chip 310 are reduced as compared with a display panel not provided with a multiplexing circuit.

Further analysis shows that the first data signal line 111 and the second data signal line 112 alternately transmit voltage signals in a time-sharing manner. Therefore, when the first data signal line 111 is in a floating state after the transmission is completed, and when the voltage transmission is performed on the second data signal line 112, the signal coupling effect between the data signal lines easily affects the potential of the first data signal line 111, so that the data voltage written into the pixel circuit is deviated in the third stage T3. In the embodiment of the present invention, a plurality of films and a large thickness are disposed between the first data signal line 111 and the second data signal line 112, so that the capacitive coupling between the first data signal line 111 and the second data signal line 112 is small.

Fig. 13 is a schematic cross-sectional view taken along line D-D' of fig. 11. Referring to fig. 13, on the basis of the foregoing embodiment, a power supply voltage signal line 114 is optionally added between the first data signal line 111 and the second data signal line 112, which is equivalent to adding a shielding layer, and is beneficial to further reducing the influence of capacitive coupling between the data signal lines and preventing crosstalk between signals. Specifically, the first data signal line 111 is located in the first metal layer 10, the second data signal line 112 is located in the fourth metal layer 40, the third data signal line 113 is located in the second metal layer 20, and the power voltage signal line 114 is located in the third metal layer 30. The power supply voltage signal line 114 is connected to a power supply voltage signal; the projection of the power supply voltage signal line 114 in the thickness direction X of the display panel covers the projection of the first data signal line 111 in the thickness direction X of the display panel and covers the projection of the second data signal line 112 in the thickness direction X of the display panel.

In this way, at least: an intermediate layer 50, a first passivation layer 60, and a second passivation layer 70; the number of layers and the distance between the power voltage signal line 114 and the first data signal line 111 are large, so that the existence of the power voltage signal line 114 does not affect the normal transmission of the data signal on the first data signal line 111. The space between the film layer (the third metal layer 30) where the power voltage signal line 114 is located and the film layer (the fourth metal layer 40) where the second data signal line 112 is located at least includes: a planarization layer 80. The planarization layer 80 has a larger thickness, so that the film between the power voltage signal line 114 and the second data signal line 112 has a larger thickness and a larger distance, so that the existence of the power voltage signal line 114 does not affect the normal transmission of the data signal on the second data signal line 112.

In the embodiment of the invention, the power supply voltage signal line 114 is arranged to isolate the first data signal line 111 from the second data signal line 112, and when the voltage on the first data signal line 111 floats, the voltage on the power supply voltage signal line 114 remains unchanged, and the voltage change on the second data signal line 112 does not affect the voltage on the first data signal line 111, so that the influence of crosstalk caused by capacitive coupling between the first data signal line 111 and the second data signal line 112 is further reduced, and the display effect of the display panel is further improved. In the case where the display panel has or does not have the power supply voltage signal line 114 through simulation verification, a comparison table of coupling capacitances of adjacent data signal lines is shown in table 1.

TABLE 1

In Table 1, C₁₁₁Representing the total capacitance, C, on the first data signal line 111₁₁₂Represents the total capacitance, C, on the second data signal line 112₁₁₃Represents the total capacitance, C, on the third data signal line 113_111-113A coupling capacitance representing the first data signal line 111 and the third data signal line 113,C_111-112Represents the coupling capacitance, C, of the first data signal line 111 and the second data signal line 112_112-113Representing the coupling capacitance of the second data signal line 112 and the third data signal line 113. It can be seen that, after the power voltage signal line 114 is added, the coupling capacitance C of the first data signal line 111 and the third data signal line 113 is increased_111-113Coupling capacitor C of the first data signal line 111 and the second data signal line 112_111-112Coupling capacitance C with the second data signal line 112 and the third data signal line 113_112-113The coupling capacitance value of (2) is reduced significantly. Especially for the coupling capacitance C of the first data signal line 111 and the second data signal line 112_111-112After the power supply voltage signal line 114 is added, the value thereof is reduced to zero, and the coupling capacitance of the first data signal line 111 and the second data signal line 112 is eliminated.

With continued reference to fig. 13, in addition to the above embodiments, optionally, the projection of the power supply voltage signal line 114 in the thickness direction X of the display panel covers the projection of the third data signal line 113 in the thickness direction X of the display panel. By the arrangement, the influence of the capacitive coupling effect between the second data signal line 112 and the third data signal line 113 can be further reduced, the crosstalk phenomenon between signals is reduced, and the display effect of the display panel is improved.

On the basis of the above embodiments, optionally, the power supply voltage signal is the first power supply voltage signal of the display panel, and the power supply voltage signal line 114 is multiplexed as the first power supply voltage signal line of the display panel, thereby being beneficial to reducing the number of signal lines.

In another embodiment, the power voltage signal is optionally a second power voltage signal of the display panel, and the power voltage signal line 114 is multiplexed as the second power voltage signal line of the display panel, thereby being beneficial to reducing the number of signal lines.

In the above embodiments, the arrangement of the first data signal line, the second data signal line and the third data signal line may be applied to the whole display panel, or may be applied to a partial region of the display panel, such as a hole digging region of the display panel. The concrete description is as follows:

fig. 14 is a schematic structural diagram of another display panel according to an embodiment of the present invention. Referring to fig. 14, on the basis of the above embodiments, optionally, the display panel further includes: a hole digging area (which can be used as a light transmission area) 11, a hole digging routing area 12 surrounding the hole digging area 11, and a non-hole digging area 13 outside the hole digging routing area 12. In the hole-digging wiring area 12, the first data signal line 111, the second data signal line 112, and the third data signal line 113 may be disposed in any one of the above-described manners. Alternatively, the cutout area 11 may be used to provide a camera, an earpiece, a sensor, and the like. The embodiment of the invention is arranged in such a way, and is beneficial to improving the data signal transmission effect, the display effect of the digging hole area and the display uniformity of the display panel on the basis of the design of the narrow frame of the digging hole routing area 12.

Alternatively, in a region (non-excavated region 13) other than the excavated wiring region 12, the projections of the first data signal line 111, the second data signal line 112, and the third data signal line 113 in the thickness direction of the display panel may not overlap. Preferably, in order to reduce delay and loss of data signal transmission, the first data signal line 111, the second data signal line 112, and the third data signal line 113 may be disposed in the third metal layer and the fourth metal layer, each having a smaller square resistance, in the non-excavated region 13. Several wiring methods of the data signal lines will be described below.

Fig. 15 is a schematic cross-sectional view taken along line E-E' of fig. 14. Referring to fig. 15, in one embodiment, optionally, in the non-excavated region 13, the first data signal line 111, the second data signal line 112, and the third data signal line 113 are alternately disposed in the third metal layer 30 and the fourth metal layer 40. As exemplarily shown in fig. 15, the first data signal line 111 and the third data signal line 113 are disposed in the third metal layer 30, and the second data signal line 112 is disposed in the fourth metal layer 40. In other embodiments, any two kinds of data signal lines may be disposed in the fourth metal layer 40, and another kind of data signal line may be disposed in the third metal layer 30.

Fig. 16 is a schematic cross-sectional view taken along line F-F' in fig. 14. Referring to fig. 16, in combination with the data signal line arrangement manner of the non-via area 13 in fig. 15, in an embodiment, optionally, in the via routing area 12, the first data signal line 111 is disposed on the fourth metal layer 40; a portion 1111 of the first data signal line 111 located in the via routing area 12 is connected to a portion 1112 (located in the third metal layer 30) located in the non-via area 13 through a via. In the hole-digging routing area 12, the second data signal line 112 is arranged on the first metal layer 10; the projection of the first portion 1121 of the second data signal line 112 in the hole digging routing area 12 in the display panel thickness direction X overlaps the first data signal line 111; the second portion 1122 of the second data signal line 112 in the via routing region 12 is connected to the portion 1123 (in the fourth metal layer 40) in the non-via region 13 by a via. In the hole-digging routing area 12, the third data signal line 113 is disposed on the third metal layer 30; the portion 1131 of the third data signal line 113 located in the routed hole area 12 is directly connected to the portion 1132 (located in the third metal layer 30) located in the non-routed hole area 13.

In other embodiments, optionally, the portion 1131 of the third data signal line 113 located in the hole routing area 12 and the portion 1132 located outside the hole routing area 12 may also be located on different film layers and connected by a via.

Fig. 17 is another schematic cross-sectional view taken along line E-E' of fig. 14. Referring to fig. 17, in an embodiment, optionally, in the non-excavated region 13, the first data signal line 111, the second data signal line 112, and the third data signal line 113 are disposed on the fourth metal layer 40.

In other embodiments, optionally, the first data signal line 111, the second data signal line 112, and the third data signal line 113 may also be disposed on the third metal layer 30 outside the hole-digging routing area 12.

With continued reference to fig. 14, on the basis of the above embodiments, optionally, the portion of the first data signal line 111 located in the routing area 12 of the dug hole is configured to adapt to the edge shape of the dug hole area 11; the part of the second data signal line 112 in the digging hole routing area 12 is arranged according to the edge shape of the digging hole area 11; the portion of the third data signal line 113 in the hole-digging routing area 12 is configured to adapt to the edge shape of the hole-digging area 11, so as to facilitate the arrangement of the signal lines in the hole-digging routing area 12. The shape of the dug-hole area 11 can be, but is not limited to, circular, square, etc.

It should be noted that, in the above embodiments, the RGB pixel arrangement and the RGBRGB pixel arrangement are exemplarily described, but the present invention is not limited thereto, and in other pixel arrangements, the film position of each data signal line may be set as needed.

It should be noted that, in the above embodiments, the arrangement of each sub-pixel unit and the pixel driving circuit for driving the sub-pixel unit to emit light is the same, and the invention is not limited thereto.

The embodiment of the invention also provides a display device which comprises the display panel provided by any embodiment of the invention and has corresponding beneficial effects. The display device can be any product or component with a display function, such as a mobile phone, a tablet computer, a television or a display.

It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. The display panel is characterized by comprising a display area and a light-transmitting area, wherein the display area is provided with pixel driving circuits arranged in an array manner; in the first direction, a first data signal line, a second data signal line and a third data signal line which provide data signals for the pixel driving circuit are arranged outside the light-transmitting area in a winding mode:

2. The display panel according to claim 1, further comprising:

a film layer in which the power supply voltage signal line is located between a film layer in which the second data signal line is located and a film layer in which the third data signal line is located; the power supply voltage signal line provides a power supply voltage signal for the pixel driving circuit; the projection of the power supply voltage signal line in the thickness direction of the display panel covers the projection of the first data signal line in the thickness direction of the display panel and covers the projection of the second data signal line in the thickness direction of the display panel;

optionally, the projection of the power supply voltage signal line in the thickness direction of the display panel covers the projection of the third data signal line in the thickness direction of the display panel;

optionally, the power supply voltage signal is a first power supply voltage signal or a second power supply voltage signal of the display panel;

optionally, the power voltage signal line is multiplexed as a first power voltage signal line of the display panel, or the power voltage signal line is multiplexed as a second power voltage signal line of the display panel.

3. The display panel of claim 2, further comprising a multiplexing circuit, the multiplexing circuit comprising:

the multiplexing circuit is used for outputting the input data signals in a time-sharing manner through the data output ends; the data output end is electrically connected with the first data signal line, or the data output end is electrically connected with the second data signal line, or the data output end is electrically connected with the third data signal line;

4. The display panel according to claim 1, wherein the pixel driving circuit comprises a first pixel driving unit for driving the first sub-pixel unit to emit light, a second pixel driving unit for driving the second sub-pixel unit to emit light, and a third pixel driving unit for driving the third sub-pixel unit to emit light; the light emitting colors of the first sub-pixel unit, the second sub-pixel unit and the third sub-pixel unit are different; the first pixel driving unit, the second pixel driving unit and the third pixel driving unit are arranged in a first direction and a second direction in an array; the first data signal line, the second data signal line and the third data signal line all extend along the first direction or all extend along the second direction;

5. The display panel according to claim 4, further comprising a first metal layer, a second metal layer, a third metal layer, and a fourth metal layer which are stacked;

the first data signal line is located on the first metal layer, the second data signal line is located on the third metal layer or the fourth metal layer, and the third data signal line is located on the second metal layer; wherein projections of the first data signal line and the third data signal line in a thickness direction of the display panel do not overlap;

optionally, the materials of the first metal layer and the second metal layer are the same, the materials of the third metal layer and the fourth metal layer are the same, and the sheet resistance of the third metal layer is smaller than that of the first metal layer;

6. The display panel according to claim 4, further comprising a first metal layer, a second metal layer, a third metal layer, and a fourth metal layer which are stacked;

the first data signal line is located on the fourth metal layer, the second data signal line is located on the first metal layer or the second metal layer, and the third data signal line is located on the third metal layer; wherein projections of the first data signal line and the third data signal line in a thickness direction of the display panel do not overlap;

7. The display panel according to claim 1, wherein at least one organic layer and one inorganic layer are included between the film layer where the first data signal line is located and the film layer where the second data signal line is located;

optionally, a space between the film layer where the first data signal line is located and the film layer where the second data signal line is located includes: an intermediate layer, a first passivation layer, a second passivation layer, and a planarization layer;

optionally, a space between the film layer where the first data signal line is located and the film layer where the second data signal line is located includes: a first passivation layer, a second passivation layer, and a planarization layer;

8. The display panel according to claim 1, further comprising:

the drilling device comprises a drilling area and a drilling routing area surrounding the drilling area; in the hole digging routing area, the first data signal line, the second data signal line and the third data signal line are all arranged on different film layers, and the film layer where the third data signal line is arranged is located between the film layer where the first data signal line is arranged and the film layer where the second data signal line is arranged; the projection of the first data signal line and the projection of the second data signal line in the thickness direction of the display panel are overlapped;

optionally, outside the hole digging routing area, the first data signal line, the second data signal line and the third data signal line are alternately arranged on a third metal layer and a fourth metal layer; the part of the first data signal line, which is positioned in the hole digging routing area, is connected with the part, which is positioned outside the hole digging routing area, through a through hole, or the part of the second data signal line, which is positioned in the hole digging routing area, is connected with the part, which is positioned outside the hole digging routing area, through a through hole, or the part, which is positioned in the hole digging routing area, of the third data signal line is connected with the part, which is positioned outside the hole digging routing area, through a through hole;

optionally, outside the hole digging and routing area, the first data signal line, the second data signal line and the third data signal line are all disposed on a third metal layer; or outside the hole digging routing area, the first data signal line, the second data signal line and the third data signal line are all arranged on a fourth metal layer;

9. The display panel according to claim 1, wherein projections of the first data signal line and the second data signal line in a thickness direction of the display panel coincide;

10. A display device, comprising: the display panel of any one of claims 1-9.