CN112766574A - Method for optimizing wiring path inside complete machine - Google Patents

Method for optimizing wiring path inside complete machine Download PDF

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CN112766574A
CN112766574A CN202110077666.7A CN202110077666A CN112766574A CN 112766574 A CN112766574 A CN 112766574A CN 202110077666 A CN202110077666 A CN 202110077666A CN 112766574 A CN112766574 A CN 112766574A
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吴曌
魏鑫
胡向莉
高啸
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Xian Microelectronics Technology Institute
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Abstract

The invention discloses a method for optimizing wiring paths in a complete machine, which comprises the following steps: step 1.1, defining a complete machine space position matrix by using a complete machine product development diagram, and designating nodes which need to pass through; step 1.2, removing the wiring relation of repeated spatial positions according to the contents of a wiring BOM table and combining a complete machine spatial position matrix to form a spatial position matrix with unequal dimensions; step 2.1, forming a minimum space wiring vector path with minimum dimension according to a wiring rule; step 2.2, the spatial position matrix is topologically arranged in the complete machine spatial position matrix, diagonal difference value operation is carried out according to the minimum spatial position matrix, and a diagonal difference value matrix set is generated after repeated iteration; and 2.3, applying a wiring vector path concept, taking a basic wiring rule as evaluation, forming a diagonal difference matrix vector path set, and finishing the optimization of the wiring path in the whole machine. The invention reduces the interference of human experience, improves the consistency of batch products and accelerates the production efficiency.

Description

Method for optimizing wiring path inside complete machine
Technical Field
The invention belongs to the field of connection path selection, and particularly relates to a method for optimizing a wiring path in a whole machine.
Background
The embedded whole machine product is connected with an external connector and a bottom plate (BUS) through a wiring harness, so that the electrical performance of the product is realized, and the wiring harness connection process is called as the internal wiring of the whole machine. The direction of the wire harness in the connection process of the embedded whole machine is called a wiring path. The internal wiring of the whole machine is carried out by adopting a manual wire binding method: manually classifying and bundling the scattered wires on the connectors one by one according to the connection relation shown on the connection table, and then planning and constructing the wiring path according to personal experience. The wiring of the whole machine finished according to the method has the defects of large difference of single piece processing, obvious individual style and poor consistency, is difficult to quickly position due to disordered wiring during troubleshooting and repair, and is not beneficial to batch production. In summary, the method for wiring paths inside the whole machine must be optimized, human experience interference is eliminated, batch production consistency is realized, and production efficiency is accelerated.
Disclosure of Invention
In view of the above-mentioned drawbacks, the present invention provides a method for optimizing an internal wiring path of a complete machine. The method has the advantages of reducing the interference of human experience, improving the consistency of batch products, accelerating the production efficiency and simultaneously solving the defect that the traditional wiring method cannot quickly find problem points during troubleshooting and repair.
The invention is realized by the following technical scheme:
a method for optimizing the internal wiring path of a complete machine comprises the following steps:
step 1, algorithm preparation phase
Step 1.1, defining a complete machine space position matrix by using a complete machine product development diagram, and designating space position nodes which need to pass through;
step 1.2, removing the wiring relation of repeated spatial positions according to the contents of a wiring BOM table and combining a complete machine spatial position matrix to form a spatial position matrix with unequal dimensions;
step 2, algorithm execution phase
Step 2.1, according to the wiring rule, a wiring vector path of the minimum spatial position matrix with the minimum dimension in the step 1.2 is appointed to form a minimum spatial wiring vector path with the minimum dimension;
step 2.2, the spatial position matrix formed in the step 1.2 is topologically arranged in a complete machine spatial position matrix, diagonal difference value operation is carried out according to the minimum spatial position matrix, and a diagonal difference value matrix set is generated after repeated iteration;
and 2.3, applying a wiring vector path concept, taking a basic wiring rule as evaluation, forming a diagonal difference matrix vector path set, sequentially merging the vector paths of each diagonal difference matrix from beginning to end according to the size of each diagonal difference matrix, and finishing the optimization of the internal wiring path of the whole machine.
Preferably, step 1.1 is specifically: the whole machine product model is unfolded by taking a wiring plane as a view center, and the wiring plane is divided in a position network mode; points which need to be passed are specified on the wiring plane and are taken as nodes on the position network; and (4) taking the wiring starting end and the wiring terminating end in the wiring BOM table as nodes on the position network, and finishing the definition of the space position matrix of the whole machine.
Preferably, step 1.2 is specifically: the method comprises the steps of taking a BOM table as an input, screening connection relations in the BOM table by using an Adodc control, reducing under the condition of the same wiring starting node by taking a connection starting end as a primary variable and taking a connection terminating end as a secondary variable, removing the connection relations of repeated spatial positions, and establishing a spatial position matrix with different dimensions according to the logical connection relations in the BOM table.
Preferably, step 2.1 is specifically: comparing the spatial position matrixes with different dimensions established in the step 1.2, and taking the matrix with the minimum display size on the wiring plane as a minimum spatial position matrix; setting a minimum spatial location matrix as a universal vector representation
Figure BDA0002908091360000021
(aibj，ai+mbj+n) Wherein
Figure BDA0002908091360000022
Representing a logical connection relationship between the connection start terminal and the connection end terminal, aibjRepresenting the wiring spatial position matrix coordinates of the starting end of the wiring, ai+mbj+nRepresenting the wiring space position matrix coordinate of the wiring termination end, m and n represent the space position matrix coordinate increment, and a is setjbj+n、ai+mbjRepresenting the bending point in the minimum space position matrix wiring vector path to form the minimum space wiring vector pathThe paths, represented as follows, the black arrows represent the strand run:
Figure BDA0002908091360000031
further, step 2.2 specifically includes: and (3) taking the spatial position matrix with unequal dimensionality formed in the step (1.2) as a subtree, and taking the minimum spatial position matrix as a subtree to perform diagonal difference operation, wherein the spatial position expression form is as follows:
Figure BDA0002908091360000032
wherein, with aibj-ai+mbj+nThe matrix that is the positive diagonal is the minimum spatial location matrix; with ai-pbj-q-ai+mbj+nThe matrix for the positive angle is a sub-small spatial position matrix; the difference operation according to the diagonal difference matrix is as follows:
Figure BDA0002908091360000033
setting the spatial position matrix of the whole machine as an n multiplied by m order matrix, the minimum spatial position matrix as an i multiplied by j order matrix, the sub-minimum spatial position matrix as a p multiplied by q order matrix, and the diagonal difference matrix x multiplied by y order matrix can be expressed as:
Figure BDA0002908091360000041
wherein, "-" represents the diagonal position difference value operation, and t represents the number of the spatial position matrixes with unequal dimensionalities which can be decomposed by the complete machine spatial position matrix containing the minimum spatial position matrix;
the diagonal difference matrix set is obtained as:
Figure BDA0002908091360000042
further, in step 2.3, according to the basic requirement of the wiring process that the wiring path between the starting end and the terminating end of the wiring needs to be arranged along a straight line and the bending number of the path arranged between the starting end and the terminating end of the wiring is preferably less, the optimal comparison of the diagonal difference matrix vector paths is as follows:
specifying a diagonal difference matrix such as
Figure BDA0002908091360000043
Diagonal difference matrix vector path 1 as
Figure BDA0002908091360000044
Diagonal difference matrix vector path 2 as
Figure BDA0002908091360000045
In the diagonal difference matrix vector path 1, the requirement that the wiring path needs to be arranged along a straight line is met, and ai-1 bj-q、aibj、ai+m bjThree bending points; in the diagonal difference matrix vector path 2, the requirement that the wiring path needs to be arranged along a straight line is met, and ai-p bj-1、ai+m bjTwo bending points; according to the requirement that the number of the bent paths is less and better, a diagonal difference matrix vector path 2 is superior to a diagonal difference matrix vector path 1, and a secondary small space wiring vector path is formed after the diagonal difference matrix vector path 2 is connected with a minimum space wiring vector path end to end; and repeatedly iterating the processes to form a diagonal difference matrix vector path set, and merging the diagonal difference matrix vector path set and the minimum space wiring vector path end to obtain a whole machine space wiring vector path so as to complete the optimization of the internal wiring path of the whole machine.
Compared with the prior art, the invention has the following beneficial technical effects:
1. defining a spatial position matrix: according to a space position matrix defined by a development diagram of a whole machine product, abstract wiring work is visualized, meanwhile, in order to remove the connection relation of repeated space positions, the wire outlet points of the same electric connector can be compressed into the same wiring starting end, and the wiring workload is reduced by 10% -30%.
2. Defining a diagonal difference matrix set: the method comprises the steps of generating a diagonal difference value matrix set by performing difference value operation between spatial position matrixes with different dimensions and a minimum spatial position matrix, dividing a large-volume complete machine spatial position matrix into a plurality of diagonal difference value matrixes, and eliminating the influence of construction experience of technologists on wiring effect by taking basic wiring requirements as limiting conditions. The measures unify the consistency of the wiring path design method of the whole machine product, accelerate the production efficiency in the wiring process design stage, and meanwhile, in the fault removing and repairing process, the wiring network can be quickly divided according to the fault phenomenon, the problem can be searched, and the local maintenance scheme can be formulated.
Figure illustrates the drawings
The method of FIG. 1 performs steps;
FIG. 2 is an expanded view of the whole machine product, and a wiring plane is divided;
FIG. 3 is a matrix of overall spatial positions;
FIG. 4 set of diagonal difference matrices
FIG. 5(a) spatial wiring vector path layout; (b) the wiring path inside the whole machine.
Detailed Description
The present invention will now be described in further detail with reference to specific examples, which are intended to be illustrative, but not limiting, of the invention.
The invention relates to a Routing Optimization Algorithm for the Electronic machine, in particular to a Routing Optimization Algorithm for the Electronic machine, which is called ROAE Algorithm for short. As shown in fig. 1, the method comprises the following steps:
(1) an algorithm preparation stage: defining a complete machine space position matrix by using a complete machine product development diagram, and designating space position nodes which must pass through; and removing the wiring relation of repeated spatial positions according to the contents of the wiring BOM table and the spatial position matrix of the whole machine to form a spatial position matrix with unequal dimensionality.
(2) And an algorithm execution stage: taking the spatial position matrix with the minimum dimension as an object, and appointing a wiring vector path according to a wiring rule to form a minimum spatial wiring vector path with the minimum dimension; carrying out diagonal difference value operation on the spatial position matrix topology formed in the step (1) in the complete machine spatial position matrix, and generating a diagonal difference value matrix set after repeated iteration; and applying a wiring vector path concept, taking a basic wiring rule as evaluation, forming a diagonal difference matrix vector path set, and merging the diagonal difference matrix vector path set and the space wiring vector path with the minimum dimension end to form a secondary small space wiring vector path. And repeating iteration to complete the optimization of the internal wiring path of the whole machine.
The step (1) specifically comprises the following steps:
and (1-1) defining a complete machine space position matrix by using a complete machine product development diagram, and specifying space position nodes which need to be passed through.
And (3) expanding the whole machine product model by taking the main wiring plane as a center, and dividing the wiring plane in a position network mode. Points that must be passed are specified on the wiring plane, while these points are treated as nodes on the location network. Similarly, the starting end and the terminating end of the wiring shown in the BOM are also used as nodes on the position network, so as to complete the definition of the space position matrix of the whole machine.
And (1-2) removing repeated spatial position wiring relation according to the content of the wiring BOM table and combining the spatial position matrix to form a spatial position matrix with unequal dimensionality.
The method comprises the steps of taking a BOM table as an input, screening connection relations in the BOM table by using an Adodc control, reducing under the condition of the same wiring starting node by taking a connection starting end as a primary variable and taking a connection terminating end as a secondary variable, removing the connection relations of repeated spatial positions, and establishing spatial position matrixes with different dimensions according to the logical connection relations shown in the BOM table.
This is the end of the ROAE algorithm preparation phase.
The step (2) specifically comprises the following steps:
and (2-1) taking the minimum spatial position matrix with the minimum dimension as an object, and according to a wiring rule, designating a wiring vector path of the minimum spatial position matrix to form the minimum spatial wiring vector path with the minimum dimension.
Firstly, the wiring process basically requires the use of algorithm for realization. After the basic requirements of the wiring process are implemented in the spatial position matrix, the wiring process can be summarized into two points: the wiring path between the wiring starting end and the wiring terminating end needs to be arranged along a straight line; the number of the bends of the path arranged between the wiring starting end and the wiring terminating end is preferably less.
And (3) comparing the spatial position matrixes with different dimensions established in the step (1-2) to obtain a matrix with the minimum display size on the wiring plane as a minimum spatial position matrix. Setting its general vector expression form as
Figure BDA0002908091360000071
(aibj，ai+mbj+n) Wherein
Figure BDA0002908091360000072
Representing a logical connection relationship between the connection start terminal and the connection end terminal, aibjRepresenting the wiring spatial position matrix coordinates of the starting end of the wiring, ai+mbj+nRepresenting the wiring space position matrix coordinate of the wiring termination end, m and n represent the space position matrix coordinate increment, and a is setibj+n、ai+mbjRepresenting the bending points in the minimum spatial position matrix routing vector path, the minimum spatial routing vector path is formed, and the expression form is shown as follows, and black arrows represent the wiring harness trend.
Figure BDA0002908091360000073
Or
Figure BDA0002908091360000074
(2-2) carrying out diagonal difference value operation on the spatial position matrix topology formed in the step (1) in the complete machine spatial position matrix, and generating a diagonal difference value matrix set after repeated iteration
And (3) taking the spatial position matrix with unequal dimensionality formed in the step (1-2) as a subtree, and taking the minimum spatial position matrix as a subtree to perform diagonal difference value operation, wherein the spatial position expression form is as follows:
Figure BDA0002908091360000081
wherein, with aibj-ai+mbj+nThe matrix that is the positive diagonal is the minimum spatial location matrix; with ai-pbj-q-ai+mbj+nThe matrix that is the positive angle is the next smallest spatial location matrix. The difference operation according to the diagonal difference matrix is as follows:
Figure BDA0002908091360000082
therefore, a complete machine space position matrix can be decomposed into a form that a plurality of diagonal difference value matrixes are connected with the minimum space position matrix end to end.
The above example can be integrated, that is, when the spatial position matrix of the whole machine is an n × m-order matrix, the minimum spatial position matrix is an i × j-order matrix, the sub-minimum spatial position matrix is a p × q-order matrix, and the diagonal difference matrix x × y-order matrix can be expressed as:
Figure BDA0002908091360000083
wherein "-" only represents the diagonal position difference operation, and "t" represents the number of the spatial position matrixes with unequal dimensionality which contain the minimum spatial position matrix and can be decomposed into the complete machine spatial position matrix.
When k is 2, the next smallest spatial position matrix [ p q [ ]]And the overall machine space position matrix [ n m]Equal and matrix of overall spatial positions [ n m ]]Can be decomposed into a diagonal difference matrix [ x y ]]1And a minimum spatial position matrix i x j.
When k is 3, the next smallest spatial position matrix [ p q [ ]]A diagonal difference matrix [ x y ] when k is 2 can be decomposed]1And a minimum spatial position matrix i x j, the entire machine spatial position matrix [ n m]Can be decomposed into two diagonal differencesValue matrix [ x y]1、[x y]2And a minimum spatial position matrix i x j.
When k equals t, the whole machine spatial position matrix [ n m ] can be decomposed into k-2 kinds of diagonal difference matrices and a minimum spatial position matrix i × j. The diagonal difference matrix set is therefore:
Figure BDA0002908091360000091
i.e. the whole machine space position matrix [ n m]Can be decomposed into
Figure BDA0002908091360000092
And the minimum spatial position matrix i x j.
The complete machine spatial position matrix is decomposed into a plurality of diagonal difference value matrixes which are collectively called a diagonal difference value matrix set, wherein the diagonal difference value matrix with the minimum volume is called a minimum spatial position matrix.
And (2-3) applying a wiring vector path concept, taking a basic wiring rule as evaluation, forming a diagonal difference matrix vector path set, and finishing the optimization of the wiring path in the whole machine.
According to the concept of the minimum spatial wiring vector path in step (2-1), the minimum spatial wiring vector path is actually the diagonal difference matrix with the smallest volume, i.e. the vectorized expression of the minimum spatial position matrix. When the spatial position matrix can be decomposed into two diagonal difference matrixes, namely a minimum spatial position matrix and a diagonal difference matrix, the complete machine spatial wiring vector path is the sum of a diagonal difference matrix vector path and the minimum spatial wiring vector path after the diagonal difference matrix vector path and the minimum spatial wiring vector path are connected end to end; when the spatial position matrix can be decomposed into only three diagonal difference matrixes, namely a minimum spatial position matrix, a secondary minimum diagonal difference matrix and a diagonal difference matrix, the complete machine spatial wiring vector path is the sum of a diagonal difference matrix vector path, a secondary minimum diagonal difference matrix vector path and the minimum spatial wiring vector path after the minimum spatial wiring vector path is connected end to end. When the spatial position matrix can be decomposed into a plurality of diagonal difference value matrixes, iteration is repeated according to the process.
When the actual algorithm is executed, the vector path formed needs to be optimized when the diagonal difference matrix vector path and the minimum space wiring vector path are connected end to end according to the basic requirements of the wiring process in the step (2-1), and the specific method is as follows:
assigning a diagonal difference matrix form
Figure BDA0002908091360000101
Diagonal difference matrix vector path 1 is shaped as
Figure BDA0002908091360000102
Diagonal difference matrix vector path 2 is formed as
Figure BDA0002908091360000103
In the diagonal difference matrix vector path 1, the requirement that the wiring path needs to be arranged along a straight line is met, and ai-1 bj-q、aibj、ai+m bjThree bending points. In the diagonal difference matrix vector path 2, the requirement that the wiring path needs to be arranged along a straight line is met, and ai-p bj-1、ai+m bjTwo bending points. According to the basic wiring requirement that the number of bent paths to be arranged is less and better, the diagonal difference matrix vector path 2 is superior to the diagonal difference matrix vector path 1, and is connected with the minimum space wiring vector path end to form a secondary small space wiring vector path. And (3) repeatedly iterating and using the vector path preference process to form an optimal diagonal difference matrix vector path set, and finishing the spatial wiring vector path layout of the spatial position matrix with unequal dimensions in the step (1-2).
And finishing the layout of the space position matrix optimized path of the whole machine, and finishing the optimization of the internal wiring path of the whole machine.
Examples
The method comprises the following steps: ROAE algorithm preparation phase: and defining a complete machine space position matrix and generating space position matrixes with different dimensions.
And dividing a wiring plane by using the development diagram of the whole machine product shown in fig. 2 and combining the characteristics of the whole machine product. The net dividing lines of the wiring plane need to pass through the principal feature points and the spatial location nodes that must be passed through.
In the wiring BOM table shown in table 1, the wiring start end is an electrical connector identified by XA1-XA7, the wiring termination end is a bottom board slot identified by BUS _1, BUS _2, and BUS _3, and the wiring process is routed to the pins of the filter 1 and the filter 2, so that the warp and weft threads need to pass through the wiring start end, the wiring termination end, and the routing position when the wiring plane is divided. It should be noted that, in the application process of the algorithm, in order to reduce the unnecessary calculation amount, on the premise of meeting the actual situation of the wiring construction process, the feature points near the distribution and the warp and weft and the spatial position nodes which need to pass are normalized, and the positions of the feature points are calculated according to the intersection points of the warp and weft when the algorithm is applied. The divided wiring planes are shown in fig. 2. Defining the warp and weft network lines, and forming the weft network lines as the weft: a is1、a2、a3、a4Warp yarn: b1、b2、b3、b4、b4. In the embodiment, the spatial position nodes related to the algorithm are: a is1b1、a1b2、a1b5、a2b1、a2b2、a2b3、a2b5、a3b3、a3b4、a4b5. The wiring spatial location matrix is shown in fig. 3.
Taking the electronic version wiring BOM table shown in table 1 as an input, taking the spatial position node in fig. 3 as a normalization processing center, and performing reduction on the wiring relation shown in the wiring BOM table under the condition of the same wiring starting node according to the method (specifically, using the wiring relation filtering program) in step (1-2), as shown in table 2. Forming a spatial position matrix with unequal dimensions.
The link relation screening program is as follows:
Figure BDA0002908091360000121
Figure BDA0002908091360000131
TABLE 1 XXX Wiring BOM Table
Figure BDA0002908091360000132
Figure BDA0002908091360000141
TABLE 2 reduced XXX wiring BOM table
Figure BDA0002908091360000142
Step two: the ROAE algorithm execution phase: specifying a routing vector path of the minimum spatial location matrix; generating a diagonal difference matrix set according to the method (specifically applying a diagonal difference operation program) in the step (2-2), as shown in fig. 4; and (3) according to the method (specifically applying a wiring vector path drawing program) in the step (2-3), finishing drawing a diagonal difference matrix set path, realizing the space wiring vector path layout of the space position matrix with unequal dimensions as shown in a figure 5(a), and finishing the whole internal wiring path optimization as shown in a figure 5 (b).
Diagonal difference calculation program:
Figure BDA0002908091360000143
Figure BDA0002908091360000151
routing vector path drawing program:
Figure BDA0002908091360000152
Figure BDA0002908091360000161
Figure BDA0002908091360000171
Figure BDA0002908091360000181
the method has clear steps and strong logicality in the implementation process: the implementation process steps of the method are clear, and the conditions are input and the output conclusion is clear at each stage. For the wiring process of a large-scale whole machine product, an electronic version wiring BOM can be introduced, the screening process is realized by using a VB programming program under a Visual Basic 6.0 platform, the wiring vector path drawing part is realized by using a general OpenGL programming program, the universality of a calculation program is high, the optimized wiring path inside the whole machine is automatically completed, and the time is saved by 50-70% compared with the time of the original method. For the wiring process of a small-sized or simple-wiring whole machine product, the optimal wiring path can be manually calculated according to the steps shown in the invention, and the time is saved by 10-20% compared with the original method.

Claims (6)

1. A method for optimizing a wiring path in a whole machine is characterized by comprising the following steps:
step 1, algorithm preparation phase
Step 1.1, defining a complete machine space position matrix by using a complete machine product development diagram, and designating space position nodes which need to pass through;
step 1.2, removing the wiring relation of repeated spatial positions according to the contents of a wiring BOM table and combining a complete machine spatial position matrix to form a spatial position matrix with unequal dimensions;
step 2, algorithm execution phase
Step 2.1, according to the wiring rule, a wiring vector path of the minimum spatial position matrix with the minimum dimension in the step 1.2 is appointed to form a minimum spatial wiring vector path with the minimum dimension;
step 2.2, the spatial position matrix formed in the step 1.2 is topologically arranged in a complete machine spatial position matrix, diagonal difference value operation is carried out according to the minimum spatial position matrix, and a diagonal difference value matrix set is generated after repeated iteration;
and 2.3, applying a wiring vector path concept, taking a basic wiring rule as evaluation, forming a diagonal difference matrix vector path set, sequentially merging the vector paths of each diagonal difference matrix from beginning to end according to the size of each diagonal difference matrix, and finishing the optimization of the internal wiring path of the whole machine.
2. The method for optimizing the wiring path inside the whole machine according to claim 1, wherein the step 1.1 is specifically as follows: the whole machine product model is unfolded by taking a wiring plane as a view center, and the wiring plane is divided in a position network mode; points which need to be passed are specified on the wiring plane and are taken as nodes on the position network; and (4) taking the wiring starting end and the wiring terminating end in the wiring BOM table as nodes on the position network, and finishing the definition of the space position matrix of the whole machine.
3. The method for optimizing the wiring path inside the whole machine according to claim 1, wherein the step 1.2 is specifically as follows: the method comprises the steps of taking a BOM table as an input, screening connection relations in the BOM table by using an Adodc control, reducing under the condition of the same wiring starting node by taking a connection starting end as a primary variable and taking a connection terminating end as a secondary variable, removing the connection relations of repeated spatial positions, and establishing a spatial position matrix with different dimensions according to the logical connection relations in the BOM table.
4. The method for optimizing the wiring path inside the whole machine according to claim 1, wherein the step 2.1 is specifically as follows: comparing the spatial position matrixes with unequal dimensions established in the step 1.2 to routeThe matrix with the minimum display size on the plane is a minimum spatial position matrix; setting a minimum spatial location matrix as a universal vector representation
Figure FDA0002908091350000021
Wherein
Figure FDA0002908091350000022
Representing a logical connection relationship between the connection start terminal and the connection end terminal, aibjRepresenting the wiring spatial position matrix coordinates of the starting end of the wiring, ai+mbj+nRepresenting the wiring space position matrix coordinate of the wiring termination end, m and n represent the space position matrix coordinate increment, and a is setibj+n、ai+mbjRepresenting the bending point in the minimum space position matrix routing vector path, forming the minimum space routing vector path, which is represented as follows, and black arrows represent the wiring harness trend:
Figure FDA0002908091350000023
or
Figure FDA0002908091350000024
Figure FDA0002908091350000026
5. The method for optimizing the wiring path inside the whole machine according to claim 4, wherein the step 2.2 is specifically as follows: and (3) taking the spatial position matrix with unequal dimensionality formed in the step (1.2) as a subtree, and taking the minimum spatial position matrix as a subtree to perform diagonal difference operation, wherein the spatial position expression form is as follows:
Figure FDA0002908091350000025
wherein, with aibj-ai+mbj+nThe matrix that is the positive diagonal is the minimum spatial location matrix; with ai-pbj-q-ai+mbj+nThe matrix for the positive angle is a sub-small spatial position matrix; the difference operation according to the diagonal difference matrix is as follows:
Figure FDA0002908091350000031
setting the spatial position matrix of the whole machine as an n multiplied by m order matrix, the minimum spatial position matrix as an i multiplied by j order matrix, the sub-minimum spatial position matrix as a p multiplied by q order matrix, and the diagonal difference matrix x multiplied by y order matrix can be expressed as:
Figure FDA0002908091350000032
wherein, "-" represents the diagonal position difference value operation, and t represents the number of the spatial position matrixes with unequal dimensionalities which can be decomposed by the complete machine spatial position matrix containing the minimum spatial position matrix;
the diagonal difference matrix set is obtained as:
Figure FDA0002908091350000033
6. the method for optimizing the wiring path inside the whole machine according to claim 5, wherein in step 2.3, according to the basic wiring process requirement that the wiring path between the wiring starting end and the wiring terminating end needs to be arranged along a straight line and the number of bends of the path arranged between the wiring starting end and the wiring terminating end is less and better, the optimal comparison of the diagonal difference matrix vector paths is as follows:
specifying a diagonal difference matrix such as
Figure FDA0002908091350000041
Diagonal difference matrix vector path 1 as
Figure FDA0002908091350000042
Diagonal difference matrix vector path 2 as
Figure FDA0002908091350000043
In the diagonal difference matrix vector path 1, the requirement that the wiring path needs to be arranged along a straight line is met, and ai-1bj-q、aibj、ai+mbjThree bending points; in the diagonal difference matrix vector path 2, the requirement that the wiring path needs to be arranged along a straight line is met, and ai-pbj-1、ai+mbjTwo bending points; according to the requirement that the number of the bent paths is less and better, a diagonal difference matrix vector path 2 is superior to a diagonal difference matrix vector path 1, and a secondary small space wiring vector path is formed after the diagonal difference matrix vector path 2 is connected with a minimum space wiring vector path end to end; and repeatedly iterating the processes to form a diagonal difference matrix vector path set, and merging the diagonal difference matrix vector path set and the minimum space wiring vector path end to obtain a whole machine space wiring vector path so as to complete the optimization of the internal wiring path of the whole machine.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117787172A (en) * 2023-12-27 2024-03-29 苏州异格技术有限公司 Construction method and device of wiring resource diagram, computer equipment and storage medium

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100235804A1 (en) * 2009-03-12 2010-09-16 Fujitsu Limited Wiring design apparatus and method
CN102346795A (en) * 2011-09-16 2012-02-08 华中科技大学 Automatic quick wiring method for electric and electronic virtual experiments
CN109033611A (en) * 2018-07-20 2018-12-18 福州大学 A kind of wiring method of VLSI multi-terminal obstacle
CN109357678A (en) * 2018-10-16 2019-02-19 北京航空航天大学 A kind of multiple no-manned plane paths planning method based on heterogeneousization dove colony optimization algorithm
CN111723543A (en) * 2020-06-18 2020-09-29 西安微电子技术研究所 Electromagnetic compatibility design method of electric cylinder, electromagnetic compatibility electric cylinder and application

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100235804A1 (en) * 2009-03-12 2010-09-16 Fujitsu Limited Wiring design apparatus and method
CN102346795A (en) * 2011-09-16 2012-02-08 华中科技大学 Automatic quick wiring method for electric and electronic virtual experiments
CN109033611A (en) * 2018-07-20 2018-12-18 福州大学 A kind of wiring method of VLSI multi-terminal obstacle
CN109357678A (en) * 2018-10-16 2019-02-19 北京航空航天大学 A kind of multiple no-manned plane paths planning method based on heterogeneousization dove colony optimization algorithm
CN111723543A (en) * 2020-06-18 2020-09-29 西安微电子技术研究所 Electromagnetic compatibility design method of electric cylinder, electromagnetic compatibility electric cylinder and application

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
JUNJUN WANG等: "Near-Field Radiation Calculation of Irregular Wiring Twisted-Wire Pairs Based on Mode Decomposition", 《IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY》, vol. 59, no. 2, pages 600 - 608, XP011639897, DOI: 10.1109/TEMC.2016.2635263 *
高海霞 等: "FPGA开关块拓扑的评估", 《西安电子科技大学学报》, vol. 30, no. 06, pages 752 - 755 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117787172A (en) * 2023-12-27 2024-03-29 苏州异格技术有限公司 Construction method and device of wiring resource diagram, computer equipment and storage medium

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